CPUMDbg.cpp revision 90eb38579e280c6a0e466177b2a9632ab9eb8c44
/* $Id$ */
/** @file
* CPUM - CPU Monitor / Manager, Debugger & Debugging APIs.
*/
/*
* Copyright (C) 2010-2011 Oracle Corporation
*
* This file is part of VirtualBox Open Source Edition (OSE), as
* available from http://www.virtualbox.org. This file is free software;
* General Public License (GPL) as published by the Free Software
* Foundation, in version 2 as it comes in the "COPYING" file of the
* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
*/
/*******************************************************************************
* Header Files *
*******************************************************************************/
#define LOG_GROUP LOG_GROUP_DBGF
#include "CPUMInternal.h"
/**
* @interface_method_impl{DBGFREGDESC, pfnGet}
*/
static DECLCALLBACK(int) cpumR3RegGet_Generic(void *pvUser, PCDBGFREGDESC pDesc, PDBGFREGVAL pValue)
{
{
default:
}
}
/**
* @interface_method_impl{DBGFREGDESC, pfnGet}
*/
static DECLCALLBACK(int) cpumR3RegSet_Generic(void *pvUser, PCDBGFREGDESC pDesc, PCDBGFREGVAL pValue, PCDBGFREGVAL pfMask)
{
{
case DBGFREGVALTYPE_U8:
return VINF_SUCCESS;
case DBGFREGVALTYPE_U16:
return VINF_SUCCESS;
case DBGFREGVALTYPE_U32:
return VINF_SUCCESS;
case DBGFREGVALTYPE_U64:
return VINF_SUCCESS;
case DBGFREGVALTYPE_U128:
{
RTUInt128AssignAnd((PRTUINT128U)pv, RTUInt128AssignBitwiseNot(RTUInt128Assign(&Val, &pfMask->u128)));
RTUInt128AssignOr((PRTUINT128U)pv, RTUInt128AssignAnd(RTUInt128Assign(&Val, &pValue->u128), &pfMask->u128));
return VINF_SUCCESS;
}
default:
}
}
/**
* @interface_method_impl{DBGFREGDESC, pfnGet}
*/
static DECLCALLBACK(int) cpumR3RegSet_seg(void *pvUser, PCDBGFREGDESC pDesc, PCDBGFREGVAL pValue, PCDBGFREGVAL pfMask)
{
/** @todo perform a selector load, updating hidden selectors and stuff. */
return VERR_NOT_IMPLEMENTED;
}
/**
* @interface_method_impl{DBGFREGDESC, pfnGet}
*/
{
{
default:
}
return VINF_SUCCESS;
}
/**
* @interface_method_impl{DBGFREGDESC, pfnGet}
*/
static DECLCALLBACK(int) cpumR3RegSet_crX(void *pvUser, PCDBGFREGDESC pDesc, PCDBGFREGVAL pValue, PCDBGFREGVAL pfMask)
{
int rc;
/*
* Calculate the new value.
*/
{
case DBGFREGVALTYPE_U64:
break;
case DBGFREGVALTYPE_U32:
break;
default: AssertFailedReturn(VERR_INTERNAL_ERROR_4);
}
{
if (RT_FAILURE(rc))
return rc;
}
/*
* Perform the assignment.
*/
switch (pDesc->offRegister)
{
default:
}
return rc;
}
/**
* @interface_method_impl{DBGFREGDESC, pfnGet}
*/
{
{
default:
}
return VINF_SUCCESS;
}
/**
* @interface_method_impl{DBGFREGDESC, pfnGet}
*/
static DECLCALLBACK(int) cpumR3RegSet_drX(void *pvUser, PCDBGFREGDESC pDesc, PCDBGFREGVAL pValue, PCDBGFREGVAL pfMask)
{
int rc;
/*
* Calculate the new value.
*/
{
case DBGFREGVALTYPE_U64:
break;
case DBGFREGVALTYPE_U32:
break;
default: AssertFailedReturn(VERR_INTERNAL_ERROR_4);
}
{
if (RT_FAILURE(rc))
return rc;
}
/*
* Perform the assignment.
*/
}
/**
* @interface_method_impl{DBGFREGDESC, pfnGet}
*/
{
if (RT_SUCCESS(rc))
{
{
default:
}
}
/** @todo what to do about errors? */
return rc;
}
/**
* @interface_method_impl{DBGFREGDESC, pfnGet}
*/
static DECLCALLBACK(int) cpumR3RegSet_msr(void *pvUser, PCDBGFREGDESC pDesc, PCDBGFREGVAL pValue, PCDBGFREGVAL pfMask)
{
int rc;
/*
* Calculate the new value.
*/
{
case DBGFREGVALTYPE_U64:
break;
case DBGFREGVALTYPE_U32:
break;
case DBGFREGVALTYPE_U16:
break;
default: AssertFailedReturn(VERR_INTERNAL_ERROR_4);
}
{
if (RT_FAILURE(rc))
return rc;
}
/*
* Perform the assignment.
*/
}
/**
* @interface_method_impl{DBGFREGDESC, pfnGet}
*/
{
return VINF_SUCCESS;
}
/**
* @interface_method_impl{DBGFREGDESC, pfnGet}
*/
static DECLCALLBACK(int) cpumR3RegSet_gdtr(void *pvUser, PCDBGFREGDESC pDesc, PCDBGFREGVAL pValue, PCDBGFREGVAL pfMask)
{
return VERR_NOT_IMPLEMENTED;
}
/**
* @interface_method_impl{DBGFREGDESC, pfnGet}
*/
{
return VINF_SUCCESS;
}
/**
* @interface_method_impl{DBGFREGDESC, pfnGet}
*/
static DECLCALLBACK(int) cpumR3RegSet_idtr(void *pvUser, PCDBGFREGDESC pDesc, PCDBGFREGVAL pValue, PCDBGFREGVAL pfMask)
{
return VERR_NOT_IMPLEMENTED;
}
/**
* @interface_method_impl{DBGFREGDESC, pfnGet}
*/
{
return VERR_NOT_IMPLEMENTED;
}
/**
* @interface_method_impl{DBGFREGDESC, pfnGet}
*/
static DECLCALLBACK(int) cpumR3RegSet_ftw(void *pvUser, PCDBGFREGDESC pDesc, PCDBGFREGVAL pValue, PCDBGFREGVAL pfMask)
{
return VERR_NOT_IMPLEMENTED;
}
/**
* @interface_method_impl{DBGFREGDESC, pfnGet}
*/
{
return VERR_NOT_IMPLEMENTED;
}
/**
* @interface_method_impl{DBGFREGDESC, pfnGet}
*/
static DECLCALLBACK(int) cpumR3RegSet_stN(void *pvUser, PCDBGFREGDESC pDesc, PCDBGFREGVAL pValue, PCDBGFREGVAL pfMask)
{
return VERR_NOT_IMPLEMENTED;
}
/*
* Set up aliases.
*/
{ \
{ psz32, DBGFREGVALTYPE_U32 }, \
{ psz16, DBGFREGVALTYPE_U16 }, \
{ psz8, DBGFREGVALTYPE_U8 }, \
{ NULL, DBGFREGVALTYPE_INVALID } \
}
static DBGFREGALIAS const g_aCpumRegAliases_fpuip[] =
{
{ "fpuip16", DBGFREGVALTYPE_U16 },
};
static DBGFREGALIAS const g_aCpumRegAliases_fpudp[] =
{
{ "fpudp16", DBGFREGVALTYPE_U16 },
};
static DBGFREGALIAS const g_aCpumRegAliases_cr0[] =
{
{ "msw", DBGFREGVALTYPE_U16 },
};
/*
* Sub fields.
*/
/** Sub-fields for the (hidden) segment attribute register. */
static DBGFREGSUBFIELD const g_aCpumRegFields_seg[] =
{
};
/** Sub-fields for the flags register. */
static DBGFREGSUBFIELD const g_aCpumRegFields_rflags[] =
{
};
/** Sub-fields for the FPU control word register. */
static DBGFREGSUBFIELD const g_aCpumRegFields_fcw[] =
{
};
/** Sub-fields for the FPU status word register. */
static DBGFREGSUBFIELD const g_aCpumRegFields_fsw[] =
{
};
/** Sub-fields for the FPU tag word register. */
static DBGFREGSUBFIELD const g_aCpumRegFields_ftw[] =
{
};
/** Sub-fields for the Multimedia Extensions Control and Status Register. */
static DBGFREGSUBFIELD const g_aCpumRegFields_mxcsr[] =
{
};
/** Sub-fields for the FPU tag word register. */
static DBGFREGSUBFIELD const g_aCpumRegFields_stN[] =
{
};
/** Sub-fields for the MMX registers. */
static DBGFREGSUBFIELD const g_aCpumRegFields_mmN[] =
{
};
/** Sub-fields for the XMM registers. */
static DBGFREGSUBFIELD const g_aCpumRegFields_xmmN[] =
{
};
/** Sub-fields for the CR0 register. */
static DBGFREGSUBFIELD const g_aCpumRegFields_cr0[] =
{
/** @todo */
};
/** Sub-fields for the CR3 register. */
static DBGFREGSUBFIELD const g_aCpumRegFields_cr3[] =
{
/** @todo */
};
/** Sub-fields for the CR4 register. */
static DBGFREGSUBFIELD const g_aCpumRegFields_cr4[] =
{
/** @todo */
};
/** Sub-fields for the DR6 register. */
static DBGFREGSUBFIELD const g_aCpumRegFields_dr6[] =
{
/** @todo */
};
/** Sub-fields for the DR7 register. */
static DBGFREGSUBFIELD const g_aCpumRegFields_dr7[] =
{
/** @todo */
};
/** Sub-fields for the CR_PAT MSR. */
static DBGFREGSUBFIELD const g_aCpumRegFields_apic_base[] =
{
};
/** Sub-fields for the CR_PAT MSR. */
static DBGFREGSUBFIELD const g_aCpumRegFields_cr_pat[] =
{
/** @todo */
};
/** Sub-fields for the PERF_STATUS MSR. */
static DBGFREGSUBFIELD const g_aCpumRegFields_perf_status[] =
{
/** @todo */
};
/** Sub-fields for the EFER MSR. */
static DBGFREGSUBFIELD const g_aCpumRegFields_efer[] =
{
/** @todo */
};
/** Sub-fields for the STAR MSR. */
static DBGFREGSUBFIELD const g_aCpumRegFields_star[] =
{
/** @todo */
};
/** Sub-fields for the CSTAR MSR. */
static DBGFREGSUBFIELD const g_aCpumRegFields_cstar[] =
{
/** @todo */
};
/** Sub-fields for the LSTAR MSR. */
static DBGFREGSUBFIELD const g_aCpumRegFields_lstar[] =
{
/** @todo */
};
/** Sub-fields for the SF_MASK MSR. */
static DBGFREGSUBFIELD const g_aCpumRegFields_sf_mask[] =
{
/** @todo */
};
/**
* The register descriptors.
*/
static DBGFREGDESC const g_aCpumRegDescs[] =
{
#define CPUMREGDESC_RW_AS(a_szName, a_RegSuff, a_TypeSuff, a_CpumCtxMemb, a_pfnGet, a_pfnSet, a_paAliases, a_paSubFields) \
{ a_szName, DBGFREG_##a_RegSuff, DBGFREGVALTYPE_##a_TypeSuff, 0 /*fFlags*/, RT_OFFSETOF(CPUMCTX, a_CpumCtxMemb), a_pfnGet, a_pfnSet, a_paAliases, a_paSubFields }
#define CPUMREGDESC_RO_AS(a_szName, a_RegSuff, a_TypeSuff, a_CpumCtxMemb, a_pfnGet, a_pfnSet, a_paAliases, a_paSubFields) \
{ a_szName, DBGFREG_##a_RegSuff, DBGFREGVALTYPE_##a_TypeSuff, DBGFREG_FLAGS_READ_ONLY, RT_OFFSETOF(CPUMCTX, a_CpumCtxMemb), a_pfnGet, a_pfnSet, a_paAliases, a_paSubFields }
#define CPUMREGDESC_EX_AS(a_szName, a_RegSuff, a_TypeSuff, a_offRegister, a_pfnGet, a_pfnSet, a_paAliases, a_paSubFields) \
{ a_szName, DBGFREG_##a_RegSuff, DBGFREGVALTYPE_##a_TypeSuff, 0 /*fFlags*/, a_offRegister, a_pfnGet, a_pfnSet, a_paAliases, a_paSubFields }
CPUMREGDESC_RW_AS(#LName, UName, U64, LName, cpumR3RegGet_Generic, cpumR3RegSet_Generic, g_aCpumRegAliases_##LName, NULL)
CPUMREGDESC_RW_AS(#LName, UName, U16, LName, cpumR3RegGet_Generic, cpumR3RegSet_seg, NULL, NULL ), \
CPUMREGDESC_RW_AS(#LName "_attr", UName##_ATTR, U32, LName##Hid.Attr.u, cpumR3RegGet_Generic, cpumR3RegSet_Generic, NULL, g_aCpumRegFields_seg), \
CPUMREGDESC_RW_AS(#LName "_base", UName##_BASE, U64, LName##Hid.u64Base, cpumR3RegGet_Generic, cpumR3RegSet_Generic, NULL, NULL ), \
CPUMREGDESC_RW_AS(#LName "_lim", UName##_LIMIT, U32, LName##Hid.u32Limit, cpumR3RegGet_Generic, cpumR3RegSet_Generic, NULL, NULL )
CPUMREGDESC_RW_AS("rflags", RFLAGS, U64, rflags, cpumR3RegGet_Generic, cpumR3RegSet_Generic, g_aCpumRegAliases_rflags, g_aCpumRegFields_rflags ),
CPUMREGDESC_RW_AS("fcw", FCW, U16, fpu.FCW, cpumR3RegGet_Generic, cpumR3RegSet_Generic, NULL, g_aCpumRegFields_fcw ),
CPUMREGDESC_RW_AS("fsw", FSW, U16, fpu.FSW, cpumR3RegGet_Generic, cpumR3RegSet_Generic, NULL, g_aCpumRegFields_fsw ),
CPUMREGDESC_RW_AS("ftw", FTW, U16, fpu.FTW, cpumR3RegGet_ftw, cpumR3RegSet_ftw, NULL, g_aCpumRegFields_ftw ),
CPUMREGDESC_RW_AS("fop", FOP, U16, fpu.FOP, cpumR3RegGet_Generic, cpumR3RegSet_Generic, NULL, NULL ),
CPUMREGDESC_RW_AS("fpuip", FPUIP, U32, fpu.FPUIP, cpumR3RegGet_Generic, cpumR3RegSet_Generic, g_aCpumRegAliases_fpuip, NULL ),
CPUMREGDESC_RW_AS("fpucs", FPUCS, U16, fpu.CS, cpumR3RegGet_Generic, cpumR3RegSet_Generic, NULL, NULL ),
CPUMREGDESC_RW_AS("fpudp", FPUDP, U32, fpu.FPUDP, cpumR3RegGet_Generic, cpumR3RegSet_Generic, g_aCpumRegAliases_fpudp, NULL ),
CPUMREGDESC_RW_AS("fpuds", FPUDS, U16, fpu.DS, cpumR3RegGet_Generic, cpumR3RegSet_Generic, NULL, NULL ),
CPUMREGDESC_RW_AS("mxcsr", MXCSR, U32, fpu.MXCSR, cpumR3RegGet_Generic, cpumR3RegSet_Generic, NULL, g_aCpumRegFields_mxcsr ),
CPUMREGDESC_RW_AS("mxcsr_mask", MXCSR_MASK, U32, fpu.MXCSR_MASK, cpumR3RegGet_Generic, cpumR3RegSet_Generic, NULL, g_aCpumRegFields_mxcsr ),
#define CPUMREGDESC_ST(n) \
CPUMREGDESC_RW_AS("st" #n, ST##n, LRD, fpu.aRegs[n], cpumR3RegGet_stN, cpumR3RegSet_stN, NULL, g_aCpumRegFields_stN )
CPUMREGDESC_ST(0),
CPUMREGDESC_ST(1),
CPUMREGDESC_ST(2),
CPUMREGDESC_ST(3),
CPUMREGDESC_ST(4),
CPUMREGDESC_ST(5),
CPUMREGDESC_ST(6),
CPUMREGDESC_ST(7),
#define CPUMREGDESC_MM(n) \
CPUMREGDESC_RW_AS("mm" #n, MM##n, U64, fpu.aRegs[n].mmx, cpumR3RegGet_Generic, cpumR3RegSet_Generic, NULL, g_aCpumRegFields_mmN )
CPUMREGDESC_MM(0),
CPUMREGDESC_MM(1),
CPUMREGDESC_MM(2),
CPUMREGDESC_MM(3),
CPUMREGDESC_MM(4),
CPUMREGDESC_MM(5),
CPUMREGDESC_MM(6),
CPUMREGDESC_MM(7),
#define CPUMREGDESC_XMM(n) \
CPUMREGDESC_RW_AS("xmm" #n, XMM##n, U128, fpu.aXMM[n].xmm, cpumR3RegGet_Generic, cpumR3RegSet_Generic, NULL, g_aCpumRegFields_xmmN )
CPUMREGDESC_XMM(0),
CPUMREGDESC_XMM(1),
CPUMREGDESC_XMM(2),
CPUMREGDESC_XMM(3),
CPUMREGDESC_XMM(4),
CPUMREGDESC_XMM(5),
CPUMREGDESC_XMM(6),
CPUMREGDESC_XMM(7),
CPUMREGDESC_XMM(8),
CPUMREGDESC_XMM(9),
CPUMREGDESC_XMM(10),
CPUMREGDESC_XMM(11),
CPUMREGDESC_XMM(12),
CPUMREGDESC_XMM(13),
CPUMREGDESC_XMM(14),
CPUMREGDESC_XMM(15),
CPUMREGDESC_RW_AS("gdtr_base", GDTR_BASE, U64, gdtr.pGdt, cpumR3RegGet_Generic, cpumR3RegSet_Generic, NULL, NULL ),
CPUMREGDESC_RW_AS("gdtr_limit", GDTR_LIMIT, U16, gdtr.cbGdt, cpumR3RegGet_Generic, cpumR3RegSet_Generic, NULL, NULL ),
CPUMREGDESC_RW_AS("idtr_base", IDTR_BASE, U64, idtr.pIdt, cpumR3RegGet_Generic, cpumR3RegSet_Generic, NULL, NULL ),
CPUMREGDESC_RW_AS("idtr_limit", IDTR_LIMIT, U16, idtr.cbIdt, cpumR3RegGet_Generic, cpumR3RegSet_Generic, NULL, NULL ),
CPUMREGDESC_EX_AS("cr0", CR0, U32, 0, cpumR3RegGet_crX, cpumR3RegSet_crX, g_aCpumRegAliases_cr0, g_aCpumRegFields_cr0 ),
CPUMREGDESC_EX_AS("cr3", CR3, U64, 3, cpumR3RegGet_crX, cpumR3RegSet_crX, NULL, g_aCpumRegFields_cr3 ),
CPUMREGDESC_EX_AS("cr4", CR4, U32, 4, cpumR3RegGet_crX, cpumR3RegSet_crX, NULL, g_aCpumRegFields_cr4 ),
CPUMREGDESC_EX_AS("dr6", DR6, U32, 6, cpumR3RegGet_drX, cpumR3RegSet_drX, NULL, g_aCpumRegFields_dr6 ),
CPUMREGDESC_EX_AS("dr7", DR7, U32, 7, cpumR3RegGet_drX, cpumR3RegSet_drX, NULL, g_aCpumRegFields_dr7 ),
CPUMREGDESC_EX_AS(a_szName, MSR_##UName, a_TypeSuff, MSR_##UName, cpumR3RegGet_msr, cpumR3RegSet_msr, NULL, a_paSubFields )
CPUMREGDESC_EX_AS("ah", AH, U8, RT_OFFSETOF(CPUMCTX, rax) + 1, cpumR3RegGet_Generic, cpumR3RegSet_Generic, NULL, NULL ),
CPUMREGDESC_EX_AS("ch", CH, U8, RT_OFFSETOF(CPUMCTX, rcx) + 1, cpumR3RegGet_Generic, cpumR3RegSet_Generic, NULL, NULL ),
CPUMREGDESC_EX_AS("dh", DH, U8, RT_OFFSETOF(CPUMCTX, rdx) + 1, cpumR3RegGet_Generic, cpumR3RegSet_Generic, NULL, NULL ),
CPUMREGDESC_EX_AS("bh", BH, U8, RT_OFFSETOF(CPUMCTX, rbx) + 1, cpumR3RegGet_Generic, cpumR3RegSet_Generic, NULL, NULL ),
};
/**
* Initializes the debugger related sides of the CPUM component.
*
* Called by CPUMR3Init.
*
* @returns VBox status code.
* @param pVM The VM handle.
*/
{
{
}
return VINF_SUCCESS;
}