CPUMDbg.cpp revision badc8f586d7b8d9606f5d1611bb5d429196fe18b
6ca8a1595bddf29de7894958ae74c255eb2693bevboxsync * CPUM - CPU Monitor / Manager, Debugger & Debugging APIs.
f6dd48677b626c383d1a91cba7688abb0945af7dvboxsync * Copyright (C) 2010-2011 Oracle Corporation
6ca8a1595bddf29de7894958ae74c255eb2693bevboxsync * This file is part of VirtualBox Open Source Edition (OSE), as
6ca8a1595bddf29de7894958ae74c255eb2693bevboxsync * available from http://www.virtualbox.org. This file is free software;
6ca8a1595bddf29de7894958ae74c255eb2693bevboxsync * you can redistribute it and/or modify it under the terms of the GNU
6ca8a1595bddf29de7894958ae74c255eb2693bevboxsync * General Public License (GPL) as published by the Free Software
6ca8a1595bddf29de7894958ae74c255eb2693bevboxsync * Foundation, in version 2 as it comes in the "COPYING" file of the
6ca8a1595bddf29de7894958ae74c255eb2693bevboxsync * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
6ca8a1595bddf29de7894958ae74c255eb2693bevboxsync * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
6ca8a1595bddf29de7894958ae74c255eb2693bevboxsync/*******************************************************************************
6ca8a1595bddf29de7894958ae74c255eb2693bevboxsync* Header Files *
6ca8a1595bddf29de7894958ae74c255eb2693bevboxsync*******************************************************************************/
f6dd48677b626c383d1a91cba7688abb0945af7dvboxsync * @interface_method_impl{DBGFREGDESC, pfnGet}
f6dd48677b626c383d1a91cba7688abb0945af7dvboxsyncstatic DECLCALLBACK(int) cpumR3RegGet_Generic(void *pvUser, PCDBGFREGDESC pDesc, PDBGFREGVAL pValue)
f6dd48677b626c383d1a91cba7688abb0945af7dvboxsync void const *pv = (uint8_t const *)&pVCpu->cpum.s.Guest + pDesc->offRegister;
f6dd48677b626c383d1a91cba7688abb0945af7dvboxsync case DBGFREGVALTYPE_U8: pValue->u8 = *(uint8_t const *)pv; return VINF_SUCCESS;
f6dd48677b626c383d1a91cba7688abb0945af7dvboxsync case DBGFREGVALTYPE_U16: pValue->u16 = *(uint16_t const *)pv; return VINF_SUCCESS;
f6dd48677b626c383d1a91cba7688abb0945af7dvboxsync case DBGFREGVALTYPE_U32: pValue->u32 = *(uint32_t const *)pv; return VINF_SUCCESS;
f6dd48677b626c383d1a91cba7688abb0945af7dvboxsync case DBGFREGVALTYPE_U64: pValue->u64 = *(uint64_t const *)pv; return VINF_SUCCESS;
f6dd48677b626c383d1a91cba7688abb0945af7dvboxsync case DBGFREGVALTYPE_U128: pValue->u128 = *(PCRTUINT128U )pv; return VINF_SUCCESS;
f6dd48677b626c383d1a91cba7688abb0945af7dvboxsync AssertMsgFailedReturn(("%d %s\n", pDesc->enmType, pDesc->pszName), VERR_INTERNAL_ERROR_3);
f6dd48677b626c383d1a91cba7688abb0945af7dvboxsync * @interface_method_impl{DBGFREGDESC, pfnGet}
f6dd48677b626c383d1a91cba7688abb0945af7dvboxsyncstatic DECLCALLBACK(int) cpumR3RegSet_Generic(void *pvUser, PCDBGFREGDESC pDesc, PCDBGFREGVAL pValue, PCDBGFREGVAL pfMask)
f6dd48677b626c383d1a91cba7688abb0945af7dvboxsync void *pv = (uint8_t *)&pVCpu->cpum.s.Guest + pDesc->offRegister;
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync RTUInt128AssignAnd((PRTUINT128U)pv, RTUInt128AssignBitwiseNot(RTUInt128Assign(&Val, &pfMask->u128)));
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync RTUInt128AssignOr((PRTUINT128U)pv, RTUInt128AssignAnd(RTUInt128Assign(&Val, &pValue->u128), &pfMask->u128));
f6dd48677b626c383d1a91cba7688abb0945af7dvboxsync AssertMsgFailedReturn(("%d %s\n", pDesc->enmType, pDesc->pszName), VERR_INTERNAL_ERROR_3);
f6dd48677b626c383d1a91cba7688abb0945af7dvboxsync * @interface_method_impl{DBGFREGDESC, pfnGet}
f6dd48677b626c383d1a91cba7688abb0945af7dvboxsyncstatic DECLCALLBACK(int) cpumR3RegSet_seg(void *pvUser, PCDBGFREGDESC pDesc, PCDBGFREGVAL pValue, PCDBGFREGVAL pfMask)
f6dd48677b626c383d1a91cba7688abb0945af7dvboxsync /** @todo perform a selector load, updating hidden selectors and stuff. */
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync * @interface_method_impl{DBGFREGDESC, pfnGet}
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsyncstatic DECLCALLBACK(int) cpumR3RegGet_crX(void *pvUser, PCDBGFREGDESC pDesc, PDBGFREGVAL pValue)
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync void const *pv = (uint8_t const *)&pVCpu->cpum.s.Guest + pDesc->offRegister;
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync int rc = CPUMGetGuestCRx(pVCpu, pDesc->offRegister, &u64Value);
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync case DBGFREGVALTYPE_U64: pValue->u64 = u64Value; break;
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync case DBGFREGVALTYPE_U32: pValue->u32 = (uint32_t)u64Value; break;
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync * @interface_method_impl{DBGFREGDESC, pfnGet}
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsyncstatic DECLCALLBACK(int) cpumR3RegSet_crX(void *pvUser, PCDBGFREGDESC pDesc, PCDBGFREGVAL pValue, PCDBGFREGVAL pfMask)
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync void const *pv = (uint8_t const *)&pVCpu->cpum.s.Guest + pDesc->offRegister;
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync * Calculate the new value.
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync default: AssertFailedReturn(VERR_INTERNAL_ERROR_4);
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync rc = CPUMGetGuestCRx(pVCpu, pDesc->offRegister, &u64FullValue);
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync * Perform the assignment.
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync case 0: rc = CPUMSetGuestCR0(pVCpu, u64Value); break;
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync case 2: rc = CPUMSetGuestCR2(pVCpu, u64Value); break;
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync case 3: rc = CPUMSetGuestCR3(pVCpu, u64Value); break;
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync case 4: rc = CPUMSetGuestCR4(pVCpu, u64Value); break;
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync case 8: rc = PDMApicSetTPR(pVCpu, (uint8_t)(u64Value << 4)); break;
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync * @interface_method_impl{DBGFREGDESC, pfnGet}
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsyncstatic DECLCALLBACK(int) cpumR3RegGet_drX(void *pvUser, PCDBGFREGDESC pDesc, PDBGFREGVAL pValue)
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync void const *pv = (uint8_t const *)&pVCpu->cpum.s.Guest + pDesc->offRegister;
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync int rc = CPUMGetGuestDRx(pVCpu, pDesc->offRegister, &u64Value);
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync case DBGFREGVALTYPE_U64: pValue->u64 = u64Value; break;
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync case DBGFREGVALTYPE_U32: pValue->u32 = (uint32_t)u64Value; break;
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync * @interface_method_impl{DBGFREGDESC, pfnGet}
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsyncstatic DECLCALLBACK(int) cpumR3RegSet_drX(void *pvUser, PCDBGFREGDESC pDesc, PCDBGFREGVAL pValue, PCDBGFREGVAL pfMask)
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync void const *pv = (uint8_t const *)&pVCpu->cpum.s.Guest + pDesc->offRegister;
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync * Calculate the new value.
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync default: AssertFailedReturn(VERR_INTERNAL_ERROR_4);
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync rc = CPUMGetGuestDRx(pVCpu, pDesc->offRegister, &u64FullValue);
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync * Perform the assignment.
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync return CPUMSetGuestDRx(pVCpu, pDesc->offRegister, u64Value);
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync * @interface_method_impl{DBGFREGDESC, pfnGet}
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsyncstatic DECLCALLBACK(int) cpumR3RegGet_msr(void *pvUser, PCDBGFREGDESC pDesc, PDBGFREGVAL pValue)
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync void const *pv = (uint8_t const *)&pVCpu->cpum.s.Guest + pDesc->offRegister;
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync int rc = CPUMQueryGuestMsr(pVCpu, pDesc->offRegister, &u64Value);
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync case DBGFREGVALTYPE_U64: pValue->u64 = u64Value; break;
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync case DBGFREGVALTYPE_U32: pValue->u32 = (uint32_t)u64Value; break;
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync case DBGFREGVALTYPE_U16: pValue->u16 = (uint16_t)u64Value; break;
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync /** @todo what to do about errors? */
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync * @interface_method_impl{DBGFREGDESC, pfnGet}
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsyncstatic DECLCALLBACK(int) cpumR3RegSet_msr(void *pvUser, PCDBGFREGDESC pDesc, PCDBGFREGVAL pValue, PCDBGFREGVAL pfMask)
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync void const *pv = (uint8_t const *)&pVCpu->cpum.s.Guest + pDesc->offRegister;
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync * Calculate the new value.
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync default: AssertFailedReturn(VERR_INTERNAL_ERROR_4);
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync rc = CPUMQueryGuestMsr(pVCpu, pDesc->offRegister, &u64FullValue);
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync * Perform the assignment.
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync return CPUMSetGuestMsr(pVCpu, pDesc->offRegister, u64Value);
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync * @interface_method_impl{DBGFREGDESC, pfnGet}
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsyncstatic DECLCALLBACK(int) cpumR3RegGet_gdtr(void *pvUser, PCDBGFREGDESC pDesc, PDBGFREGVAL pValue)
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync void const *pv = (uint8_t const *)&pVCpu->cpum.s.Guest + pDesc->offRegister;
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync pValue->dtr.u32Limit = pVCpu->cpum.s.Guest.gdtr.cbGdt;
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync pValue->dtr.u64Base = pVCpu->cpum.s.Guest.gdtr.pGdt;
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync * @interface_method_impl{DBGFREGDESC, pfnGet}
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsyncstatic DECLCALLBACK(int) cpumR3RegSet_gdtr(void *pvUser, PCDBGFREGDESC pDesc, PCDBGFREGVAL pValue, PCDBGFREGVAL pfMask)
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync * @interface_method_impl{DBGFREGDESC, pfnGet}
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsyncstatic DECLCALLBACK(int) cpumR3RegGet_idtr(void *pvUser, PCDBGFREGDESC pDesc, PDBGFREGVAL pValue)
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync void const *pv = (uint8_t const *)&pVCpu->cpum.s.Guest + pDesc->offRegister;
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync pValue->dtr.u32Limit = pVCpu->cpum.s.Guest.idtr.cbIdt;
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync pValue->dtr.u64Base = pVCpu->cpum.s.Guest.idtr.pIdt;
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync * @interface_method_impl{DBGFREGDESC, pfnGet}
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsyncstatic DECLCALLBACK(int) cpumR3RegSet_idtr(void *pvUser, PCDBGFREGDESC pDesc, PCDBGFREGVAL pValue, PCDBGFREGVAL pfMask)
badc8f586d7b8d9606f5d1611bb5d429196fe18bvboxsync * Is the FPU state in FXSAVE format or not.
badc8f586d7b8d9606f5d1611bb5d429196fe18bvboxsync * @returns true if it is, false if it's in FNSAVE.
badc8f586d7b8d9606f5d1611bb5d429196fe18bvboxsync * @param pVCpu The virtual CPU handle.
badc8f586d7b8d9606f5d1611bb5d429196fe18bvboxsyncDECLINLINE(bool) cpumR3RegIsFxSaveFormat(PVMCPU pVCpu)
badc8f586d7b8d9606f5d1611bb5d429196fe18bvboxsync return true;
badc8f586d7b8d9606f5d1611bb5d429196fe18bvboxsync return pVCpu->pVMR3->cpum.s.CPUFeatures.edx.u1FXSR;
badc8f586d7b8d9606f5d1611bb5d429196fe18bvboxsync * Determins the tag register value for a CPU register when the FPU state
badc8f586d7b8d9606f5d1611bb5d429196fe18bvboxsync * format is FXSAVE.
badc8f586d7b8d9606f5d1611bb5d429196fe18bvboxsync * @returns The tag register value.
badc8f586d7b8d9606f5d1611bb5d429196fe18bvboxsync * @param pVCpu The virtual CPU handle.
badc8f586d7b8d9606f5d1611bb5d429196fe18bvboxsync * @param iReg The register number (0..7).
badc8f586d7b8d9606f5d1611bb5d429196fe18bvboxsyncDECLINLINE(uint16_t) cpumR3RegCalcFpuTagFromFxSave(PVMCPU pVCpu, unsigned iReg)
badc8f586d7b8d9606f5d1611bb5d429196fe18bvboxsync * See table 11-1 in the AMD docs.
badc8f586d7b8d9606f5d1611bb5d429196fe18bvboxsync if (!(pVCpu->cpum.s.Guest.fpu.FTW & RT_BIT_32(iReg)))
badc8f586d7b8d9606f5d1611bb5d429196fe18bvboxsync uint16_t const uExp = pVCpu->cpum.s.Guest.fpu.aRegs[iReg].au16[4];
badc8f586d7b8d9606f5d1611bb5d429196fe18bvboxsync if (pVCpu->cpum.s.Guest.fpu.aRegs[iReg].au64[0] == 0) /* J & M == 0 */
badc8f586d7b8d9606f5d1611bb5d429196fe18bvboxsync if (!(pVCpu->cpum.s.Guest.fpu.aRegs[iReg].au64[0] >> 63)) /* J == 0 */
badc8f586d7b8d9606f5d1611bb5d429196fe18bvboxsync return 0; /* b00 - valid (normal) */
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync * @interface_method_impl{DBGFREGDESC, pfnGet}
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsyncstatic DECLCALLBACK(int) cpumR3RegGet_ftw(void *pvUser, PCDBGFREGDESC pDesc, PDBGFREGVAL pValue)
badc8f586d7b8d9606f5d1611bb5d429196fe18bvboxsync void const *pv = (uint8_t const *)&pVCpu->cpum.s.Guest + pDesc->offRegister;
badc8f586d7b8d9606f5d1611bb5d429196fe18bvboxsync pValue->u16 = cpumR3RegCalcFpuTagFromFxSave(pVCpu, 0)
badc8f586d7b8d9606f5d1611bb5d429196fe18bvboxsync PCX86FPUSTATE pOldFpu = (PCX86FPUSTATE)&pVCpu->cpum.s.Guest.fpu;
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync * @interface_method_impl{DBGFREGDESC, pfnGet}
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsyncstatic DECLCALLBACK(int) cpumR3RegSet_ftw(void *pvUser, PCDBGFREGDESC pDesc, PCDBGFREGVAL pValue, PCDBGFREGVAL pfMask)
f6dd48677b626c383d1a91cba7688abb0945af7dvboxsync * @interface_method_impl{DBGFREGDESC, pfnGet}
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsyncstatic DECLCALLBACK(int) cpumR3RegGet_stN(void *pvUser, PCDBGFREGDESC pDesc, PDBGFREGVAL pValue)
badc8f586d7b8d9606f5d1611bb5d429196fe18bvboxsync void const *pv = (uint8_t const *)&pVCpu->cpum.s.Guest + pDesc->offRegister;
badc8f586d7b8d9606f5d1611bb5d429196fe18bvboxsync unsigned iReg = (pVCpu->cpum.s.Guest.fpu.FSW >> 11) & 7;
badc8f586d7b8d9606f5d1611bb5d429196fe18bvboxsync pValue->r80 = pVCpu->cpum.s.Guest.fpu.aRegs[iReg].r80;
badc8f586d7b8d9606f5d1611bb5d429196fe18bvboxsync PCX86FPUSTATE pOldFpu = (PCX86FPUSTATE)&pVCpu->cpum.s.Guest.fpu;
f6dd48677b626c383d1a91cba7688abb0945af7dvboxsync * @interface_method_impl{DBGFREGDESC, pfnGet}
f6dd48677b626c383d1a91cba7688abb0945af7dvboxsyncstatic DECLCALLBACK(int) cpumR3RegSet_stN(void *pvUser, PCDBGFREGDESC pDesc, PCDBGFREGVAL pValue, PCDBGFREGVAL pfMask)
6ca8a1595bddf29de7894958ae74c255eb2693bevboxsync * Set up aliases.
f6dd48677b626c383d1a91cba7688abb0945af7dvboxsync#define CPUMREGALIAS_STD(Name, psz32, psz16, psz8) \
f6dd48677b626c383d1a91cba7688abb0945af7dvboxsync static DBGFREGALIAS const g_aCpumRegAliases_##Name[] = \
f6dd48677b626c383d1a91cba7688abb0945af7dvboxsyncstatic DBGFREGALIAS const g_aCpumRegAliases_fpuip[] =
f6dd48677b626c383d1a91cba7688abb0945af7dvboxsyncstatic DBGFREGALIAS const g_aCpumRegAliases_fpudp[] =
6ca8a1595bddf29de7894958ae74c255eb2693bevboxsync * Sub fields.
6ca8a1595bddf29de7894958ae74c255eb2693bevboxsync/** Sub-fields for the (hidden) segment attribute register. */
f6dd48677b626c383d1a91cba7688abb0945af7dvboxsyncstatic DBGFREGSUBFIELD const g_aCpumRegFields_seg[] =
6ca8a1595bddf29de7894958ae74c255eb2693bevboxsync/** Sub-fields for the flags register. */
f6dd48677b626c383d1a91cba7688abb0945af7dvboxsyncstatic DBGFREGSUBFIELD const g_aCpumRegFields_rflags[] =
6ca8a1595bddf29de7894958ae74c255eb2693bevboxsync/** Sub-fields for the FPU control word register. */
f6dd48677b626c383d1a91cba7688abb0945af7dvboxsyncstatic DBGFREGSUBFIELD const g_aCpumRegFields_fcw[] =
6ca8a1595bddf29de7894958ae74c255eb2693bevboxsync/** Sub-fields for the FPU status word register. */
f6dd48677b626c383d1a91cba7688abb0945af7dvboxsyncstatic DBGFREGSUBFIELD const g_aCpumRegFields_fsw[] =
6ca8a1595bddf29de7894958ae74c255eb2693bevboxsync/** Sub-fields for the FPU tag word register. */
f6dd48677b626c383d1a91cba7688abb0945af7dvboxsyncstatic DBGFREGSUBFIELD const g_aCpumRegFields_ftw[] =
6ca8a1595bddf29de7894958ae74c255eb2693bevboxsync/** Sub-fields for the Multimedia Extensions Control and Status Register. */
f6dd48677b626c383d1a91cba7688abb0945af7dvboxsyncstatic DBGFREGSUBFIELD const g_aCpumRegFields_mxcsr[] =
6ca8a1595bddf29de7894958ae74c255eb2693bevboxsync/** Sub-fields for the FPU tag word register. */
f6dd48677b626c383d1a91cba7688abb0945af7dvboxsyncstatic DBGFREGSUBFIELD const g_aCpumRegFields_stN[] =
6ca8a1595bddf29de7894958ae74c255eb2693bevboxsync/** Sub-fields for the MMX registers. */
f6dd48677b626c383d1a91cba7688abb0945af7dvboxsyncstatic DBGFREGSUBFIELD const g_aCpumRegFields_mmN[] =
6ca8a1595bddf29de7894958ae74c255eb2693bevboxsync/** Sub-fields for the XMM registers. */
f6dd48677b626c383d1a91cba7688abb0945af7dvboxsyncstatic DBGFREGSUBFIELD const g_aCpumRegFields_xmmN[] =
6ca8a1595bddf29de7894958ae74c255eb2693bevboxsync/** Sub-fields for the CR0 register. */
f6dd48677b626c383d1a91cba7688abb0945af7dvboxsyncstatic DBGFREGSUBFIELD const g_aCpumRegFields_cr0[] =
6ca8a1595bddf29de7894958ae74c255eb2693bevboxsync /** @todo */
6ca8a1595bddf29de7894958ae74c255eb2693bevboxsync/** Sub-fields for the CR3 register. */
f6dd48677b626c383d1a91cba7688abb0945af7dvboxsyncstatic DBGFREGSUBFIELD const g_aCpumRegFields_cr3[] =
6ca8a1595bddf29de7894958ae74c255eb2693bevboxsync /** @todo */
6ca8a1595bddf29de7894958ae74c255eb2693bevboxsync/** Sub-fields for the CR4 register. */
f6dd48677b626c383d1a91cba7688abb0945af7dvboxsyncstatic DBGFREGSUBFIELD const g_aCpumRegFields_cr4[] =
6ca8a1595bddf29de7894958ae74c255eb2693bevboxsync /** @todo */
6ca8a1595bddf29de7894958ae74c255eb2693bevboxsync/** Sub-fields for the DR6 register. */
f6dd48677b626c383d1a91cba7688abb0945af7dvboxsyncstatic DBGFREGSUBFIELD const g_aCpumRegFields_dr6[] =
6ca8a1595bddf29de7894958ae74c255eb2693bevboxsync /** @todo */
6ca8a1595bddf29de7894958ae74c255eb2693bevboxsync/** Sub-fields for the DR7 register. */
f6dd48677b626c383d1a91cba7688abb0945af7dvboxsyncstatic DBGFREGSUBFIELD const g_aCpumRegFields_dr7[] =
6ca8a1595bddf29de7894958ae74c255eb2693bevboxsync /** @todo */
6ca8a1595bddf29de7894958ae74c255eb2693bevboxsync/** Sub-fields for the CR_PAT MSR. */
f6dd48677b626c383d1a91cba7688abb0945af7dvboxsyncstatic DBGFREGSUBFIELD const g_aCpumRegFields_apic_base[] =
6ca8a1595bddf29de7894958ae74c255eb2693bevboxsync/** Sub-fields for the CR_PAT MSR. */
f6dd48677b626c383d1a91cba7688abb0945af7dvboxsyncstatic DBGFREGSUBFIELD const g_aCpumRegFields_cr_pat[] =
6ca8a1595bddf29de7894958ae74c255eb2693bevboxsync /** @todo */
6ca8a1595bddf29de7894958ae74c255eb2693bevboxsync/** Sub-fields for the PERF_STATUS MSR. */
f6dd48677b626c383d1a91cba7688abb0945af7dvboxsyncstatic DBGFREGSUBFIELD const g_aCpumRegFields_perf_status[] =
6ca8a1595bddf29de7894958ae74c255eb2693bevboxsync /** @todo */
6ca8a1595bddf29de7894958ae74c255eb2693bevboxsync/** Sub-fields for the EFER MSR. */
f6dd48677b626c383d1a91cba7688abb0945af7dvboxsyncstatic DBGFREGSUBFIELD const g_aCpumRegFields_efer[] =
6ca8a1595bddf29de7894958ae74c255eb2693bevboxsync /** @todo */
6ca8a1595bddf29de7894958ae74c255eb2693bevboxsync/** Sub-fields for the STAR MSR. */
f6dd48677b626c383d1a91cba7688abb0945af7dvboxsyncstatic DBGFREGSUBFIELD const g_aCpumRegFields_star[] =
6ca8a1595bddf29de7894958ae74c255eb2693bevboxsync /** @todo */
6ca8a1595bddf29de7894958ae74c255eb2693bevboxsync/** Sub-fields for the CSTAR MSR. */
f6dd48677b626c383d1a91cba7688abb0945af7dvboxsyncstatic DBGFREGSUBFIELD const g_aCpumRegFields_cstar[] =
6ca8a1595bddf29de7894958ae74c255eb2693bevboxsync /** @todo */
6ca8a1595bddf29de7894958ae74c255eb2693bevboxsync/** Sub-fields for the LSTAR MSR. */
f6dd48677b626c383d1a91cba7688abb0945af7dvboxsyncstatic DBGFREGSUBFIELD const g_aCpumRegFields_lstar[] =
6ca8a1595bddf29de7894958ae74c255eb2693bevboxsync /** @todo */
6ca8a1595bddf29de7894958ae74c255eb2693bevboxsync/** Sub-fields for the SF_MASK MSR. */
f6dd48677b626c383d1a91cba7688abb0945af7dvboxsyncstatic DBGFREGSUBFIELD const g_aCpumRegFields_sf_mask[] =
6ca8a1595bddf29de7894958ae74c255eb2693bevboxsync /** @todo */
6ca8a1595bddf29de7894958ae74c255eb2693bevboxsync * The register descriptors.
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync#define CPUMREGDESC_RW_AS(a_szName, a_RegSuff, a_TypeSuff, a_CpumCtxMemb, a_pfnGet, a_pfnSet, a_paAliases, a_paSubFields) \
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync { a_szName, DBGFREG_##a_RegSuff, DBGFREGVALTYPE_##a_TypeSuff, 0 /*fFlags*/, RT_OFFSETOF(CPUMCTX, a_CpumCtxMemb), a_pfnGet, a_pfnSet, a_paAliases, a_paSubFields }
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync#define CPUMREGDESC_RO_AS(a_szName, a_RegSuff, a_TypeSuff, a_CpumCtxMemb, a_pfnGet, a_pfnSet, a_paAliases, a_paSubFields) \
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync { a_szName, DBGFREG_##a_RegSuff, DBGFREGVALTYPE_##a_TypeSuff, DBGFREG_FLAGS_READ_ONLY, RT_OFFSETOF(CPUMCTX, a_CpumCtxMemb), a_pfnGet, a_pfnSet, a_paAliases, a_paSubFields }
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync#define CPUMREGDESC_EX_AS(a_szName, a_RegSuff, a_TypeSuff, a_offRegister, a_pfnGet, a_pfnSet, a_paAliases, a_paSubFields) \
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync { a_szName, DBGFREG_##a_RegSuff, DBGFREGVALTYPE_##a_TypeSuff, 0 /*fFlags*/, a_offRegister, a_pfnGet, a_pfnSet, a_paAliases, a_paSubFields }
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync CPUMREGDESC_RW_AS(#LName, UName, U64, LName, cpumR3RegGet_Generic, cpumR3RegSet_Generic, g_aCpumRegAliases_##LName, NULL)
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync CPUMREGDESC_RW_AS(#LName, UName, U16, LName, cpumR3RegGet_Generic, cpumR3RegSet_seg, NULL, NULL ), \
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync CPUMREGDESC_RW_AS(#LName "_attr", UName##_ATTR, U32, LName##Hid.Attr.u, cpumR3RegGet_Generic, cpumR3RegSet_Generic, NULL, g_aCpumRegFields_seg), \
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync CPUMREGDESC_RW_AS(#LName "_base", UName##_BASE, U64, LName##Hid.u64Base, cpumR3RegGet_Generic, cpumR3RegSet_Generic, NULL, NULL ), \
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync CPUMREGDESC_RW_AS(#LName "_lim", UName##_LIMIT, U32, LName##Hid.u32Limit, cpumR3RegGet_Generic, cpumR3RegSet_Generic, NULL, NULL )
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync CPUMREGDESC_RW_AS("rflags", RFLAGS, U64, rflags, cpumR3RegGet_Generic, cpumR3RegSet_Generic, g_aCpumRegAliases_rflags, g_aCpumRegFields_rflags ),
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync CPUMREGDESC_RW_AS("fcw", FCW, U16, fpu.FCW, cpumR3RegGet_Generic, cpumR3RegSet_Generic, NULL, g_aCpumRegFields_fcw ),
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync CPUMREGDESC_RW_AS("fsw", FSW, U16, fpu.FSW, cpumR3RegGet_Generic, cpumR3RegSet_Generic, NULL, g_aCpumRegFields_fsw ),
badc8f586d7b8d9606f5d1611bb5d429196fe18bvboxsync CPUMREGDESC_RO_AS("ftw", FTW, U16, fpu.FTW, cpumR3RegGet_ftw, cpumR3RegSet_ftw, NULL, g_aCpumRegFields_ftw ),
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync CPUMREGDESC_RW_AS("fop", FOP, U16, fpu.FOP, cpumR3RegGet_Generic, cpumR3RegSet_Generic, NULL, NULL ),
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync CPUMREGDESC_RW_AS("fpuip", FPUIP, U32, fpu.FPUIP, cpumR3RegGet_Generic, cpumR3RegSet_Generic, g_aCpumRegAliases_fpuip, NULL ),
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync CPUMREGDESC_RW_AS("fpucs", FPUCS, U16, fpu.CS, cpumR3RegGet_Generic, cpumR3RegSet_Generic, NULL, NULL ),
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync CPUMREGDESC_RW_AS("fpudp", FPUDP, U32, fpu.FPUDP, cpumR3RegGet_Generic, cpumR3RegSet_Generic, g_aCpumRegAliases_fpudp, NULL ),
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync CPUMREGDESC_RW_AS("fpuds", FPUDS, U16, fpu.DS, cpumR3RegGet_Generic, cpumR3RegSet_Generic, NULL, NULL ),
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync CPUMREGDESC_RW_AS("mxcsr", MXCSR, U32, fpu.MXCSR, cpumR3RegGet_Generic, cpumR3RegSet_Generic, NULL, g_aCpumRegFields_mxcsr ),
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync CPUMREGDESC_RW_AS("mxcsr_mask", MXCSR_MASK, U32, fpu.MXCSR_MASK, cpumR3RegGet_Generic, cpumR3RegSet_Generic, NULL, g_aCpumRegFields_mxcsr ),
badc8f586d7b8d9606f5d1611bb5d429196fe18bvboxsync CPUMREGDESC_RW_AS("st" #n, ST##n, R80, fpu.aRegs[n], cpumR3RegGet_stN, cpumR3RegSet_stN, NULL, g_aCpumRegFields_stN )
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync CPUMREGDESC_RW_AS("mm" #n, MM##n, U64, fpu.aRegs[n].mmx, cpumR3RegGet_Generic, cpumR3RegSet_Generic, NULL, g_aCpumRegFields_mmN )
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync CPUMREGDESC_RW_AS("xmm" #n, XMM##n, U128, fpu.aXMM[n].xmm, cpumR3RegGet_Generic, cpumR3RegSet_Generic, NULL, g_aCpumRegFields_xmmN )
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync CPUMREGDESC_RW_AS("gdtr_base", GDTR_BASE, U64, gdtr.pGdt, cpumR3RegGet_Generic, cpumR3RegSet_Generic, NULL, NULL ),
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync CPUMREGDESC_RW_AS("gdtr_limit", GDTR_LIMIT, U16, gdtr.cbGdt, cpumR3RegGet_Generic, cpumR3RegSet_Generic, NULL, NULL ),
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync CPUMREGDESC_RW_AS("idtr_base", IDTR_BASE, U64, idtr.pIdt, cpumR3RegGet_Generic, cpumR3RegSet_Generic, NULL, NULL ),
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync CPUMREGDESC_RW_AS("idtr_limit", IDTR_LIMIT, U16, idtr.cbIdt, cpumR3RegGet_Generic, cpumR3RegSet_Generic, NULL, NULL ),
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync CPUMREGDESC_EX_AS("cr0", CR0, U32, 0, cpumR3RegGet_crX, cpumR3RegSet_crX, g_aCpumRegAliases_cr0, g_aCpumRegFields_cr0 ),
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync CPUMREGDESC_EX_AS("cr2", CR2, U64, 2, cpumR3RegGet_crX, cpumR3RegSet_crX, NULL, NULL ),
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync CPUMREGDESC_EX_AS("cr3", CR3, U64, 3, cpumR3RegGet_crX, cpumR3RegSet_crX, NULL, g_aCpumRegFields_cr3 ),
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync CPUMREGDESC_EX_AS("cr4", CR4, U32, 4, cpumR3RegGet_crX, cpumR3RegSet_crX, NULL, g_aCpumRegFields_cr4 ),
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync CPUMREGDESC_EX_AS("cr8", CR8, U32, 8, cpumR3RegGet_crX, cpumR3RegSet_crX, NULL, NULL ),
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync CPUMREGDESC_EX_AS("dr0", DR0, U64, 0, cpumR3RegGet_drX, cpumR3RegSet_drX, NULL, NULL ),
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync CPUMREGDESC_EX_AS("dr1", DR1, U64, 1, cpumR3RegGet_drX, cpumR3RegSet_drX, NULL, NULL ),
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync CPUMREGDESC_EX_AS("dr2", DR2, U64, 2, cpumR3RegGet_drX, cpumR3RegSet_drX, NULL, NULL ),
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync CPUMREGDESC_EX_AS("dr3", DR3, U64, 3, cpumR3RegGet_drX, cpumR3RegSet_drX, NULL, NULL ),
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync CPUMREGDESC_EX_AS("dr6", DR6, U32, 6, cpumR3RegGet_drX, cpumR3RegSet_drX, NULL, g_aCpumRegFields_dr6 ),
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync CPUMREGDESC_EX_AS("dr7", DR7, U32, 7, cpumR3RegGet_drX, cpumR3RegSet_drX, NULL, g_aCpumRegFields_dr7 ),
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync#define CPUMREGDESC_MSR(a_szName, UName, a_TypeSuff, a_paSubFields) \
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync CPUMREGDESC_EX_AS(a_szName, MSR_##UName, a_TypeSuff, MSR_##UName, cpumR3RegGet_msr, cpumR3RegSet_msr, NULL, a_paSubFields )
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync CPUMREGDESC_MSR("apic_base", IA32_APICBASE, U32, g_aCpumRegFields_apic_base ),
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync CPUMREGDESC_MSR("pat", IA32_CR_PAT, U64, g_aCpumRegFields_cr_pat ),
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync CPUMREGDESC_MSR("perf_status", IA32_PERF_STATUS, U64, g_aCpumRegFields_perf_status),
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync CPUMREGDESC_MSR("sysenter_cs", IA32_SYSENTER_CS, U16, NULL ),
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync CPUMREGDESC_MSR("sysenter_eip", IA32_SYSENTER_EIP, U32, NULL ),
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync CPUMREGDESC_MSR("sysenter_esp", IA32_SYSENTER_ESP, U32, NULL ),
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync CPUMREGDESC_MSR("efer", K6_EFER, U32, g_aCpumRegFields_efer ),
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync CPUMREGDESC_MSR("star", K6_STAR, U64, g_aCpumRegFields_star ),
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync CPUMREGDESC_MSR("cstar", K8_CSTAR, U64, g_aCpumRegFields_cstar ),
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync CPUMREGDESC_MSR("msr_fs_base", K8_FS_BASE, U64, NULL ),
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync CPUMREGDESC_MSR("msr_gs_base", K8_GS_BASE, U64, NULL ),
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync CPUMREGDESC_MSR("krnl_gs_base", K8_KERNEL_GS_BASE, U64, NULL ),
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync CPUMREGDESC_MSR("lstar", K8_LSTAR, U64, g_aCpumRegFields_lstar ),
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync CPUMREGDESC_MSR("sf_mask", K8_SF_MASK, U64, NULL ),
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync CPUMREGDESC_MSR("tsc_aux", K8_TSC_AUX, U64, NULL ),
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync CPUMREGDESC_EX_AS("ah", AH, U8, RT_OFFSETOF(CPUMCTX, rax) + 1, cpumR3RegGet_Generic, cpumR3RegSet_Generic, NULL, NULL ),
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync CPUMREGDESC_EX_AS("ch", CH, U8, RT_OFFSETOF(CPUMCTX, rcx) + 1, cpumR3RegGet_Generic, cpumR3RegSet_Generic, NULL, NULL ),
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync CPUMREGDESC_EX_AS("dh", DH, U8, RT_OFFSETOF(CPUMCTX, rdx) + 1, cpumR3RegGet_Generic, cpumR3RegSet_Generic, NULL, NULL ),
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync CPUMREGDESC_EX_AS("bh", BH, U8, RT_OFFSETOF(CPUMCTX, rbx) + 1, cpumR3RegGet_Generic, cpumR3RegSet_Generic, NULL, NULL ),
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync CPUMREGDESC_RW_AS("gdtr", GDTR, DTR, gdtr, cpumR3RegGet_gdtr, cpumR3RegSet_gdtr, NULL, NULL ),
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync CPUMREGDESC_RW_AS("idtr", IDTR, DTR, idtr, cpumR3RegGet_idtr, cpumR3RegSet_idtr, NULL, NULL ),
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync * Initializes the debugger related sides of the CPUM component.
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync * Called by CPUMR3Init.
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync * @returns VBox status code.
90eb38579e280c6a0e466177b2a9632ab9eb8c44vboxsync * @param pVM The VM handle.