caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync; CPUM - Guest Context Assembly Routines.
aae8a6a38fd27661046ab1d06cb2cb5c096c40edvboxsync; Copyright (C) 2006-2015 Oracle Corporation
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync; This file is part of VirtualBox Open Source Edition (OSE), as
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync; available from http://www.virtualbox.org. This file is free software;
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync; you can redistribute it and/or modify it under the terms of the GNU
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync; General Public License (GPL) as published by the Free Software
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync; Foundation, in version 2 as it comes in the "COPYING" file of the
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync; VirtualBox OSE distribution. VirtualBox OSE is distributed in the
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync; hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync;*******************************************************************************
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync;* Header Files *
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync;*******************************************************************************
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync%ifdef IN_RING3
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync %error "The jump table doesn't link on leopard."
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync;*******************************************************************************
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync;* External Symbols *
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync;*******************************************************************************
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync%ifdef VBOX_WITH_HYBRID_32BIT_KERNEL
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsyncextern NAME(SUPR0AbsIs64bit)
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsyncextern NAME(SUPR0Abs64bitKernelCS)
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsyncextern NAME(SUPR0Abs64bitKernelSS)
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsyncextern NAME(SUPR0Abs64bitKernelDS)
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsyncextern NAME(SUPR0AbsKernelCS)
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsyncextern NAME(g_fCPUMIs64bitHost)
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync; Restores the guest's FPU/XMM state
1b68cc0f95e7b0033b20dfc4fdbc260b7a2cef68vboxsync; @param pCtx x86:[esp+4] gcc:rdi msc:rcx CPUMCTX pointer
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync; @remarks Used by the disabled CPUM_CAN_HANDLE_NM_TRAPS_IN_KERNEL_MODE code.
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsyncBEGINPROC cpumR0LoadFPU
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync%ifdef RT_ARCH_AMD64
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync %ifdef RT_OS_WINDOWS
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync mov xDX, rcx
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync mov xDX, rdi
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync mov xDX, dword [esp + 4]
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync%ifdef VBOX_WITH_HYBRID_32BIT_KERNEL
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync cmp byte [NAME(g_fCPUMIs64bitHost)], 0
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync jz .legacy_mode
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync db 0xea ; jmp far .sixtyfourbit_mode
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync dd .sixtyfourbit_mode, NAME(SUPR0Abs64bitKernelCS)
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync.legacy_mode:
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync%endif ; VBOX_WITH_HYBRID_32BIT_KERNEL
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync fxrstor [xDX + CPUMCTX.fpu]
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync%ifdef VBOX_WITH_HYBRID_32BIT_KERNEL_IN_R0
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsyncALIGNCODE(16)
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync.sixtyfourbit_mode:
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync and edx, 0ffffffffh
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync fxrstor [rdx + CPUMCTX.fpu]
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync jmp far [.fpret wrt rip]
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync.fpret: ; 16:32 Pointer to .the_end.
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync dd .done, NAME(SUPR0AbsKernelCS)
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsyncENDPROC cpumR0LoadFPU
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync; Restores the guest's FPU/XMM state
1b68cc0f95e7b0033b20dfc4fdbc260b7a2cef68vboxsync; @param pCtx x86:[esp+4] gcc:rdi msc:rcx CPUMCTX pointer
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync; @remarks Used by the disabled CPUM_CAN_HANDLE_NM_TRAPS_IN_KERNEL_MODE code.
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsyncBEGINPROC cpumR0SaveFPU
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync%ifdef RT_ARCH_AMD64
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync %ifdef RT_OS_WINDOWS
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync mov xDX, rcx
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync mov xDX, rdi
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync mov xDX, dword [esp + 4]
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync%ifdef VBOX_WITH_HYBRID_32BIT_KERNEL
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync cmp byte [NAME(g_fCPUMIs64bitHost)], 0
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync jz .legacy_mode
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync db 0xea ; jmp far .sixtyfourbit_mode
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync dd .sixtyfourbit_mode, NAME(SUPR0Abs64bitKernelCS)
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync.legacy_mode:
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync%endif ; VBOX_WITH_HYBRID_32BIT_KERNEL
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync fxsave [xDX + CPUMCTX.fpu]
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync%ifdef VBOX_WITH_HYBRID_32BIT_KERNEL_IN_R0
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsyncALIGNCODE(16)
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync.sixtyfourbit_mode:
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync and edx, 0ffffffffh
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync fxsave [rdx + CPUMCTX.fpu]
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync jmp far [.fpret wrt rip]
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync.fpret: ; 16:32 Pointer to .the_end.
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync dd .done, NAME(SUPR0AbsKernelCS)
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsyncENDPROC cpumR0SaveFPU
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync; Restores the guest's XMM state
1b68cc0f95e7b0033b20dfc4fdbc260b7a2cef68vboxsync; @param pCtx x86:[esp+4] gcc:rdi msc:rcx CPUMCTX pointer
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync; @remarks Used by the disabled CPUM_CAN_HANDLE_NM_TRAPS_IN_KERNEL_MODE code.
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsyncBEGINPROC cpumR0LoadXMM
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync%ifdef RT_ARCH_AMD64
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync %ifdef RT_OS_WINDOWS
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync mov xDX, rcx
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync mov xDX, rdi
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync mov xDX, dword [esp + 4]
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync%ifdef VBOX_WITH_HYBRID_32BIT_KERNEL
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync cmp byte [NAME(g_fCPUMIs64bitHost)], 0
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync jz .legacy_mode
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync db 0xea ; jmp far .sixtyfourbit_mode
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync dd .sixtyfourbit_mode, NAME(SUPR0Abs64bitKernelCS)
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync.legacy_mode:
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync%endif ; VBOX_WITH_HYBRID_32BIT_KERNEL
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync movdqa xmm0, [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*0]
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync movdqa xmm1, [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*1]
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync movdqa xmm2, [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*2]
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync movdqa xmm3, [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*3]
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync movdqa xmm4, [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*4]
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync movdqa xmm5, [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*5]
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync movdqa xmm6, [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*6]
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync movdqa xmm7, [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*7]
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync%ifdef RT_ARCH_AMD64
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync test qword [xDX + CPUMCTX.msrEFER], MSR_K6_EFER_LMA
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync movdqa xmm8, [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*8]
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync movdqa xmm9, [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*9]
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync movdqa xmm10, [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*10]
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync movdqa xmm11, [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*11]
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync movdqa xmm12, [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*12]
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync movdqa xmm13, [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*13]
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync movdqa xmm14, [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*14]
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync movdqa xmm15, [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*15]
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync%ifdef VBOX_WITH_HYBRID_32BIT_KERNEL_IN_R0
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsyncALIGNCODE(16)
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync.sixtyfourbit_mode:
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync and edx, 0ffffffffh
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync movdqa xmm0, [rdx + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*0]
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync movdqa xmm1, [rdx + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*1]
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync movdqa xmm2, [rdx + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*2]
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync movdqa xmm3, [rdx + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*3]
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync movdqa xmm4, [rdx + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*4]
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync movdqa xmm5, [rdx + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*5]
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync movdqa xmm6, [rdx + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*6]
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync movdqa xmm7, [rdx + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*7]
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync test qword [rdx + CPUMCTX.msrEFER], MSR_K6_EFER_LMA
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync jz .sixtyfourbit_done
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync movdqa xmm8, [rdx + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*8]
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync movdqa xmm9, [rdx + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*9]
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync movdqa xmm10, [rdx + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*10]
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync movdqa xmm11, [rdx + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*11]
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync movdqa xmm12, [rdx + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*12]
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync movdqa xmm13, [rdx + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*13]
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync movdqa xmm14, [rdx + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*14]
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync movdqa xmm15, [rdx + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*15]
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync.sixtyfourbit_done:
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync jmp far [.fpret wrt rip]
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync.fpret: ; 16:32 Pointer to .the_end.
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync dd .done, NAME(SUPR0AbsKernelCS)
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsyncENDPROC cpumR0LoadXMM
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync; Restores the guest's XMM state
1b68cc0f95e7b0033b20dfc4fdbc260b7a2cef68vboxsync; @param pCtx x86:[esp+4] gcc:rdi msc:rcx CPUMCTX pointer
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync; @remarks Used by the disabled CPUM_CAN_HANDLE_NM_TRAPS_IN_KERNEL_MODE code.
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsyncBEGINPROC cpumR0SaveXMM
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync%ifdef RT_ARCH_AMD64
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync %ifdef RT_OS_WINDOWS
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync mov xDX, rcx
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync mov xDX, rdi
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync mov xDX, dword [esp + 4]
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync%ifdef VBOX_WITH_HYBRID_32BIT_KERNEL
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync cmp byte [NAME(g_fCPUMIs64bitHost)], 0
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync jz .legacy_mode
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync db 0xea ; jmp far .sixtyfourbit_mode
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync dd .sixtyfourbit_mode, NAME(SUPR0Abs64bitKernelCS)
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync.legacy_mode:
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync%endif ; VBOX_WITH_HYBRID_32BIT_KERNEL
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync movdqa [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*0], xmm0
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync movdqa [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*1], xmm1
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync movdqa [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*2], xmm2
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync movdqa [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*3], xmm3
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync movdqa [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*4], xmm4
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync movdqa [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*5], xmm5
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync movdqa [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*6], xmm6
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync movdqa [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*7], xmm7
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync%ifdef RT_ARCH_AMD64
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync test qword [xDX + CPUMCTX.msrEFER], MSR_K6_EFER_LMA
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync movdqa [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*8], xmm8
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync movdqa [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*9], xmm9
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync movdqa [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*10], xmm10
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync movdqa [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*11], xmm11
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync movdqa [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*12], xmm12
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync movdqa [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*13], xmm13
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync movdqa [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*14], xmm14
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync movdqa [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*15], xmm15
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync%ifdef VBOX_WITH_HYBRID_32BIT_KERNEL_IN_R0
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsyncALIGNCODE(16)
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync.sixtyfourbit_mode:
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync and edx, 0ffffffffh
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync movdqa [rdx + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*0], xmm0
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync movdqa [rdx + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*1], xmm1
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync movdqa [rdx + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*2], xmm2
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync movdqa [rdx + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*3], xmm3
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync movdqa [rdx + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*4], xmm4
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync movdqa [rdx + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*5], xmm5
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync movdqa [rdx + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*6], xmm6
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync movdqa [rdx + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*7], xmm7
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync test qword [rdx + CPUMCTX.msrEFER], MSR_K6_EFER_LMA
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync jz .sixtyfourbit_done
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync movdqa [rdx + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*8], xmm8
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync movdqa [rdx + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*9], xmm9
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync movdqa [rdx + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*10], xmm10
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync movdqa [rdx + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*11], xmm11
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync movdqa [rdx + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*12], xmm12
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync movdqa [rdx + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*13], xmm13
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync movdqa [rdx + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*14], xmm14
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync movdqa [rdx + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*15], xmm15
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync.sixtyfourbit_done:
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync jmp far [.fpret wrt rip]
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync.fpret: ; 16:32 Pointer to .the_end.
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync dd .done, NAME(SUPR0AbsKernelCS)
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsyncENDPROC cpumR0SaveXMM
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync; Set the FPU control word; clearing exceptions first
1b68cc0f95e7b0033b20dfc4fdbc260b7a2cef68vboxsync; @param u16FCW x86:[esp+4] gcc:rdi msc:rcx New FPU control word
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsyncBEGINPROC cpumR0SetFCW
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync%ifdef RT_ARCH_AMD64
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync %ifdef RT_OS_WINDOWS
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync mov xAX, rcx
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync mov xAX, rdi
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync mov xAX, dword [esp + 4]
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync fldcw [xSP]
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsyncENDPROC cpumR0SetFCW
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync; Get the FPU control word
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsyncBEGINPROC cpumR0GetFCW
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync fnstcw [xSP - 8]
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync mov ax, word [xSP - 8]
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsyncENDPROC cpumR0GetFCW
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync; Set the MXCSR;
1b68cc0f95e7b0033b20dfc4fdbc260b7a2cef68vboxsync; @param u32MXCSR x86:[esp+4] gcc:rdi msc:rcx New MXCSR
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsyncBEGINPROC cpumR0SetMXCSR
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync%ifdef RT_ARCH_AMD64
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync %ifdef RT_OS_WINDOWS
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync mov xAX, rcx
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync mov xAX, rdi
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync mov xAX, dword [esp + 4]
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync ldmxcsr [xSP]
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsyncENDPROC cpumR0SetMXCSR
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync; Get the MXCSR
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsyncBEGINPROC cpumR0GetMXCSR
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync stmxcsr [xSP - 8]
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsync mov eax, dword [xSP - 8]
caa941f0c7e5e632e27efc23a253533dd72148a5vboxsyncENDPROC cpumR0GetMXCSR