CPUMR0A.asm revision c5a332cfb15a444b40d1564a0c1e73899c1a3b2b
6d6e444ceb98763016f5db82e87ee254bdc9b4e2huck.elliott; CPUM - Guest Context Assembly Routines.
6d6e444ceb98763016f5db82e87ee254bdc9b4e2huck.elliott; Copyright (C) 2006-2007 Sun Microsystems, Inc.
6d6e444ceb98763016f5db82e87ee254bdc9b4e2huck.elliott; This file is part of VirtualBox Open Source Edition (OSE), as
6d6e444ceb98763016f5db82e87ee254bdc9b4e2huck.elliott; available from http://www.virtualbox.org. This file is free software;
6d6e444ceb98763016f5db82e87ee254bdc9b4e2huck.elliott; you can redistribute it and/or modify it under the terms of the GNU
6d6e444ceb98763016f5db82e87ee254bdc9b4e2huck.elliott; General Public License (GPL) as published by the Free Software
6d6e444ceb98763016f5db82e87ee254bdc9b4e2huck.elliott; Foundation, in version 2 as it comes in the "COPYING" file of the
6d6e444ceb98763016f5db82e87ee254bdc9b4e2huck.elliott; VirtualBox OSE distribution. VirtualBox OSE is distributed in the
6d6e444ceb98763016f5db82e87ee254bdc9b4e2huck.elliott; hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
6d6e444ceb98763016f5db82e87ee254bdc9b4e2huck.elliott; Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
6d6e444ceb98763016f5db82e87ee254bdc9b4e2huck.elliott; Clara, CA 95054 USA or visit http://www.sun.com if you need
6d6e444ceb98763016f5db82e87ee254bdc9b4e2huck.elliott; additional information or have any questions.
6d6e444ceb98763016f5db82e87ee254bdc9b4e2huck.elliott;*******************************************************************************
6d6e444ceb98763016f5db82e87ee254bdc9b4e2huck.elliott;* Header Files *
6d6e444ceb98763016f5db82e87ee254bdc9b4e2huck.elliott;*******************************************************************************
6d6e444ceb98763016f5db82e87ee254bdc9b4e2huck.elliott%ifdef IN_RING3
6d6e444ceb98763016f5db82e87ee254bdc9b4e2huck.elliott %error "The jump table doesn't link on leopard."
6d6e444ceb98763016f5db82e87ee254bdc9b4e2huck.elliott;*******************************************************************************
6d6e444ceb98763016f5db82e87ee254bdc9b4e2huck.elliott;* External Symbols *
6d6e444ceb98763016f5db82e87ee254bdc9b4e2huck.elliott;*******************************************************************************
6d6e444ceb98763016f5db82e87ee254bdc9b4e2huck.elliott%ifdef VBOX_WITH_HYBRID_32BIT_KERNEL
6d6e444ceb98763016f5db82e87ee254bdc9b4e2huck.elliottextern NAME(SUPR0AbsIs64bit)
6d6e444ceb98763016f5db82e87ee254bdc9b4e2huck.elliottextern NAME(SUPR0Abs64bitKernelCS)
6d6e444ceb98763016f5db82e87ee254bdc9b4e2huck.elliottextern NAME(SUPR0Abs64bitKernelSS)
6d6e444ceb98763016f5db82e87ee254bdc9b4e2huck.elliottextern NAME(SUPR0Abs64bitKernelDS)
6d6e444ceb98763016f5db82e87ee254bdc9b4e2huck.elliottextern NAME(SUPR0AbsKernelCS)
6d6e444ceb98763016f5db82e87ee254bdc9b4e2huck.elliott;*******************************************************************************
6d6e444ceb98763016f5db82e87ee254bdc9b4e2huck.elliott;* Global Variables *
6d6e444ceb98763016f5db82e87ee254bdc9b4e2huck.elliott;*******************************************************************************
6d6e444ceb98763016f5db82e87ee254bdc9b4e2huck.elliott%ifdef VBOX_WITH_HYBRID_32BIT_KERNEL
6d6e444ceb98763016f5db82e87ee254bdc9b4e2huck.elliott; Store the SUPR0AbsIs64bit absolute value here so we can cmp/test without
6d6e444ceb98763016f5db82e87ee254bdc9b4e2huck.elliott; needing to clobber a register. (This trick doesn't quite work for PE btw.
6d6e444ceb98763016f5db82e87ee254bdc9b4e2huck.elliott; but that's not relevant atm.)
6d6e444ceb98763016f5db82e87ee254bdc9b4e2huck.elliottGLOBALNAME g_fCPUMIs64bitHost
6d6e444ceb98763016f5db82e87ee254bdc9b4e2huck.elliott dd NAME(SUPR0AbsIs64bit)
; Saves the host FPU/XMM state and restores the guest state.
cli ; interrupt occurs while we're doing fxsave/fxrstor/cr0.
or dword [xDX + CPUMCPU.fUseFlags], (CPUM_USED_FPU | CPUM_USED_FPU_SINCE_REM)
fxsave [xDX + CPUMCPU.Host.fpu] ; ASSUMES that all VT-x/AMD-V boxes sports fxsave/fxrstor (safe assumption)
fxrstor [xDX + CPUMCPU.Guest.fpu]
fxsave [rdx + CPUMCPU.Host.fpu]
fxrstor [rdx + CPUMCPU.Guest.fpu]
; Saves the host FPU/XMM state
cli ; interrupt occurs while we're doing fxsave/fxrstor/cr0.
or dword [xDX + CPUMCPU.fUseFlags], (CPUM_USED_FPU | CPUM_USED_FPU_SINCE_REM)
fxsave [xDX + CPUMCPU.Host.fpu] ; ASSUMES that all VT-x/AMD-V boxes sports fxsave/fxrstor (safe assumption)
; Saves the guest FPU/XMM state and restores the host state.
test dword [xDX + CPUMCPU.fUseFlags], CPUM_USED_FPU
cli ; interrupt occurs while we're doing fxsave/fxrstor/cr0.
fxsave [xDX + CPUMCPU.Guest.fpu] ; ASSUMES that all VT-x/AMD-V boxes sports fxsave/fxrstor (safe assumption)
fxrstor [xDX + CPUMCPU.Host.fpu]
and dword [xDX + CPUMCPU.fUseFlags], ~CPUM_USED_FPU
fxsave [rdx + CPUMCPU.Guest.fpu]
fxrstor [rdx + CPUMCPU.Host.fpu]
; Sets the host's FPU/XMM state
test dword [xDX + CPUMCPU.fUseFlags], CPUM_USED_FPU
cli ; interrupt occurs while we're doing fxsave/fxrstor/cr0.
fxrstor [xDX + CPUMCPU.Host.fpu]
and dword [xDX + CPUMCPU.fUseFlags], ~CPUM_USED_FPU
fxrstor [rdx + CPUMCPU.Host.fpu]