CPUMR0A.asm revision c58f1213e628a545081c70e26c6b67a841cff880
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync; CPUM - Guest Context Assembly Routines.
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync; Copyright (C) 2006-2011 Oracle Corporation
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync; This file is part of VirtualBox Open Source Edition (OSE), as
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync; available from http://www.virtualbox.org. This file is free software;
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync; you can redistribute it and/or modify it under the terms of the GNU
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync; General Public License (GPL) as published by the Free Software
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync; Foundation, in version 2 as it comes in the "COPYING" file of the
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync; VirtualBox OSE distribution. VirtualBox OSE is distributed in the
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync; hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync;*******************************************************************************
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync;* Header Files *
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync;*******************************************************************************
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync%ifdef IN_RING3
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync %error "The jump table doesn't link on leopard."
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync;*******************************************************************************
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync;* Defined Constants And Macros *
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync;*******************************************************************************
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync;; The offset of the XMM registers in X86FXSTATE.
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync; Use define because I'm too lazy to convert the struct.
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync%define XMM_OFF_IN_X86FXSTATE 160
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync;*******************************************************************************
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync;* External Symbols *
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync;*******************************************************************************
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync%ifdef VBOX_WITH_HYBRID_32BIT_KERNEL
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsyncextern NAME(SUPR0AbsIs64bit)
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsyncextern NAME(SUPR0Abs64bitKernelCS)
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsyncextern NAME(SUPR0Abs64bitKernelSS)
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsyncextern NAME(SUPR0Abs64bitKernelDS)
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsyncextern NAME(SUPR0AbsKernelCS)
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync;*******************************************************************************
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync;* Global Variables *
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync;*******************************************************************************
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync%ifdef VBOX_WITH_HYBRID_32BIT_KERNEL
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync; Store the SUPR0AbsIs64bit absolute value here so we can cmp/test without
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync; needing to clobber a register. (This trick doesn't quite work for PE btw.
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync; but that's not relevant atm.)
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsyncGLOBALNAME g_fCPUMIs64bitHost
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync dd NAME(SUPR0AbsIs64bit)
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync; Saves the host FPU/XMM state and restores the guest state.
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync; @returns 0
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync; @param pCPUMCPU x86:[esp+4] GCC:rdi MSC:rcx CPUMCPU pointer
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsyncBEGINPROC cpumR0SaveHostRestoreGuestFPUState
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync%ifdef RT_ARCH_AMD64
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync %ifdef RT_OS_WINDOWS
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync mov xDX, rcx
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync mov xDX, rdi
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync mov xDX, dword [esp + 4]
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync pushf ; The darwin kernel can get upset or upset things if an
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync cli ; interrupt occurs while we're doing fxsave/fxrstor/cr0.
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync ; Switch the state.
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync or dword [xDX + CPUMCPU.fUseFlags], (CPUM_USED_FPU | CPUM_USED_FPU_SINCE_REM)
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync mov xAX, cr0 ; Make sure its safe to access the FPU state.
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync mov xCX, xAX ; save old CR0
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync and xAX, ~(X86_CR0_TS | X86_CR0_EM)
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync mov cr0, xAX ;; @todo optimize this.
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync%ifdef VBOX_WITH_HYBRID_32BIT_KERNEL
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync cmp byte [NAME(g_fCPUMIs64bitHost)], 0
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync jz .legacy_mode
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync db 0xea ; jmp far .sixtyfourbit_mode
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync dd .sixtyfourbit_mode, NAME(SUPR0Abs64bitKernelCS)
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync.legacy_mode:
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync%endif ; VBOX_WITH_HYBRID_32BIT_KERNEL
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync fxsave [xDX + CPUMCPU.Host.fpu] ; ASSUMES that all VT-x/AMD-V boxes sports fxsave/fxrstor (safe assumption)
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync fxrstor [xDX + CPUMCPU.Guest.fpu]
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync%ifdef VBOX_WITH_KERNEL_USING_XMM
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync ; Restore the non-volatile xmm registers. ASSUMING 64-bit windows
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync lea r11, [xDX + CPUMCPU.Host.fpu + XMM_OFF_IN_X86FXSTATE]
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync movdqa xmm6, [r11 + 060h]
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync movdqa xmm7, [r11 + 070h]
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync movdqa xmm8, [r11 + 080h]
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync movdqa xmm9, [r11 + 090h]
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync movdqa xmm10, [r11 + 0a0h]
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync movdqa xmm11, [r11 + 0b0h]
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync movdqa xmm12, [r11 + 0c0h]
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync movdqa xmm13, [r11 + 0d0h]
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync movdqa xmm14, [r11 + 0e0h]
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync movdqa xmm15, [r11 + 0f0h]
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync mov cr0, xCX ; and restore old CR0 again ;; @todo optimize this.
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync xor eax, eax
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync%ifdef VBOX_WITH_HYBRID_32BIT_KERNEL_IN_R0
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsyncALIGNCODE(16)
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync.sixtyfourbit_mode:
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync and edx, 0ffffffffh
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync fxsave [rdx + CPUMCPU.Host.fpu]
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync fxrstor [rdx + CPUMCPU.Guest.fpu]
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync jmp far [.fpret wrt rip]
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync.fpret: ; 16:32 Pointer to .the_end.
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync dd .done, NAME(SUPR0AbsKernelCS)
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsyncENDPROC cpumR0SaveHostRestoreGuestFPUState
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync%ifndef RT_ARCH_AMD64
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync%ifdef VBOX_WITH_64_BITS_GUESTS
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync%ifndef VBOX_WITH_HYBRID_32BIT_KERNEL
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync; Saves the host FPU/XMM state
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync; @returns 0
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync; @param pCPUMCPU x86:[esp+4] GCC:rdi MSC:rcx CPUMCPU pointer
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsyncBEGINPROC cpumR0SaveHostFPUState
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync mov xDX, dword [esp + 4]
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync pushf ; The darwin kernel can get upset or upset things if an
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync cli ; interrupt occurs while we're doing fxsave/fxrstor/cr0.
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync ; Switch the state.
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync or dword [xDX + CPUMCPU.fUseFlags], (CPUM_USED_FPU | CPUM_USED_FPU_SINCE_REM)
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync mov xAX, cr0 ; Make sure its safe to access the FPU state.
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync mov xCX, xAX ; save old CR0
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync and xAX, ~(X86_CR0_TS | X86_CR0_EM)
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync mov cr0, xAX ;; @todo optimize this.
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync fxsave [xDX + CPUMCPU.Host.fpu] ; ASSUMES that all VT-x/AMD-V boxes support fxsave/fxrstor (safe assumption)
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync mov cr0, xCX ; and restore old CR0 again ;; @todo optimize this.
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync xor eax, eax
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsyncENDPROC cpumR0SaveHostFPUState
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync; Saves the guest FPU/XMM state and restores the host state.
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync; @returns 0
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync; @param pCPUMCPU x86:[esp+4] GCC:rdi MSC:rcx CPUMCPU pointer
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsyncBEGINPROC cpumR0SaveGuestRestoreHostFPUState
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync%ifdef RT_ARCH_AMD64
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync %ifdef RT_OS_WINDOWS
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync mov xDX, rcx
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync mov xDX, rdi
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync mov xDX, dword [esp + 4]
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync ; Only restore FPU if guest has used it.
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync ; Using fxrstor should ensure that we're not causing unwanted exception on the host.
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync test dword [xDX + CPUMCPU.fUseFlags], CPUM_USED_FPU
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync jz short .fpu_not_used
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync pushf ; The darwin kernel can get upset or upset things if an
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync cli ; interrupt occurs while we're doing fxsave/fxrstor/cr0.
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync mov xAX, cr0 ; Make sure it's safe to access the FPU state.
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync mov xCX, xAX ; save old CR0
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync and xAX, ~(X86_CR0_TS | X86_CR0_EM)
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync mov cr0, xAX ;; @todo optimize this.
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync%ifdef VBOX_WITH_HYBRID_32BIT_KERNEL
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync cmp byte [NAME(g_fCPUMIs64bitHost)], 0
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync jz .legacy_mode
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync db 0xea ; jmp far .sixtyfourbit_mode
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync dd .sixtyfourbit_mode, NAME(SUPR0Abs64bitKernelCS)
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync.legacy_mode:
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync%endif ; VBOX_WITH_HYBRID_32BIT_KERNEL
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync fxsave [xDX + CPUMCPU.Guest.fpu] ; ASSUMES that all VT-x/AMD-V boxes support fxsave/fxrstor (safe assumption)
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync fxrstor [xDX + CPUMCPU.Host.fpu]
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync mov cr0, xCX ; and restore old CR0 again ;; @todo optimize this.
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync and dword [xDX + CPUMCPU.fUseFlags], ~CPUM_USED_FPU
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync.fpu_not_used:
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync xor eax, eax
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync%ifdef VBOX_WITH_HYBRID_32BIT_KERNEL_IN_R0
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsyncALIGNCODE(16)
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync.sixtyfourbit_mode:
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync and edx, 0ffffffffh
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync fxrstor [rdx + CPUMCPU.Host.fpu]
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync jmp far [.fpret wrt rip]
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync.fpret: ; 16:32 Pointer to .the_end.
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync dd .done, NAME(SUPR0AbsKernelCS)
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsyncENDPROC cpumR0SaveGuestRestoreHostFPUState
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync; Sets the host's FPU/XMM state
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync; @returns 0
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync; @param pCPUMCPU x86:[esp+4] GCC:rdi MSC:rcx CPUMCPU pointer
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsyncBEGINPROC cpumR0RestoreHostFPUState
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync%ifdef RT_ARCH_AMD64
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync %ifdef RT_OS_WINDOWS
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync mov xDX, rcx
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync mov xDX, rdi
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync mov xDX, dword [esp + 4]
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync ; Restore FPU if guest has used it.
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync ; Using fxrstor should ensure that we're not causing unwanted exception on the host.
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync test dword [xDX + CPUMCPU.fUseFlags], CPUM_USED_FPU
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync jz short .fpu_not_used
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync pushf ; The darwin kernel can get upset or upset things if an
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync cli ; interrupt occurs while we're doing fxsave/fxrstor/cr0.
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync mov xAX, cr0
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync mov xCX, xAX ; save old CR0
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync and xAX, ~(X86_CR0_TS | X86_CR0_EM)
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync mov cr0, xAX
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync%ifdef VBOX_WITH_HYBRID_32BIT_KERNEL
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync cmp byte [NAME(g_fCPUMIs64bitHost)], 0
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync jz .legacy_mode
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync db 0xea ; jmp far .sixtyfourbit_mode
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync dd .sixtyfourbit_mode, NAME(SUPR0Abs64bitKernelCS)
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync.legacy_mode:
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync%endif ; VBOX_WITH_HYBRID_32BIT_KERNEL
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync fxrstor [xDX + CPUMCPU.Host.fpu]
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync mov cr0, xCX ; and restore old CR0 again
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync and dword [xDX + CPUMCPU.fUseFlags], ~CPUM_USED_FPU
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync.fpu_not_used:
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync xor eax, eax
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync%ifdef VBOX_WITH_HYBRID_32BIT_KERNEL_IN_R0
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsyncALIGNCODE(16)
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync.sixtyfourbit_mode:
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync and edx, 0ffffffffh
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync fxrstor [rdx + CPUMCPU.Host.fpu]
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync jmp far [.fpret wrt rip]
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync.fpret: ; 16:32 Pointer to .the_end.
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsync dd .done, NAME(SUPR0AbsKernelCS)
a734c64bff58bda2fa48c2795453e092167b0ff7vboxsyncENDPROC cpumR0RestoreHostFPUState