CPUMR0A.asm revision 52676b598e9afd834db7f3e62a983044038e92be
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync; $Id$
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync;; @file
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync; CPUM - Guest Context Assembly Routines.
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync;
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync;
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync; Copyright (C) 2006-2007 Sun Microsystems, Inc.
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync;
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync; This file is part of VirtualBox Open Source Edition (OSE), as
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync; available from http://www.virtualbox.org. This file is free software;
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync; you can redistribute it and/or modify it under the terms of the GNU
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync; General Public License (GPL) as published by the Free Software
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync; Foundation, in version 2 as it comes in the "COPYING" file of the
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync; VirtualBox OSE distribution. VirtualBox OSE is distributed in the
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync; hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync;
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync; Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync; Clara, CA 95054 USA or visit http://www.sun.com if you need
930b5f872e89407f445d4000d4e4aaecaa6a0998vboxsync; additional information or have any questions.
930b5f872e89407f445d4000d4e4aaecaa6a0998vboxsync;
930b5f872e89407f445d4000d4e4aaecaa6a0998vboxsync
930b5f872e89407f445d4000d4e4aaecaa6a0998vboxsync;*******************************************************************************
930b5f872e89407f445d4000d4e4aaecaa6a0998vboxsync;* Header Files *
930b5f872e89407f445d4000d4e4aaecaa6a0998vboxsync;*******************************************************************************
930b5f872e89407f445d4000d4e4aaecaa6a0998vboxsync%include "VBox/asmdefs.mac"
930b5f872e89407f445d4000d4e4aaecaa6a0998vboxsync%include "VBox/vm.mac"
930b5f872e89407f445d4000d4e4aaecaa6a0998vboxsync%include "VBox/err.mac"
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync%include "VBox/stam.mac"
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync%include "CPUMInternal.mac"
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync%include "VBox/x86.mac"
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync%include "VBox/cpum.mac"
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync%ifdef IN_RING3
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync %error "The jump table doesn't link on leopard."
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync%endif
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsyncBEGINCODE
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync;;
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync; Restores the host's FPU/XMM state
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync;
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync; @returns 0
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync; @param pCPUMCPU x86:[esp+4] GCC:rdi MSC:rcx CPUMCPU pointer
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync;
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsyncalign 16
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsyncBEGINPROC CPUMR0SaveGuestRestoreHostFPUState
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync%ifdef RT_ARCH_AMD64
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync %ifdef RT_OS_WINDOWS
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync mov xDX, rcx
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync %else
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync mov xDX, rdi
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync %endif
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync%else
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync mov xDX, dword [esp + 4]
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync%endif
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync ; Restore FPU if guest has used it.
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync ; Using fxrstor should ensure that we're not causing unwanted exception on the host.
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync test dword [xDX + CPUMCPU.fUseFlags], CPUM_USED_FPU
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync jz short gth_fpu_no
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync mov xAX, cr0
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync mov xCX, xAX ; save old CR0
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync and xAX, ~(X86_CR0_TS | X86_CR0_EM)
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync mov cr0, xAX
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync fxsave [xDX + CPUMCPU.Guest.fpu]
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync fxrstor [xDX + CPUMCPU.Host.fpu]
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync mov cr0, xCX ; and restore old CR0 again
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync and dword [xDX + CPUMCPU.fUseFlags], ~CPUM_USED_FPU
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsyncgth_fpu_no:
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync xor eax, eax
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync ret
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsyncENDPROC CPUMR0SaveGuestRestoreHostFPUState
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync;;
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync; Sets the host's FPU/XMM state
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync;
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync; @returns 0
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync; @param pCPUMCPU x86:[esp+4] GCC:rdi MSC:rcx CPUMCPU pointer
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync;
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsyncalign 16
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsyncBEGINPROC CPUMR0RestoreHostFPUState
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync%ifdef RT_ARCH_AMD64
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync %ifdef RT_OS_WINDOWS
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync mov xDX, rcx
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync %else
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync mov xDX, rdi
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync %endif
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync%else
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync mov xDX, dword [esp + 4]
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync%endif
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync ; Restore FPU if guest has used it.
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync ; Using fxrstor should ensure that we're not causing unwanted exception on the host.
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync test dword [xDX + CPUMCPU.fUseFlags], CPUM_USED_FPU
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync jz short gth_fpu_no_2
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync mov xAX, cr0
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync mov xCX, xAX ; save old CR0
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync and xAX, ~(X86_CR0_TS | X86_CR0_EM)
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync mov cr0, xAX
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync fxrstor [xDX + CPUMCPU.Host.fpu]
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync mov cr0, xCX ; and restore old CR0 again
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync and dword [xDX + CPUMCPU.fUseFlags], ~CPUM_USED_FPU
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsyncgth_fpu_no_2:
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync xor eax, eax
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync ret
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsyncENDPROC CPUMR0RestoreHostFPUState
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync;;
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync; Restores the guest's FPU/XMM state
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync;
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync; @param pCtx x86:[esp+4] GCC:rdi MSC:rcx CPUMCTX pointer
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync;
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsyncalign 16
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsyncBEGINPROC CPUMLoadFPU
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync%ifdef RT_ARCH_AMD64
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync %ifdef RT_OS_WINDOWS
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync mov xDX, rcx
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync %else
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync mov xDX, rdi
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync %endif
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync%else
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync mov xDX, dword [esp + 4]
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync%endif
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync fxrstor [xDX + CPUMCTX.fpu]
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync ret
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsyncENDPROC CPUMLoadFPU
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync;;
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync; Restores the guest's FPU/XMM state
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync;
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync; @param pCtx x86:[esp+4] GCC:rdi MSC:rcx CPUMCTX pointer
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync;
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsyncalign 16
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsyncBEGINPROC CPUMSaveFPU
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync%ifdef RT_ARCH_AMD64
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync %ifdef RT_OS_WINDOWS
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync mov xDX, rcx
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync %else
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync mov xDX, rdi
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync %endif
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync%else
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync mov xDX, dword [esp + 4]
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync%endif
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync fxsave [xDX + CPUMCTX.fpu]
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync ret
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsyncENDPROC CPUMSaveFPU
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync;;
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync; Restores the guest's XMM state
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync;
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync; @param pCtx x86:[esp+4] GCC:rdi MSC:rcx CPUMCTX pointer
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync;
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsyncalign 16
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsyncBEGINPROC CPUMLoadXMM
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync%ifdef RT_ARCH_AMD64
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync %ifdef RT_OS_WINDOWS
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync mov xDX, rcx
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync %else
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync mov xDX, rdi
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync %endif
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync%else
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync mov xDX, dword [esp + 4]
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync%endif
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync movdqa xmm0, [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*0]
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync movdqa xmm1, [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*1]
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync movdqa xmm2, [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*2]
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync movdqa xmm3, [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*3]
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync movdqa xmm4, [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*4]
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync movdqa xmm5, [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*5]
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync movdqa xmm6, [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*6]
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync movdqa xmm7, [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*7]
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync%ifdef RT_ARCH_AMD64
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync test qword [xDX + CPUMCTX.msrEFER], MSR_K6_EFER_LMA
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync jz CPUMLoadXMM_done
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync movdqa xmm8, [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*8]
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync movdqa xmm9, [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*9]
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync movdqa xmm10, [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*10]
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync movdqa xmm11, [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*11]
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync movdqa xmm12, [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*12]
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync movdqa xmm13, [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*13]
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync movdqa xmm14, [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*14]
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync movdqa xmm15, [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*15]
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsyncCPUMLoadXMM_done:
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync%endif
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync ret
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsyncENDPROC CPUMLoadXMM
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync;;
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync; Restores the guest's XMM state
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync;
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync; @param pCtx x86:[esp+4] GCC:rdi MSC:rcx CPUMCTX pointer
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync;
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsyncalign 16
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsyncBEGINPROC CPUMSaveXMM
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync%ifdef RT_ARCH_AMD64
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync %ifdef RT_OS_WINDOWS
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync mov xDX, rcx
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync %else
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync mov xDX, rdi
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync %endif
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync%else
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync mov xDX, dword [esp + 4]
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync%endif
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync movdqa [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*0], xmm0
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync movdqa [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*1], xmm1
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync movdqa [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*2], xmm2
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync movdqa [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*3], xmm3
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync movdqa [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*4], xmm4
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync movdqa [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*5], xmm5
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync movdqa [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*6], xmm6
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync movdqa [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*7], xmm7
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync%ifdef RT_ARCH_AMD64
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync test qword [xDX + CPUMCTX.msrEFER], MSR_K6_EFER_LMA
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync jz CPUMSaveXMM_done
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync movdqa [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*8], xmm8
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync movdqa [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*9], xmm9
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync movdqa [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*10], xmm10
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync movdqa [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*11], xmm11
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync movdqa [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*12], xmm12
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync movdqa [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*13], xmm13
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync movdqa [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*14], xmm14
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync movdqa [xDX + CPUMCTX.fpu + X86FXSTATE.aXMM + 16*15], xmm15
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsyncCPUMSaveXMM_done:
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync%endif
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync ret
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsyncENDPROC CPUMSaveXMM
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync;;
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync; Set the FPU control word; clearing exceptions first
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync;
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync; @param u16FCW x86:[esp+4] GCC:rdi MSC:rcx New FPU control word
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsyncalign 16
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsyncBEGINPROC CPUMR0SetFCW
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync%ifdef RT_ARCH_AMD64
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync %ifdef RT_OS_WINDOWS
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync mov xAX, rcx
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync %else
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync mov xAX, rdi
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync %endif
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync%else
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync mov xAX, dword [esp + 4]
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync%endif
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync fnclex
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync push xAX
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync fldcw [xSP]
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync pop xAX
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync ret
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsyncENDPROC CPUMR0SetFCW
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync;;
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync; Get the FPU control word
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync;
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsyncalign 16
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsyncBEGINPROC CPUMR0GetFCW
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync fnstcw [xSP - 8]
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync mov ax, word [xSP - 8]
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync ret
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsyncENDPROC CPUMR0GetFCW
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync;;
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync; Set the MXCSR;
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync;
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync; @param u32MXCSR x86:[esp+4] GCC:rdi MSC:rcx New MXCSR
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsyncalign 16
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsyncBEGINPROC CPUMR0SetMXCSR
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync%ifdef RT_ARCH_AMD64
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync %ifdef RT_OS_WINDOWS
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync mov xAX, rcx
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync %else
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync mov xAX, rdi
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync %endif
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync%else
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync mov xAX, dword [esp + 4]
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync%endif
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync push xAX
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync ldmxcsr [xSP]
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync pop xAX
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync ret
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsyncENDPROC CPUMR0SetMXCSR
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync;;
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync; Get the MXCSR
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync;
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsyncalign 16
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsyncBEGINPROC CPUMR0GetMXCSR
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync stmxcsr [xSP - 8]
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync mov eax, dword [xSP - 8]
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync ret
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsyncENDPROC CPUMR0GetMXCSR
3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync