PGMAllPhys.cpp revision 965a56f05878cf7c9634998e98d0bed41ebf21db
/* $Id$ */
/** @file
* PGM - Page Manager and Monitor, Physical Memory Addressing.
*/
/*
* Copyright (C) 2006-2007 Sun Microsystems, Inc.
*
* This file is part of VirtualBox Open Source Edition (OSE), as
* available from http://www.virtualbox.org. This file is free software;
* General Public License (GPL) as published by the Free Software
* Foundation, in version 2 as it comes in the "COPYING" file of the
* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
*
* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
* Clara, CA 95054 USA or visit http://www.sun.com if you need
* additional information or have any questions.
*/
/*******************************************************************************
* Defined Constants And Macros *
*******************************************************************************/
/** @def PGM_IGNORE_RAM_FLAGS_RESERVED
* Don't respect the MM_RAM_FLAGS_RESERVED flag when converting to HC addresses.
*
* Since this flag is currently incorrectly kept set for ROM regions we will
* have to ignore it for now so we don't break stuff.
*
* @todo this has been fixed now I believe, remove this hack.
*/
#define PGM_IGNORE_RAM_FLAGS_RESERVED
/*******************************************************************************
* Header Files *
*******************************************************************************/
#define LOG_GROUP LOG_GROUP_PGM_PHYS
#include "PGMInternal.h"
#ifdef IN_RING3
#endif
#ifndef IN_RING3
/**
* \#PF Handler callback for Guest ROM range write access.
* We simply ignore the writes or fall back to the recompiler if we don't support the instruction.
*
* @returns VBox status code (appropritate for trap handling and GC return).
* @param pVM VM Handle.
* @param uErrorCode CPU Error code.
* @param pRegFrame Trap register frame.
* @param pvFault The fault address (cr2).
* @param GCPhysFault The GC physical address corresponding to pvFault.
* @param pvUser User argument. Pointer to the ROM range structure.
*/
VMMDECL(int) pgmPhysRomWriteHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPHYS GCPhysFault, void *pvUser)
{
int rc;
#ifdef VBOX_WITH_NEW_PHYS_CODE
{
{
#endif
/*
* If it's a simple instruction which doesn't change the cpu state
* we will simply skip it. Otherwise we'll have to defer it to REM.
*/
if ( RT_SUCCESS(rc)
{
{
/** @todo Find other instructions we can safely skip, possibly
* adding this kind of detection to DIS or EM. */
case OP_MOV:
return VINF_SUCCESS;
}
}
return rc;
#ifdef VBOX_WITH_NEW_PHYS_CODE
break;
}
break; /** @todo Must edit the shadow PT and restart the instruction, not use the interpreter! */
/* Handle it in ring-3 because it's *way* easier there. */
break;
default:
AssertMsgFailedReturn(("enmProt=%d iPage=%d GCPhysFault=%RGp\n",
}
#endif
return VINF_EM_RAW_EMULATE_INSTR;
}
#endif /* IN_RING3 */
/**
* Checks if Address Gate 20 is enabled or not.
*
* @returns true if enabled.
* @returns false if disabled.
* @param pVM VM handle.
*/
{
}
/**
* Validates a GC physical address.
*
* @returns true if valid.
* @returns false if invalid.
* @param pVM The VM handle.
* @param GCPhys The physical address to validate.
*/
{
}
/**
* Checks if a GC physical address is a normal page,
* i.e. not ROM, MMIO or reserved.
*
* @returns true if normal.
* @returns false if invalid, ROM, MMIO or reserved page.
* @param pVM The VM handle.
* @param GCPhys The physical address to check.
*/
{
#ifdef VBOX_WITH_NEW_PHYS_CODE
return pPage
#else
return pPage
&& !(pPage->HCPhys & (MM_RAM_FLAGS_MMIO | MM_RAM_FLAGS_ROM | MM_RAM_FLAGS_RESERVED | MM_RAM_FLAGS_MMIO2));
#endif
}
/**
* Converts a GC physical address to a HC physical address.
*
* @returns VINF_SUCCESS on success.
* @returns VERR_PGM_PHYS_PAGE_RESERVED it it's a valid GC physical
* page but has no physical backing.
* @returns VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid
* GC physical address.
*
* @param pVM The VM handle.
* @param GCPhys The GC physical address to convert.
* @param pHCPhys Where to store the HC physical address on success.
*/
{
if (RT_FAILURE(rc))
return rc;
#ifndef PGM_IGNORE_RAM_FLAGS_RESERVED
return VERR_PGM_PHYS_PAGE_RESERVED;
#endif
return VINF_SUCCESS;
}
/**
* Invalidates the GC page mapping TLB.
*
* @param pVM The VM handle.
*/
{
/* later */
}
/**
* Invalidates the ring-0 page mapping TLB.
*
* @param pVM The VM handle.
*/
{
}
/**
* Invalidates the ring-3 page mapping TLB.
*
* @param pVM The VM handle.
*/
{
{
}
}
/**
* Makes sure that there is at least one handy page ready for use.
*
* This will also take the appropriate actions when reaching water-marks.
*
* @returns The following VBox status codes.
* @retval VINF_SUCCESS on success.
* @retval VERR_EM_NO_MEMORY if we're really out of memory.
*
* @param pVM The VM handle.
*
* @remarks Must be called from within the PGM critical section. It may
* nip back to ring-3/0 in some cases.
*/
{
/** @remarks
* low-water mark logic for R0 & GC:
* - 75%: Set FF.
* - 50%: Force return to ring-3 ASAP.
*
* For ring-3 there is a little problem wrt to the recompiler, so:
* - 75%: Set FF.
* - 50%: Try allocate pages; on failure we'll force REM to quite ASAP.
*
* The basic idea is that we should be able to get out of any situation with
* only 50% of handy pages remaining.
*
* At the moment we'll not adjust the number of handy pages relative to the
* actual VM RAM committment, that's too much work for now.
*/
AssertMsg(pVM->pgm.s.cHandyPages <= RT_ELEMENTS(pVM->pgm.s.aHandyPages), ("%d\n", pVM->pgm.s.cHandyPages));
#ifdef IN_RING3
#endif
)
{
Log(("PGM: cHandyPages=%u out of %u -> allocate more\n", pVM->pgm.s.cHandyPages, RT_ELEMENTS(pVM->pgm.s.aHandyPages)));
#ifdef IN_RING3
#else
#endif
{
{
LogRel(("PGM: no more handy pages!\n"));
return VERR_EM_NO_MEMORY;
}
#ifdef IN_RING3
#else
#endif
}
}
{
#ifndef IN_RING3
{
Log(("PGM: VM_FF_TO_R3 - cHandyPages=%u out of %u\n", pVM->pgm.s.cHandyPages - 1, RT_ELEMENTS(pVM->pgm.s.aHandyPages)));
}
#endif
}
return VINF_SUCCESS;
}
/**
* Replace a zero or shared page with new page that we can write to.
*
* @returns The following VBox status codes.
* @retval VINF_SUCCESS on success, pPage is modified.
* @retval VINF_PGM_SYNC_CR3 on success and a page pool flush is pending.
* @retval VERR_EM_NO_MEMORY if we're totally out of memory.
*
* @todo Propagate VERR_EM_NO_MEMORY up the call tree.
*
* @param pVM The VM address.
* @param pPage The physical page tracking structure. This will
* be modified on success.
* @param GCPhys The address of the page.
*
* @remarks Must be called from within the PGM critical section. It may
* nip back to ring-3/0 in some cases.
*
* @remarks This function shouldn't really fail, however if it does
* it probably means we've screwed up the size of the amount
* device I/O is causing a lot of pages to be allocated while
* while the host is in a low-memory condition.
*/
{
/*
* Prereqs.
*/
AssertMsg(PGM_PAGE_IS_ZERO(pPage) || PGM_PAGE_IS_SHARED(pPage), ("%R[pgmpage] %RGp\n", pPage, GCPhys));
/*
* Flush any shadow page table mappings of the page.
* When VBOX_WITH_NEW_LAZY_PAGE_ALLOC isn't defined, there shouldn't be any.
*/
bool fFlushTLBs = false;
AssertMsgReturn(rc == VINF_SUCCESS || rc == VINF_PGM_GCPHYS_ALIASED, ("%Rrc\n", rc), RT_FAILURE(rc) ? rc : VERR_INTERNAL_ERROR);
/*
* Ensure that we've got a page handy, take it and use it.
*/
if (RT_FAILURE(rc2))
{
if (fFlushTLBs)
return rc2;
}
/* re-assert preconditions since pgmPhysEnsureHandyPage may do a context switch. */
AssertMsg(PGM_PAGE_IS_ZERO(pPage) || PGM_PAGE_IS_SHARED(pPage), ("%R[pgmpage] %RGp\n", pPage, GCPhys));
/*
* There are one or two action to be taken the next time we allocate handy pages:
* - Tell the GMM (global memory manager) what the page is being used for.
* (Speeds up replacement operations - sharing and defragmenting.)
* - If the current backing is shared, it must be freed.
*/
if (PGM_PAGE_IS_SHARED(pPage))
{
AssertMsgFailed(("TODO: copy shared page content")); /** @todo err.. what about copying the page content? */
}
else
{
Log2(("PGM: Replaced zero page %RGp with %#x / %RHp\n", GCPhys, pVM->pgm.s.aHandyPages[iHandyPage].idPage, HCPhys));
}
/*
* Do the PGMPAGE modifications.
*/
if ( fFlushTLBs
&& rc != VINF_PGM_GCPHYS_ALIASED)
return rc;
}
/**
* Deal with pages that are not writable, i.e. not in the ALLOCATED state.
*
* @returns VBox status code.
* @retval VINF_SUCCESS on success.
* @retval VINF_PGM_SYNC_CR3 on success and a page pool flush is pending.
* @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical backing.
*
* @param pVM The VM address.
* @param pPage The physical page tracking structure.
* @param GCPhys The address of the page.
*
* @remarks Called from within the PGM critical section.
*/
{
switch (PGM_PAGE_GET_STATE(pPage))
{
/* fall thru */
default: /* to shut up GCC */
case PGM_PAGE_STATE_ALLOCATED:
return VINF_SUCCESS;
/*
* Zero pages can be dummy pages for MMIO or reserved memory,
* so we need to check the flags before joining cause with
* shared page replacement.
*/
case PGM_PAGE_STATE_ZERO:
if (PGM_PAGE_IS_MMIO(pPage))
return VERR_PGM_PHYS_PAGE_RESERVED;
/* fall thru */
case PGM_PAGE_STATE_SHARED:
}
}
/**
* Wrapper for pgmPhysPageMakeWritable which enters the critsect.
*
* @returns VBox status code.
* @retval VINF_SUCCESS on success.
* @retval VINF_PGM_SYNC_CR3 on success and a page pool flush is pending.
* @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical backing.
*
* @param pVM The VM address.
* @param pPage The physical page tracking structure.
* @param GCPhys The address of the page.
*/
{
if (RT_SUCCESS(rc))
{
}
return rc;
}
/**
* Internal usage: Map the page specified by its GMM ID.
*
* This is similar to pgmPhysPageMap
*
* @returns VBox status code.
*
* @param pVM The VM handle.
* @param idPage The Page ID.
* @param HCPhys The physical address (for RC).
* @param ppv Where to store the mapping address.
*
* @remarks Called from within the PGM critical section.
*/
{
/*
* Validation.
*/
#ifdef IN_RC
/*
* Map it by HCPhys.
*/
#elif defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
/*
* Map it by HCPhys.
*/
#else
/*
*/
{
}
else
{
/*
* Find the chunk, map it if necessary.
*/
if (!pMap)
{
# ifdef IN_RING0
# else
if (RT_FAILURE(rc))
return rc;
# endif
}
/*
* Enter it into the Chunk TLB.
*/
}
return VINF_SUCCESS;
#endif
}
/**
* Maps a page into the current virtual address space so it can be accessed.
*
* @returns VBox status code.
* @retval VINF_SUCCESS on success.
* @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical backing.
*
* @param pVM The VM address.
* @param pPage The physical page tracking structure.
* @param GCPhys The address of the page.
* @param ppMap Where to store the address of the mapping tracking structure.
* @param ppv Where to store the mapping address of the page. The page
* offset is masked off!
*
* @remarks Called from within the PGM critical section.
*/
{
#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
/*
*/
# else
# endif
return VINF_SUCCESS;
#else /* IN_RING3 || IN_RING0 */
/*
* Special case: ZERO and MMIO2 pages.
*/
if (idChunk == NIL_GMM_CHUNKID)
{
AssertMsgReturn(PGM_PAGE_GET_PAGEID(pPage) == NIL_GMM_PAGEID, ("pPage=%R[pgmpage]\n", pPage), VERR_INTERNAL_ERROR);
{
/* Lookup the MMIO2 range and use pvR3 to calc the address. */
AssertMsgReturn(pRam || !pRam->pvR3, ("pRam=%p pPage=%R[pgmpage]\n", pRam, pPage), VERR_INTERNAL_ERROR);
}
{
/** @todo deal with aliased MMIO2 pages somehow...
* One solution would be to seed MMIO2 pages to GMM and get unique Page IDs for
* them, that would also avoid this mess. It would actually be kind of
* elegant... */
}
else
{
/** @todo handle MMIO2 */
("pPage=%R[pgmpage]\n", pPage),
}
return VINF_SUCCESS;
}
/*
*/
{
}
else
{
/*
* Find the chunk, map it if necessary.
*/
if (!pMap)
{
#ifdef IN_RING0
#else
if (RT_FAILURE(rc))
return rc;
#endif
}
/*
* Enter it into the Chunk TLB.
*/
}
return VINF_SUCCESS;
#endif /* IN_RING3 */
}
#if !defined(IN_RC) && !defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
/**
* Load a guest page into the ring-3 physical TLB.
*
* @returns VBox status code.
* @retval VINF_SUCCESS on success
* @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
* @param pPGM The PGM instance pointer.
* @param GCPhys The guest physical address in question.
*/
{
/*
* Find the ram range.
* 99.8% of requests are expected to be in the first range.
*/
{
do
{
if (!pRam)
}
/*
* Map the page.
* Make a special case for the zero page as it is kind of special.
*/
if (!PGM_PAGE_IS_ZERO(pPage))
{
void *pv;
if (RT_FAILURE(rc))
return rc;
}
else
{
}
return VINF_SUCCESS;
}
/**
* Load a guest page into the ring-3 physical TLB.
*
* @returns VBox status code.
* @retval VINF_SUCCESS on success
* @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
*
* @param pPGM The PGM instance pointer.
* @param pPage Pointer to the PGMPAGE structure corresponding to
* GCPhys.
* @param GCPhys The guest physical address in question.
*/
{
/*
* Map the page.
* Make a special case for the zero page as it is kind of special.
*/
if (!PGM_PAGE_IS_ZERO(pPage))
{
void *pv;
if (RT_FAILURE(rc))
return rc;
}
else
{
}
return VINF_SUCCESS;
}
#endif /* !IN_RC && !VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0 */
/**
* Internal version of PGMPhysGCPhys2CCPtr that expects the caller to
* own the PGM lock and therefore not need to lock the mapped page.
*
* @returns VBox status code.
* @retval VINF_SUCCESS on success.
* @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical backing.
* @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
*
* @param pVM The VM handle.
* @param GCPhys The guest physical address of the page that should be mapped.
* @param pPage Pointer to the PGMPAGE structure for the page.
* @param ppv Where to store the address corresponding to GCPhys.
*
* @internal
*/
{
int rc;
/*
* Make sure the page is writable.
*/
{
if (RT_FAILURE(rc))
return rc;
}
/*
* Get the mapping address.
*/
#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
#else
if (RT_FAILURE(rc))
return rc;
#endif
return VINF_SUCCESS;
}
/**
* Internal version of PGMPhysGCPhys2CCPtrReadOnly that expects the caller to
* own the PGM lock and therefore not need to lock the mapped page.
*
* @returns VBox status code.
* @retval VINF_SUCCESS on success.
* @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical backing.
* @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
*
* @param pVM The VM handle.
* @param GCPhys The guest physical address of the page that should be mapped.
* @param pPage Pointer to the PGMPAGE structure for the page.
* @param ppv Where to store the address corresponding to GCPhys.
*
* @internal
*/
{
/*
* Get the mapping address.
*/
#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
*ppv = pgmDynMapHCPageOff(&pVM->pgm.s, PGM_PAGE_GET_HCPHYS(pPage) | (GCPhys & PAGE_OFFSET_MASK)); /** @todo add a read only flag? */
#else
if (RT_FAILURE(rc))
return rc;
#endif
return VINF_SUCCESS;
}
/**
* Requests the mapping of a guest page into the current context.
*
* This API should only be used for very short term, as it will consume
* scarse resources (R0 and GC) in the mapping cache. When you're done
* with the page, call PGMPhysReleasePageMappingLock() ASAP to release it.
*
* This API will assume your intention is to write to the page, and will
* therefore replace shared and zero pages. If you do not intend to modify
* the page, use the PGMPhysGCPhys2CCPtrReadOnly() API.
*
* @returns VBox status code.
* @retval VINF_SUCCESS on success.
* @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical backing.
* @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
*
* @param pVM The VM handle.
* @param GCPhys The guest physical address of the page that should be mapped.
* @param ppv Where to store the address corresponding to GCPhys.
* @param pLock Where to store the lock information that PGMPhysReleasePageMappingLock needs.
*
* @remarks The caller is responsible for dealing with access handlers.
* @todo Add an informational return code for pages with access handlers?
*
* @remark Avoid calling this API from within critical sections (other than the
* PGM one) because of the deadlock risk. External threads may need to
* delegate jobs to the EMTs.
* @thread Any thread.
*/
{
#ifdef VBOX_WITH_NEW_PHYS_CODE
# if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
/*
* Find the page and make sure it's writable.
*/
if (RT_SUCCESS(rc))
{
if (RT_SUCCESS(rc))
{
*ppv = pgmDynMapHCPageOff(&pVM->pgm.s, PGM_PAGE_GET_HCPHYS(pPage) | (GCPhys & PAGE_OFFSET_MASK)); /** @todo add a read only flag? */
#if 0
#else
#endif
rc = VINF_SUCCESS;
}
}
# else /* IN_RING3 || IN_RING0 */
/*
* Query the Physical TLB entry for the page (may fail).
*/
if (RT_SUCCESS(rc))
{
/*
* If the page is shared, the zero page, or being write monitored
* it must be converted to an page that's writable if possible.
*/
{
if (RT_SUCCESS(rc))
{
}
}
if (RT_SUCCESS(rc))
{
/*
* Now, just perform the locking and calculate the return address.
*/
if (pMap)
#if 0 /** @todo implement locking properly */
{
if (pMap)
}
#endif
}
}
#endif /* IN_RING3 || IN_RING0 */
return rc;
#else
/*
* Temporary fallback code.
*/
# if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
/** @todo @bugref{3202}: check up this path. */
# else
# endif
#endif
}
/**
* Requests the mapping of a guest page into the current context.
*
* This API should only be used for very short term, as it will consume
* scarse resources (R0 and GC) in the mapping cache. When you're done
* with the page, call PGMPhysReleasePageMappingLock() ASAP to release it.
*
* @returns VBox status code.
* @retval VINF_SUCCESS on success.
* @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical backing.
* @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
*
* @param pVM The VM handle.
* @param GCPhys The guest physical address of the page that should be mapped.
* @param ppv Where to store the address corresponding to GCPhys.
* @param pLock Where to store the lock information that PGMPhysReleasePageMappingLock needs.
*
* @remarks The caller is responsible for dealing with access handlers.
* @todo Add an informational return code for pages with access handlers?
*
* @remark Avoid calling this API from within critical sections (other than
* the PGM one) because of the deadlock risk.
* @thread Any thread.
*/
VMMDECL(int) PGMPhysGCPhys2CCPtrReadOnly(PVM pVM, RTGCPHYS GCPhys, void const **ppv, PPGMPAGEMAPLOCK pLock)
{
#ifdef VBOX_WITH_NEW_PHYS_CODE
# if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
/*
* Find the page and make sure it's readable.
*/
if (RT_SUCCESS(rc))
{
else
{
*ppv = pgmDynMapHCPageOff(&pVM->pgm.s, PGM_PAGE_GET_HCPHYS(pPage) | (GCPhys & PAGE_OFFSET_MASK)); /** @todo add a read only flag? */
#if 0
#else
#endif
rc = VINF_SUCCESS;
}
}
# else /* IN_RING3 || IN_RING0 */
/*
* Query the Physical TLB entry for the page (may fail).
*/
if (RT_SUCCESS(rc))
{
/* MMIO pages doesn't have any readable backing. */
else
{
/*
* Now, just perform the locking and calculate the return address.
*/
if (pMap)
#if 0 /** @todo implement locking properly */
{
if (pMap)
}
#endif
}
}
#endif /* IN_RING3 || IN_RING0 */
return rc;
#else /* !VBOX_WITH_NEW_PHYS_CODE */
/*
* Fallback code.
*/
#endif /* !VBOX_WITH_NEW_PHYS_CODE */
}
/**
* Requests the mapping of a guest page given by virtual address into the current context.
*
* This API should only be used for very short term, as it will consume
* scarse resources (R0 and GC) in the mapping cache. When you're done
* with the page, call PGMPhysReleasePageMappingLock() ASAP to release it.
*
* This API will assume your intention is to write to the page, and will
* therefore replace shared and zero pages. If you do not intend to modify
* the page, use the PGMPhysGCPtr2CCPtrReadOnly() API.
*
* @returns VBox status code.
* @retval VINF_SUCCESS on success.
* @retval VERR_PAGE_TABLE_NOT_PRESENT if the page directory for the virtual address isn't present.
* @retval VERR_PAGE_NOT_PRESENT if the page at the virtual address isn't present.
* @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical backing.
* @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
*
* @param pVM The VM handle.
* @param GCPhys The guest physical address of the page that should be mapped.
* @param ppv Where to store the address corresponding to GCPhys.
* @param pLock Where to store the lock information that PGMPhysReleasePageMappingLock needs.
*
* @remark Avoid calling this API from within critical sections (other than
* the PGM one) because of the deadlock risk.
* @thread EMT
*/
{
if (RT_SUCCESS(rc))
return rc;
}
/**
* Requests the mapping of a guest page given by virtual address into the current context.
*
* This API should only be used for very short term, as it will consume
* scarse resources (R0 and GC) in the mapping cache. When you're done
* with the page, call PGMPhysReleasePageMappingLock() ASAP to release it.
*
* @returns VBox status code.
* @retval VINF_SUCCESS on success.
* @retval VERR_PAGE_TABLE_NOT_PRESENT if the page directory for the virtual address isn't present.
* @retval VERR_PAGE_NOT_PRESENT if the page at the virtual address isn't present.
* @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical backing.
* @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
*
* @param pVM The VM handle.
* @param GCPhys The guest physical address of the page that should be mapped.
* @param ppv Where to store the address corresponding to GCPhys.
* @param pLock Where to store the lock information that PGMPhysReleasePageMappingLock needs.
*
* @remark Avoid calling this API from within critical sections (other than
* the PGM one) because of the deadlock risk.
* @thread EMT
*/
VMMDECL(int) PGMPhysGCPtr2CCPtrReadOnly(PVM pVM, RTGCPTR GCPtr, void const **ppv, PPGMPAGEMAPLOCK pLock)
{
/* Debugger uses this API too */
//VM_ASSERT_EMT(pVM);
if (RT_SUCCESS(rc))
return rc;
}
/**
* Release the mapping of a guest page.
*
* This is the counter part of PGMPhysGCPhys2CCPtr, PGMPhysGCPhys2CCPtrReadOnly
* PGMPhysGCPtr2CCPtr and PGMPhysGCPtr2CCPtrReadOnly.
*
* @param pVM The VM handle.
* @param pLock The lock structure initialized by the mapping function.
*/
{
#ifdef VBOX_WITH_NEW_PHYS_CODE
#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
/* currently nothing to do here. */
#else /* IN_RING3 */
if (!pMap)
{
/* The ZERO page and MMIO2 ends up here. */
}
else
{
# if 0 /** @todo implement page locking */
# endif
}
#endif /* IN_RING3 */
#else
#endif
}
/**
* Converts a GC physical address to a HC ring-3 pointer.
*
* @returns VINF_SUCCESS on success.
* @returns VERR_PGM_PHYS_PAGE_RESERVED it it's a valid GC physical
* page but has no physical backing.
* @returns VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid
* GC physical address.
* @returns VERR_PGM_GCPHYS_RANGE_CROSSES_BOUNDARY if the range crosses
* a dynamic ram chunk boundary
*
* @param pVM The VM handle.
* @param GCPhys The GC physical address to convert.
* @param cbRange Physical range
* @param pR3Ptr Where to store the R3 pointer on success.
*
* @deprecated Avoid when possible!
*/
{
#ifdef VBOX_WITH_NEW_PHYS_CODE
/** @todo this is kind of hacky and needs some more work. */
Log(("PGMPhysGCPhys2R3Ptr(,%RGp,%#x,): dont use this API!\n", GCPhys, cbRange)); /** @todo eliminate this API! */
# if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
# else
if (RT_SUCCESS(rc))
return rc;
# endif
#else /* !VBOX_WITH_NEW_PHYS_CODE */
{
}
if (RT_FAILURE(rc))
return rc;
#ifndef PGM_IGNORE_RAM_FLAGS_RESERVED
return VERR_PGM_PHYS_PAGE_RESERVED;
#endif
{
}
{
#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0) /* ASSUMES this is a rare occurence */
#else
#endif
}
else
return VERR_PGM_PHYS_PAGE_RESERVED;
return VINF_SUCCESS;
#endif /* !VBOX_WITH_NEW_PHYS_CODE */
}
#ifdef VBOX_STRICT
/**
* PGMPhysGCPhys2R3Ptr convenience for use with assertions.
*
* @returns The R3Ptr, NIL_RTR3PTR on failure.
* @param pVM The VM handle.
* @param GCPhys The GC Physical addresss.
* @param cbRange Physical range.
*
* @deprecated Avoid when possible.
*/
{
if (RT_SUCCESS(rc))
return R3Ptr;
return NIL_RTR3PTR;
}
#endif /* VBOX_STRICT */
/**
* Converts a guest pointer to a GC physical address.
*
*
* @returns VBox status code.
* @param pVM The VM Handle
* @param GCPtr The guest pointer to convert.
* @param pGCPhys Where to store the GC physical address.
*/
{
return rc;
}
/**
* Converts a guest pointer to a HC physical address.
*
*
* @returns VBox status code.
* @param pVM The VM Handle
* @param GCPtr The guest pointer to convert.
* @param pHCPhys Where to store the HC physical address.
*/
{
if (RT_SUCCESS(rc))
return rc;
}
/**
* Converts a guest pointer to a R3 pointer.
*
*
* @returns VBox status code.
* @param pVM The VM Handle
* @param GCPtr The guest pointer to convert.
* @param pR3Ptr Where to store the R3 virtual address.
*
* @deprecated Don't use this.
*/
{
#ifdef VBOX_WITH_NEW_PHYS_CODE
#endif
if (RT_SUCCESS(rc))
rc = PGMPhysGCPhys2R3Ptr(pVM, GCPhys | ((RTGCUINTPTR)GCPtr & PAGE_OFFSET_MASK), 1 /* we always stay within one page */, pR3Ptr);
return rc;
}
#define LOG_GROUP LOG_GROUP_PGM_PHYS_ACCESS
#ifdef IN_RING3
/**
* Cache PGMPhys memory access
*
* @param pVM VM Handle.
* @param pCache Cache structure pointer
* @param GCPhys GC physical address
* @param pbHC HC pointer corresponding to physical page
*
* @thread EMT.
*/
{
}
#endif /* IN_RING3 */
#ifdef VBOX_WITH_NEW_PHYS_CODE
/**
* Deals with reading from a page with one or more ALL access handlers.
*
* @returns VBox status code. Can be ignored in ring-3.
* @retval VINF_SUCCESS.
* @retval VERR_PGM_PHYS_WR_HIT_HANDLER in R0 and GC, NEVER in R3.
*
* @param pVM The VM handle.
* @param pPage The page descriptor.
* @param GCPhys The physical address to start reading at.
* @param pvBuf Where to put the bits we read.
* @param cb How much to read - less or equal to a page.
*/
{
/*
* The most frequent access here is MMIO and shadowed ROM.
* The current code ASSUMES all these access handlers covers full pages!
*/
/*
* Whatever we do we need the source page, map it first.
*/
if (RT_FAILURE(rc))
{
AssertLogRelMsgFailed(("pgmPhysGCPhys2CCPtrInternalReadOnly failed on %RGp / %R[pgmpage] -> %Rrc\n",
return VINF_SUCCESS;
}
/*
* Deal with any physical handlers.
*/
{
#ifdef IN_RING3
PPGMPHYSHANDLER pPhys = (PPGMPHYSHANDLER)RTAvlroGCPhysRangeGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
Log5(("pgmPhysReadHandler: GCPhys=%RGp cb=%#x pPage=%R[pgmpage] phys %s\n", GCPhys, cb, pPage, R3STRING(pPhys->pszDesc) ));
rc = pPhys->CTX_SUFF(pfnHandler)(pVM, GCPhys, (void *)pvSrc, pvBuf, cb, PGMACCESSTYPE_READ, pPhys->CTX_SUFF(pvUser));
AssertLogRelMsg(rc == VINF_SUCCESS || rc == VINF_PGM_HANDLER_DO_DEFAULT, ("rc=%Rrc GCPhys=%RGp\n", rc, GCPhys));
#else
/* In R0 and RC the callbacks cannot handle this context, so we'll fail. */
//AssertReleaseMsgFailed(("Wrong API! GCPhys=%RGp cb=%#x\n", GCPhys, cb));
return VERR_PGM_PHYS_WR_HIT_HANDLER;
#endif
}
/*
* Deal with any virtual handlers.
*/
{
unsigned iPage;
Assert(GCPhys >= pVirt->aPhysToVirt[iPage].Core.Key && GCPhys <= pVirt->aPhysToVirt[iPage].Core.KeyLast);
#ifdef IN_RING3
if (pVirt->pfnHandlerR3)
{
if (!pPhys)
Log5(("pgmPhysWriteHandler: GCPhys=%RGp cb=%#x pPage=%R[pgmpage] virt %s\n", GCPhys, cb, pPage, R3STRING(pVirt->pszDesc) ));
else
Log(("pgmPhysWriteHandler: GCPhys=%RGp cb=%#x pPage=%R[pgmpage] phys/virt %s/%s\n", GCPhys, cb, pPage, R3STRING(pVirt->pszDesc), R3STRING(pPhys->pszDesc) ));
+ (iPage << PAGE_SHIFT)
+ (GCPhys & PAGE_OFFSET_MASK);
rc2 = pVirt->CTX_SUFF(pfnHandler)(pVM, GCPtr, (void *)pvSrc, pvBuf, cb, PGMACCESSTYPE_READ, /*pVirt->CTX_SUFF(pvUser)*/ NULL);
if (rc2 == VINF_SUCCESS)
rc = VINF_SUCCESS;
AssertLogRelMsg(rc2 == VINF_SUCCESS || rc2 == VINF_PGM_HANDLER_DO_DEFAULT, ("rc=%Rrc GCPhys=%RGp pPage=%R[pgmpage] %s\n", rc2, GCPhys, pPage, pVirt->pszDesc));
}
else
Log5(("pgmPhysWriteHandler: GCPhys=%RGp cb=%#x pPage=%R[pgmpage] virt %s [no handler]\n", GCPhys, cb, pPage, R3STRING(pVirt->pszDesc) ));
#else
/* In R0 and RC the callbacks cannot handle this context, so we'll fail. */
//AssertReleaseMsgFailed(("Wrong API! GCPhys=%RGp cb=%#x\n", GCPhys, cb));
return VERR_PGM_PHYS_WR_HIT_HANDLER;
#endif
}
/*
* Take the default action.
*/
if (rc == VINF_PGM_HANDLER_DO_DEFAULT)
return rc;
}
/**
* Read physical memory.
*
* This API respects access handlers and MMIO. Use PGMPhysSimpleReadGCPhys() if you
* want to ignore those.
*
* @returns VBox status code. Can be ignored in ring-3.
* @retval VINF_SUCCESS.
* @retval VERR_PGM_PHYS_WR_HIT_HANDLER in R0 and GC, NEVER in R3.
*
* @param pVM VM Handle.
* @param GCPhys Physical address start reading from.
* @param pvBuf Where to put the read bits.
* @param cbRead How many bytes to read.
*/
{
/*
* Copy loop on ram ranges.
*/
for (;;)
{
/* Find range. */
/* Inside range or not? */
{
/*
* Must work our way thru this page by page.
*/
{
/*
* Any ALL access handlers?
*/
{
if (RT_FAILURE(rc))
return rc;
}
else
{
/*
* Get the pointer to the page.
*/
const void *pvSrc;
if (RT_SUCCESS(rc))
else
{
AssertLogRelMsgFailed(("pgmPhysGCPhys2CCPtrInternalReadOnly failed on %RGp / %R[pgmpage] -> %Rrc\n",
}
}
/* next page */
{
return VINF_SUCCESS;
}
} /* walk pages in ram range. */
}
else
{
/*
* Unassigned address space.
*/
if (!pRam)
break;
{
break;
}
}
} /* Ram range walk */
return VINF_SUCCESS;
}
#else /* Old PGMPhysRead */
/**
* Read physical memory.
*
* This API respects access handlers and MMIO. Use PGMPhysSimpleReadGCPhys() if you
* want to ignore those.
*
* @param pVM VM Handle.
* @param GCPhys Physical address start reading from.
* @param pvBuf Where to put the read bits.
* @param cbRead How many bytes to read.
*/
{
#ifdef IN_RING3
bool fGrabbedLock = false;
#endif
if (cbRead == 0)
return;
#ifdef IN_RING3
{
fGrabbedLock = true;
}
#endif
/*
* Copy loop on ram ranges.
*/
for (;;)
{
/* Find range. */
/* Inside range or not? */
{
/*
* Must work our way thru this page by page.
*/
{
/* Physical chunk in dynamically allocated range not present? */
{
/* Treat it as reserved; return zeros */
{
goto l_End;
}
}
/* temp hacks, will be reorganized. */
/*
* Physical handler.
*/
{
int rc = VINF_PGM_HANDLER_DO_DEFAULT;
#ifdef IN_RING3 /** @todo deal with this in GC and R0! */
/* find and call the handler */
PPGMPHYSHANDLER pNode = (PPGMPHYSHANDLER)RTAvlroGCPhysRangeGet(&pVM->pgm.s.pTreesR3->PhysHandlers, GCPhys);
{
/* Note! Dangerous assumption that HC handlers don't do anything that really requires an EMT lock! */
}
#endif /* IN_RING3 */
if (rc == VINF_PGM_HANDLER_DO_DEFAULT)
{
#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
void *pvSrc = pgmDynMapHCPageOff(&pVM->pgm.s, PGM_PAGE_GET_HCPHYS(pPage) + (off & PAGE_OFFSET_MASK));
#else
#endif
{
goto l_End;
}
}
goto l_End;
}
/*
* Virtual handlers.
*/
{
int rc = VINF_PGM_HANDLER_DO_DEFAULT;
#ifdef IN_RING3 /** @todo deal with this in GC and R0! */
/* Search the whole tree for matching physical addresses (rather expensive!) */
unsigned iPage;
{
/* Note! Dangerous assumption that HC handlers don't do anything that really requires an EMT lock! */
}
#endif /* IN_RING3 */
if (rc == VINF_PGM_HANDLER_DO_DEFAULT)
{
#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
void *pvSrc = pgmDynMapHCPageOff(&pVM->pgm.s, PGM_PAGE_GET_HCPHYS(pPage) + (off & PAGE_OFFSET_MASK));
#else
#endif
{
goto l_End;
}
}
goto l_End;
}
else
{
switch (pPage->HCPhys & (MM_RAM_FLAGS_RESERVED | MM_RAM_FLAGS_MMIO | MM_RAM_FLAGS_ROM)) /** @todo PAGE FLAGS */
{
/*
* Normal memory or ROM.
*/
case 0:
case MM_RAM_FLAGS_ROM:
//case MM_RAM_FLAGS_ROM | MM_RAM_FLAGS_MMIO2: /* = shadow */ - //MMIO2 isn't in the mask.
case MM_RAM_FLAGS_MMIO2: // MMIO2 isn't in the mask.
{
#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
void *pvSrc = pgmDynMapHCPageOff(&pVM->pgm.s, PGM_PAGE_GET_HCPHYS(pPage) + (off & PAGE_OFFSET_MASK));
#else
#endif
{
#if defined(IN_RING3) && defined(PGM_PHYSMEMACCESS_CACHING)
#endif /* IN_RING3 && PGM_PHYSMEMACCESS_CACHING */
goto l_End;
}
break;
}
/*
* All reserved, nothing there.
*/
case MM_RAM_FLAGS_RESERVED:
{
goto l_End;
}
break;
/*
* The rest needs to be taken more carefully.
*/
default:
#if 1 /** @todo r=bird: Can you do this properly please. */
/** @todo Try MMIO; quick hack */
goto l_End;
#endif
/** @todo fix me later. */
AssertReleaseMsgFailed(("Unknown read at %RGp size %u implement the complex physical reading case %RHp\n",
pPage->HCPhys & (MM_RAM_FLAGS_RESERVED | MM_RAM_FLAGS_MMIO | MM_RAM_FLAGS_ROM))); /** @todo PAGE FLAGS */
break;
}
}
}
}
else
{
/*
* Unassigned address space.
*/
if ( !pRam
{
goto l_End;
}
}
}
#ifdef IN_RING3
if (fGrabbedLock)
#endif
return;
}
#endif /* Old PGMPhysRead */
#ifdef VBOX_WITH_NEW_PHYS_CODE
/**
* Deals with writing to a page with one or more WRITE or ALL access handlers.
*
* @returns VBox status code. Can be ignored in ring-3.
* @retval VINF_SUCCESS.
* @retval VERR_PGM_PHYS_WR_HIT_HANDLER in R0 and GC, NEVER in R3.
*
* @param pVM The VM handle.
* @param pPage The page descriptor.
* @param GCPhys The physical address to start writing at.
* @param pvBuf What to write.
* @param cbWrite How much to write - less or equal to a page.
*/
static int pgmPhysWriteHandler(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhys, void const *pvBuf, size_t cbWrite)
{
int rc;
/*
* Give priority to physical handlers (like #PF does).
*
* Hope for a lonely physical handler first that covers the whole
* write area. This should be a pretty frequent case with MMIO and
* the heavy usage of full page handlers in the page pool.
*/
{
PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysRangeGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
if (pCur)
{
#ifndef IN_RING3
/* In R0 and RC the callbacks cannot handle this context, so we'll fail. */
//AssertReleaseMsgFailed(("Wrong API! GCPhys=%RGp cbRange=%#x\n", GCPhys, cbRange));
return VERR_PGM_PHYS_WR_HIT_HANDLER;
#else /* IN_RING3 */
Log5(("pgmPhysWriteHandler: GCPhys=%RGp cbRange=%#x pPage=%R[pgmpage] phys %s\n", GCPhys, cbRange, pPage, R3STRING(pCur->pszDesc) ));
if (!PGM_PAGE_IS_MMIO(pPage))
else
rc = VINF_SUCCESS;
if (RT_SUCCESS(rc))
{
rc = pCur->CTX_SUFF(pfnHandler)(pVM, GCPhys, pvDst, (void *)pvBuf, cbRange, PGMACCESSTYPE_WRITE, pCur->CTX_SUFF(pvUser));
if (rc == VINF_PGM_HANDLER_DO_DEFAULT)
else
AssertLogRelMsg(rc == VINF_SUCCESS, ("rc=%Rrc GCPhys=%RGp pPage=%R[pgmpage] %s\n", rc, GCPhys, pPage, pCur->pszDesc));
}
else
AssertLogRelMsgFailedReturn(("pgmPhysGCPhys2CCPtrInternal failed on %RGp / %R[pgmpage] -> %Rrc\n",
return VINF_SUCCESS;
/* more fun to be had below */
#endif /* IN_RING3 */
}
/* else: the handler is somewhere else in the page, deal with it below. */
}
/*
* A virtual handler without any interfering physical handlers.
* Hopefully it'll conver the whole write.
*/
else if (!PGM_PAGE_HAS_ACTIVE_PHYSICAL_HANDLERS(pPage))
{
unsigned iPage;
if (RT_SUCCESS(rc))
{
#ifndef IN_RING3
/* In R0 and RC the callbacks cannot handle this context, so we'll fail. */
//AssertReleaseMsgFailed(("Wrong API! GCPhys=%RGp cbRange=%#x\n", GCPhys, cbRange));
return VERR_PGM_PHYS_WR_HIT_HANDLER;
#else /* IN_RING3 */
Log5(("pgmPhysWriteHandler: GCPhys=%RGp cbRange=%#x pPage=%R[pgmpage] virt %s\n", GCPhys, cbRange, pPage, R3STRING(pCur->pszDesc) ));
if (RT_SUCCESS(rc))
{
if (pCur->pfnHandlerR3)
{
+ (iPage << PAGE_SHIFT)
+ (GCPhys & PAGE_OFFSET_MASK);
rc = pCur->CTX_SUFF(pfnHandler)(pVM, GCPtr, pvDst, (void *)pvBuf, cbRange, PGMACCESSTYPE_WRITE, /*pCur->CTX_SUFF(pvUser)*/ NULL);
}
if (rc == VINF_PGM_HANDLER_DO_DEFAULT)
else
AssertLogRelMsg(rc == VINF_SUCCESS, ("rc=%Rrc GCPhys=%RGp pPage=%R[pgmpage] %s\n", rc, GCPhys, pPage, pCur->pszDesc));
}
else
AssertLogRelMsgFailedReturn(("pgmPhysGCPhys2CCPtrInternal failed on %RGp / %R[pgmpage] -> %Rrc\n",
return VINF_SUCCESS;
/* more fun to be had below */
#endif
}
/* else: the handler is somewhere else in the page, deal with it below. */
}
/*
* Deal with all the odd ends.
*/
/* We need a writable destination page. */
if (!pvDst)
{
("pgmPhysGCPhys2CCPtrInternal failed on %RGp / %R[pgmpage] -> %Rrc\n",
}
/* The loop state (big + ugly). */
unsigned iVirtPage = 0;
/* The loop. */
for (;;)
{
/*
* Find the closest handler at or above GCPhys.
*/
{
if (RT_SUCCESS(rc))
{
offVirt = 0;
offVirtLast = (pVirt->aPhysToVirt[iVirtPage].Core.KeyLast & PAGE_OFFSET_MASK) - (GCPhys & PAGE_OFFSET_MASK);
}
else
{
pVirtPhys = (PPGMPHYS2VIRTHANDLER)RTAvlroGCPhysGetBestFit(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysToVirtHandlers,
GCPhys, true /* fAbove */);
if ( pVirtPhys
{
/* ASSUME that pVirtPhys only covers one page. */
}
else
{
fMoreVirt = false;
}
}
}
{
if (pPhys)
{
offPhys = 0;
}
else
{
GCPhys, true /* fAbove */);
if ( pPhys
{
}
else
{
fMorePhys = false;
}
}
}
/*
* Handle access to space without handlers (that's easy).
*/
{
Log5(("pgmPhysWriteHandler: GCPhys=%RGp cbRange=%#x pPage=%R[pgmpage] miss\n", GCPhys, cbRange, pPage));
}
/*
* Physical handler.
*/
{
#ifdef IN_RING3
Log5(("pgmPhysWriteHandler: GCPhys=%RGp cbRange=%#x pPage=%R[pgmpage] phys %s\n", GCPhys, cbRange, pPage, R3STRING(pPhys->pszDesc) ));
rc = pPhys->CTX_SUFF(pfnHandler)(pVM, GCPhys, pvDst, (void *)pvBuf, cbRange, PGMACCESSTYPE_WRITE, pPhys->CTX_SUFF(pvUser));
AssertLogRelMsg(rc == VINF_SUCCESS || rc == VINF_PGM_HANDLER_DO_DEFAULT, ("rc=%Rrc GCPhys=%RGp pPage=%R[pgmpage] %s\n", rc, GCPhys, pPage, pPhys->pszDesc));
#else
/* In R0 and RC the callbacks cannot handle this context, so we'll fail. */
//AssertReleaseMsgFailed(("Wrong API! GCPhys=%RGp cbRange=%#x\n", GCPhys, cbRange));
return VERR_PGM_PHYS_WR_HIT_HANDLER;
#endif
}
/*
* Virtual handler.
*/
{
#ifdef IN_RING3
Log5(("pgmPhysWriteHandler: GCPhys=%RGp cbRange=%#x pPage=%R[pgmpage] phys %s\n", GCPhys, cbRange, pPage, R3STRING(pVirt->pszDesc) ));
if (pVirt->pfnHandlerR3)
{
+ (iVirtPage << PAGE_SHIFT)
+ (GCPhys & PAGE_OFFSET_MASK);
rc = pVirt->CTX_SUFF(pfnHandler)(pVM, GCPtr, pvDst, (void *)pvBuf, cbRange, PGMACCESSTYPE_WRITE, /*pCur->CTX_SUFF(pvUser)*/ NULL);
AssertLogRelMsg(rc == VINF_SUCCESS || rc == VINF_PGM_HANDLER_DO_DEFAULT, ("rc=%Rrc GCPhys=%RGp pPage=%R[pgmpage] %s\n", rc, GCPhys, pPage, pVirt->pszDesc));
}
#else
/* In R0 and RC the callbacks cannot handle this context, so we'll fail. */
//AssertReleaseMsgFailed(("Wrong API! GCPhys=%RGp cbRange=%#x\n", GCPhys, cbRange));
return VERR_PGM_PHYS_WR_HIT_HANDLER;
#endif
}
/*
* Both... give the physical one priority.
*/
else
{
#ifdef IN_RING3
if (pVirt->pfnHandlerR3)
Log(("pgmPhysWriteHandler: overlapping phys and virt handlers at %RGp %R[pgmpage]; cbRange=%#x\n", GCPhys, pPage, cbRange));
Log5(("pgmPhysWriteHandler: GCPhys=%RGp cbRange=%#x pPage=%R[pgmpage] phys/virt %s/%s\n", GCPhys, cbRange, pPage, R3STRING(pPhys->pszDesc), R3STRING(pVirt->pszDesc) ));
rc = pPhys->CTX_SUFF(pfnHandler)(pVM, GCPhys, pvDst, (void *)pvBuf, cbRange, PGMACCESSTYPE_WRITE, pPhys->CTX_SUFF(pvUser));
AssertLogRelMsg(rc == VINF_SUCCESS || rc == VINF_PGM_HANDLER_DO_DEFAULT, ("rc=%Rrc GCPhys=%RGp pPage=%R[pgmpage] %s\n", rc, GCPhys, pPage, pPhys->pszDesc));
if (pVirt->pfnHandlerR3)
{
+ (iVirtPage << PAGE_SHIFT)
+ (GCPhys & PAGE_OFFSET_MASK);
int rc2 = pVirt->CTX_SUFF(pfnHandler)(pVM, GCPtr, pvDst, (void *)pvBuf, cbRange, PGMACCESSTYPE_WRITE, /*pCur->CTX_SUFF(pvUser)*/ NULL);
AssertLogRelMsg(rc2 != VINF_SUCCESS && rc2 != VINF_PGM_HANDLER_DO_DEFAULT, ("rc=%Rrc GCPhys=%RGp pPage=%R[pgmpage] %s\n", rc, GCPhys, pPage, pVirt->pszDesc));
rc = VINF_SUCCESS;
}
#else
/* In R0 and RC the callbacks cannot handle this context, so we'll fail. */
//AssertReleaseMsgFailed(("Wrong API! GCPhys=%RGp cbRange=%#x\n", GCPhys, cbRange));
return VERR_PGM_PHYS_WR_HIT_HANDLER;
#endif
}
if (rc == VINF_PGM_HANDLER_DO_DEFAULT)
/*
* Advance if we've got more stuff to do.
*/
return VINF_SUCCESS;
offPhysLast -= cbRange;
offVirtLast -= cbRange;
}
}
/**
* Write to physical memory.
*
* This API respects access handlers and MMIO. Use PGMPhysSimpleReadGCPhys() if you
* want to ignore those.
*
* @returns VBox status code. Can be ignored in ring-3.
* @retval VINF_SUCCESS.
* @retval VERR_PGM_PHYS_WR_HIT_HANDLER in R0 and GC, NEVER in R3.
*
* @param pVM VM Handle.
* @param GCPhys Physical address to write to.
* @param pvBuf What to write.
* @param cbWrite How many bytes to write.
*/
{
/*
* Copy loop on ram ranges.
*/
for (;;)
{
/* Find range. */
/* Inside range or not? */
{
/*
* Must work our way thru this page by page.
*/
{
/*
* Any active WRITE or ALL access handlers?
*/
{
if (RT_FAILURE(rc))
return rc;
}
else
{
/*
* Get the pointer to the page.
*/
void *pvDst;
if (RT_SUCCESS(rc))
else
AssertLogRelMsgFailed(("pgmPhysGCPhys2CCPtrInternal failed on %RGp / %R[pgmpage] -> %Rrc\n",
}
/* next page */
{
return VINF_SUCCESS;
}
} /* walk pages in ram range */
}
else
{
/*
* Unassigned address space, skip it.
*/
if (!pRam)
break;
break;
}
} /* Ram range walk */
return VINF_SUCCESS;
}
#else /* Old PGMPhysWrite */
/**
* Write to physical memory.
*
* This API respects access handlers and MMIO. Use PGMPhysSimpleReadGCPhys() if you
* want to ignore those.
*
* @param pVM VM Handle.
* @param GCPhys Physical address to write to.
* @param pvBuf What to write.
* @param cbWrite How many bytes to write.
*/
{
#ifdef IN_RING3
bool fGrabbedLock = false;
#endif
if (cbWrite == 0)
return;
#ifdef IN_RING3
{
fGrabbedLock = true;
}
#endif
/*
* Copy loop on ram ranges.
*/
for (;;)
{
/* Find range. */
/* Inside range or not? */
{
/*
* Must work our way thru this page by page.
*/
{
/* Physical chunk in dynamically allocated range not present? */
{
int rc;
#ifdef IN_RING3
if (fGrabbedLock)
{
if (rc == VINF_SUCCESS)
PGMPhysWrite(pVM, GCPhysPage, pvBuf, cbWrite); /* try again; can't assume pRam is still valid (paranoia) */
return;
}
#else
#endif
if (rc != VINF_SUCCESS)
goto l_End;
}
/* temporary hack, will reogranize is later. */
/*
* Virtual handlers
*/
{
{
/*
* Physical write handler + virtual write handler.
* Consider this a quick workaround for the CSAM + shadow caching problem.
*
* We hand it to the shadow caching first since it requires the unchanged
* data. CSAM will have to put up with it already being changed.
*/
int rc = VINF_PGM_HANDLER_DO_DEFAULT;
#ifdef IN_RING3 /** @todo deal with this in GC and R0! */
/* 1. The physical handler */
PPGMPHYSHANDLER pPhysNode = (PPGMPHYSHANDLER)RTAvlroGCPhysRangeGet(&pVM->pgm.s.pTreesR3->PhysHandlers, GCPhys);
{
/* Note! Dangerous assumption that R3 handlers don't do anything that really requires an EMT lock! */
rc = pPhysNode->pfnHandlerR3(pVM, GCPhys, pvDst, (void *)pvBuf, cb, PGMACCESSTYPE_WRITE, pPhysNode->pvUserR3);
}
/* 2. The virtual handler (will see incorrect data) */
unsigned iPage;
{
/* Note! Dangerous assumption that R3 handlers don't do anything that really requires an EMT lock! */
rc2 = pVirtNode->pfnHandlerR3(pVM, (RTGCPTR)GCPtr, pvDst, (void *)pvBuf, cb, PGMACCESSTYPE_WRITE, 0);
if ( ( rc2 != VINF_PGM_HANDLER_DO_DEFAULT
&& rc == VINF_PGM_HANDLER_DO_DEFAULT)
|| ( RT_FAILURE(rc2)
&& RT_SUCCESS(rc)))
}
#endif /* IN_RING3 */
if (rc == VINF_PGM_HANDLER_DO_DEFAULT)
{
#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
void *pvDst = pgmDynMapHCPageOff(&pVM->pgm.s, PGM_PAGE_GET_HCPHYS(pPage) + (off & PAGE_OFFSET_MASK));
#else
#endif
{
goto l_End;
}
}
goto l_End;
}
else
{
int rc = VINF_PGM_HANDLER_DO_DEFAULT;
#ifdef IN_RING3
/** @todo deal with this in GC and R0! */
/* Search the whole tree for matching physical addresses (rather expensive!) */
unsigned iPage;
{
/* Note! Dangerous assumption that R3 handlers don't do anything that really requires an EMT lock! */
}
#endif /* IN_RING3 */
if (rc == VINF_PGM_HANDLER_DO_DEFAULT)
{
#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
void *pvDst = pgmDynMapHCPageOff(&pVM->pgm.s, PGM_PAGE_GET_HCPHYS(pPage) + (off & PAGE_OFFSET_MASK));
#else
#endif
{
goto l_End;
}
}
goto l_End;
}
}
/*
* Physical handler.
*/
{
int rc = VINF_PGM_HANDLER_DO_DEFAULT;
#ifdef IN_RING3 /** @todo deal with this in GC and R0! */
/* find and call the handler */
PPGMPHYSHANDLER pNode = (PPGMPHYSHANDLER)RTAvlroGCPhysRangeGet(&pVM->pgm.s.pTreesR3->PhysHandlers, GCPhys);
{
/** @todo Dangerous assumption that HC handlers don't do anything that really requires an EMT lock! */
rc = pNode->pfnHandlerR3(pVM, GCPhys, pvDst, (void *)pvBuf, cb, PGMACCESSTYPE_WRITE, pNode->pvUserR3);
}
#endif /* IN_RING3 */
if (rc == VINF_PGM_HANDLER_DO_DEFAULT)
{
#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
void *pvDst = pgmDynMapHCPageOff(&pVM->pgm.s, PGM_PAGE_GET_HCPHYS(pPage) + (off & PAGE_OFFSET_MASK));
#else
#endif
{
goto l_End;
}
}
goto l_End;
}
else
{
/** @todo r=bird: missing MM_RAM_FLAGS_ROM here, we shall not allow anyone to overwrite the ROM! */
switch (pPage->HCPhys & (MM_RAM_FLAGS_RESERVED | MM_RAM_FLAGS_MMIO | MM_RAM_FLAGS_MMIO2)) /** @todo PAGE FLAGS */
{
/*
* Normal memory, MMIO2 or writable shadow ROM.
*/
case 0:
case MM_RAM_FLAGS_MMIO2:
{
#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
void *pvDst = pgmDynMapHCPageOff(&pVM->pgm.s, PGM_PAGE_GET_HCPHYS(pPage) + (off & PAGE_OFFSET_MASK));
#else
#endif
{
#if defined(IN_RING3) && defined(PGM_PHYSMEMACCESS_CACHING)
#endif /* IN_RING3 && PGM_PHYSMEMACCESS_CACHING */
goto l_End;
}
break;
}
/*
* All reserved, nothing there.
*/
case MM_RAM_FLAGS_RESERVED:
goto l_End;
break;
/*
* The rest needs to be taken more carefully.
*/
default:
#if 1 /** @todo r=bird: Can you do this properly please. */
/** @todo Try MMIO; quick hack */
goto l_End;
#endif
/** @todo fix me later. */
AssertReleaseMsgFailed(("Unknown write at %RGp size %u implement the complex physical writing case %RHp\n",
(pPage->HCPhys & (MM_RAM_FLAGS_RESERVED | MM_RAM_FLAGS_MMIO | MM_RAM_FLAGS_MMIO2)))); /** @todo PAGE FLAGS */
/* skip the write */
break;
}
}
}
}
else
{
/*
* Unassigned address space.
*/
if ( !pRam
goto l_End;
}
}
#ifdef IN_RING3
if (fGrabbedLock)
#endif
return;
}
#endif /* Old PGMPhysWrite */
/**
* Read from guest physical memory by GC physical address, bypassing
* MMIO and access handlers.
*
* @returns VBox status.
* @param pVM VM handle.
* @param pvDst The destination address.
* @param GCPhysSrc The source address (GC physical address).
* @param cb The number of bytes to read.
*/
{
/*
* Treat the first page as a special case.
*/
if (!cb)
return VINF_SUCCESS;
/* map the 1st page */
void const *pvSrc;
if (RT_FAILURE(rc))
return rc;
/* optimize for the case where access is completely within the first page. */
{
return VINF_SUCCESS;
}
/* copy to the end of the page. */
/*
* Page by page.
*/
for (;;)
{
/* map the page */
if (RT_FAILURE(rc))
return rc;
/* last page? */
{
return VINF_SUCCESS;
}
/* copy the entire page and advance */
}
/* won't ever get here. */
}
#ifndef IN_RC /* Ring 0 & 3 only. (Just not needed in GC.) */
/**
* Write to guest physical memory referenced by GC pointer.
* Write memory to GC physical address in guest physical memory.
*
* This will bypass MMIO and access handlers.
*
* @returns VBox status.
* @param pVM VM handle.
* @param GCPhysDst The GC physical address of the destination.
* @param pvSrc The source buffer.
* @param cb The number of bytes to write.
*/
{
/*
* Treat the first page as a special case.
*/
if (!cb)
return VINF_SUCCESS;
/* map the 1st page */
void *pvDst;
if (RT_FAILURE(rc))
return rc;
/* optimize for the case where access is completely within the first page. */
{
return VINF_SUCCESS;
}
/* copy to the end of the page. */
/*
* Page by page.
*/
for (;;)
{
/* map the page */
if (RT_FAILURE(rc))
return rc;
/* last page? */
{
return VINF_SUCCESS;
}
/* copy the entire page and advance */
}
/* won't ever get here. */
}
/**
* Read from guest physical memory referenced by GC pointer.
*
* bypass access handlers and not set any accessed bits.
*
* @returns VBox status.
* @param pVM VM handle.
* @param pvDst The destination address.
* @param GCPtrSrc The source address (GC pointer).
* @param cb The number of bytes to read.
*/
{
/*
* Treat the first page as a special case.
*/
if (!cb)
return VINF_SUCCESS;
/* map the 1st page */
void const *pvSrc;
if (RT_FAILURE(rc))
return rc;
/* optimize for the case where access is completely within the first page. */
{
return VINF_SUCCESS;
}
/* copy to the end of the page. */
/*
* Page by page.
*/
for (;;)
{
/* map the page */
if (RT_FAILURE(rc))
return rc;
/* last page? */
{
return VINF_SUCCESS;
}
/* copy the entire page and advance */
}
/* won't ever get here. */
}
/**
* Write to guest physical memory referenced by GC pointer.
*
* bypass access handlers and not set dirty or accessed bits.
*
* @returns VBox status.
* @param pVM VM handle.
* @param GCPtrDst The destination address (GC pointer).
* @param pvSrc The source address.
* @param cb The number of bytes to write.
*/
{
/*
* Treat the first page as a special case.
*/
if (!cb)
return VINF_SUCCESS;
/* map the 1st page */
void *pvDst;
if (RT_FAILURE(rc))
return rc;
/* optimize for the case where access is completely within the first page. */
{
return VINF_SUCCESS;
}
/* copy to the end of the page. */
/*
* Page by page.
*/
for (;;)
{
/* map the page */
if (RT_FAILURE(rc))
return rc;
/* last page? */
{
return VINF_SUCCESS;
}
/* copy the entire page and advance */
}
/* won't ever get here. */
}
/**
* Write to guest physical memory referenced by GC pointer and update the PTE.
*
* bypass access handlers but will set any dirty and accessed bits in the PTE.
*
* If you don't want to set the dirty bit, use PGMPhysSimpleWriteGCPtr().
*
* @returns VBox status.
* @param pVM VM handle.
* @param GCPtrDst The destination address (GC pointer).
* @param pvSrc The source address.
* @param cb The number of bytes to write.
*/
{
/*
* Treat the first page as a special case.
* Btw. this is the same code as in PGMPhyssimpleWriteGCPtr excep for the PGMGstModifyPage.
*/
if (!cb)
return VINF_SUCCESS;
/* map the 1st page */
void *pvDst;
if (RT_FAILURE(rc))
return rc;
/* optimize for the case where access is completely within the first page. */
{
rc = PGMGstModifyPage(pVM, GCPtrDst, 1, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D)); AssertRC(rc);
return VINF_SUCCESS;
}
/* copy to the end of the page. */
rc = PGMGstModifyPage(pVM, GCPtrDst, 1, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D)); AssertRC(rc);
/*
* Page by page.
*/
for (;;)
{
/* map the page */
if (RT_FAILURE(rc))
return rc;
/* last page? */
{
rc = PGMGstModifyPage(pVM, GCPtrDst, 1, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D)); AssertRC(rc);
return VINF_SUCCESS;
}
/* copy the entire page and advance */
rc = PGMGstModifyPage(pVM, GCPtrDst, 1, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D)); AssertRC(rc);
}
/* won't ever get here. */
}
/**
* Read from guest physical memory referenced by GC pointer.
*
* respect access handlers and set accessed bits.
*
* @returns VBox status.
* @param pVM VM handle.
* @param pvDst The destination address.
* @param GCPtrSrc The source address (GC pointer).
* @param cb The number of bytes to read.
* @thread The vCPU EMT.
*/
{
int rc;
/*
* Anything to do?
*/
if (!cb)
return VINF_SUCCESS;
/*
* Optimize reads within a single page.
*/
{
/* Convert virtual to physical address + flags */
/* mark the guest page as accessed. */
{
}
#ifdef VBOX_WITH_NEW_PHYS_CODE
#else
return VINF_SUCCESS;
#endif
}
/*
* Page by page.
*/
for (;;)
{
/* Convert virtual to physical address + flags */
/* mark the guest page as accessed. */
{
}
/* copy */
#ifdef VBOX_WITH_NEW_PHYS_CODE
return rc;
#else
{
return VINF_SUCCESS;
}
#endif
/* next */
}
}
/**
* Write to guest physical memory referenced by GC pointer.
*
* respect access handlers and set dirty and accessed bits.
*
* @returns VBox status.
* @retval VINF_SUCCESS.
* @retval VERR_PGM_PHYS_WR_HIT_HANDLER in R0 and GC, NEVER in R3.
*
* @param pVM VM handle.
* @param GCPtrDst The destination address (GC pointer).
* @param pvSrc The source address.
* @param cb The number of bytes to write.
*/
{
int rc;
/*
* Anything to do?
*/
if (!cb)
return VINF_SUCCESS;
/*
* Optimize writes within a single page.
*/
{
/* Convert virtual to physical address + flags */
/* Mention when we ignore X86_PTE_RW... */
if (!(fFlags & X86_PTE_RW))
/* Mark the guest page as accessed and dirty if necessary. */
{
}
#ifdef VBOX_WITH_NEW_PHYS_CODE
#else
return VINF_SUCCESS;
#endif
}
/*
* Page by page.
*/
for (;;)
{
/* Convert virtual to physical address + flags */
/* Mention when we ignore X86_PTE_RW... */
if (!(fFlags & X86_PTE_RW))
/* Mark the guest page as accessed and dirty if necessary. */
{
}
/* copy */
#ifdef VBOX_WITH_NEW_PHYS_CODE
return rc;
#else
{
return VINF_SUCCESS;
}
#endif
/* next */
}
}
#endif /* !IN_RC */
/**
* Performs a read of guest virtual memory for instruction emulation.
*
* This will check permissions, raise exceptions and update the access bits.
*
* The current implementation will bypass all access handlers. It may later be
* changed to at least respect MMIO.
*
*
* @returns VBox status code suitable to scheduling.
* @retval VINF_SUCCESS if the read was performed successfully.
* @retval VINF_EM_RAW_GUEST_TRAP if an exception was raised but not dispatched yet.
* @retval VINF_TRPM_XCPT_DISPATCHED if an exception was raised and dispatched.
*
* @param pVM The VM handle.
* @param pCtxCore The context core.
* @param pvDst Where to put the bytes we've read.
* @param GCPtrSrc The source address.
* @param cb The number of bytes to read. Not more than a page.
*
* @remark This function will dynamically map physical pages in GC. This may unmap
* mappings done by the caller. Be careful!
*/
VMMDECL(int) PGMPhysInterpretedRead(PVM pVM, PCPUMCTXCORE pCtxCore, void *pvDst, RTGCUINTPTR GCPtrSrc, size_t cb)
{
/** @todo r=bird: This isn't perfect!
* -# It's not checking for reserved bits being 1.
* -# It's not correctly dealing with the access bit.
* -# It's not respecting MMIO memory or any other access handlers.
*/
/*
* 1. Translate virtual to physical. This may fault.
* 2. Map the physical address.
* 3. Do the read operation.
* 4. Set access bits if required.
*/
int rc;
{
/*
* Not crossing pages.
*/
if (RT_SUCCESS(rc))
{
/** @todo we should check reserved bits ... */
void *pvSrc;
switch (rc)
{
case VINF_SUCCESS:
Log(("PGMPhysInterpretedRead: pvDst=%p pvSrc=%p cb=%d\n", pvDst, (uint8_t *)pvSrc + (GCPtrSrc & PAGE_OFFSET_MASK), cb));
break;
break;
default:
return rc;
}
/** @todo access bit emulation isn't 100% correct. */
{
}
return VINF_SUCCESS;
}
}
else
{
/*
* Crosses pages.
*/
if (RT_SUCCESS(rc))
if (RT_SUCCESS(rc))
{
/** @todo we should check reserved bits ... */
void *pvSrc1;
switch (rc)
{
case VINF_SUCCESS:
break;
break;
default:
return rc;
}
void *pvSrc2;
switch (rc)
{
case VINF_SUCCESS:
break;
break;
default:
return rc;
}
{
}
{
}
return VINF_SUCCESS;
}
}
/*
* Raise a #PF.
*/
/* Get the current privilege level. */
switch (rc)
{
case VINF_SUCCESS:
break;
case VERR_PAGE_NOT_PRESENT:
break;
default:
return rc;
}
}
/**
* Performs a read of guest virtual memory for instruction emulation.
*
* This will check permissions, raise exceptions and update the access bits.
*
* The current implementation will bypass all access handlers. It may later be
* changed to at least respect MMIO.
*
*
* @returns VBox status code suitable to scheduling.
* @retval VINF_SUCCESS if the read was performed successfully.
* @retval VINF_EM_RAW_GUEST_TRAP if an exception was raised but not dispatched yet.
* @retval VINF_TRPM_XCPT_DISPATCHED if an exception was raised and dispatched.
*
* @param pVM The VM handle.
* @param pCtxCore The context core.
* @param pvDst Where to put the bytes we've read.
* @param GCPtrSrc The source address.
* @param cb The number of bytes to read. Not more than a page.
* @param fRaiseTrap If set the trap will be raised on as per spec, if clear
* an appropriate error status will be returned (no
* informational at all).
*
*
* @remarks Takes the PGM lock.
* @remarks A page fault on the 2nd page of the access will be raised without
* writing the bits on the first page since we're ASSUMING that the
* caller is emulating an instruction access.
* @remarks This function will dynamically map physical pages in GC. This may
* unmap mappings done by the caller. Be careful!
*/
VMMDECL(int) PGMPhysInterpretedReadNoHandlers(PVM pVM, PCPUMCTXCORE pCtxCore, void *pvDst, RTGCUINTPTR GCPtrSrc, size_t cb, bool fRaiseTrap)
{
/*
* 1. Translate virtual to physical. This may fault.
* 2. Map the physical address.
* 3. Do the read operation.
* 4. Set access bits if required.
*/
int rc;
{
/*
* Not crossing pages.
*/
if (RT_SUCCESS(rc))
{
if (1) /** @todo we should check reserved bits ... */
{
const void *pvSrc;
switch (rc)
{
case VINF_SUCCESS:
Log(("PGMPhysInterpretedReadNoHandlers: pvDst=%p pvSrc=%p (%RGv) cb=%d\n",
break;
break;
default:
return rc;
}
{
/** @todo access bit emulation isn't 100% correct. */
}
return VINF_SUCCESS;
}
}
}
else
{
/*
* Crosses pages.
*/
if (RT_SUCCESS(rc))
{
if (RT_SUCCESS(rc))
{
if (1) /** @todo we should check reserved bits ... */
{
const void *pvSrc;
switch (rc)
{
case VINF_SUCCESS:
Log(("PGMPhysInterpretedReadNoHandlers: pvDst=%p pvSrc=%p (%RGv) cb=%d [2]\n",
break;
break;
default:
return rc;
}
switch (rc)
{
case VINF_SUCCESS:
break;
break;
default:
return rc;
}
{
}
{
}
return VINF_SUCCESS;
}
/* sort out which page */
}
else
}
}
/*
* Raise a #PF if we're allowed to do that.
*/
/* Calc the error bits. */
switch (rc)
{
case VINF_SUCCESS:
break;
case VERR_PAGE_NOT_PRESENT:
break;
default:
return rc;
}
if (fRaiseTrap)
{
Log(("PGMPhysInterpretedReadNoHandlers: GCPtrSrc=%RGv cb=%#x -> Raised #PF(%#x)\n", GCPtrSrc, cb, uErr));
}
Log(("PGMPhysInterpretedReadNoHandlers: GCPtrSrc=%RGv cb=%#x -> #PF(%#x) [!raised]\n", GCPtrSrc, cb, uErr));
return rc;
}
/**
* Performs a write to guest virtual memory for instruction emulation.
*
* This will check permissions, raise exceptions and update the dirty and access
* bits.
*
* @returns VBox status code suitable to scheduling.
* @retval VINF_SUCCESS if the read was performed successfully.
* @retval VINF_EM_RAW_GUEST_TRAP if an exception was raised but not dispatched yet.
* @retval VINF_TRPM_XCPT_DISPATCHED if an exception was raised and dispatched.
*
* @param pVM The VM handle.
* @param pCtxCore The context core.
* @param GCPtrDst The destination address.
* @param pvSrc What to write.
* @param cb The number of bytes to write. Not more than a page.
* @param fRaiseTrap If set the trap will be raised on as per spec, if clear
* an appropriate error status will be returned (no
* informational at all).
*
* @remarks Takes the PGM lock.
* @remarks A page fault on the 2nd page of the access will be raised without
* writing the bits on the first page since we're ASSUMING that the
* caller is emulating an instruction access.
* @remarks This function will dynamically map physical pages in GC. This may
* unmap mappings done by the caller. Be careful!
*/
VMMDECL(int) PGMPhysInterpretedWriteNoHandlers(PVM pVM, PCPUMCTXCORE pCtxCore, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb, bool fRaiseTrap)
{
/*
* 1. Translate virtual to physical. This may fault.
* 2. Map the physical address.
* 3. Do the write operation.
* 4. Set access bits if required.
*/
int rc;
{
/*
* Not crossing pages.
*/
if (RT_SUCCESS(rc))
{
&& CPUMGetGuestCPL(pVM, pCtxCore) <= 2) ) /** @todo it's 2, right? Check cpl check below as well. */
{
void *pvDst;
switch (rc)
{
case VINF_SUCCESS:
Log(("PGMPhysInterpretedWriteNoHandlers: pvDst=%p (%RGv) pvSrc=%p cb=%d\n",
break;
/* bit bucket */
break;
default:
return rc;
}
{
/** @todo dirty & access bit emulation isn't 100% correct. */
rc = PGM_GST_PFN(ModifyPage,pVM)(pVM, GCPtrDst, 1, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D));
}
return VINF_SUCCESS;
}
}
}
else
{
/*
* Crosses pages.
*/
if (RT_SUCCESS(rc))
{
if (RT_SUCCESS(rc))
{
&& (fFlags2 & X86_PTE_RW))
{
void *pvDst;
switch (rc)
{
case VINF_SUCCESS:
Log(("PGMPhysInterpretedWriteNoHandlers: pvDst=%p (%RGv) pvSrc=%p cb=%d\n",
break;
/* bit bucket */
break;
default:
return rc;
}
switch (rc)
{
case VINF_SUCCESS:
break;
/* bit bucket */
break;
default:
return rc;
}
{
rc = PGM_GST_PFN(ModifyPage,pVM)(pVM, GCPtrDst, 1, (X86_PTE_A | X86_PTE_RW), ~(uint64_t)(X86_PTE_A | X86_PTE_RW));
}
{
rc = PGM_GST_PFN(ModifyPage,pVM)(pVM, GCPtrDst + cb1, 1, (X86_PTE_A | X86_PTE_RW), ~(uint64_t)(X86_PTE_A | X86_PTE_RW));
}
return VINF_SUCCESS;
}
}
else
}
}
/*
* Raise a #PF if we're allowed to do that.
*/
/* Calc the error bits. */
switch (rc)
{
case VINF_SUCCESS:
break;
case VERR_ACCESS_DENIED:
break;
case VERR_PAGE_NOT_PRESENT:
break;
default:
return rc;
}
if (fRaiseTrap)
{
Log(("PGMPhysInterpretedWriteNoHandlers: GCPtrDst=%RGv cb=%#x -> Raised #PF(%#x)\n", GCPtrDst, cb, uErr));
}
Log(("PGMPhysInterpretedWriteNoHandlers: GCPtrDst=%RGv cb=%#x -> #PF(%#x) [!raised]\n", GCPtrDst, cb, uErr));
return rc;
}