PGMAllPhys.cpp revision 725799061e222b3c73a299e9a13679489db6245a
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * PGM - Page Manager and Monitor, Physical Memory Addressing.
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * Copyright (C) 2006-2007 Oracle Corporation
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * This file is part of VirtualBox Open Source Edition (OSE), as
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * available from http://www.virtualbox.org. This file is free software;
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * you can redistribute it and/or modify it under the terms of the GNU
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * General Public License (GPL) as published by the Free Software
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * Foundation, in version 2 as it comes in the "COPYING" file of the
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
0d12c7f9423f2745f8e282523d0930f91bff03b3vboxsync/*******************************************************************************
0d12c7f9423f2745f8e282523d0930f91bff03b3vboxsync* Header Files *
0d12c7f9423f2745f8e282523d0930f91bff03b3vboxsync*******************************************************************************/
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync/*******************************************************************************
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync* Defined Constants And Macros *
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync*******************************************************************************/
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync/** Enable the physical TLB. */
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * \#PF Handler callback for physical memory accesses without a RC/R0 handler.
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * This simply pushes everything to the HC handler.
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * @returns VBox status code (appropritate for trap handling and GC return).
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * @param pVM VM Handle.
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * @param uErrorCode CPU Error code.
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * @param pRegFrame Trap register frame.
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * @param pvFault The fault address (cr2).
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * @param GCPhysFault The GC physical address corresponding to pvFault.
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * @param pvUser User argument.
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsyncVMMDECL(int) pgmPhysHandlerRedirectToHC(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPHYS GCPhysFault, void *pvUser)
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync return (uErrorCode & X86_TRAP_PF_RW) ? VINF_IOM_HC_MMIO_WRITE : VINF_IOM_HC_MMIO_READ;
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * \#PF Handler callback for Guest ROM range write access.
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * We simply ignore the writes or fall back to the recompiler if we don't support the instruction.
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * @returns VBox status code (appropritate for trap handling and GC return).
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * @param pVM VM Handle.
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * @param uErrorCode CPU Error code.
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * @param pRegFrame Trap register frame.
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * @param pvFault The fault address (cr2).
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * @param GCPhysFault The GC physical address corresponding to pvFault.
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * @param pvUser User argument. Pointer to the ROM range structure.
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsyncVMMDECL(int) pgmPhysRomWriteHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPHYS GCPhysFault, void *pvUser)
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync uint32_t iPage = (GCPhysFault - pRom->GCPhys) >> PAGE_SHIFT;
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * If it's a simple instruction which doesn't change the cpu state
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * we will simply skip it. Otherwise we'll have to defer it to REM.
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync rc = EMInterpretDisasOne(pVM, pVCpu, pRegFrame, pDis, &cbOp);
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync && pDis->mode == CPUMODE_32BIT /** @todo why does this matter? */
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync && !(pDis->prefix & (PREFIX_REPNE | PREFIX_REP | PREFIX_SEG)))
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync /** @todo Find other instructions we can safely skip, possibly
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * adding this kind of detection to DIS or EM. */
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync STAM_COUNTER_INC(&pVCpu->pgm.s.StatRZGuestROMWriteHandled);
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync rc = PGMHandlerPhysicalPageTempOff(pVM, pRom->GCPhys, GCPhysFault & X86_PTE_PG_MASK);
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync break; /** @todo Must edit the shadow PT and restart the instruction, not use the interpreter! */
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync /* Handle it in ring-3 because it's *way* easier there. */
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync AssertMsgFailedReturn(("enmProt=%d iPage=%d GCPhysFault=%RGp\n",
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync STAM_COUNTER_INC(&pVCpu->pgm.s.StatRZGuestROMWriteUnhandled);
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync#endif /* IN_RING3 */
044af0d1e6474076366759db86f101778c5f20ccvboxsync * Checks if Address Gate 20 is enabled or not.
172ae196da38208e5f1e3485715a89f2d53c6880vboxsync * @returns true if enabled.
ca3da10d05961c339b5180fbd40a54587d6bad35vboxsync * @returns false if disabled.
172ae196da38208e5f1e3485715a89f2d53c6880vboxsync * @param pVCpu VMCPU handle.
ca3da10d05961c339b5180fbd40a54587d6bad35vboxsync LogFlow(("PGMPhysIsA20Enabled %d\n", pVCpu->pgm.s.fA20Enabled));
2bb12e589d2c280ad042e4e70635ae7224c7eceevboxsync * Validates a GC physical address.
2bb12e589d2c280ad042e4e70635ae7224c7eceevboxsync * @returns true if valid.
2bb12e589d2c280ad042e4e70635ae7224c7eceevboxsync * @returns false if invalid.
2bb12e589d2c280ad042e4e70635ae7224c7eceevboxsync * @param pVM The VM handle.
2bb12e589d2c280ad042e4e70635ae7224c7eceevboxsync * @param GCPhys The physical address to validate.
2bb12e589d2c280ad042e4e70635ae7224c7eceevboxsyncVMMDECL(bool) PGMPhysIsGCPhysValid(PVM pVM, RTGCPHYS GCPhys)
044af0d1e6474076366759db86f101778c5f20ccvboxsync PPGMPAGE pPage = pgmPhysGetPage(&pVM->pgm.s, GCPhys);
044af0d1e6474076366759db86f101778c5f20ccvboxsync * Checks if a GC physical address is a normal page,
044af0d1e6474076366759db86f101778c5f20ccvboxsync * i.e. not ROM, MMIO or reserved.
044af0d1e6474076366759db86f101778c5f20ccvboxsync * @returns true if normal.
044af0d1e6474076366759db86f101778c5f20ccvboxsync * @returns false if invalid, ROM, MMIO or reserved page.
044af0d1e6474076366759db86f101778c5f20ccvboxsync * @param pVM The VM handle.
044af0d1e6474076366759db86f101778c5f20ccvboxsync * @param GCPhys The physical address to check.
044af0d1e6474076366759db86f101778c5f20ccvboxsyncVMMDECL(bool) PGMPhysIsGCPhysNormal(PVM pVM, RTGCPHYS GCPhys)
044af0d1e6474076366759db86f101778c5f20ccvboxsync PPGMPAGE pPage = pgmPhysGetPage(&pVM->pgm.s, GCPhys);
044af0d1e6474076366759db86f101778c5f20ccvboxsync * Converts a GC physical address to a HC physical address.
044af0d1e6474076366759db86f101778c5f20ccvboxsync * @returns VINF_SUCCESS on success.
044af0d1e6474076366759db86f101778c5f20ccvboxsync * @returns VERR_PGM_PHYS_PAGE_RESERVED it it's a valid GC physical
044af0d1e6474076366759db86f101778c5f20ccvboxsync * page but has no physical backing.
044af0d1e6474076366759db86f101778c5f20ccvboxsync * @returns VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid
044af0d1e6474076366759db86f101778c5f20ccvboxsync * GC physical address.
044af0d1e6474076366759db86f101778c5f20ccvboxsync * @param pVM The VM handle.
044af0d1e6474076366759db86f101778c5f20ccvboxsync * @param GCPhys The GC physical address to convert.
044af0d1e6474076366759db86f101778c5f20ccvboxsync * @param pHCPhys Where to store the HC physical address on success.
044af0d1e6474076366759db86f101778c5f20ccvboxsyncVMMDECL(int) PGMPhysGCPhys2HCPhys(PVM pVM, RTGCPHYS GCPhys, PRTHCPHYS pHCPhys)
044af0d1e6474076366759db86f101778c5f20ccvboxsync int rc = pgmPhysGetPageEx(&pVM->pgm.s, GCPhys, &pPage);
044af0d1e6474076366759db86f101778c5f20ccvboxsync *pHCPhys = PGM_PAGE_GET_HCPHYS(pPage) | (GCPhys & PAGE_OFFSET_MASK);
172ae196da38208e5f1e3485715a89f2d53c6880vboxsync * Invalidates all page mapping TLBs.
172ae196da38208e5f1e3485715a89f2d53c6880vboxsync * @param pVM The VM handle.
172ae196da38208e5f1e3485715a89f2d53c6880vboxsync STAM_COUNTER_INC(&pVM->pgm.s.StatPageMapTlbFlushes);
172ae196da38208e5f1e3485715a89f2d53c6880vboxsync /* Clear the shared R0/R3 TLB completely. */
ca3da10d05961c339b5180fbd40a54587d6bad35vboxsync for (unsigned i = 0; i < RT_ELEMENTS(pVM->pgm.s.PhysTlbHC.aEntries); i++)
044af0d1e6474076366759db86f101778c5f20ccvboxsync pVM->pgm.s.PhysTlbHC.aEntries[i].GCPhys = NIL_RTGCPHYS;
044af0d1e6474076366759db86f101778c5f20ccvboxsync /* @todo clear the RC TLB whenever we add it. */
044af0d1e6474076366759db86f101778c5f20ccvboxsync * Invalidates a page mapping TLB entry
044af0d1e6474076366759db86f101778c5f20ccvboxsync * @param pVM The VM handle.
044af0d1e6474076366759db86f101778c5f20ccvboxsync * @param GCPhys GCPhys entry to flush
044af0d1e6474076366759db86f101778c5f20ccvboxsyncVMMDECL(void) PGMPhysInvalidatePageMapTLBEntry(PVM pVM, RTGCPHYS GCPhys)
044af0d1e6474076366759db86f101778c5f20ccvboxsync STAM_COUNTER_INC(&pVM->pgm.s.StatPageMapTlbFlushEntry);
044af0d1e6474076366759db86f101778c5f20ccvboxsync /* Clear the shared R0/R3 TLB entry. */
044af0d1e6474076366759db86f101778c5f20ccvboxsync pVM->pgm.s.PhysTlbHC.aEntries[idx].GCPhys = NIL_RTGCPHYS;
044af0d1e6474076366759db86f101778c5f20ccvboxsync PPGMPAGEMAPTLBE pTlbe = &pVM->pgm.s.CTXSUFF(PhysTlb).aEntries[PGM_PAGEMAPTLB_IDX(GCPhys)];
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync /* @todo clear the RC TLB whenever we add it. */
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * Makes sure that there is at least one handy page ready for use.
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * This will also take the appropriate actions when reaching water-marks.
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * @returns VBox status code.
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * @retval VINF_SUCCESS on success.
a1df400bbe9d64aad400442e56eb637019300a5evboxsync * @retval VERR_EM_NO_MEMORY if we're really out of memory.
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * @param pVM The VM handle.
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * @remarks Must be called from within the PGM critical section. It may
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * nip back to ring-3/0 in some cases.
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync AssertMsg(pVM->pgm.s.cHandyPages <= RT_ELEMENTS(pVM->pgm.s.aHandyPages), ("%d\n", pVM->pgm.s.cHandyPages));
044af0d1e6474076366759db86f101778c5f20ccvboxsync * Do we need to do anything special?
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync if (pVM->pgm.s.cHandyPages <= RT_MAX(PGM_HANDY_PAGES_SET_FF, PGM_HANDY_PAGES_R3_ALLOC))
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync if (pVM->pgm.s.cHandyPages <= RT_MAX(PGM_HANDY_PAGES_SET_FF, PGM_HANDY_PAGES_RZ_TO_R3))
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * Allocate pages only if we're out of them, or in ring-3, almost out.
a1df400bbe9d64aad400442e56eb637019300a5evboxsync if (pVM->pgm.s.cHandyPages <= PGM_HANDY_PAGES_R3_ALLOC)
044af0d1e6474076366759db86f101778c5f20ccvboxsync if (pVM->pgm.s.cHandyPages <= PGM_HANDY_PAGES_RZ_ALLOC)
ca3da10d05961c339b5180fbd40a54587d6bad35vboxsync Log(("PGM: cHandyPages=%u out of %u -> allocate more; VM_FF_PGM_NO_MEMORY=%RTbool\n",
ca3da10d05961c339b5180fbd40a54587d6bad35vboxsync pVM->pgm.s.cHandyPages, RT_ELEMENTS(pVM->pgm.s.aHandyPages), VM_FF_ISSET(pVM, VM_FF_PGM_NO_MEMORY) ));
ca3da10d05961c339b5180fbd40a54587d6bad35vboxsync int rc = VMMRZCallRing3NoCpu(pVM, VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES, 0);
044af0d1e6474076366759db86f101778c5f20ccvboxsync AssertMsgReturn(rc == VINF_EM_NO_MEMORY, ("%Rrc\n", rc), VERR_IPE_UNEXPECTED_INFO_STATUS);
044af0d1e6474076366759db86f101778c5f20ccvboxsync Assert(VM_FF_ISSET(pVM, VM_FF_PGM_NEED_HANDY_PAGES));
044af0d1e6474076366759db86f101778c5f20ccvboxsync VMCPU_FF_SET(VMMGetCpu(pVM), VMCPU_FF_TO_R3); /* paranoia */
044af0d1e6474076366759db86f101778c5f20ccvboxsync && pVM->pgm.s.cHandyPages <= RT_ELEMENTS(pVM->pgm.s.aHandyPages),
044af0d1e6474076366759db86f101778c5f20ccvboxsync if (pVM->pgm.s.cHandyPages <= PGM_HANDY_PAGES_SET_FF)
044af0d1e6474076366759db86f101778c5f20ccvboxsync if (pVM->pgm.s.cHandyPages <= PGM_HANDY_PAGES_RZ_TO_R3)
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync Log(("PGM: VM_FF_TO_R3 - cHandyPages=%u out of %u\n", pVM->pgm.s.cHandyPages, RT_ELEMENTS(pVM->pgm.s.aHandyPages)));
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * Replace a zero or shared page with new page that we can write to.
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * @returns The following VBox status codes.
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * @retval VINF_SUCCESS on success, pPage is modified.
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * @retval VINF_PGM_SYNC_CR3 on success and a page pool flush is pending.
df8e6a449f00e1884fbf4a1fc67143614d7d528dvboxsync * @retval VERR_EM_NO_MEMORY if we're totally out of memory.
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * @todo Propagate VERR_EM_NO_MEMORY up the call tree.
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * @param pVM The VM address.
044af0d1e6474076366759db86f101778c5f20ccvboxsync * @param pPage The physical page tracking structure. This will
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * be modified on success.
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * @param GCPhys The address of the page.
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * @remarks Must be called from within the PGM critical section. It may
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * nip back to ring-3/0 in some cases.
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * @remarks This function shouldn't really fail, however if it does
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * it probably means we've screwed up the size of handy pages and/or
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * the low-water mark. Or, that some device I/O is causing a lot of
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * pages to be allocated while while the host is in a low-memory
4a1654dd5b9f0ae4e149d909843a3ab07b8bec33vboxsync * condition. This latter should be handled elsewhere and in a more
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * controlled manner, it's on the @bugref{3170} todo list...
172ae196da38208e5f1e3485715a89f2d53c6880vboxsyncint pgmPhysAllocPage(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhys)
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync LogFlow(("pgmPhysAllocPage: %R[pgmpage] %RGp\n", pPage, GCPhys));
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync AssertMsg(PGM_PAGE_IS_ZERO(pPage) || PGM_PAGE_IS_SHARED(pPage), ("%R[pgmpage] %RGp\n", pPage, GCPhys));
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync /* fall back to 4kb pages. */
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync * Flush any shadow page table mappings of the page.
172ae196da38208e5f1e3485715a89f2d53c6880vboxsync * When VBOX_WITH_NEW_LAZY_PAGE_ALLOC isn't defined, there shouldn't be any.
172ae196da38208e5f1e3485715a89f2d53c6880vboxsync bool fFlushTLBs = false;
3a4a6501d0ccd629d9951b644d380c7bb2d46086vboxsync int rc = pgmPoolTrackFlushGCPhys(pVM, GCPhys, pPage, &fFlushTLBs);
72a6fe3989272cb2d409b50caca25e1edbca9398vboxsync AssertMsgReturn(rc == VINF_SUCCESS || rc == VINF_PGM_SYNC_CR3, ("%Rrc\n", rc), RT_FAILURE(rc) ? rc : VERR_IPE_UNEXPECTED_STATUS);
c0e27f622f9bd6d9e77d2d959aab71d69dabf0d3vboxsync * Ensure that we've got a page handy, take it and use it.
AssertMsg(PGM_PAGE_IS_ZERO(pPage) || PGM_PAGE_IS_SHARED(pPage), ("%R[pgmpage] %RGp\n", pPage, GCPhys));
Log2(("PGM: Replaced zero page %RGp with %#x / %RHp\n", GCPhys, pVM->pgm.s.aHandyPages[iHandyPage].idPage, HCPhys));
if (pvSharedPage)
void *pvNewPage;
if ( fFlushTLBs
return rc;
#ifdef PGM_WITH_LARGE_PAGES
unsigned iPage;
|| PGM_PAGE_GET_STATE(pPage) != PGM_PAGE_STATE_ZERO) /* allocated, monitored or shared means we can't use a large page here */
LogFlow(("Found page %RGp with wrong attributes (type=%d; state=%d); cancel check. rc=%d\n", GCPhys, PGM_PAGE_GET_TYPE(pPage), PGM_PAGE_GET_STATE(pPage), rc));
# ifdef IN_RING3
return VINF_SUCCESS;
/* If we fail once, it most likely means the host's memory is too fragmented; don't bother trying again. */
return rc;
LogFlow(("pgmPhysIsValidLargePage: checks failed for base page %x %x %x\n", PGM_PAGE_GET_STATE(pLargePage), PGM_PAGE_GET_TYPE(pLargePage), PGM_PAGE_GET_HNDL_PHYS_STATE(pLargePage)));
LogFlow(("pgmPhysIsValidLargePage: checks failed for page %d; %x %x %x\n", i, PGM_PAGE_GET_STATE(pPage), PGM_PAGE_GET_TYPE(pPage), PGM_PAGE_GET_HNDL_PHYS_STATE(pPage)));
return VINF_SUCCESS;
case PGM_PAGE_STATE_ALLOCATED:
return VINF_SUCCESS;
case PGM_PAGE_STATE_ZERO:
return VERR_PGM_PHYS_PAGE_RESERVED;
case PGM_PAGE_STATE_SHARED:
case PGM_PAGE_STATE_BALLOONED:
return VERR_PGM_PHYS_PAGE_BALLOONED;
#ifdef IN_RC
if (!pMap)
# ifdef IN_RING0
return rc;
return VINF_SUCCESS;
static int pgmPhysPageMapCommon(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhys, PPPGMPAGEMAP ppMap, void **ppv)
return VINF_SUCCESS;
AssertMsgReturn(PGM_PAGE_GET_PAGEID(pPage) == NIL_GMM_PAGEID, ("pPage=%R[pgmpage]\n", pPage), VERR_INTERNAL_ERROR_2);
AssertMsgReturn(pRam || !pRam->pvR3, ("pRam=%p pPage=%R[pgmpage]\n", pRam, pPage), VERR_INTERNAL_ERROR_2);
*ppv = (void *)((uintptr_t)pRam->pvR3 + (uintptr_t)((GCPhys & ~(RTGCPHYS)PAGE_OFFSET_MASK) - pRam->GCPhys));
return VINF_SUCCESS;
if (!pMap)
#ifdef IN_RING0
return rc;
return VINF_SUCCESS;
return rc;
if (!pRam)
void *pv;
return rc;
#ifdef PGM_WITH_PHYS_TLB
return VINF_SUCCESS;
void *pv;
return rc;
#ifdef PGM_WITH_PHYS_TLB
return VINF_SUCCESS;
int rc;
return rc;
return rc;
return VINF_SUCCESS;
*ppv = pgmDynMapHCPageOff(&pVM->pgm.s, PGM_PAGE_GET_HCPHYS(pPage) | (GCPhys & PAGE_OFFSET_MASK)); /** @todo add a read only flag? */
return rc;
return VINF_SUCCESS;
*ppv = pgmDynMapHCPageOff(&pVM->pgm.s, PGM_PAGE_GET_HCPHYS(pPage) | (GCPhys & PAGE_OFFSET_MASK)); /** @todo add a read only flag? */
if (pMap)
if (cLocks == 0)
if (pMap)
return rc;
VMMDECL(int) PGMPhysGCPhys2CCPtrReadOnly(PVM pVM, RTGCPHYS GCPhys, void const **ppv, PPGMPAGEMAPLOCK pLock)
*ppv = pgmDynMapHCPageOff(&pVM->pgm.s, PGM_PAGE_GET_HCPHYS(pPage) | (GCPhys & PAGE_OFFSET_MASK)); /** @todo add a read only flag? */
if (pMap)
if (cLocks == 0)
AssertMsgFailed(("%RGp / %R[pgmpage] is entering permanent readonly locked state!\n", GCPhys, pPage));
if (pMap)
return rc;
return rc;
VMMDECL(int) PGMPhysGCPtr2CCPtrReadOnly(PVMCPU pVCpu, RTGCPTR GCPtr, void const **ppv, PPGMPAGEMAPLOCK pLock)
return rc;
if (fWriteLock)
if (pMap)
#ifndef DEBUG_sandervl
Log(("PGMPhysGCPhys2R3Ptr(,%RGp,%#x,): dont use this API!\n", GCPhys, cbRange)); /** @todo eliminate this API! */
return rc;
#ifdef VBOX_STRICT
return R3Ptr;
return NIL_RTR3PTR;
return rc;
return rc;
rc = PGMPhysGCPhys2R3Ptr(pVM, GCPhys | ((RTGCUINTPTR)GCPtr & PAGE_OFFSET_MASK), 1 /* we always stay within one page */, pR3Ptr);
return rc;
#ifdef IN_RING3
AssertLogRelMsgFailed(("pgmPhysGCPhys2CCPtrInternalReadOnly failed on %RGp / %R[pgmpage] -> %Rrc\n",
return VINF_SUCCESS;
#ifdef IN_RING3
Log5(("pgmPhysReadHandler: GCPhys=%RGp cb=%#x pPage=%R[pgmpage] phys %s\n", GCPhys, cb, pPage, R3STRING(pPhys->pszDesc) ));
# ifdef VBOX_WITH_STATISTICS
if (pPhys)
AssertLogRelMsg(rc == VINF_SUCCESS || rc == VINF_PGM_HANDLER_DO_DEFAULT, ("rc=%Rrc GCPhys=%RGp\n", rc, GCPhys));
return VERR_PGM_PHYS_WR_HIT_HANDLER;
unsigned iPage;
Assert(GCPhys >= pVirt->aPhysToVirt[iPage].Core.Key && GCPhys <= pVirt->aPhysToVirt[iPage].Core.KeyLast);
#ifdef IN_RING3
if (!pPhys)
Log5(("pgmPhysReadHandler: GCPhys=%RGp cb=%#x pPage=%R[pgmpage] virt %s\n", GCPhys, cb, pPage, R3STRING(pVirt->pszDesc) ));
Log(("pgmPhysReadHandler: GCPhys=%RGp cb=%#x pPage=%R[pgmpage] phys/virt %s/%s\n", GCPhys, cb, pPage, R3STRING(pVirt->pszDesc), R3STRING(pPhys->pszDesc) ));
rc2 = pVirt->CTX_SUFF(pfnHandler)(pVM, GCPtr, (void *)pvSrc, pvBuf, cb, PGMACCESSTYPE_READ, /*pVirt->CTX_SUFF(pvUser)*/ NULL);
AssertLogRelMsg(rc2 == VINF_SUCCESS || rc2 == VINF_PGM_HANDLER_DO_DEFAULT, ("rc=%Rrc GCPhys=%RGp pPage=%R[pgmpage] %s\n", rc2, GCPhys, pPage, pVirt->pszDesc));
Log5(("pgmPhysReadHandler: GCPhys=%RGp cb=%#x pPage=%R[pgmpage] virt %s [no handler]\n", GCPhys, cb, pPage, R3STRING(pVirt->pszDesc) ));
return VERR_PGM_PHYS_WR_HIT_HANDLER;
return rc;
return rc;
const void *pvSrc;
AssertLogRelMsgFailed(("pgmPhysGCPhys2CCPtrInternalReadOnly failed on %RGp / %R[pgmpage] -> %Rrc\n",
return VINF_SUCCESS;
if (!pRam)
return VINF_SUCCESS;
static int pgmPhysWriteHandler(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhys, void const *pvBuf, size_t cbWrite)
int rc;
PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysRangeGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
if (pCur)
#ifndef IN_RING3
return VERR_PGM_PHYS_WR_HIT_HANDLER;
Log5(("pgmPhysWriteHandler: GCPhys=%RGp cbRange=%#x pPage=%R[pgmpage] phys %s\n", GCPhys, cbRange, pPage, R3STRING(pCur->pszDesc) ));
# ifdef VBOX_WITH_STATISTICS
if (pCur)
AssertLogRelMsg(rc == VINF_SUCCESS || rc == VINF_PGM_HANDLER_DO_DEFAULT, ("rc=%Rrc GCPhys=%RGp pPage=%R[pgmpage] %s\n", rc, GCPhys, pPage, (pCur) ? pCur->pszDesc : ""));
return VINF_SUCCESS;
unsigned iPage;
#ifndef IN_RING3
return VERR_PGM_PHYS_WR_HIT_HANDLER;
Log5(("pgmPhysWriteHandler: GCPhys=%RGp cbRange=%#x pPage=%R[pgmpage] virt %s\n", GCPhys, cbRange, pPage, R3STRING(pCur->pszDesc) ));
rc = pCur->CTX_SUFF(pfnHandler)(pVM, GCPtr, pvDst, (void *)pvBuf, cbRange, PGMACCESSTYPE_WRITE, /*pCur->CTX_SUFF(pvUser)*/ NULL);
AssertLogRelMsg(rc == VINF_SUCCESS, ("rc=%Rrc GCPhys=%RGp pPage=%R[pgmpage] %s\n", rc, GCPhys, pPage, pCur->pszDesc));
return VINF_SUCCESS;
if (!pvDst)
unsigned iVirtPage = 0;
offVirt = 0;
offVirtLast = (pVirt->aPhysToVirt[iVirtPage].Core.KeyLast & PAGE_OFFSET_MASK) - (GCPhys & PAGE_OFFSET_MASK);
pVirtPhys = (PPGMPHYS2VIRTHANDLER)RTAvlroGCPhysGetBestFit(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysToVirtHandlers,
if ( pVirtPhys
fMoreVirt = false;
if (pPhys)
offPhys = 0;
if ( pPhys
fMorePhys = false;
Log5(("pgmPhysWriteHandler: GCPhys=%RGp cbRange=%#x pPage=%R[pgmpage] miss\n", GCPhys, cbRange, pPage));
#ifdef IN_RING3
Log5(("pgmPhysWriteHandler: GCPhys=%RGp cbRange=%#x pPage=%R[pgmpage] phys %s\n", GCPhys, cbRange, pPage, R3STRING(pPhys->pszDesc) ));
# ifdef VBOX_WITH_STATISTICS
if (pPhys)
AssertLogRelMsg(rc == VINF_SUCCESS || rc == VINF_PGM_HANDLER_DO_DEFAULT, ("rc=%Rrc GCPhys=%RGp pPage=%R[pgmpage] %s\n", rc, GCPhys, pPage, (pPhys) ? pPhys->pszDesc : ""));
return VERR_PGM_PHYS_WR_HIT_HANDLER;
#ifdef IN_RING3
Log5(("pgmPhysWriteHandler: GCPhys=%RGp cbRange=%#x pPage=%R[pgmpage] phys %s\n", GCPhys, cbRange, pPage, R3STRING(pVirt->pszDesc) ));
rc = pVirt->CTX_SUFF(pfnHandler)(pVM, GCPtr, pvDst, (void *)pvBuf, cbRange, PGMACCESSTYPE_WRITE, /*pCur->CTX_SUFF(pvUser)*/ NULL);
AssertLogRelMsg(rc == VINF_SUCCESS || rc == VINF_PGM_HANDLER_DO_DEFAULT, ("rc=%Rrc GCPhys=%RGp pPage=%R[pgmpage] %s\n", rc, GCPhys, pPage, pVirt->pszDesc));
return VERR_PGM_PHYS_WR_HIT_HANDLER;
#ifdef IN_RING3
Log(("pgmPhysWriteHandler: overlapping phys and virt handlers at %RGp %R[pgmpage]; cbRange=%#x\n", GCPhys, pPage, cbRange));
Log5(("pgmPhysWriteHandler: GCPhys=%RGp cbRange=%#x pPage=%R[pgmpage] phys/virt %s/%s\n", GCPhys, cbRange, pPage, R3STRING(pPhys->pszDesc), R3STRING(pVirt->pszDesc) ));
# ifdef VBOX_WITH_STATISTICS
if (pPhys)
AssertLogRelMsg(rc == VINF_SUCCESS || rc == VINF_PGM_HANDLER_DO_DEFAULT, ("rc=%Rrc GCPhys=%RGp pPage=%R[pgmpage] %s\n", rc, GCPhys, pPage, (pPhys) ? pPhys->pszDesc : ""));
int rc2 = pVirt->CTX_SUFF(pfnHandler)(pVM, GCPtr, pvDst, (void *)pvBuf, cbRange, PGMACCESSTYPE_WRITE, /*pCur->CTX_SUFF(pvUser)*/ NULL);
AssertLogRelMsg(rc2 == VINF_SUCCESS || rc2 == VINF_PGM_HANDLER_DO_DEFAULT, ("rc=%Rrc GCPhys=%RGp pPage=%R[pgmpage] %s\n", rc, GCPhys, pPage, pVirt->pszDesc));
return VERR_PGM_PHYS_WR_HIT_HANDLER;
return VINF_SUCCESS;
return rc;
void *pvDst;
return VINF_SUCCESS;
if (!pRam)
return VINF_SUCCESS;
if (!cb)
return VINF_SUCCESS;
void const *pvSrc;
return rc;
return VINF_SUCCESS;
return rc;
return VINF_SUCCESS;
if (!cb)
return VINF_SUCCESS;
void *pvDst;
return rc;
return VINF_SUCCESS;
return rc;
return VINF_SUCCESS;
if (!cb)
return VINF_SUCCESS;
/* Take the PGM lock here, because many called functions take the lock for a very short period. That's counter-productive
void const *pvSrc;
return rc;
return VINF_SUCCESS;
return rc;
return VINF_SUCCESS;
if (!cb)
return VINF_SUCCESS;
void *pvDst;
return rc;
return VINF_SUCCESS;
return rc;
return VINF_SUCCESS;
VMMDECL(int) PGMPhysSimpleDirtyWriteGCPtr(PVMCPU pVCpu, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb)
if (!cb)
return VINF_SUCCESS;
void *pvDst;
return rc;
rc = PGMGstModifyPage(pVCpu, GCPtrDst, 1, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D)); AssertRC(rc);
return VINF_SUCCESS;
rc = PGMGstModifyPage(pVCpu, GCPtrDst, 1, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D)); AssertRC(rc);
return rc;
rc = PGMGstModifyPage(pVCpu, GCPtrDst, 1, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D)); AssertRC(rc);
return VINF_SUCCESS;
rc = PGMGstModifyPage(pVCpu, GCPtrDst, 1, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D)); AssertRC(rc);
int rc;
if (!cb)
return VINF_SUCCESS;
return rc;
int rc;
if (!cb)
return VINF_SUCCESS;
rc = PGMGstModifyPage(pVCpu, GCPtrDst, 1, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D));
rc = PGMGstModifyPage(pVCpu, GCPtrDst, 1, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D));
return rc;
VMMDECL(int) PGMPhysInterpretedRead(PVMCPU pVCpu, PCPUMCTXCORE pCtxCore, void *pvDst, RTGCUINTPTR GCPtrSrc, size_t cb)
int rc;
void *pvSrc;
switch (rc)
case VINF_SUCCESS:
Log(("PGMPhysInterpretedRead: pvDst=%p pvSrc=%p cb=%d\n", pvDst, (uint8_t *)pvSrc + (GCPtrSrc & PAGE_OFFSET_MASK), cb));
return rc;
return VINF_SUCCESS;
void *pvSrc1;
switch (rc)
case VINF_SUCCESS:
return rc;
void *pvSrc2;
switch (rc)
case VINF_SUCCESS:
return rc;
return VINF_SUCCESS;
switch (rc)
case VINF_SUCCESS:
case VERR_PAGE_NOT_PRESENT:
return rc;
VMMDECL(int) PGMPhysInterpretedReadNoHandlers(PVMCPU pVCpu, PCPUMCTXCORE pCtxCore, void *pvDst, RTGCUINTPTR GCPtrSrc, size_t cb, bool fRaiseTrap)
int rc;
const void *pvSrc;
switch (rc)
case VINF_SUCCESS:
return rc;
return VINF_SUCCESS;
const void *pvSrc;
switch (rc)
case VINF_SUCCESS:
return rc;
switch (rc)
case VINF_SUCCESS:
return rc;
return VINF_SUCCESS;
switch (rc)
case VINF_SUCCESS:
case VERR_PAGE_NOT_PRESENT:
return rc;
if (fRaiseTrap)
Log(("PGMPhysInterpretedReadNoHandlers: GCPtrSrc=%RGv cb=%#x -> Raised #PF(%#x)\n", GCPtrSrc, cb, uErr));
Log(("PGMPhysInterpretedReadNoHandlers: GCPtrSrc=%RGv cb=%#x -> #PF(%#x) [!raised]\n", GCPtrSrc, cb, uErr));
return rc;
VMMDECL(int) PGMPhysInterpretedWriteNoHandlers(PVMCPU pVCpu, PCPUMCTXCORE pCtxCore, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb, bool fRaiseTrap)
int rc;
&& CPUMGetGuestCPL(pVCpu, pCtxCore) <= 2) ) /** @todo it's 2, right? Check cpl check below as well. */
void *pvDst;
switch (rc)
case VINF_SUCCESS:
return rc;
rc = PGMGstModifyPage(pVCpu, GCPtrDst, 1, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D));
return VINF_SUCCESS;
void *pvDst;
switch (rc)
case VINF_SUCCESS:
return rc;
switch (rc)
case VINF_SUCCESS:
return rc;
rc = PGMGstModifyPage(pVCpu, GCPtrDst, 1, (X86_PTE_A | X86_PTE_RW), ~(uint64_t)(X86_PTE_A | X86_PTE_RW));
rc = PGMGstModifyPage(pVCpu, GCPtrDst + cb1, 1, (X86_PTE_A | X86_PTE_RW), ~(uint64_t)(X86_PTE_A | X86_PTE_RW));
return VINF_SUCCESS;
switch (rc)
case VINF_SUCCESS:
case VERR_ACCESS_DENIED:
case VERR_PAGE_NOT_PRESENT:
return rc;
if (fRaiseTrap)
Log(("PGMPhysInterpretedWriteNoHandlers: GCPtrDst=%RGv cb=%#x -> Raised #PF(%#x)\n", GCPtrDst, cb, uErr));
Log(("PGMPhysInterpretedWriteNoHandlers: GCPtrDst=%RGv cb=%#x -> #PF(%#x) [!raised]\n", GCPtrDst, cb, uErr));
return rc;