PGMAllMap.cpp revision d1a7777830e66f060c61e169b7ec4353bdfbf3e9
7a61a5714b9a39ac3bd59e52b0843ef498350a35vboxsync * PGM - Page Manager and Monitor - All context code.
e64031e20c39650a7bc902a3e1aba613b9415deevboxsync * Copyright (C) 2006-2007 Sun Microsystems, Inc.
7a61a5714b9a39ac3bd59e52b0843ef498350a35vboxsync * This file is part of VirtualBox Open Source Edition (OSE), as
7a61a5714b9a39ac3bd59e52b0843ef498350a35vboxsync * available from http://www.virtualbox.org. This file is free software;
7a61a5714b9a39ac3bd59e52b0843ef498350a35vboxsync * you can redistribute it and/or modify it under the terms of the GNU
7a61a5714b9a39ac3bd59e52b0843ef498350a35vboxsync * General Public License (GPL) as published by the Free Software
7a61a5714b9a39ac3bd59e52b0843ef498350a35vboxsync * Foundation, in version 2 as it comes in the "COPYING" file of the
7a61a5714b9a39ac3bd59e52b0843ef498350a35vboxsync * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
7a61a5714b9a39ac3bd59e52b0843ef498350a35vboxsync * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
7a61a5714b9a39ac3bd59e52b0843ef498350a35vboxsync * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
7a61a5714b9a39ac3bd59e52b0843ef498350a35vboxsync * Clara, CA 95054 USA or visit http://www.sun.com if you need
7a61a5714b9a39ac3bd59e52b0843ef498350a35vboxsync * additional information or have any questions.
7a61a5714b9a39ac3bd59e52b0843ef498350a35vboxsync/*******************************************************************************
682a27d94b9116c719038882487b99053985f91avboxsync* Header Files *
9b5bf00cddef78a2e5ab748a141ea830ce47abe2vboxsync*******************************************************************************/
9b5bf00cddef78a2e5ab748a141ea830ce47abe2vboxsync * Maps a range of physical pages at a given virtual address
bc6df168670cfc0df5ae3be50ccbf098ba2cebc7vboxsync * in the guest context.
bc6df168670cfc0df5ae3be50ccbf098ba2cebc7vboxsync * The GC virtual address range must be within an existing mapping.
bc6df168670cfc0df5ae3be50ccbf098ba2cebc7vboxsync * @returns VBox status code.
bc6df168670cfc0df5ae3be50ccbf098ba2cebc7vboxsync * @param pVM The virtual machine.
bc6df168670cfc0df5ae3be50ccbf098ba2cebc7vboxsync * @param GCPtr Where to map the page(s). Must be page aligned.
bc6df168670cfc0df5ae3be50ccbf098ba2cebc7vboxsync * @param HCPhys Start of the range of physical pages. Must be page aligned.
bc6df168670cfc0df5ae3be50ccbf098ba2cebc7vboxsync * @param cbPages Number of bytes to map. Must be page aligned.
bc6df168670cfc0df5ae3be50ccbf098ba2cebc7vboxsync * @param fFlags Page flags (X86_PTE_*).
bc6df168670cfc0df5ae3be50ccbf098ba2cebc7vboxsyncVMMDECL(int) PGMMap(PVM pVM, RTGCUINTPTR GCPtr, RTHCPHYS HCPhys, uint32_t cbPages, unsigned fFlags)
9b5bf00cddef78a2e5ab748a141ea830ce47abe2vboxsync * Validate input.
9b5bf00cddef78a2e5ab748a141ea830ce47abe2vboxsync AssertMsg(RT_ALIGN_T(GCPtr, PAGE_SIZE, RTGCUINTPTR) == GCPtr, ("Invalid alignment GCPtr=%#x\n", GCPtr));
bc6df168670cfc0df5ae3be50ccbf098ba2cebc7vboxsync AssertMsg(cbPages > 0 && RT_ALIGN_32(cbPages, PAGE_SIZE) == cbPages, ("Invalid cbPages=%#x\n", cbPages));
bc6df168670cfc0df5ae3be50ccbf098ba2cebc7vboxsync AssertMsg(!(fFlags & X86_PDE_PG_MASK), ("Invalid flags %#x\n", fFlags));
bc6df168670cfc0df5ae3be50ccbf098ba2cebc7vboxsync /* hypervisor defaults */
bc6df168670cfc0df5ae3be50ccbf098ba2cebc7vboxsync * Find the mapping.
bc6df168670cfc0df5ae3be50ccbf098ba2cebc7vboxsync * Setup PTE.
bc6df168670cfc0df5ae3be50ccbf098ba2cebc7vboxsync * Update the page tables.
bc6df168670cfc0df5ae3be50ccbf098ba2cebc7vboxsync const unsigned iPageNo = (off >> PAGE_SHIFT) & X86_PT_MASK;
bc6df168670cfc0df5ae3be50ccbf098ba2cebc7vboxsync /* 32-bit */
bc6df168670cfc0df5ae3be50ccbf098ba2cebc7vboxsync pCur->aPTs[iPT].CTX_SUFF(pPT)->a[iPageNo].u = (uint32_t)Pte.u; /* ASSUMES HCPhys < 4GB and/or that we're never gonna do 32-bit on a PAE host! */
bc6df168670cfc0df5ae3be50ccbf098ba2cebc7vboxsync pCur->aPTs[iPT].CTX_SUFF(paPaePTs)[iPageNo / 512].a[iPageNo % 512].u = Pte.u;
bc6df168670cfc0df5ae3be50ccbf098ba2cebc7vboxsync AssertMsgFailed(("GCPtr=%#x was not found in any mapping ranges!\n", GCPtr));
bc6df168670cfc0df5ae3be50ccbf098ba2cebc7vboxsync * Sets (replaces) the page flags for a range of pages in a mapping.
bc6df168670cfc0df5ae3be50ccbf098ba2cebc7vboxsync * @returns VBox status.
bc6df168670cfc0df5ae3be50ccbf098ba2cebc7vboxsync * @param pVM VM handle.
bc6df168670cfc0df5ae3be50ccbf098ba2cebc7vboxsync * @param GCPtr Virtual address of the first page in the range.
bc6df168670cfc0df5ae3be50ccbf098ba2cebc7vboxsync * @param cb Size (in bytes) of the range to apply the modification to.
bc6df168670cfc0df5ae3be50ccbf098ba2cebc7vboxsync * @param fFlags Page flags X86_PTE_*, excluding the page mask of course.
bc6df168670cfc0df5ae3be50ccbf098ba2cebc7vboxsyncVMMDECL(int) PGMMapSetPage(PVM pVM, RTGCPTR GCPtr, uint64_t cb, uint64_t fFlags)
bc6df168670cfc0df5ae3be50ccbf098ba2cebc7vboxsync return PGMMapModifyPage(pVM, GCPtr, cb, fFlags, 0);
bc6df168670cfc0df5ae3be50ccbf098ba2cebc7vboxsync * Modify page flags for a range of pages in a mapping.
bc6df168670cfc0df5ae3be50ccbf098ba2cebc7vboxsync * The existing flags are ANDed with the fMask and ORed with the fFlags.
4893c4e3513fece2ef56f559aa2370c25f12a745vboxsync * @returns VBox status code.
4893c4e3513fece2ef56f559aa2370c25f12a745vboxsync * @param pVM VM handle.
bc6df168670cfc0df5ae3be50ccbf098ba2cebc7vboxsync * @param GCPtr Virtual address of the first page in the range.
bc6df168670cfc0df5ae3be50ccbf098ba2cebc7vboxsync * @param cb Size (in bytes) of the range to apply the modification to.
bc6df168670cfc0df5ae3be50ccbf098ba2cebc7vboxsync * @param fFlags The OR mask - page flags X86_PTE_*, excluding the page mask of course.
bc6df168670cfc0df5ae3be50ccbf098ba2cebc7vboxsync * @param fMask The AND mask - page flags X86_PTE_*, excluding the page mask of course.
bc6df168670cfc0df5ae3be50ccbf098ba2cebc7vboxsyncVMMDECL(int) PGMMapModifyPage(PVM pVM, RTGCPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask)
019f39cc548f50d58cfdf91965f58eab1ded841bvboxsync * Validate input.
019f39cc548f50d58cfdf91965f58eab1ded841bvboxsync AssertMsg(!(fFlags & X86_PTE_PAE_PG_MASK), ("fFlags=%#x\n", fFlags));
019f39cc548f50d58cfdf91965f58eab1ded841bvboxsync * Align the input.
019f39cc548f50d58cfdf91965f58eab1ded841bvboxsync GCPtr = (RTGCPTR)((RTGCUINTPTR)GCPtr & PAGE_BASE_GC_MASK);
eb360054919960bec0e41ea49932c591096c2f5fvboxsync * Find the mapping.
23776fb44216ff7aa3b47916ef4975748de89de1vboxsync RTGCUINTPTR off = (RTGCUINTPTR)GCPtr - (RTGCUINTPTR)pCur->GCPtr;
d3203e1a8d5b114c66238ae33506f6e1a3d79b9evboxsync ("Invalid page range %#x LB%#x. mapping '%s' %#x to %#x\n",
23776fb44216ff7aa3b47916ef4975748de89de1vboxsync GCPtr, cb, pCur->pszDesc, pCur->GCPtr, pCur->GCPtrLast),
23776fb44216ff7aa3b47916ef4975748de89de1vboxsync * Perform the requested operation.
23776fb44216ff7aa3b47916ef4975748de89de1vboxsync while (cb > 0)
019f39cc548f50d58cfdf91965f58eab1ded841bvboxsync while (cb > 0 && iPTE < RT_ELEMENTS(pCur->aPTs[iPT].CTX_SUFF(pPT)->a))
019f39cc548f50d58cfdf91965f58eab1ded841bvboxsync /* 32-Bit */
7a61a5714b9a39ac3bd59e52b0843ef498350a35vboxsync pCur->aPTs[iPT].CTX_SUFF(pPT)->a[iPTE].u &= fMask | X86_PTE_PG_MASK;
7a61a5714b9a39ac3bd59e52b0843ef498350a35vboxsync pCur->aPTs[iPT].CTX_SUFF(pPT)->a[iPTE].u |= fFlags & ~X86_PTE_PG_MASK;
7a61a5714b9a39ac3bd59e52b0843ef498350a35vboxsync pCur->aPTs[iPT].CTX_SUFF(paPaePTs)[iPTE / 512].a[iPTE % 512].u &= fMask | X86_PTE_PAE_PG_MASK;
7a61a5714b9a39ac3bd59e52b0843ef498350a35vboxsync pCur->aPTs[iPT].CTX_SUFF(paPaePTs)[iPTE / 512].a[iPTE % 512].u |= fFlags & ~X86_PTE_PAE_PG_MASK;
9b5bf00cddef78a2e5ab748a141ea830ce47abe2vboxsync /* invalidate tls */
9b5bf00cddef78a2e5ab748a141ea830ce47abe2vboxsync AssertMsgFailed(("Page range %#x LB%#x not found\n", GCPtr, cb));
7a61a5714b9a39ac3bd59e52b0843ef498350a35vboxsync * Sets all PDEs involved with the mapping in the shadow page table.
9b5bf00cddef78a2e5ab748a141ea830ce47abe2vboxsync * @param pVM The VM handle.
9b5bf00cddef78a2e5ab748a141ea830ce47abe2vboxsync * @param pMap Pointer to the mapping in question.
9b5bf00cddef78a2e5ab748a141ea830ce47abe2vboxsync * @param iNewPDE The index of the 32-bit PDE corresponding to the base of the mapping.
9b5bf00cddef78a2e5ab748a141ea830ce47abe2vboxsyncvoid pgmMapSetShadowPDEs(PVM pVM, PPGMMAPPING pMap, unsigned iNewPDE)
9b5bf00cddef78a2e5ab748a141ea830ce47abe2vboxsync Log(("pgmMapSetShadowPDEs new pde %x (mappings enabled %d)\n", iNewPDE, pgmMapAreMappingsEnabled(&pVM->pgm.s)));
9b5bf00cddef78a2e5ab748a141ea830ce47abe2vboxsync return; /* too early */
9b5bf00cddef78a2e5ab748a141ea830ce47abe2vboxsync * Init the page tables and insert them into the page directories.
7a61a5714b9a39ac3bd59e52b0843ef498350a35vboxsync while (i-- > 0)
9b5bf00cddef78a2e5ab748a141ea830ce47abe2vboxsync PX86PD pShw32BitPd = pgmShwGet32BitPDPtr(&pVM->pgm.s);
9b5bf00cddef78a2e5ab748a141ea830ce47abe2vboxsync Assert(!(pShw32BitPd->a[iNewPDE].u & PGM_PDFLAGS_MAPPING));
9b5bf00cddef78a2e5ab748a141ea830ce47abe2vboxsync pgmPoolFree(pVM, pShw32BitPd->a[iNewPDE].u & X86_PDE_PG_MASK, pVM->pgm.s.CTX_SUFF(pShwPageCR3)->idx, iNewPDE);
9b5bf00cddef78a2e5ab748a141ea830ce47abe2vboxsync /* Default mapping page directory flags are read/write and supervisor; individual page attributes determine the final flags */
9b5bf00cddef78a2e5ab748a141ea830ce47abe2vboxsync Pde.u = PGM_PDFLAGS_MAPPING | X86_PDE_P | X86_PDE_A | X86_PDE_RW | X86_PDE_US | (uint32_t)pMap->aPTs[i].HCPhysPT;
9b5bf00cddef78a2e5ab748a141ea830ce47abe2vboxsync pShwPaePd = pgmShwGetPaePDPtr(&pVM->pgm.s, (iPdPt << X86_PDPT_SHIFT));
9b5bf00cddef78a2e5ab748a141ea830ce47abe2vboxsync /* Fake PDPT entry; access control handled on the page table level, so allow everything. */
9b5bf00cddef78a2e5ab748a141ea830ce47abe2vboxsync GstPdpe.u = X86_PDPE_P; /* rw/us are reserved for PAE pdpte's; accessed bit causes invalid VT-x guest state errors */
9b5bf00cddef78a2e5ab748a141ea830ce47abe2vboxsync pGstPdpe = pgmGstGetPaePDPEPtr(&pVM->pgm.s, (iPdPt << X86_PDPT_SHIFT));
7a61a5714b9a39ac3bd59e52b0843ef498350a35vboxsync GstPdpe.u = X86_PDPE_P; /* rw/us are reserved for PAE pdpte's; accessed bit causes invalid VT-x guest state errors */
9b5bf00cddef78a2e5ab748a141ea830ce47abe2vboxsync int rc = pgmShwSyncPaePDPtr(pVM, (iPdPt << X86_PDPT_SHIFT), &GstPdpe, &pShwPaePd);
9b5bf00cddef78a2e5ab748a141ea830ce47abe2vboxsync rc = pgmShwSyncPaePDPtr(pVM, (iPdPt << X86_PDPT_SHIFT), &GstPdpe, &pShwPaePd);
9b5bf00cddef78a2e5ab748a141ea830ce47abe2vboxsync AssertFatalMsg(rc == VINF_SUCCESS, ("rc = %Rrc\n", rc));
9b5bf00cddef78a2e5ab748a141ea830ce47abe2vboxsync PPGMPOOLPAGE pPoolPagePde = pgmPoolGetPageByHCPhys(pVM, pShwPdpt->a[iPdPt].u & X86_PDPE_PG_MASK);
9b5bf00cddef78a2e5ab748a141ea830ce47abe2vboxsync Assert(!(pShwPaePd->a[iPDE].u & PGM_PDFLAGS_MAPPING));
9b5bf00cddef78a2e5ab748a141ea830ce47abe2vboxsync pgmPoolFree(pVM, pShwPaePd->a[iPDE].u & X86_PDE_PG_MASK, pPoolPagePde->idx, iNewPDE);
9b5bf00cddef78a2e5ab748a141ea830ce47abe2vboxsync PdePae0.u = PGM_PDFLAGS_MAPPING | X86_PDE_P | X86_PDE_A | X86_PDE_RW | X86_PDE_US | pMap->aPTs[i].HCPhysPaePT0;
9b5bf00cddef78a2e5ab748a141ea830ce47abe2vboxsync /* 2nd 2 MB PDE of the 4 MB region */
9b5bf00cddef78a2e5ab748a141ea830ce47abe2vboxsync Assert(!(pShwPaePd->a[iPDE].u & PGM_PDFLAGS_MAPPING));
9b5bf00cddef78a2e5ab748a141ea830ce47abe2vboxsync pgmPoolFree(pVM, pShwPaePd->a[iPDE].u & X86_PDE_PG_MASK, pPoolPagePde->idx, iNewPDE);
7a61a5714b9a39ac3bd59e52b0843ef498350a35vboxsync PdePae1.u = PGM_PDFLAGS_MAPPING | X86_PDE_P | X86_PDE_A | X86_PDE_RW | X86_PDE_US | pMap->aPTs[i].HCPhysPaePT1;
682a27d94b9116c719038882487b99053985f91avboxsync /* Set the PGM_PDFLAGS_MAPPING flag in the page directory pointer entry. (legacy PAE guest mode) */
AssertFailed();
Log(("pgmMapClearShadowPDEs old pde %x (mappings enabled %d)\n", iOldPDE, pgmMapAreMappingsEnabled(&pVM->pgm.s)));
iOldPDE += i;
iOldPDE--;
switch(enmShadowMode)
case PGMMODE_32_BIT:
case PGMMODE_PAE:
case PGMMODE_PAE_NX:
iPDE++;
/* Clear the PGM_PDFLAGS_MAPPING flag for the page directory pointer entry. (legacy PAE guest mode) */
AssertFailed();
return VINF_SUCCESS;
#ifdef IN_RING0
AssertFailed();
return VERR_INTERNAL_ERROR;
# ifdef VBOX_WITH_PGMPOOL_PAGING_ONLY
return VINF_SUCCESS;
return VINF_SUCCESS;
#ifdef IN_RING0
AssertFailed();
return VERR_INTERNAL_ERROR;
# ifdef VBOX_WITH_PGMPOOL_PAGING_ONLY
return VINF_SUCCESS;
return VINF_SUCCESS;
#ifdef IN_RING0
AssertFailed();
return VERR_INTERNAL_ERROR;
# ifdef VBOX_WITH_PGMPOOL_PAGING_ONLY
return VINF_SUCCESS;
#ifndef IN_RING0
while (iPT-- > 0)
#ifdef IN_RING3
while (iPT-- > 0)
#ifdef IN_RING3
AssertFailed();
# ifdef VBOX_WITH_PGMPOOL_PAGING_ONLY
return VINF_SUCCESS;
while (iPT-- > 0)
#ifdef IN_RING3
return VINF_PGM_SYNC_CR3;
if (!pCur)
while (iPT-- > 0)
#ifdef IN_RING3
return VINF_PGM_SYNC_CR3;
if (!pCur)
AssertFailed();
return VINF_SUCCESS;