PGMAllHandler.cpp revision a04fd356c6a066fa94377352c941a49be7ab83b3
5fc50ecb8dc8ef74adfc1c1f0d4e144d7f4d8faestoddard/* $Id$ */
4ed92248676a091e0d73db61773d9059b36d0861stoddard/** @file
4ed92248676a091e0d73db61773d9059b36d0861stoddard * PGM - Page Manager / Monitor, Access Handlers.
4ed92248676a091e0d73db61773d9059b36d0861stoddard */
4ed92248676a091e0d73db61773d9059b36d0861stoddard
4ed92248676a091e0d73db61773d9059b36d0861stoddard/*
4ed92248676a091e0d73db61773d9059b36d0861stoddard * Copyright (C) 2006-2013 Oracle Corporation
4ed92248676a091e0d73db61773d9059b36d0861stoddard *
4ed92248676a091e0d73db61773d9059b36d0861stoddard * This file is part of VirtualBox Open Source Edition (OSE), as
4ed92248676a091e0d73db61773d9059b36d0861stoddard * available from http://www.virtualbox.org. This file is free software;
b4b458e66e24979631466a69c4bae3090a7e50fewrowe * you can redistribute it and/or modify it under the terms of the GNU
4ed92248676a091e0d73db61773d9059b36d0861stoddard * General Public License (GPL) as published by the Free Software
fa29e798c69385995c601ddfe75cbd5cf29244efwrowe * Foundation, in version 2 as it comes in the "COPYING" file of the
4ed92248676a091e0d73db61773d9059b36d0861stoddard * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
fa29e798c69385995c601ddfe75cbd5cf29244efwrowe * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
752c83c97683b1fb9879ba874593a135155a043cwrowe */
fa29e798c69385995c601ddfe75cbd5cf29244efwrowe
6b441c81aae632befd971e634b4a36780c71d18ewrowe
424303d026faabb9e9752310911d00fa737b603awrowe/*******************************************************************************
424303d026faabb9e9752310911d00fa737b603awrowe* Header Files *
424303d026faabb9e9752310911d00fa737b603awrowe*******************************************************************************/
9d134be9b7d1d6f0f9e910346a8075dac77b3d69ianh#define LOG_GROUP LOG_GROUP_PGM
c639d9d16cb8ac0ea8163c8c46e34ef9c6810ce2wrowe#include <VBox/vmm/dbgf.h>
c639d9d16cb8ac0ea8163c8c46e34ef9c6810ce2wrowe#include <VBox/vmm/pgm.h>
cfab5b5b6dc82c578597b582f76491c96b86eeb7wrowe#include <VBox/vmm/iom.h>
cfab5b5b6dc82c578597b582f76491c96b86eeb7wrowe#include <VBox/vmm/mm.h>
a04a085d201d1620c077ba6ecaa7022b417b1cd5tdonovan#include <VBox/vmm/em.h>
cfab5b5b6dc82c578597b582f76491c96b86eeb7wrowe#include <VBox/vmm/stam.h>
cfab5b5b6dc82c578597b582f76491c96b86eeb7wrowe#ifdef VBOX_WITH_REM
cfab5b5b6dc82c578597b582f76491c96b86eeb7wrowe# include <VBox/vmm/rem.h>
fa29e798c69385995c601ddfe75cbd5cf29244efwrowe#endif
4ed92248676a091e0d73db61773d9059b36d0861stoddard#include <VBox/vmm/dbgf.h>
ea0acbc141b3ca2ef21666bd23bfea9af9a758aawrowe#ifdef VBOX_WITH_REM
9d134be9b7d1d6f0f9e910346a8075dac77b3d69ianh# include <VBox/vmm/rem.h>
38c8e9fef8d0536fb150af3be396f41a32d687adwrowe#endif
bcd36d1522403b4387451f8a17a528e632915e8dwrowe#include "PGMInternal.h"
bcd36d1522403b4387451f8a17a528e632915e8dwrowe#include <VBox/vmm/vm.h>
4ed92248676a091e0d73db61773d9059b36d0861stoddard#include "PGMInline.h"
4c35be7cad99269afb697fccc1b9ba85dd2ce702wrowe
4c35be7cad99269afb697fccc1b9ba85dd2ce702wrowe#include <VBox/log.h>
4c35be7cad99269afb697fccc1b9ba85dd2ce702wrowe#include <iprt/assert.h>
4c35be7cad99269afb697fccc1b9ba85dd2ce702wrowe#include <iprt/asm-amd64-x86.h>
4c35be7cad99269afb697fccc1b9ba85dd2ce702wrowe#include <iprt/string.h>
4c35be7cad99269afb697fccc1b9ba85dd2ce702wrowe#include <VBox/param.h>
4c35be7cad99269afb697fccc1b9ba85dd2ce702wrowe#include <VBox/err.h>
4c35be7cad99269afb697fccc1b9ba85dd2ce702wrowe#include <VBox/vmm/selm.h>
4c35be7cad99269afb697fccc1b9ba85dd2ce702wrowe
4c35be7cad99269afb697fccc1b9ba85dd2ce702wrowe
4c35be7cad99269afb697fccc1b9ba85dd2ce702wrowe/*******************************************************************************
4c35be7cad99269afb697fccc1b9ba85dd2ce702wrowe* Internal Functions *
4c35be7cad99269afb697fccc1b9ba85dd2ce702wrowe*******************************************************************************/
4c35be7cad99269afb697fccc1b9ba85dd2ce702wrowestatic int pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs(PVM pVM, PPGMPHYSHANDLER pCur, PPGMRAMRANGE pRam);
4c35be7cad99269afb697fccc1b9ba85dd2ce702wrowestatic void pgmHandlerPhysicalDeregisterNotifyREM(PVM pVM, PPGMPHYSHANDLER pCur);
9cef38b3a87190d0c4dcd5b389573418af9de73cwrowestatic void pgmHandlerPhysicalResetRamFlags(PVM pVM, PPGMPHYSHANDLER pCur);
a8f3504993ae9a401b6fc87c7a00b716b112e3d0wrowe
4c35be7cad99269afb697fccc1b9ba85dd2ce702wrowe
b56ce33e3fe5670a4562de222c60ade06fe1bce0wrowe
b56ce33e3fe5670a4562de222c60ade06fe1bce0wrowe/**
b56ce33e3fe5670a4562de222c60ade06fe1bce0wrowe * Register a access handler for a physical range.
0ea0379ff6438182ac3c9d8f108deb3c82210319wrowe *
6173077ec421fe85891d4b914c87175beb0a9293wrowe * @returns VBox status code.
c71d15c4b41b9d89e90e936d49b4e5a6db19244ewrowe * @retval VINF_SUCCESS when successfully installed.
6173077ec421fe85891d4b914c87175beb0a9293wrowe * @retval VINF_PGM_GCPHYS_ALIASED when the shadow PTs could be updated because
6173077ec421fe85891d4b914c87175beb0a9293wrowe * the guest page aliased or/and mapped by multiple PTs. A CR3 sync has been
c71d15c4b41b9d89e90e936d49b4e5a6db19244ewrowe * flagged together with a pool clearing.
6173077ec421fe85891d4b914c87175beb0a9293wrowe * @retval VERR_PGM_HANDLER_PHYSICAL_CONFLICT if the range conflicts with an existing
6173077ec421fe85891d4b914c87175beb0a9293wrowe * one. A debug assertion is raised.
b4b458e66e24979631466a69c4bae3090a7e50fewrowe *
945f023c83c2d18bf5145a5b9af48fc3216fbef6wrowe * @param pVM Pointer to the VM.
a8f3504993ae9a401b6fc87c7a00b716b112e3d0wrowe * @param enmType Handler type. Any of the PGMPHYSHANDLERTYPE_PHYSICAL* enums.
a8f3504993ae9a401b6fc87c7a00b716b112e3d0wrowe * @param GCPhys Start physical address.
6166dacd3c3d034394c1f8c131919ea7452835a7wrowe * @param GCPhysLast Last physical address. (inclusive)
a8f3504993ae9a401b6fc87c7a00b716b112e3d0wrowe * @param pfnHandlerR3 The R3 handler.
a8f3504993ae9a401b6fc87c7a00b716b112e3d0wrowe * @param pvUserR3 User argument to the R3 handler.
a8f3504993ae9a401b6fc87c7a00b716b112e3d0wrowe * @param pfnHandlerR0 The R0 handler.
a8f3504993ae9a401b6fc87c7a00b716b112e3d0wrowe * @param pvUserR0 User argument to the R0 handler.
60f8e9cbbfc2d757c71db17a35acb8566eebc0dawrowe * @param pfnHandlerRC The RC handler.
b4b458e66e24979631466a69c4bae3090a7e50fewrowe * @param pvUserRC User argument to the RC handler. This can be a value
4c35be7cad99269afb697fccc1b9ba85dd2ce702wrowe * less that 0x10000 or a (non-null) pointer that is
a8f3504993ae9a401b6fc87c7a00b716b112e3d0wrowe * automatically relocated.
fa3f183306fa2ec98249f2afec904d403643a015wrowe * @param pszDesc Pointer to description string. This must not be freed.
a8f3504993ae9a401b6fc87c7a00b716b112e3d0wrowe */
743aeb835754aadabaec38c00742899668eb9dd1wroweVMMDECL(int) PGMHandlerPhysicalRegisterEx(PVM pVM, PGMPHYSHANDLERTYPE enmType, RTGCPHYS GCPhys, RTGCPHYS GCPhysLast,
fa3f183306fa2ec98249f2afec904d403643a015wrowe R3PTRTYPE(PFNPGMR3PHYSHANDLER) pfnHandlerR3, RTR3PTR pvUserR3,
a78b700fa90213df137e4178a9bd9c81aadd39d3wrowe R0PTRTYPE(PFNPGMR0PHYSHANDLER) pfnHandlerR0, RTR0PTR pvUserR0,
4c35be7cad99269afb697fccc1b9ba85dd2ce702wrowe RCPTRTYPE(PFNPGMRCPHYSHANDLER) pfnHandlerRC, RTRCPTR pvUserRC,
b56ce33e3fe5670a4562de222c60ade06fe1bce0wrowe R3PTRTYPE(const char *) pszDesc)
b56ce33e3fe5670a4562de222c60ade06fe1bce0wrowe{
945f023c83c2d18bf5145a5b9af48fc3216fbef6wrowe Log(("PGMHandlerPhysicalRegisterEx: enmType=%d GCPhys=%RGp GCPhysLast=%RGp pfnHandlerR3=%RHv pvUserR3=%RHv pfnHandlerR0=%RHv pvUserR0=%RHv pfnHandlerGC=%RRv pvUserGC=%RRv pszDesc=%s\n",
549b1f3d6860ae792e6a8c8d3a483140bdb857a5wrowe enmType, GCPhys, GCPhysLast, pfnHandlerR3, pvUserR3, pfnHandlerR0, pvUserR0, pfnHandlerRC, pvUserRC, R3STRING(pszDesc)));
60f8e9cbbfc2d757c71db17a35acb8566eebc0dawrowe
743aeb835754aadabaec38c00742899668eb9dd1wrowe /*
945f023c83c2d18bf5145a5b9af48fc3216fbef6wrowe * Validate input.
945f023c83c2d18bf5145a5b9af48fc3216fbef6wrowe */
a8f3504993ae9a401b6fc87c7a00b716b112e3d0wrowe AssertMsgReturn(GCPhys < GCPhysLast, ("GCPhys >= GCPhysLast (%#x >= %#x)\n", GCPhys, GCPhysLast), VERR_INVALID_PARAMETER);
60f8e9cbbfc2d757c71db17a35acb8566eebc0dawrowe switch (enmType)
60f8e9cbbfc2d757c71db17a35acb8566eebc0dawrowe {
b4b458e66e24979631466a69c4bae3090a7e50fewrowe case PGMPHYSHANDLERTYPE_PHYSICAL_WRITE:
9cef38b3a87190d0c4dcd5b389573418af9de73cwrowe break;
9cef38b3a87190d0c4dcd5b389573418af9de73cwrowe case PGMPHYSHANDLERTYPE_MMIO:
9cef38b3a87190d0c4dcd5b389573418af9de73cwrowe case PGMPHYSHANDLERTYPE_PHYSICAL_ALL:
9cef38b3a87190d0c4dcd5b389573418af9de73cwrowe /* Simplification for PGMPhysRead, PGMR0Trap0eHandlerNPMisconfig and others. */
032eeda9f618fa26f635c9e8dfd854c17e76262fwrowe AssertMsgReturn(!(GCPhys & PAGE_OFFSET_MASK), ("%RGp\n", GCPhys), VERR_INVALID_PARAMETER);
9cef38b3a87190d0c4dcd5b389573418af9de73cwrowe AssertMsgReturn((GCPhysLast & PAGE_OFFSET_MASK) == PAGE_OFFSET_MASK, ("%RGp\n", GCPhysLast), VERR_INVALID_PARAMETER);
60f8e9cbbfc2d757c71db17a35acb8566eebc0dawrowe break;
60f8e9cbbfc2d757c71db17a35acb8566eebc0dawrowe default:
60f8e9cbbfc2d757c71db17a35acb8566eebc0dawrowe AssertMsgFailed(("Invalid input enmType=%d!\n", enmType));
60f8e9cbbfc2d757c71db17a35acb8566eebc0dawrowe return VERR_INVALID_PARAMETER;
60f8e9cbbfc2d757c71db17a35acb8566eebc0dawrowe }
4c35be7cad99269afb697fccc1b9ba85dd2ce702wrowe AssertMsgReturn( (RTRCUINTPTR)pvUserRC < 0x10000
92fb4b4faaea055db085fc0864950c2a5edd0de2jwoolley || MMHyperR3ToRC(pVM, MMHyperRCToR3(pVM, pvUserRC)) == pvUserRC,
fa3f183306fa2ec98249f2afec904d403643a015wrowe ("Not RC pointer! pvUserRC=%RRv\n", pvUserRC),
60f8e9cbbfc2d757c71db17a35acb8566eebc0dawrowe VERR_INVALID_PARAMETER);
4c35be7cad99269afb697fccc1b9ba85dd2ce702wrowe AssertMsgReturn( (RTR0UINTPTR)pvUserR0 < 0x10000
b56ce33e3fe5670a4562de222c60ade06fe1bce0wrowe || MMHyperR3ToR0(pVM, MMHyperR0ToR3(pVM, pvUserR0)) == pvUserR0,
60f8e9cbbfc2d757c71db17a35acb8566eebc0dawrowe ("Not R0 pointer! pvUserR0=%RHv\n", pvUserR0),
549b1f3d6860ae792e6a8c8d3a483140bdb857a5wrowe VERR_INVALID_PARAMETER);
60f8e9cbbfc2d757c71db17a35acb8566eebc0dawrowe AssertPtrReturn(pfnHandlerR3, VERR_INVALID_POINTER);
60f8e9cbbfc2d757c71db17a35acb8566eebc0dawrowe AssertReturn(pfnHandlerR0, VERR_INVALID_PARAMETER);
60f8e9cbbfc2d757c71db17a35acb8566eebc0dawrowe AssertReturn(pfnHandlerRC || HMIsEnabled(pVM), VERR_INVALID_PARAMETER);
60f8e9cbbfc2d757c71db17a35acb8566eebc0dawrowe
60f8e9cbbfc2d757c71db17a35acb8566eebc0dawrowe /*
60f8e9cbbfc2d757c71db17a35acb8566eebc0dawrowe * We require the range to be within registered ram.
60f8e9cbbfc2d757c71db17a35acb8566eebc0dawrowe * There is no apparent need to support ranges which cover more than one ram range.
9cef38b3a87190d0c4dcd5b389573418af9de73cwrowe */
9cef38b3a87190d0c4dcd5b389573418af9de73cwrowe PPGMRAMRANGE pRam = pgmPhysGetRange(pVM, GCPhys);
6a5b8f7bd9abe819babda806a7245a31cd0dd2fbwrowe if ( !pRam
6a5b8f7bd9abe819babda806a7245a31cd0dd2fbwrowe || GCPhysLast < pRam->GCPhys
60f8e9cbbfc2d757c71db17a35acb8566eebc0dawrowe || GCPhys > pRam->GCPhysLast)
a8f3504993ae9a401b6fc87c7a00b716b112e3d0wrowe {
a8f3504993ae9a401b6fc87c7a00b716b112e3d0wrowe#ifdef IN_RING3
cfab5b5b6dc82c578597b582f76491c96b86eeb7wrowe DBGFR3Info(pVM->pUVM, "phys", NULL, NULL);
cfab5b5b6dc82c578597b582f76491c96b86eeb7wrowe#endif
cfab5b5b6dc82c578597b582f76491c96b86eeb7wrowe AssertMsgFailed(("No RAM range for %RGp-%RGp\n", GCPhys, GCPhysLast));
cfab5b5b6dc82c578597b582f76491c96b86eeb7wrowe return VERR_PGM_HANDLER_PHYSICAL_NO_RAM_RANGE;
413043ed189411cd1c673fc4911b583cb85c2c39wrowe }
a04a085d201d1620c077ba6ecaa7022b417b1cd5tdonovan
7a9d2ce2e2f592e97c0d4819e0e6567efcc4ba7bwrowe /*
413043ed189411cd1c673fc4911b583cb85c2c39wrowe * Allocate and initialize the new entry.
cfab5b5b6dc82c578597b582f76491c96b86eeb7wrowe */
a04a085d201d1620c077ba6ecaa7022b417b1cd5tdonovan PPGMPHYSHANDLER pNew;
cfab5b5b6dc82c578597b582f76491c96b86eeb7wrowe int rc = MMHyperAlloc(pVM, sizeof(*pNew), 0, MM_TAG_PGM_HANDLERS, (void **)&pNew);
cfab5b5b6dc82c578597b582f76491c96b86eeb7wrowe if (RT_FAILURE(rc))
a04a085d201d1620c077ba6ecaa7022b417b1cd5tdonovan return rc;
cfab5b5b6dc82c578597b582f76491c96b86eeb7wrowe
cfab5b5b6dc82c578597b582f76491c96b86eeb7wrowe pNew->Core.Key = GCPhys;
cfab5b5b6dc82c578597b582f76491c96b86eeb7wrowe pNew->Core.KeyLast = GCPhysLast;
cfab5b5b6dc82c578597b582f76491c96b86eeb7wrowe pNew->enmType = enmType;
cfab5b5b6dc82c578597b582f76491c96b86eeb7wrowe pNew->cPages = (GCPhysLast - (GCPhys & X86_PTE_PAE_PG_MASK) + PAGE_SIZE) >> PAGE_SHIFT;
4ed92248676a091e0d73db61773d9059b36d0861stoddard pNew->cAliasedPages = 0;
071646a05417cc437fcffec9512588f75bd39a03wrowe pNew->cTmpOffPages = 0;
9cef38b3a87190d0c4dcd5b389573418af9de73cwrowe pNew->pfnHandlerR3 = pfnHandlerR3;
424303d026faabb9e9752310911d00fa737b603awrowe pNew->pvUserR3 = pvUserR3;
424303d026faabb9e9752310911d00fa737b603awrowe pNew->pfnHandlerR0 = pfnHandlerR0;
424303d026faabb9e9752310911d00fa737b603awrowe pNew->pvUserR0 = pvUserR0;
9cef38b3a87190d0c4dcd5b389573418af9de73cwrowe pNew->pfnHandlerRC = pfnHandlerRC;
424303d026faabb9e9752310911d00fa737b603awrowe pNew->pvUserRC = pvUserRC;
424303d026faabb9e9752310911d00fa737b603awrowe pNew->pszDesc = pszDesc;
424303d026faabb9e9752310911d00fa737b603awrowe
424303d026faabb9e9752310911d00fa737b603awrowe pgmLock(pVM);
9cef38b3a87190d0c4dcd5b389573418af9de73cwrowe
fa29e798c69385995c601ddfe75cbd5cf29244efwrowe /*
f397bb616fba8b3a5a9b3c57a5c89ad0e254b673mturk * Try insert into list.
9d134be9b7d1d6f0f9e910346a8075dac77b3d69ianh */
6b441c81aae632befd971e634b4a36780c71d18ewrowe if (RTAvlroGCPhysInsert(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, &pNew->Core))
6b441c81aae632befd971e634b4a36780c71d18ewrowe {
6b441c81aae632befd971e634b4a36780c71d18ewrowe rc = pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs(pVM, pNew, pRam);
9cef38b3a87190d0c4dcd5b389573418af9de73cwrowe if (rc == VINF_PGM_SYNC_CR3)
9cef38b3a87190d0c4dcd5b389573418af9de73cwrowe rc = VINF_PGM_GCPHYS_ALIASED;
9cef38b3a87190d0c4dcd5b389573418af9de73cwrowe pgmUnlock(pVM);
7ffdcdd65e145ef18d9193d89bffff10c5da4961wrowe#ifdef VBOX_WITH_REM
7ffdcdd65e145ef18d9193d89bffff10c5da4961wrowe# ifndef IN_RING3
7ffdcdd65e145ef18d9193d89bffff10c5da4961wrowe REMNotifyHandlerPhysicalRegister(pVM, enmType, GCPhys, GCPhysLast - GCPhys + 1, !!pfnHandlerR3);
7ffdcdd65e145ef18d9193d89bffff10c5da4961wrowe# else
7ffdcdd65e145ef18d9193d89bffff10c5da4961wrowe REMR3NotifyHandlerPhysicalRegister(pVM, enmType, GCPhys, GCPhysLast - GCPhys + 1, !!pfnHandlerR3);
6b441c81aae632befd971e634b4a36780c71d18ewrowe# endif
7ffdcdd65e145ef18d9193d89bffff10c5da4961wrowe#endif
6b441c81aae632befd971e634b4a36780c71d18ewrowe if (rc != VINF_SUCCESS)
9cef38b3a87190d0c4dcd5b389573418af9de73cwrowe Log(("PGMHandlerPhysicalRegisterEx: returns %Rrc (%RGp-%RGp)\n", rc, GCPhys, GCPhysLast));
ea0acbc141b3ca2ef21666bd23bfea9af9a758aawrowe return rc;
ea0acbc141b3ca2ef21666bd23bfea9af9a758aawrowe }
9cef38b3a87190d0c4dcd5b389573418af9de73cwrowe
9cef38b3a87190d0c4dcd5b389573418af9de73cwrowe pgmUnlock(pVM);
fa29e798c69385995c601ddfe75cbd5cf29244efwrowe
4ed92248676a091e0d73db61773d9059b36d0861stoddard#if defined(IN_RING3) && defined(VBOX_STRICT)
50feafa397d01128b8cf94ad1602d3d78e1a4169wrowe DBGFR3Info(pVM->pUVM, "handlers", "phys nostats", NULL);
50feafa397d01128b8cf94ad1602d3d78e1a4169wrowe#endif
ea0acbc141b3ca2ef21666bd23bfea9af9a758aawrowe AssertMsgFailed(("Conflict! GCPhys=%RGp GCPhysLast=%RGp pszDesc=%s\n", GCPhys, GCPhysLast, pszDesc));
ea0acbc141b3ca2ef21666bd23bfea9af9a758aawrowe MMHyperFree(pVM, pNew);
50feafa397d01128b8cf94ad1602d3d78e1a4169wrowe return VERR_PGM_HANDLER_PHYSICAL_CONFLICT;
ea0acbc141b3ca2ef21666bd23bfea9af9a758aawrowe}
ea0acbc141b3ca2ef21666bd23bfea9af9a758aawrowe
ea0acbc141b3ca2ef21666bd23bfea9af9a758aawrowe
ea0acbc141b3ca2ef21666bd23bfea9af9a758aawrowe/**
50feafa397d01128b8cf94ad1602d3d78e1a4169wrowe * Sets ram range flags and attempts updating shadow PTs.
50feafa397d01128b8cf94ad1602d3d78e1a4169wrowe *
98086904a5df1d6127b49bf06af39f23ff844889wrowe * @returns VBox status code.
98086904a5df1d6127b49bf06af39f23ff844889wrowe * @retval VINF_SUCCESS when shadow PTs was successfully updated.
b4b458e66e24979631466a69c4bae3090a7e50fewrowe * @retval VINF_PGM_SYNC_CR3 when the shadow PTs could be updated because
b4b458e66e24979631466a69c4bae3090a7e50fewrowe * the guest page aliased or/and mapped by multiple PTs. FFs set.
b4b458e66e24979631466a69c4bae3090a7e50fewrowe * @param pVM Pointer to the VM.
b4b458e66e24979631466a69c4bae3090a7e50fewrowe * @param pCur The physical handler.
b4b458e66e24979631466a69c4bae3090a7e50fewrowe * @param pRam The RAM range.
4ed92248676a091e0d73db61773d9059b36d0861stoddard */
549b1f3d6860ae792e6a8c8d3a483140bdb857a5wrowestatic int pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs(PVM pVM, PPGMPHYSHANDLER pCur, PPGMRAMRANGE pRam)
4ed92248676a091e0d73db61773d9059b36d0861stoddard{
4ed92248676a091e0d73db61773d9059b36d0861stoddard /*
549b1f3d6860ae792e6a8c8d3a483140bdb857a5wrowe * Iterate the guest ram pages updating the flags and flushing PT entries
4ed92248676a091e0d73db61773d9059b36d0861stoddard * mapping the page.
4ed92248676a091e0d73db61773d9059b36d0861stoddard */
549b1f3d6860ae792e6a8c8d3a483140bdb857a5wrowe bool fFlushTLBs = false;
4ed92248676a091e0d73db61773d9059b36d0861stoddard int rc = VINF_SUCCESS;
4ed92248676a091e0d73db61773d9059b36d0861stoddard const unsigned uState = pgmHandlerPhysicalCalcState(pCur);
549b1f3d6860ae792e6a8c8d3a483140bdb857a5wrowe uint32_t cPages = pCur->cPages;
4ed92248676a091e0d73db61773d9059b36d0861stoddard uint32_t i = (pCur->Core.Key - pRam->GCPhys) >> PAGE_SHIFT;
945f023c83c2d18bf5145a5b9af48fc3216fbef6wrowe for (;;)
90f3e85cc3332e202aa198786798709fc55505d9wrowe {
b4b458e66e24979631466a69c4bae3090a7e50fewrowe PPGMPAGE pPage = &pRam->aPages[i];
b4b458e66e24979631466a69c4bae3090a7e50fewrowe AssertMsg(pCur->enmType != PGMPHYSHANDLERTYPE_MMIO || PGM_PAGE_IS_MMIO(pPage),
945f023c83c2d18bf5145a5b9af48fc3216fbef6wrowe ("%RGp %R[pgmpage]\n", pRam->GCPhys + (i << PAGE_SHIFT), pPage));
4c35be7cad99269afb697fccc1b9ba85dd2ce702wrowe
945f023c83c2d18bf5145a5b9af48fc3216fbef6wrowe /* Only do upgrades. */
b4b458e66e24979631466a69c4bae3090a7e50fewrowe if (PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) < uState)
50feafa397d01128b8cf94ad1602d3d78e1a4169wrowe {
4ed92248676a091e0d73db61773d9059b36d0861stoddard PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, uState);
4ed92248676a091e0d73db61773d9059b36d0861stoddard
50feafa397d01128b8cf94ad1602d3d78e1a4169wrowe int rc2 = pgmPoolTrackUpdateGCPhys(pVM, pRam->GCPhys + (i << PAGE_SHIFT), pPage,
4ed92248676a091e0d73db61773d9059b36d0861stoddard false /* allow updates of PTEs (instead of flushing) */, &fFlushTLBs);
4ed92248676a091e0d73db61773d9059b36d0861stoddard if (rc2 != VINF_SUCCESS && rc == VINF_SUCCESS)
4ed92248676a091e0d73db61773d9059b36d0861stoddard rc = rc2;
0b64c3e5c7379284f90efc7193f16b373df39fe1wrowe }
1e83c8de3aa48b316b28057d53995272baf1260cwrowe
1e83c8de3aa48b316b28057d53995272baf1260cwrowe /* next */
4ed92248676a091e0d73db61773d9059b36d0861stoddard if (--cPages == 0)
0ea0379ff6438182ac3c9d8f108deb3c82210319wrowe break;
0ea0379ff6438182ac3c9d8f108deb3c82210319wrowe i++;
0ea0379ff6438182ac3c9d8f108deb3c82210319wrowe }
d7f2b79379c5a3b849bf3d5dacf7180805ecba1fwrowe
ea0acbc141b3ca2ef21666bd23bfea9af9a758aawrowe if (fFlushTLBs)
d7f2b79379c5a3b849bf3d5dacf7180805ecba1fwrowe {
d7f2b79379c5a3b849bf3d5dacf7180805ecba1fwrowe PGM_INVL_ALL_VCPU_TLBS(pVM);
d7f2b79379c5a3b849bf3d5dacf7180805ecba1fwrowe Log(("pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs: flushing guest TLBs; rc=%d\n", rc));
ea0acbc141b3ca2ef21666bd23bfea9af9a758aawrowe }
d7f2b79379c5a3b849bf3d5dacf7180805ecba1fwrowe else
d7f2b79379c5a3b849bf3d5dacf7180805ecba1fwrowe Log(("pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs: doesn't flush guest TLBs. rc=%Rrc; sync flags=%x VMCPU_FF_PGM_SYNC_CR3=%d\n", rc, VMMGetCpu(pVM)->pgm.s.fSyncFlags, VMCPU_FF_ISSET(VMMGetCpu(pVM), VMCPU_FF_PGM_SYNC_CR3)));
ea0acbc141b3ca2ef21666bd23bfea9af9a758aawrowe
d7f2b79379c5a3b849bf3d5dacf7180805ecba1fwrowe return rc;
d7f2b79379c5a3b849bf3d5dacf7180805ecba1fwrowe}
d7f2b79379c5a3b849bf3d5dacf7180805ecba1fwrowe
d7f2b79379c5a3b849bf3d5dacf7180805ecba1fwrowe
06bd11dc20356466f38185ddb47fc798b4508d5fwrowe/**
1e83c8de3aa48b316b28057d53995272baf1260cwrowe * Register a physical page access handler.
1e83c8de3aa48b316b28057d53995272baf1260cwrowe *
1e83c8de3aa48b316b28057d53995272baf1260cwrowe * @returns VBox status code.
1e83c8de3aa48b316b28057d53995272baf1260cwrowe * @param pVM Pointer to the VM.
413043ed189411cd1c673fc4911b583cb85c2c39wrowe * @param GCPhys Start physical address.
5158d1bbe54607d02bb5e5b2219e7aed4684e41btdonovan */
413043ed189411cd1c673fc4911b583cb85c2c39wroweVMMDECL(int) PGMHandlerPhysicalDeregister(PVM pVM, RTGCPHYS GCPhys)
413043ed189411cd1c673fc4911b583cb85c2c39wrowe{
a04a085d201d1620c077ba6ecaa7022b417b1cd5tdonovan /*
7a9d2ce2e2f592e97c0d4819e0e6567efcc4ba7bwrowe * Find the handler.
413043ed189411cd1c673fc4911b583cb85c2c39wrowe */
413043ed189411cd1c673fc4911b583cb85c2c39wrowe pgmLock(pVM);
0b64c3e5c7379284f90efc7193f16b373df39fe1wrowe PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysRemove(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
1e83c8de3aa48b316b28057d53995272baf1260cwrowe if (pCur)
1e83c8de3aa48b316b28057d53995272baf1260cwrowe {
c3200c488bb3f941a88d5bed94abef0f46946bd3wrowe LogFlow(("PGMHandlerPhysicalDeregister: Removing Range %RGp-%RGp %s\n",
0b64c3e5c7379284f90efc7193f16b373df39fe1wrowe pCur->Core.Key, pCur->Core.KeyLast, R3STRING(pCur->pszDesc)));
1e83c8de3aa48b316b28057d53995272baf1260cwrowe
4ed92248676a091e0d73db61773d9059b36d0861stoddard /*
1e83c8de3aa48b316b28057d53995272baf1260cwrowe * Clear the page bits, notify the REM about this change and clear
14d27a22a8fdb25e6e82d8af853a63bd4c6bd894wrowe * the cache.
6a5b8f7bd9abe819babda806a7245a31cd0dd2fbwrowe */
6a5b8f7bd9abe819babda806a7245a31cd0dd2fbwrowe pgmHandlerPhysicalResetRamFlags(pVM, pCur);
6a5b8f7bd9abe819babda806a7245a31cd0dd2fbwrowe pgmHandlerPhysicalDeregisterNotifyREM(pVM, pCur);
6a5b8f7bd9abe819babda806a7245a31cd0dd2fbwrowe pVM->pgm.s.pLastPhysHandlerR0 = 0;
9106bbba512da6e81bb4feb268bbd17435354d79wrowe pVM->pgm.s.pLastPhysHandlerR3 = 0;
9106bbba512da6e81bb4feb268bbd17435354d79wrowe pVM->pgm.s.pLastPhysHandlerRC = 0;
9106bbba512da6e81bb4feb268bbd17435354d79wrowe MMHyperFree(pVM, pCur);
0b64c3e5c7379284f90efc7193f16b373df39fe1wrowe pgmUnlock(pVM);
7c11b20dfccedb7381518b3cc3cc9ef9e6731cb1wrowe return VINF_SUCCESS;
14d5b1a7866541c4eb974f2d213d2aea59743c95wrowe }
1a1462ebfd091853d54071a693fc7ad4c5573f8awrowe pgmUnlock(pVM);
483ed5892604266e702d65db4d0b2b621c488a09wrowe
14d5b1a7866541c4eb974f2d213d2aea59743c95wrowe AssertMsgFailed(("Didn't find range starting at %RGp\n", GCPhys));
bc21ce13cec2409c8fdb7122154636b2df97715ajerenkrantz return VERR_PGM_HANDLER_NOT_FOUND;
34e753c9dba1e821f54f0d4179f8774f854123eecolm}
14d5b1a7866541c4eb974f2d213d2aea59743c95wrowe
14d5b1a7866541c4eb974f2d213d2aea59743c95wrowe
14d5b1a7866541c4eb974f2d213d2aea59743c95wrowe/**
7c11b20dfccedb7381518b3cc3cc9ef9e6731cb1wrowe * Shared code with modify.
ac19b3a64a76401bc7e4e378b51c245a7e8516a5mturk */
7c11b20dfccedb7381518b3cc3cc9ef9e6731cb1wrowestatic void pgmHandlerPhysicalDeregisterNotifyREM(PVM pVM, PPGMPHYSHANDLER pCur)
7c11b20dfccedb7381518b3cc3cc9ef9e6731cb1wrowe{
14d5b1a7866541c4eb974f2d213d2aea59743c95wrowe RTGCPHYS GCPhysStart = pCur->Core.Key;
14d5b1a7866541c4eb974f2d213d2aea59743c95wrowe RTGCPHYS GCPhysLast = pCur->Core.KeyLast;
14d5b1a7866541c4eb974f2d213d2aea59743c95wrowe
7c11b20dfccedb7381518b3cc3cc9ef9e6731cb1wrowe /*
14d5b1a7866541c4eb974f2d213d2aea59743c95wrowe * Page align the range.
0b64c3e5c7379284f90efc7193f16b373df39fe1wrowe *
1e83c8de3aa48b316b28057d53995272baf1260cwrowe * Since we've reset (recalculated) the physical handler state of all pages
1e83c8de3aa48b316b28057d53995272baf1260cwrowe * we can make use of the page states to figure out whether a page should be
1e83c8de3aa48b316b28057d53995272baf1260cwrowe * included in the REM notification or not.
0b64c3e5c7379284f90efc7193f16b373df39fe1wrowe */
bf03ef02d5f0f64ee0e91f3c4007154897d4dd34mturk if ( (pCur->Core.Key & PAGE_OFFSET_MASK)
1e83c8de3aa48b316b28057d53995272baf1260cwrowe || ((pCur->Core.KeyLast + 1) & PAGE_OFFSET_MASK))
bf03ef02d5f0f64ee0e91f3c4007154897d4dd34mturk {
bf03ef02d5f0f64ee0e91f3c4007154897d4dd34mturk Assert(pCur->enmType != PGMPHYSHANDLERTYPE_MMIO);
483ed5892604266e702d65db4d0b2b621c488a09wrowe
483ed5892604266e702d65db4d0b2b621c488a09wrowe if (GCPhysStart & PAGE_OFFSET_MASK)
483ed5892604266e702d65db4d0b2b621c488a09wrowe {
483ed5892604266e702d65db4d0b2b621c488a09wrowe PPGMPAGE pPage = pgmPhysGetPage(pVM, GCPhysStart);
483ed5892604266e702d65db4d0b2b621c488a09wrowe if ( pPage
483ed5892604266e702d65db4d0b2b621c488a09wrowe && PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) != PGM_PAGE_HNDL_PHYS_STATE_NONE)
0b64c3e5c7379284f90efc7193f16b373df39fe1wrowe {
0b64c3e5c7379284f90efc7193f16b373df39fe1wrowe RTGCPHYS GCPhys = (GCPhysStart + (PAGE_SIZE - 1)) & X86_PTE_PAE_PG_MASK;
1e83c8de3aa48b316b28057d53995272baf1260cwrowe if ( GCPhys > GCPhysLast
0b64c3e5c7379284f90efc7193f16b373df39fe1wrowe || GCPhys < GCPhysStart)
0b64c3e5c7379284f90efc7193f16b373df39fe1wrowe return;
1e83c8de3aa48b316b28057d53995272baf1260cwrowe GCPhysStart = GCPhys;
0b64c3e5c7379284f90efc7193f16b373df39fe1wrowe }
7c11b20dfccedb7381518b3cc3cc9ef9e6731cb1wrowe else
7c11b20dfccedb7381518b3cc3cc9ef9e6731cb1wrowe GCPhysStart &= X86_PTE_PAE_PG_MASK;
7c11b20dfccedb7381518b3cc3cc9ef9e6731cb1wrowe Assert(!pPage || PGM_PAGE_GET_TYPE(pPage) != PGMPAGETYPE_MMIO); /* these are page aligned atm! */
0f488df653e7e8cf4ee0006a3138f9474ca1d375wrowe }
7c11b20dfccedb7381518b3cc3cc9ef9e6731cb1wrowe
538b2b76902ad0b42b4fb2c8ace94bf74d8100cewrowe if (GCPhysLast & PAGE_OFFSET_MASK)
7c11b20dfccedb7381518b3cc3cc9ef9e6731cb1wrowe {
538b2b76902ad0b42b4fb2c8ace94bf74d8100cewrowe PPGMPAGE pPage = pgmPhysGetPage(pVM, GCPhysLast);
538b2b76902ad0b42b4fb2c8ace94bf74d8100cewrowe if ( pPage
c639d9d16cb8ac0ea8163c8c46e34ef9c6810ce2wrowe && PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) != PGM_PAGE_HNDL_PHYS_STATE_NONE)
c639d9d16cb8ac0ea8163c8c46e34ef9c6810ce2wrowe {
c639d9d16cb8ac0ea8163c8c46e34ef9c6810ce2wrowe RTGCPHYS GCPhys = (GCPhysLast & X86_PTE_PAE_PG_MASK) - 1;
c639d9d16cb8ac0ea8163c8c46e34ef9c6810ce2wrowe if ( GCPhys < GCPhysStart
c639d9d16cb8ac0ea8163c8c46e34ef9c6810ce2wrowe || GCPhys > GCPhysLast)
7c11b20dfccedb7381518b3cc3cc9ef9e6731cb1wrowe return;
b23117c3c7034b6e61dac1b0ffebd256950abb56wrowe GCPhysLast = GCPhys;
483ed5892604266e702d65db4d0b2b621c488a09wrowe }
7c11b20dfccedb7381518b3cc3cc9ef9e6731cb1wrowe else
b23117c3c7034b6e61dac1b0ffebd256950abb56wrowe GCPhysLast |= PAGE_OFFSET_MASK;
483ed5892604266e702d65db4d0b2b621c488a09wrowe Assert(!pPage || PGM_PAGE_GET_TYPE(pPage) != PGMPAGETYPE_MMIO); /* these are page aligned atm! */
b23117c3c7034b6e61dac1b0ffebd256950abb56wrowe }
7c11b20dfccedb7381518b3cc3cc9ef9e6731cb1wrowe }
175ab758dce807990c2cfd281ffced0dd8f7d2f4nd
92e403ad9206eea8af7bd426fd1a19d531816d83wrowe /*
58b8ccdd4dbf4b314e016de6eeebfe45be45451end * Tell REM.
60f8e9cbbfc2d757c71db17a35acb8566eebc0dawrowe */
60f8e9cbbfc2d757c71db17a35acb8566eebc0dawrowe const bool fRestoreAsRAM = pCur->pfnHandlerR3
255d4d329b2d41e4ac0c3ade5cfe528a078ef682wrowe && pCur->enmType != PGMPHYSHANDLERTYPE_MMIO; /** @todo this isn't entirely correct. */
c639d9d16cb8ac0ea8163c8c46e34ef9c6810ce2wrowe#ifdef VBOX_WITH_REM
1e83c8de3aa48b316b28057d53995272baf1260cwrowe# ifndef IN_RING3
483ed5892604266e702d65db4d0b2b621c488a09wrowe REMNotifyHandlerPhysicalDeregister(pVM, pCur->enmType, GCPhysStart, GCPhysLast - GCPhysStart + 1, !!pCur->pfnHandlerR3, fRestoreAsRAM);
3e156d3e4514cf57f8ac77e275a68d1c12a3b937wrowe# else
1e83c8de3aa48b316b28057d53995272baf1260cwrowe REMR3NotifyHandlerPhysicalDeregister(pVM, pCur->enmType, GCPhysStart, GCPhysLast - GCPhysStart + 1, !!pCur->pfnHandlerR3, fRestoreAsRAM);
0b64c3e5c7379284f90efc7193f16b373df39fe1wrowe# endif
1e83c8de3aa48b316b28057d53995272baf1260cwrowe#endif
1e83c8de3aa48b316b28057d53995272baf1260cwrowe}
1e83c8de3aa48b316b28057d53995272baf1260cwrowe
1e83c8de3aa48b316b28057d53995272baf1260cwrowe
1e83c8de3aa48b316b28057d53995272baf1260cwrowe/**
1e83c8de3aa48b316b28057d53995272baf1260cwrowe * pgmHandlerPhysicalResetRamFlags helper that checks for other handlers on
1e83c8de3aa48b316b28057d53995272baf1260cwrowe * edge pages.
1e83c8de3aa48b316b28057d53995272baf1260cwrowe */
1e83c8de3aa48b316b28057d53995272baf1260cwroweDECLINLINE(void) pgmHandlerPhysicalRecalcPageState(PVM pVM, RTGCPHYS GCPhys, bool fAbove, PPGMRAMRANGE *ppRamHint)
1e83c8de3aa48b316b28057d53995272baf1260cwrowe{
1e83c8de3aa48b316b28057d53995272baf1260cwrowe /*
24b0a59507af2a3621f586fa2a2aafc3640aa3d2nd * Look for other handlers.
5a51653135041ee35b24fa67453bff4e9f8e3591wrowe */
0b64c3e5c7379284f90efc7193f16b373df39fe1wrowe unsigned uState = PGM_PAGE_HNDL_PHYS_STATE_NONE;
0b64c3e5c7379284f90efc7193f16b373df39fe1wrowe for (;;)
1e83c8de3aa48b316b28057d53995272baf1260cwrowe {
1e83c8de3aa48b316b28057d53995272baf1260cwrowe PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGetBestFit(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys, fAbove);
1e83c8de3aa48b316b28057d53995272baf1260cwrowe if ( !pCur
0e6bee8eb9112f77eb50766e58424afac61104d9wrowe || ((fAbove ? pCur->Core.Key : pCur->Core.KeyLast) >> PAGE_SHIFT) != (GCPhys >> PAGE_SHIFT))
1e83c8de3aa48b316b28057d53995272baf1260cwrowe break;
1e83c8de3aa48b316b28057d53995272baf1260cwrowe unsigned uThisState = pgmHandlerPhysicalCalcState(pCur);
1e83c8de3aa48b316b28057d53995272baf1260cwrowe uState = RT_MAX(uState, uThisState);
1e83c8de3aa48b316b28057d53995272baf1260cwrowe
995f5596d461cdd916f9ae5b7b4dcd27efbc3c2fwrowe /* next? */
0b64c3e5c7379284f90efc7193f16b373df39fe1wrowe RTGCPHYS GCPhysNext = fAbove
0b64c3e5c7379284f90efc7193f16b373df39fe1wrowe ? pCur->Core.KeyLast + 1
1e83c8de3aa48b316b28057d53995272baf1260cwrowe : pCur->Core.Key - 1;
1e83c8de3aa48b316b28057d53995272baf1260cwrowe if ((GCPhysNext >> PAGE_SHIFT) != (GCPhys >> PAGE_SHIFT))
1e83c8de3aa48b316b28057d53995272baf1260cwrowe break;
1e83c8de3aa48b316b28057d53995272baf1260cwrowe GCPhys = GCPhysNext;
3ea7933c5a74b8d8d54ec2689190a865a0689420wrowe }
1e83c8de3aa48b316b28057d53995272baf1260cwrowe
1e83c8de3aa48b316b28057d53995272baf1260cwrowe /*
1e83c8de3aa48b316b28057d53995272baf1260cwrowe * Update if we found something that is a higher priority
1e83c8de3aa48b316b28057d53995272baf1260cwrowe * state than the current.
a21b3b9d8ebb12fd51fa1d17e44d5644a35a9a5fnd */
0b64c3e5c7379284f90efc7193f16b373df39fe1wrowe if (uState != PGM_PAGE_HNDL_PHYS_STATE_NONE)
f4b681ff0aa05efee56b42a893911f28c3ad931ewrowe {
1e83c8de3aa48b316b28057d53995272baf1260cwrowe PPGMPAGE pPage;
522c5d883dd6489e5b3583c52502365e09d64382mturk int rc = pgmPhysGetPageWithHintEx(pVM, GCPhys, &pPage, ppRamHint);
522c5d883dd6489e5b3583c52502365e09d64382mturk if ( RT_SUCCESS(rc)
2d7d2ccd828d0424f046b62d57e5551cf8ee293fwrowe && PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) < uState)
50c06405bc48121db2913925549407fd3e79bcedmturk {
2d7d2ccd828d0424f046b62d57e5551cf8ee293fwrowe /* This should normally not be necessary. */
2d7d2ccd828d0424f046b62d57e5551cf8ee293fwrowe PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, uState);
f4b681ff0aa05efee56b42a893911f28c3ad931ewrowe bool fFlushTLBs ;
483ed5892604266e702d65db4d0b2b621c488a09wrowe rc = pgmPoolTrackUpdateGCPhys(pVM, GCPhys, pPage, false /*fFlushPTEs*/, &fFlushTLBs);
483ed5892604266e702d65db4d0b2b621c488a09wrowe if (RT_SUCCESS(rc) && fFlushTLBs)
483ed5892604266e702d65db4d0b2b621c488a09wrowe PGM_INVL_ALL_VCPU_TLBS(pVM);
483ed5892604266e702d65db4d0b2b621c488a09wrowe else
483ed5892604266e702d65db4d0b2b621c488a09wrowe AssertRC(rc);
483ed5892604266e702d65db4d0b2b621c488a09wrowe }
483ed5892604266e702d65db4d0b2b621c488a09wrowe else
483ed5892604266e702d65db4d0b2b621c488a09wrowe AssertRC(rc);
483ed5892604266e702d65db4d0b2b621c488a09wrowe }
483ed5892604266e702d65db4d0b2b621c488a09wrowe}
a8f3504993ae9a401b6fc87c7a00b716b112e3d0wrowe
483ed5892604266e702d65db4d0b2b621c488a09wrowe
483ed5892604266e702d65db4d0b2b621c488a09wrowe/**
483ed5892604266e702d65db4d0b2b621c488a09wrowe * Resets an aliased page.
a8f3504993ae9a401b6fc87c7a00b716b112e3d0wrowe *
fa3f183306fa2ec98249f2afec904d403643a015wrowe * @param pVM The VM.
a8f3504993ae9a401b6fc87c7a00b716b112e3d0wrowe * @param pPage The page.
743aeb835754aadabaec38c00742899668eb9dd1wrowe * @param GCPhysPage The page address in case it comes in handy.
1e83c8de3aa48b316b28057d53995272baf1260cwrowe * @param fDoAccounting Whether to perform accounting. (Only set during
743aeb835754aadabaec38c00742899668eb9dd1wrowe * reset where pgmR3PhysRamReset doesn't have the
a8f3504993ae9a401b6fc87c7a00b716b112e3d0wrowe * handler structure handy.)
91884afe32b87f355822244b8c123ea5b770368fwrowe */
1e83c8de3aa48b316b28057d53995272baf1260cwrowevoid pgmHandlerPhysicalResetAliasedPage(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhysPage, bool fDoAccounting)
ea63537bfba2de6945fb6b4e5ceddf130e3bc0ecwrowe{
c82ccb99a59cb210c31b096a567e393e59d558f3colm Assert(PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO2_ALIAS_MMIO);
1e83c8de3aa48b316b28057d53995272baf1260cwrowe Assert(PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) == PGM_PAGE_HNDL_PHYS_STATE_DISABLED);
1e83c8de3aa48b316b28057d53995272baf1260cwrowe
1e83c8de3aa48b316b28057d53995272baf1260cwrowe /*
c639d9d16cb8ac0ea8163c8c46e34ef9c6810ce2wrowe * Flush any shadow page table references *first*.
1e83c8de3aa48b316b28057d53995272baf1260cwrowe */
1e83c8de3aa48b316b28057d53995272baf1260cwrowe bool fFlushTLBs = false;
91884afe32b87f355822244b8c123ea5b770368fwrowe int rc = pgmPoolTrackUpdateGCPhys(pVM, GCPhysPage, pPage, true /*fFlushPTEs*/, &fFlushTLBs);
29fc13ae8c586a980b0d4e8cba4546b370a951e6wrowe AssertLogRelRCReturnVoid(rc);
1e83c8de3aa48b316b28057d53995272baf1260cwrowe# ifdef IN_RC
1e83c8de3aa48b316b28057d53995272baf1260cwrowe if (fFlushTLBs && rc != VINF_PGM_SYNC_CR3)
29fc13ae8c586a980b0d4e8cba4546b370a951e6wrowe PGM_INVL_VCPU_TLBS(VMMGetCpu0(pVM));
4ed92248676a091e0d73db61773d9059b36d0861stoddard# else
4c35be7cad99269afb697fccc1b9ba85dd2ce702wrowe HMFlushTLBOnAllVCpus(pVM);
b56ce33e3fe5670a4562de222c60ade06fe1bce0wrowe# endif
b56ce33e3fe5670a4562de222c60ade06fe1bce0wrowe
b56ce33e3fe5670a4562de222c60ade06fe1bce0wrowe /*
b56ce33e3fe5670a4562de222c60ade06fe1bce0wrowe * Make it an MMIO/Zero page.
b56ce33e3fe5670a4562de222c60ade06fe1bce0wrowe */
b56ce33e3fe5670a4562de222c60ade06fe1bce0wrowe PGM_PAGE_SET_HCPHYS(pVM, pPage, pVM->pgm.s.HCPhysZeroPg);
b56ce33e3fe5670a4562de222c60ade06fe1bce0wrowe PGM_PAGE_SET_TYPE(pVM, pPage, PGMPAGETYPE_MMIO);
b56ce33e3fe5670a4562de222c60ade06fe1bce0wrowe PGM_PAGE_SET_STATE(pVM, pPage, PGM_PAGE_STATE_ZERO);
b56ce33e3fe5670a4562de222c60ade06fe1bce0wrowe PGM_PAGE_SET_PAGEID(pVM, pPage, NIL_GMM_PAGEID);
c639d9d16cb8ac0ea8163c8c46e34ef9c6810ce2wrowe PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, PGM_PAGE_HNDL_PHYS_STATE_ALL);
c639d9d16cb8ac0ea8163c8c46e34ef9c6810ce2wrowe
c639d9d16cb8ac0ea8163c8c46e34ef9c6810ce2wrowe /* Flush its TLB entry. */
b56ce33e3fe5670a4562de222c60ade06fe1bce0wrowe pgmPhysInvalidatePageMapTLBEntry(pVM, GCPhysPage);
c639d9d16cb8ac0ea8163c8c46e34ef9c6810ce2wrowe
b56ce33e3fe5670a4562de222c60ade06fe1bce0wrowe /*
b56ce33e3fe5670a4562de222c60ade06fe1bce0wrowe * Do accounting for pgmR3PhysRamReset.
b56ce33e3fe5670a4562de222c60ade06fe1bce0wrowe */
b56ce33e3fe5670a4562de222c60ade06fe1bce0wrowe if (fDoAccounting)
b56ce33e3fe5670a4562de222c60ade06fe1bce0wrowe {
b56ce33e3fe5670a4562de222c60ade06fe1bce0wrowe PPGMPHYSHANDLER pHandler = pgmHandlerPhysicalLookup(pVM, GCPhysPage);
b56ce33e3fe5670a4562de222c60ade06fe1bce0wrowe if (RT_LIKELY(pHandler))
b56ce33e3fe5670a4562de222c60ade06fe1bce0wrowe {
945f023c83c2d18bf5145a5b9af48fc3216fbef6wrowe Assert(pHandler->cAliasedPages > 0);
945f023c83c2d18bf5145a5b9af48fc3216fbef6wrowe pHandler->cAliasedPages--;
945f023c83c2d18bf5145a5b9af48fc3216fbef6wrowe }
9cef38b3a87190d0c4dcd5b389573418af9de73cwrowe else
945f023c83c2d18bf5145a5b9af48fc3216fbef6wrowe AssertFailed();
945f023c83c2d18bf5145a5b9af48fc3216fbef6wrowe }
9cef38b3a87190d0c4dcd5b389573418af9de73cwrowe}
945f023c83c2d18bf5145a5b9af48fc3216fbef6wrowe
945f023c83c2d18bf5145a5b9af48fc3216fbef6wrowe
9cef38b3a87190d0c4dcd5b389573418af9de73cwrowe/**
7c11b20dfccedb7381518b3cc3cc9ef9e6731cb1wrowe * Resets ram range flags.
7c11b20dfccedb7381518b3cc3cc9ef9e6731cb1wrowe *
7c11b20dfccedb7381518b3cc3cc9ef9e6731cb1wrowe * @returns VBox status code.
7c11b20dfccedb7381518b3cc3cc9ef9e6731cb1wrowe * @retval VINF_SUCCESS when shadow PTs was successfully updated.
9cef38b3a87190d0c4dcd5b389573418af9de73cwrowe * @param pVM Pointer to the VM.
634c70c6512b0ae61fb1ee130266e6e9af170803wrowe * @param pCur The physical handler.
7c11b20dfccedb7381518b3cc3cc9ef9e6731cb1wrowe *
d7f2b79379c5a3b849bf3d5dacf7180805ecba1fwrowe * @remark We don't start messing with the shadow page tables, as we've
d7f2b79379c5a3b849bf3d5dacf7180805ecba1fwrowe * already got code in Trap0e which deals with out of sync handler
ea0acbc141b3ca2ef21666bd23bfea9af9a758aawrowe * flags (originally conceived for global pages).
d7f2b79379c5a3b849bf3d5dacf7180805ecba1fwrowe */
d7f2b79379c5a3b849bf3d5dacf7180805ecba1fwrowestatic void pgmHandlerPhysicalResetRamFlags(PVM pVM, PPGMPHYSHANDLER pCur)
d7f2b79379c5a3b849bf3d5dacf7180805ecba1fwrowe{
945f023c83c2d18bf5145a5b9af48fc3216fbef6wrowe /*
9cef38b3a87190d0c4dcd5b389573418af9de73cwrowe * Iterate the guest ram pages updating the state.
634c70c6512b0ae61fb1ee130266e6e9af170803wrowe */
743aeb835754aadabaec38c00742899668eb9dd1wrowe RTUINT cPages = pCur->cPages;
945f023c83c2d18bf5145a5b9af48fc3216fbef6wrowe RTGCPHYS GCPhys = pCur->Core.Key;
60f8e9cbbfc2d757c71db17a35acb8566eebc0dawrowe PPGMRAMRANGE pRamHint = NULL;
9cef38b3a87190d0c4dcd5b389573418af9de73cwrowe for (;;)
60f8e9cbbfc2d757c71db17a35acb8566eebc0dawrowe {
60f8e9cbbfc2d757c71db17a35acb8566eebc0dawrowe PPGMPAGE pPage;
945f023c83c2d18bf5145a5b9af48fc3216fbef6wrowe int rc = pgmPhysGetPageWithHintEx(pVM, GCPhys, &pPage, &pRamHint);
945f023c83c2d18bf5145a5b9af48fc3216fbef6wrowe if (RT_SUCCESS(rc))
945f023c83c2d18bf5145a5b9af48fc3216fbef6wrowe {
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe /* Reset MMIO2 for MMIO pages to MMIO, since this aliasing is our business.
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe (We don't flip MMIO to RAM though, that's PGMPhys.cpp's job.) */
14d27a22a8fdb25e6e82d8af853a63bd4c6bd894wrowe if (PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO2_ALIAS_MMIO)
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe {
6bc96ef510ce100bfdeefd80b8f05c010373ed13wrowe Assert(pCur->cAliasedPages > 0);
6bc96ef510ce100bfdeefd80b8f05c010373ed13wrowe pgmHandlerPhysicalResetAliasedPage(pVM, pPage, GCPhys, false /*fDoAccounting*/);
6bc96ef510ce100bfdeefd80b8f05c010373ed13wrowe pCur->cAliasedPages--;
cfab5b5b6dc82c578597b582f76491c96b86eeb7wrowe }
a04a085d201d1620c077ba6ecaa7022b417b1cd5tdonovan AssertMsg(pCur->enmType != PGMPHYSHANDLERTYPE_MMIO || PGM_PAGE_IS_MMIO(pPage), ("%RGp %R[pgmpage]\n", GCPhys, pPage));
721a5708aab94cd3587ecff3c5775c985efb7125wrowe PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, PGM_PAGE_HNDL_PHYS_STATE_NONE);
cfab5b5b6dc82c578597b582f76491c96b86eeb7wrowe }
f71283367c234bf49ddc8ba7b23d3d3829db0d8dmturk else
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe AssertRC(rc);
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe
483ed5892604266e702d65db4d0b2b621c488a09wrowe /* next */
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe if (--cPages == 0)
bc21ce13cec2409c8fdb7122154636b2df97715ajerenkrantz break;
34e753c9dba1e821f54f0d4179f8774f854123eecolm GCPhys += PAGE_SIZE;
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe }
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe pCur->cAliasedPages = 0;
c639d9d16cb8ac0ea8163c8c46e34ef9c6810ce2wrowe pCur->cTmpOffPages = 0;
7c11b20dfccedb7381518b3cc3cc9ef9e6731cb1wrowe
7c11b20dfccedb7381518b3cc3cc9ef9e6731cb1wrowe /*
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe * Check for partial start and end pages.
ac19b3a64a76401bc7e4e378b51c245a7e8516a5mturk */
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe if (pCur->Core.Key & PAGE_OFFSET_MASK)
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe pgmHandlerPhysicalRecalcPageState(pVM, pCur->Core.Key - 1, false /* fAbove */, &pRamHint);
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe if ((pCur->Core.KeyLast & PAGE_OFFSET_MASK) != PAGE_OFFSET_MASK)
7c11b20dfccedb7381518b3cc3cc9ef9e6731cb1wrowe pgmHandlerPhysicalRecalcPageState(pVM, pCur->Core.KeyLast + 1, true /* fAbove */, &pRamHint);
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe}
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe
bf03ef02d5f0f64ee0e91f3c4007154897d4dd34mturk
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe/**
bf03ef02d5f0f64ee0e91f3c4007154897d4dd34mturk * Modify a physical page access handler.
bf03ef02d5f0f64ee0e91f3c4007154897d4dd34mturk *
483ed5892604266e702d65db4d0b2b621c488a09wrowe * Modification can only be done to the range it self, not the type or anything else.
483ed5892604266e702d65db4d0b2b621c488a09wrowe *
483ed5892604266e702d65db4d0b2b621c488a09wrowe * @returns VBox status code.
483ed5892604266e702d65db4d0b2b621c488a09wrowe * For all return codes other than VERR_PGM_HANDLER_NOT_FOUND and VINF_SUCCESS the range is deregistered
ee8892ba26f52316734c59d8002ab349c2e3fdbdcolm * and a new registration must be performed!
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe * @param pVM Pointer to the VM.
7c11b20dfccedb7381518b3cc3cc9ef9e6731cb1wrowe * @param GCPhysCurrent Current location.
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe * @param GCPhys New location.
7c11b20dfccedb7381518b3cc3cc9ef9e6731cb1wrowe * @param GCPhysLast New last location.
0f488df653e7e8cf4ee0006a3138f9474ca1d375wrowe */
7c11b20dfccedb7381518b3cc3cc9ef9e6731cb1wroweVMMDECL(int) PGMHandlerPhysicalModify(PVM pVM, RTGCPHYS GCPhysCurrent, RTGCPHYS GCPhys, RTGCPHYS GCPhysLast)
0f488df653e7e8cf4ee0006a3138f9474ca1d375wrowe{
7c11b20dfccedb7381518b3cc3cc9ef9e6731cb1wrowe /*
c639d9d16cb8ac0ea8163c8c46e34ef9c6810ce2wrowe * Remove it.
483ed5892604266e702d65db4d0b2b621c488a09wrowe */
483ed5892604266e702d65db4d0b2b621c488a09wrowe int rc;
483ed5892604266e702d65db4d0b2b621c488a09wrowe pgmLock(pVM);
483ed5892604266e702d65db4d0b2b621c488a09wrowe PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysRemove(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhysCurrent);
7c11b20dfccedb7381518b3cc3cc9ef9e6731cb1wrowe if (pCur)
7bffd59eadbb9e58f17fd29655fce6509fc1bb36niq {
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe /*
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe * Clear the ram flags. (We're gonna move or free it!)
6a5b8f7bd9abe819babda806a7245a31cd0dd2fbwrowe */
6a5b8f7bd9abe819babda806a7245a31cd0dd2fbwrowe pgmHandlerPhysicalResetRamFlags(pVM, pCur);
6a5b8f7bd9abe819babda806a7245a31cd0dd2fbwrowe const bool fRestoreAsRAM = pCur->pfnHandlerR3
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe && pCur->enmType != PGMPHYSHANDLERTYPE_MMIO; /** @todo this isn't entirely correct. */
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe
c639d9d16cb8ac0ea8163c8c46e34ef9c6810ce2wrowe /*
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe * Validate the new range, modify and reinsert.
483ed5892604266e702d65db4d0b2b621c488a09wrowe */
3e156d3e4514cf57f8ac77e275a68d1c12a3b937wrowe if (GCPhysLast >= GCPhys)
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe {
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe /*
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe * We require the range to be within registered ram.
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe * There is no apparent need to support ranges which cover more than one ram range.
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe */
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe PPGMRAMRANGE pRam = pgmPhysGetRange(pVM, GCPhys);
6a5b8f7bd9abe819babda806a7245a31cd0dd2fbwrowe if ( pRam
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe && GCPhys <= pRam->GCPhysLast
24b0a59507af2a3621f586fa2a2aafc3640aa3d2nd && GCPhysLast >= pRam->GCPhys)
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe {
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe pCur->Core.Key = GCPhys;
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe pCur->Core.KeyLast = GCPhysLast;
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe pCur->cPages = (GCPhysLast - (GCPhys & X86_PTE_PAE_PG_MASK) + 1) >> PAGE_SHIFT;
0e6bee8eb9112f77eb50766e58424afac61104d9wrowe
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe if (RTAvlroGCPhysInsert(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, &pCur->Core))
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe {
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe PGMPHYSHANDLERTYPE enmType = pCur->enmType;
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe RTGCPHYS cb = GCPhysLast - GCPhys + 1;
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe bool fHasHCHandler = !!pCur->pfnHandlerR3;
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe /*
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe * Set ram flags, flush shadow PT entries and finally tell REM about this.
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe */
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe rc = pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs(pVM, pCur, pRam);
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe pgmUnlock(pVM);
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe#ifdef VBOX_WITH_REM
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe# ifndef IN_RING3
a21b3b9d8ebb12fd51fa1d17e44d5644a35a9a5fnd REMNotifyHandlerPhysicalModify(pVM, enmType, GCPhysCurrent, GCPhys, cb,
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe fHasHCHandler, fRestoreAsRAM);
522c5d883dd6489e5b3583c52502365e09d64382mturk# else
522c5d883dd6489e5b3583c52502365e09d64382mturk REMR3NotifyHandlerPhysicalModify(pVM, enmType, GCPhysCurrent, GCPhys, cb,
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe fHasHCHandler, fRestoreAsRAM);
50c06405bc48121db2913925549407fd3e79bcedmturk# endif
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe#endif
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe PGM_INVL_ALL_VCPU_TLBS(pVM);
483ed5892604266e702d65db4d0b2b621c488a09wrowe Log(("PGMHandlerPhysicalModify: GCPhysCurrent=%RGp -> GCPhys=%RGp GCPhysLast=%RGp\n",
483ed5892604266e702d65db4d0b2b621c488a09wrowe GCPhysCurrent, GCPhys, GCPhysLast));
483ed5892604266e702d65db4d0b2b621c488a09wrowe return VINF_SUCCESS;
483ed5892604266e702d65db4d0b2b621c488a09wrowe }
483ed5892604266e702d65db4d0b2b621c488a09wrowe
483ed5892604266e702d65db4d0b2b621c488a09wrowe AssertMsgFailed(("Conflict! GCPhys=%RGp GCPhysLast=%RGp\n", GCPhys, GCPhysLast));
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe rc = VERR_PGM_HANDLER_PHYSICAL_CONFLICT;
483ed5892604266e702d65db4d0b2b621c488a09wrowe }
483ed5892604266e702d65db4d0b2b621c488a09wrowe else
483ed5892604266e702d65db4d0b2b621c488a09wrowe {
752c83c97683b1fb9879ba874593a135155a043cwrowe AssertMsgFailed(("No RAM range for %RGp-%RGp\n", GCPhys, GCPhysLast));
752c83c97683b1fb9879ba874593a135155a043cwrowe rc = VERR_PGM_HANDLER_PHYSICAL_NO_RAM_RANGE;
752c83c97683b1fb9879ba874593a135155a043cwrowe }
752c83c97683b1fb9879ba874593a135155a043cwrowe }
752c83c97683b1fb9879ba874593a135155a043cwrowe else
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe {
752c83c97683b1fb9879ba874593a135155a043cwrowe AssertMsgFailed(("Invalid range %RGp-%RGp\n", GCPhys, GCPhysLast));
ea63537bfba2de6945fb6b4e5ceddf130e3bc0ecwrowe rc = VERR_INVALID_PARAMETER;
c82ccb99a59cb210c31b096a567e393e59d558f3colm }
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe /*
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe * Invalid new location, flush the cache and free it.
c639d9d16cb8ac0ea8163c8c46e34ef9c6810ce2wrowe * We've only gotta notify REM and free the memory.
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe */
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe pgmHandlerPhysicalDeregisterNotifyREM(pVM, pCur);
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe pVM->pgm.s.pLastPhysHandlerR0 = 0;
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe pVM->pgm.s.pLastPhysHandlerR3 = 0;
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe pVM->pgm.s.pLastPhysHandlerRC = 0;
287f1ad541b1b895b2e5c7150d47471713100d1emturk MMHyperFree(pVM, pCur);
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe }
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe else
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe {
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe AssertMsgFailed(("Didn't find range starting at %RGp\n", GCPhysCurrent));
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe rc = VERR_PGM_HANDLER_NOT_FOUND;
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe }
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe
087e59fbe3a245960f2cbc9750181a9aba7a4f24wrowe pgmUnlock(pVM);
18062914633d6aa27c5f07c6ed20e3d169714c89wrowe return rc;
18062914633d6aa27c5f07c6ed20e3d169714c89wrowe}
1462f24d09bed587fcdfb69abf1e858598a06382wrowe
1462f24d09bed587fcdfb69abf1e858598a06382wrowe
bdf8917ac686167be51db99d7cf238fa51f5be02wrowe/**
37e7fdce0a4809a6c4cd3c102fc4668a6659ca95wrowe * Changes the callbacks associated with a physical access handler.
1462f24d09bed587fcdfb69abf1e858598a06382wrowe *
25813a71353f3b45ca1ddda037b395cced603564slive * @returns VBox status code.
424303d026faabb9e9752310911d00fa737b603awrowe * @param pVM Pointer to the VM.
424303d026faabb9e9752310911d00fa737b603awrowe * @param GCPhys Start physical address.
0bfd482e54583b43b826299aa6c9853f703191edwrowe * @param pfnHandlerR3 The R3 handler.
37e7fdce0a4809a6c4cd3c102fc4668a6659ca95wrowe * @param pvUserR3 User argument to the R3 handler.
341fe490659bc00823087e34c84ae13567d9fb8fwrowe * @param pfnHandlerR0 The R0 handler.
37e7fdce0a4809a6c4cd3c102fc4668a6659ca95wrowe * @param pvUserR0 User argument to the R0 handler.
37e7fdce0a4809a6c4cd3c102fc4668a6659ca95wrowe * @param pfnHandlerRC The RC handler.
37e7fdce0a4809a6c4cd3c102fc4668a6659ca95wrowe * @param pvUserRC User argument to the RC handler. Values larger or
1462f24d09bed587fcdfb69abf1e858598a06382wrowe * equal to 0x10000 will be relocated automatically.
1462f24d09bed587fcdfb69abf1e858598a06382wrowe * @param pszDesc Pointer to description string. This must not be freed.
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe */
0bcc003d275c6b0a9060d43be89762b218cbc2c7wroweVMMDECL(int) PGMHandlerPhysicalChangeCallbacks(PVM pVM, RTGCPHYS GCPhys,
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe R3PTRTYPE(PFNPGMR3PHYSHANDLER) pfnHandlerR3, RTR3PTR pvUserR3,
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe R0PTRTYPE(PFNPGMR0PHYSHANDLER) pfnHandlerR0, RTR0PTR pvUserR0,
fdc76d3c3f3fea82ba0f1d8af646f8ea5e4734a2wrowe RCPTRTYPE(PFNPGMRCPHYSHANDLER) pfnHandlerRC, RTRCPTR pvUserRC,
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe R3PTRTYPE(const char *) pszDesc)
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe{
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe /*
875f57a863e8f7522f78c370e25db2a552231ca8wrowe * Get the handler.
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe */
a8f3504993ae9a401b6fc87c7a00b716b112e3d0wrowe int rc = VINF_SUCCESS;
752c83c97683b1fb9879ba874593a135155a043cwrowe pgmLock(pVM);
875f57a863e8f7522f78c370e25db2a552231ca8wrowe PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
60f8e9cbbfc2d757c71db17a35acb8566eebc0dawrowe if (pCur)
60f8e9cbbfc2d757c71db17a35acb8566eebc0dawrowe {
60f8e9cbbfc2d757c71db17a35acb8566eebc0dawrowe /*
60f8e9cbbfc2d757c71db17a35acb8566eebc0dawrowe * Change callbacks.
60f8e9cbbfc2d757c71db17a35acb8566eebc0dawrowe */
60f8e9cbbfc2d757c71db17a35acb8566eebc0dawrowe pCur->pfnHandlerR3 = pfnHandlerR3;
60f8e9cbbfc2d757c71db17a35acb8566eebc0dawrowe pCur->pvUserR3 = pvUserR3;
f99d4fa2605925f385a184ba3789be3423690533wrowe pCur->pfnHandlerR0 = pfnHandlerR0;
f99d4fa2605925f385a184ba3789be3423690533wrowe pCur->pvUserR0 = pvUserR0;
25b0d23db56d263195cb27b77ee4c06a4bac92a3wrowe pCur->pfnHandlerRC = pfnHandlerRC;
60f8e9cbbfc2d757c71db17a35acb8566eebc0dawrowe pCur->pvUserRC = pvUserRC;
60f8e9cbbfc2d757c71db17a35acb8566eebc0dawrowe pCur->pszDesc = pszDesc;
60f8e9cbbfc2d757c71db17a35acb8566eebc0dawrowe }
60f8e9cbbfc2d757c71db17a35acb8566eebc0dawrowe else
60f8e9cbbfc2d757c71db17a35acb8566eebc0dawrowe {
60f8e9cbbfc2d757c71db17a35acb8566eebc0dawrowe AssertMsgFailed(("Didn't find range starting at %RGp\n", GCPhys));
f2f6daffb4236c6781e779e57561581c92a1f539wrowe rc = VERR_PGM_HANDLER_NOT_FOUND;
19725e678f8b916b0952a002356d2098301e9727wrowe }
032eeda9f618fa26f635c9e8dfd854c17e76262fwrowe
19725e678f8b916b0952a002356d2098301e9727wrowe pgmUnlock(pVM);
19725e678f8b916b0952a002356d2098301e9727wrowe return rc;
032eeda9f618fa26f635c9e8dfd854c17e76262fwrowe}
f1b8465dec39c934d4bef4a2366139ffdd021851wrowe
f1b8465dec39c934d4bef4a2366139ffdd021851wrowe
19725e678f8b916b0952a002356d2098301e9727wrowe/**
19725e678f8b916b0952a002356d2098301e9727wrowe * Splits a physical access handler in two.
19725e678f8b916b0952a002356d2098301e9727wrowe *
823627d210d6c8bf02aec333587428584b29b6e2wrowe * @returns VBox status code.
823627d210d6c8bf02aec333587428584b29b6e2wrowe * @param pVM Pointer to the VM.
823627d210d6c8bf02aec333587428584b29b6e2wrowe * @param GCPhys Start physical address of the handler.
19725e678f8b916b0952a002356d2098301e9727wrowe * @param GCPhysSplit The split address.
75202015bdb6602aaea6d187db3e2a922dd2526ewrowe */
19725e678f8b916b0952a002356d2098301e9727wroweVMMDECL(int) PGMHandlerPhysicalSplit(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysSplit)
f2f6daffb4236c6781e779e57561581c92a1f539wrowe{
f2f6daffb4236c6781e779e57561581c92a1f539wrowe AssertReturn(GCPhys < GCPhysSplit, VERR_INVALID_PARAMETER);
f2f6daffb4236c6781e779e57561581c92a1f539wrowe
19725e678f8b916b0952a002356d2098301e9727wrowe /*
032eeda9f618fa26f635c9e8dfd854c17e76262fwrowe * Do the allocation without owning the lock.
19725e678f8b916b0952a002356d2098301e9727wrowe */
032eeda9f618fa26f635c9e8dfd854c17e76262fwrowe PPGMPHYSHANDLER pNew;
032eeda9f618fa26f635c9e8dfd854c17e76262fwrowe int rc = MMHyperAlloc(pVM, sizeof(*pNew), 0, MM_TAG_PGM_HANDLERS, (void **)&pNew);
19725e678f8b916b0952a002356d2098301e9727wrowe if (RT_FAILURE(rc))
25b0d23db56d263195cb27b77ee4c06a4bac92a3wrowe return rc;
032eeda9f618fa26f635c9e8dfd854c17e76262fwrowe
032eeda9f618fa26f635c9e8dfd854c17e76262fwrowe /*
032eeda9f618fa26f635c9e8dfd854c17e76262fwrowe * Get the handler.
032eeda9f618fa26f635c9e8dfd854c17e76262fwrowe */
032eeda9f618fa26f635c9e8dfd854c17e76262fwrowe pgmLock(pVM);
032eeda9f618fa26f635c9e8dfd854c17e76262fwrowe PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
19725e678f8b916b0952a002356d2098301e9727wrowe if (RT_LIKELY(pCur))
f1b8465dec39c934d4bef4a2366139ffdd021851wrowe {
032eeda9f618fa26f635c9e8dfd854c17e76262fwrowe if (RT_LIKELY(GCPhysSplit <= pCur->Core.KeyLast))
60f8e9cbbfc2d757c71db17a35acb8566eebc0dawrowe {
60f8e9cbbfc2d757c71db17a35acb8566eebc0dawrowe /*
60f8e9cbbfc2d757c71db17a35acb8566eebc0dawrowe * Create new handler node for the 2nd half.
19725e678f8b916b0952a002356d2098301e9727wrowe */
823627d210d6c8bf02aec333587428584b29b6e2wrowe *pNew = *pCur;
823627d210d6c8bf02aec333587428584b29b6e2wrowe pNew->Core.Key = GCPhysSplit;
823627d210d6c8bf02aec333587428584b29b6e2wrowe pNew->cPages = (pNew->Core.KeyLast - (pNew->Core.Key & X86_PTE_PAE_PG_MASK) + PAGE_SIZE) >> PAGE_SHIFT;
19725e678f8b916b0952a002356d2098301e9727wrowe
f1b8465dec39c934d4bef4a2366139ffdd021851wrowe pCur->Core.KeyLast = GCPhysSplit - 1;
f1b8465dec39c934d4bef4a2366139ffdd021851wrowe pCur->cPages = (pCur->Core.KeyLast - (pCur->Core.Key & X86_PTE_PAE_PG_MASK) + PAGE_SIZE) >> PAGE_SHIFT;
f1b8465dec39c934d4bef4a2366139ffdd021851wrowe
60f8e9cbbfc2d757c71db17a35acb8566eebc0dawrowe if (RT_LIKELY(RTAvlroGCPhysInsert(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, &pNew->Core)))
60f8e9cbbfc2d757c71db17a35acb8566eebc0dawrowe {
60f8e9cbbfc2d757c71db17a35acb8566eebc0dawrowe LogFlow(("PGMHandlerPhysicalSplit: %RGp-%RGp and %RGp-%RGp\n",
19725e678f8b916b0952a002356d2098301e9727wrowe pCur->Core.Key, pCur->Core.KeyLast, pNew->Core.Key, pNew->Core.KeyLast));
19725e678f8b916b0952a002356d2098301e9727wrowe pgmUnlock(pVM);
746e483939cf8224eb881df41df75ef524d18223wrowe return VINF_SUCCESS;
19725e678f8b916b0952a002356d2098301e9727wrowe }
f2f6daffb4236c6781e779e57561581c92a1f539wrowe AssertMsgFailed(("whu?\n"));
f2f6daffb4236c6781e779e57561581c92a1f539wrowe rc = VERR_PGM_PHYS_HANDLER_IPE;
60f8e9cbbfc2d757c71db17a35acb8566eebc0dawrowe }
60f8e9cbbfc2d757c71db17a35acb8566eebc0dawrowe else
875f57a863e8f7522f78c370e25db2a552231ca8wrowe {
60f8e9cbbfc2d757c71db17a35acb8566eebc0dawrowe AssertMsgFailed(("outside range: %RGp-%RGp split %RGp\n", pCur->Core.Key, pCur->Core.KeyLast, GCPhysSplit));
60f8e9cbbfc2d757c71db17a35acb8566eebc0dawrowe rc = VERR_INVALID_PARAMETER;
60f8e9cbbfc2d757c71db17a35acb8566eebc0dawrowe }
60f8e9cbbfc2d757c71db17a35acb8566eebc0dawrowe }
60f8e9cbbfc2d757c71db17a35acb8566eebc0dawrowe else
60f8e9cbbfc2d757c71db17a35acb8566eebc0dawrowe {
f99d4fa2605925f385a184ba3789be3423690533wrowe AssertMsgFailed(("Didn't find range starting at %RGp\n", GCPhys));
f99d4fa2605925f385a184ba3789be3423690533wrowe rc = VERR_PGM_HANDLER_NOT_FOUND;
72347cd608351452f99d5f4411d3e0c089d0293awrowe }
f99d4fa2605925f385a184ba3789be3423690533wrowe pgmUnlock(pVM);
f99d4fa2605925f385a184ba3789be3423690533wrowe MMHyperFree(pVM, pNew);
f99d4fa2605925f385a184ba3789be3423690533wrowe return rc;
f99d4fa2605925f385a184ba3789be3423690533wrowe}
8dda6d649a6e3be9888cd49f1d8c703d3740a06fwrowe
8dda6d649a6e3be9888cd49f1d8c703d3740a06fwrowe
8dda6d649a6e3be9888cd49f1d8c703d3740a06fwrowe/**
72347cd608351452f99d5f4411d3e0c089d0293awrowe * Joins up two adjacent physical access handlers which has the same callbacks.
f99d4fa2605925f385a184ba3789be3423690533wrowe *
f99d4fa2605925f385a184ba3789be3423690533wrowe * @returns VBox status code.
60f8e9cbbfc2d757c71db17a35acb8566eebc0dawrowe * @param pVM Pointer to the VM.
d0b14e6c6aabb4ed84bc056df6caeae146973c21wrowe * @param GCPhys1 Start physical address of the first handler.
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe * @param GCPhys2 Start physical address of the second handler.
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe */
0bcc003d275c6b0a9060d43be89762b218cbc2c7wroweVMMDECL(int) PGMHandlerPhysicalJoin(PVM pVM, RTGCPHYS GCPhys1, RTGCPHYS GCPhys2)
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe{
a901f6f8425b207639fe2d1e22b102d96f8e64ffwrowe /*
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe * Get the handlers.
752c83c97683b1fb9879ba874593a135155a043cwrowe */
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe int rc;
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe pgmLock(pVM);
a901f6f8425b207639fe2d1e22b102d96f8e64ffwrowe PPGMPHYSHANDLER pCur1 = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys1);
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe if (RT_LIKELY(pCur1))
bfd8c94a05d51f9af59fc84ed65b1336acdf95a8nd {
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe PPGMPHYSHANDLER pCur2 = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys2);
59f8d8a98364ee033d23dbb8e459858946aaecb3wrowe if (RT_LIKELY(pCur2))
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe {
fdc76d3c3f3fea82ba0f1d8af646f8ea5e4734a2wrowe /*
f99d4fa2605925f385a184ba3789be3423690533wrowe * Make sure that they are adjacent, and that they've got the same callbacks.
c2e5fcbd499ae7b5093d4877ff42e6c5ec74352bwrowe */
1e83c8de3aa48b316b28057d53995272baf1260cwrowe if (RT_LIKELY(pCur1->Core.KeyLast + 1 == pCur2->Core.Key))
1e83c8de3aa48b316b28057d53995272baf1260cwrowe {
72347cd608351452f99d5f4411d3e0c089d0293awrowe if (RT_LIKELY( pCur1->pfnHandlerRC == pCur2->pfnHandlerRC
1e83c8de3aa48b316b28057d53995272baf1260cwrowe && pCur1->pfnHandlerR0 == pCur2->pfnHandlerR0
72347cd608351452f99d5f4411d3e0c089d0293awrowe && pCur1->pfnHandlerR3 == pCur2->pfnHandlerR3))
72347cd608351452f99d5f4411d3e0c089d0293awrowe {
72347cd608351452f99d5f4411d3e0c089d0293awrowe PPGMPHYSHANDLER pCur3 = (PPGMPHYSHANDLER)RTAvlroGCPhysRemove(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys2);
72347cd608351452f99d5f4411d3e0c089d0293awrowe if (RT_LIKELY(pCur3 == pCur2))
1e83c8de3aa48b316b28057d53995272baf1260cwrowe {
c2e5fcbd499ae7b5093d4877ff42e6c5ec74352bwrowe pCur1->Core.KeyLast = pCur2->Core.KeyLast;
c2e5fcbd499ae7b5093d4877ff42e6c5ec74352bwrowe pCur1->cPages = (pCur1->Core.KeyLast - (pCur1->Core.Key & X86_PTE_PAE_PG_MASK) + PAGE_SIZE) >> PAGE_SHIFT;
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe LogFlow(("PGMHandlerPhysicalJoin: %RGp-%RGp %RGp-%RGp\n",
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe pCur1->Core.Key, pCur1->Core.KeyLast, pCur2->Core.Key, pCur2->Core.KeyLast));
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe pVM->pgm.s.pLastPhysHandlerR0 = 0;
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe pVM->pgm.s.pLastPhysHandlerR3 = 0;
9fb3226780b297bcc320cb19cc3ec23194fac8e1wrowe pVM->pgm.s.pLastPhysHandlerRC = 0;
9fb3226780b297bcc320cb19cc3ec23194fac8e1wrowe MMHyperFree(pVM, pCur2);
9fb3226780b297bcc320cb19cc3ec23194fac8e1wrowe pgmUnlock(pVM);
9fb3226780b297bcc320cb19cc3ec23194fac8e1wrowe return VINF_SUCCESS;
9fb3226780b297bcc320cb19cc3ec23194fac8e1wrowe }
9fb3226780b297bcc320cb19cc3ec23194fac8e1wrowe
9fb3226780b297bcc320cb19cc3ec23194fac8e1wrowe Assert(pCur3 == pCur2);
9fb3226780b297bcc320cb19cc3ec23194fac8e1wrowe rc = VERR_PGM_PHYS_HANDLER_IPE;
9fb3226780b297bcc320cb19cc3ec23194fac8e1wrowe }
9fb3226780b297bcc320cb19cc3ec23194fac8e1wrowe else
9fb3226780b297bcc320cb19cc3ec23194fac8e1wrowe {
9fb3226780b297bcc320cb19cc3ec23194fac8e1wrowe AssertMsgFailed(("mismatching handlers\n"));
9fb3226780b297bcc320cb19cc3ec23194fac8e1wrowe rc = VERR_ACCESS_DENIED;
9fb3226780b297bcc320cb19cc3ec23194fac8e1wrowe }
edf585d6f44e9019b3ab45be869d7d2ad23e5daewrowe }
edf585d6f44e9019b3ab45be869d7d2ad23e5daewrowe else
edf585d6f44e9019b3ab45be869d7d2ad23e5daewrowe {
edf585d6f44e9019b3ab45be869d7d2ad23e5daewrowe AssertMsgFailed(("not adjacent: %RGp-%RGp %RGp-%RGp\n",
9fb3226780b297bcc320cb19cc3ec23194fac8e1wrowe pCur1->Core.Key, pCur1->Core.KeyLast, pCur2->Core.Key, pCur2->Core.KeyLast));
a19c94edefc000de60a6925b4ca15637e2f785f1wrowe rc = VERR_INVALID_PARAMETER;
a19c94edefc000de60a6925b4ca15637e2f785f1wrowe }
a19c94edefc000de60a6925b4ca15637e2f785f1wrowe }
a19c94edefc000de60a6925b4ca15637e2f785f1wrowe else
59f8d8a98364ee033d23dbb8e459858946aaecb3wrowe {
a19c94edefc000de60a6925b4ca15637e2f785f1wrowe AssertMsgFailed(("Didn't find range starting at %RGp\n", GCPhys2));
6bc96ef510ce100bfdeefd80b8f05c010373ed13wrowe rc = VERR_PGM_HANDLER_NOT_FOUND;
6bc96ef510ce100bfdeefd80b8f05c010373ed13wrowe }
6bc96ef510ce100bfdeefd80b8f05c010373ed13wrowe }
6bc96ef510ce100bfdeefd80b8f05c010373ed13wrowe else
6bc96ef510ce100bfdeefd80b8f05c010373ed13wrowe {
6bc96ef510ce100bfdeefd80b8f05c010373ed13wrowe AssertMsgFailed(("Didn't find range starting at %RGp\n", GCPhys1));
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe rc = VERR_PGM_HANDLER_NOT_FOUND;
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe }
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe pgmUnlock(pVM);
0bcc003d275c6b0a9060d43be89762b218cbc2c7wrowe return rc;
c4101f4a8c23dce65b76e5c41b0fca7fadeb2941wrowe
424303d026faabb9e9752310911d00fa737b603awrowe}
424303d026faabb9e9752310911d00fa737b603awrowe
424303d026faabb9e9752310911d00fa737b603awrowe
c4101f4a8c23dce65b76e5c41b0fca7fadeb2941wrowe/**
f99d4fa2605925f385a184ba3789be3423690533wrowe * Resets any modifications to individual pages in a physical page access
1f0a9798d1c29e1e0cbdb339a0262ba287a29ed4wrowe * handler region.
1e83c8de3aa48b316b28057d53995272baf1260cwrowe *
525973b478c06cd0e8c457ade5c378dcae7485d2wrowe * This is used in pair with PGMHandlerPhysicalPageTempOff(),
0b54189e53778165cf497165f6b04af200fab8cawrowe * PGMHandlerPhysicalPageAlias() or PGMHandlerPhysicalPageAliasHC().
1e83c8de3aa48b316b28057d53995272baf1260cwrowe *
22390e3a41c29735e7c138ab3ea50b876b82b0e6wrowe * @returns VBox status code.
22390e3a41c29735e7c138ab3ea50b876b82b0e6wrowe * @param pVM Pointer to the VM
e3c59608a643aac0e86a0e8cf2d62f8ef655337fwrowe * @param GCPhys The start address of the handler regions, i.e. what you
e3c59608a643aac0e86a0e8cf2d62f8ef655337fwrowe * passed to PGMR3HandlerPhysicalRegister(),
* PGMHandlerPhysicalRegisterEx() or
* PGMHandlerPhysicalModify().
*/
VMMDECL(int) PGMHandlerPhysicalReset(PVM pVM, RTGCPHYS GCPhys)
{
LogFlow(("PGMHandlerPhysicalReset GCPhys=%RGp\n", GCPhys));
pgmLock(pVM);
/*
* Find the handler.
*/
int rc;
PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
if (RT_LIKELY(pCur))
{
/*
* Validate type.
*/
switch (pCur->enmType)
{
case PGMPHYSHANDLERTYPE_PHYSICAL_WRITE:
case PGMPHYSHANDLERTYPE_PHYSICAL_ALL:
case PGMPHYSHANDLERTYPE_MMIO: /* NOTE: Only use when clearing MMIO ranges with aliased MMIO2 pages! */
{
STAM_COUNTER_INC(&pVM->pgm.s.CTX_SUFF(pStats)->CTX_MID_Z(Stat,PhysHandlerReset)); /**@Todo move out of switch */
PPGMRAMRANGE pRam = pgmPhysGetRange(pVM, GCPhys);
Assert(pRam);
Assert(pRam->GCPhys <= pCur->Core.Key);
Assert(pRam->GCPhysLast >= pCur->Core.KeyLast);
if (pCur->enmType == PGMPHYSHANDLERTYPE_MMIO)
{
/*
* Reset all the PGMPAGETYPE_MMIO2_ALIAS_MMIO pages first and that's it.
* This could probably be optimized a bit wrt to flushing, but I'm too lazy
* to do that now...
*/
if (pCur->cAliasedPages)
{
PPGMPAGE pPage = &pRam->aPages[(pCur->Core.Key - pRam->GCPhys) >> PAGE_SHIFT];
uint32_t cLeft = pCur->cPages;
while (cLeft-- > 0)
{
if (PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO2_ALIAS_MMIO)
{
Assert(pCur->cAliasedPages > 0);
pgmHandlerPhysicalResetAliasedPage(pVM, pPage, pRam->GCPhys + ((RTGCPHYS)cLeft << PAGE_SHIFT),
false /*fDoAccounting*/);
--pCur->cAliasedPages;
#ifndef VBOX_STRICT
if (pCur->cAliasedPages == 0)
break;
#endif
}
Assert(PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO);
pPage++;
}
Assert(pCur->cAliasedPages == 0);
}
}
else if (pCur->cTmpOffPages > 0)
{
/*
* Set the flags and flush shadow PT entries.
*/
rc = pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs(pVM, pCur, pRam);
}
pCur->cAliasedPages = 0;
pCur->cTmpOffPages = 0;
rc = VINF_SUCCESS;
break;
}
/*
* Invalid.
*/
default:
AssertMsgFailed(("Invalid type %d! Corruption!\n", pCur->enmType));
rc = VERR_PGM_PHYS_HANDLER_IPE;
break;
}
}
else
{
AssertMsgFailed(("Didn't find MMIO Range starting at %#x\n", GCPhys));
rc = VERR_PGM_HANDLER_NOT_FOUND;
}
pgmUnlock(pVM);
return rc;
}
/**
* Temporarily turns off the access monitoring of a page within a monitored
* physical write/all page access handler region.
*
* Use this when no further \#PFs are required for that page. Be aware that
* a page directory sync might reset the flags, and turn on access monitoring
* for the page.
*
* The caller must do required page table modifications.
*
* @returns VBox status code.
* @param pVM Pointer to the VM
* @param GCPhys The start address of the access handler. This
* must be a fully page aligned range or we risk
* messing up other handlers installed for the
* start and end pages.
* @param GCPhysPage The physical address of the page to turn off
* access monitoring for.
*/
VMMDECL(int) PGMHandlerPhysicalPageTempOff(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysPage)
{
LogFlow(("PGMHandlerPhysicalPageTempOff GCPhysPage=%RGp\n", GCPhysPage));
pgmLock(pVM);
/*
* Validate the range.
*/
PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
if (RT_LIKELY(pCur))
{
if (RT_LIKELY( GCPhysPage >= pCur->Core.Key
&& GCPhysPage <= pCur->Core.KeyLast))
{
Assert(!(pCur->Core.Key & PAGE_OFFSET_MASK));
Assert((pCur->Core.KeyLast & PAGE_OFFSET_MASK) == PAGE_OFFSET_MASK);
AssertReturnStmt( pCur->enmType == PGMPHYSHANDLERTYPE_PHYSICAL_WRITE
|| pCur->enmType == PGMPHYSHANDLERTYPE_PHYSICAL_ALL,
pgmUnlock(pVM), VERR_ACCESS_DENIED);
/*
* Change the page status.
*/
PPGMPAGE pPage;
int rc = pgmPhysGetPageEx(pVM, GCPhysPage, &pPage);
AssertReturnStmt(RT_SUCCESS_NP(rc), pgmUnlock(pVM), rc);
if (PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) != PGM_PAGE_HNDL_PHYS_STATE_DISABLED)
{
PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, PGM_PAGE_HNDL_PHYS_STATE_DISABLED);
pCur->cTmpOffPages++;
}
pgmUnlock(pVM);
return VINF_SUCCESS;
}
pgmUnlock(pVM);
AssertMsgFailed(("The page %#x is outside the range %#x-%#x\n",
GCPhysPage, pCur->Core.Key, pCur->Core.KeyLast));
return VERR_INVALID_PARAMETER;
}
pgmUnlock(pVM);
AssertMsgFailed(("Specified physical handler start address %#x is invalid.\n", GCPhys));
return VERR_PGM_HANDLER_NOT_FOUND;
}
/**
* Replaces an MMIO page with an MMIO2 page.
*
* This is a worker for IOMMMIOMapMMIO2Page that works in a similar way to
* PGMHandlerPhysicalPageTempOff but for an MMIO page. Since an MMIO page has no
* backing, the caller must provide a replacement page. For various reasons the
* replacement page must be an MMIO2 page.
*
* The caller must do required page table modifications. You can get away
* without making any modifications since it's an MMIO page, the cost is an extra
* \#PF which will the resync the page.
*
* Call PGMHandlerPhysicalReset() to restore the MMIO page.
*
* The caller may still get handler callback even after this call and must be
* able to deal correctly with such calls. The reason for these callbacks are
* either that we're executing in the recompiler (which doesn't know about this
* arrangement) or that we've been restored from saved state (where we won't
* save the change).
*
* @returns VBox status code.
* @param pVM Pointer to the VM.
* @param GCPhys The start address of the access handler. This
* must be a fully page aligned range or we risk
* messing up other handlers installed for the
* start and end pages.
* @param GCPhysPage The physical address of the page to turn off
* access monitoring for.
* @param GCPhysPageRemap The physical address of the MMIO2 page that
* serves as backing memory.
*
* @remark May cause a page pool flush if used on a page that is already
* aliased.
*
* @note This trick does only work reliably if the two pages are never ever
* mapped in the same page table. If they are the page pool code will
* be confused should either of them be flushed. See the special case
* of zero page aliasing mentioned in #3170.
*
*/
VMMDECL(int) PGMHandlerPhysicalPageAlias(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysPage, RTGCPHYS GCPhysPageRemap)
{
/// Assert(!IOMIsLockOwner(pVM)); /* We mustn't own any other locks when calling this */
pgmLock(pVM);
/*
* Lookup and validate the range.
*/
PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
if (RT_LIKELY(pCur))
{
if (RT_LIKELY( GCPhysPage >= pCur->Core.Key
&& GCPhysPage <= pCur->Core.KeyLast))
{
AssertReturnStmt(pCur->enmType == PGMPHYSHANDLERTYPE_MMIO, pgmUnlock(pVM), VERR_ACCESS_DENIED);
AssertReturnStmt(!(pCur->Core.Key & PAGE_OFFSET_MASK), pgmUnlock(pVM), VERR_INVALID_PARAMETER);
AssertReturnStmt((pCur->Core.KeyLast & PAGE_OFFSET_MASK) == PAGE_OFFSET_MASK, pgmUnlock(pVM), VERR_INVALID_PARAMETER);
/*
* Get and validate the two pages.
*/
PPGMPAGE pPageRemap;
int rc = pgmPhysGetPageEx(pVM, GCPhysPageRemap, &pPageRemap);
AssertReturnStmt(RT_SUCCESS_NP(rc), pgmUnlock(pVM), rc);
AssertMsgReturnStmt(PGM_PAGE_GET_TYPE(pPageRemap) == PGMPAGETYPE_MMIO2,
("GCPhysPageRemap=%RGp %R[pgmpage]\n", GCPhysPageRemap, pPageRemap),
pgmUnlock(pVM), VERR_PGM_PHYS_NOT_MMIO2);
PPGMPAGE pPage;
rc = pgmPhysGetPageEx(pVM, GCPhysPage, &pPage);
AssertReturnStmt(RT_SUCCESS_NP(rc), pgmUnlock(pVM), rc);
if (PGM_PAGE_GET_TYPE(pPage) != PGMPAGETYPE_MMIO)
{
AssertMsgReturn(PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO2_ALIAS_MMIO,
("GCPhysPage=%RGp %R[pgmpage]\n", GCPhysPage, pPage),
VERR_PGM_PHYS_NOT_MMIO2);
if (PGM_PAGE_GET_HCPHYS(pPage) == PGM_PAGE_GET_HCPHYS(pPageRemap))
{
pgmUnlock(pVM);
return VINF_PGM_HANDLER_ALREADY_ALIASED;
}
/*
* The page is already mapped as some other page, reset it
* to an MMIO/ZERO page before doing the new mapping.
*/
Log(("PGMHandlerPhysicalPageAlias: GCPhysPage=%RGp (%R[pgmpage]; %RHp -> %RHp\n",
GCPhysPage, pPage, PGM_PAGE_GET_HCPHYS(pPage), PGM_PAGE_GET_HCPHYS(pPageRemap)));
pgmHandlerPhysicalResetAliasedPage(pVM, pPage, GCPhysPage, false /*fDoAccounting*/);
pCur->cAliasedPages--;
}
Assert(PGM_PAGE_IS_ZERO(pPage));
/*
* Do the actual remapping here.
* This page now serves as an alias for the backing memory specified.
*/
LogFlow(("PGMHandlerPhysicalPageAlias: %RGp (%R[pgmpage]) alias for %RGp (%R[pgmpage])\n",
GCPhysPage, pPage, GCPhysPageRemap, pPageRemap ));
PGM_PAGE_SET_HCPHYS(pVM, pPage, PGM_PAGE_GET_HCPHYS(pPageRemap));
PGM_PAGE_SET_TYPE(pVM, pPage, PGMPAGETYPE_MMIO2_ALIAS_MMIO);
PGM_PAGE_SET_STATE(pVM, pPage, PGM_PAGE_STATE_ALLOCATED);
PGM_PAGE_SET_PAGEID(pVM, pPage, PGM_PAGE_GET_PAGEID(pPageRemap));
PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, PGM_PAGE_HNDL_PHYS_STATE_DISABLED);
pCur->cAliasedPages++;
Assert(pCur->cAliasedPages <= pCur->cPages);
/* Flush its TLB entry. */
pgmPhysInvalidatePageMapTLBEntry(pVM, GCPhysPage);
LogFlow(("PGMHandlerPhysicalPageAlias: => %R[pgmpage]\n", pPage));
pgmUnlock(pVM);
return VINF_SUCCESS;
}
pgmUnlock(pVM);
AssertMsgFailed(("The page %#x is outside the range %#x-%#x\n",
GCPhysPage, pCur->Core.Key, pCur->Core.KeyLast));
return VERR_INVALID_PARAMETER;
}
pgmUnlock(pVM);
AssertMsgFailed(("Specified physical handler start address %#x is invalid.\n", GCPhys));
return VERR_PGM_HANDLER_NOT_FOUND;
}
/**
* Replaces an MMIO page with an arbitrary HC page.
*
* This is a worker for IOMMMIOMapMMIO2Page that works in a similar way to
* PGMHandlerPhysicalPageTempOff but for an MMIO page. Since an MMIO page has no
* backing, the caller must provide a replacement page. For various reasons the
* replacement page must be an MMIO2 page.
*
* The caller must do required page table modifications. You can get away
* without making any modifications since it's an MMIO page, the cost is an extra
* \#PF which will the resync the page.
*
* Call PGMHandlerPhysicalReset() to restore the MMIO page.
*
* The caller may still get handler callback even after this call and must be
* able to deal correctly with such calls. The reason for these callbacks are
* either that we're executing in the recompiler (which doesn't know about this
* arrangement) or that we've been restored from saved state (where we won't
* save the change).
*
* @returns VBox status code.
* @param pVM Pointer to the VM.
* @param GCPhys The start address of the access handler. This
* must be a fully page aligned range or we risk
* messing up other handlers installed for the
* start and end pages.
* @param GCPhysPage The physical address of the page to turn off
* access monitoring for.
* @param HCPhysPageRemap The physical address of the HC page that
* serves as backing memory.
*
* @remark May cause a page pool flush if used on a page that is already
* aliased.
*/
VMMDECL(int) PGMHandlerPhysicalPageAliasHC(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysPage, RTHCPHYS HCPhysPageRemap)
{
/// Assert(!IOMIsLockOwner(pVM)); /* We mustn't own any other locks when calling this */
/*
* Lookup and validate the range.
*/
pgmLock(pVM);
PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
if (RT_LIKELY(pCur))
{
if (RT_LIKELY( GCPhysPage >= pCur->Core.Key
&& GCPhysPage <= pCur->Core.KeyLast))
{
AssertReturnStmt(pCur->enmType == PGMPHYSHANDLERTYPE_MMIO, pgmUnlock(pVM), VERR_ACCESS_DENIED);
AssertReturnStmt(!(pCur->Core.Key & PAGE_OFFSET_MASK), pgmUnlock(pVM), VERR_INVALID_PARAMETER);
AssertReturnStmt((pCur->Core.KeyLast & PAGE_OFFSET_MASK) == PAGE_OFFSET_MASK, pgmUnlock(pVM), VERR_INVALID_PARAMETER);
/*
* Get and validate the pages.
*/
PPGMPAGE pPage;
int rc = pgmPhysGetPageEx(pVM, GCPhysPage, &pPage);
AssertReturnStmt(RT_SUCCESS_NP(rc), pgmUnlock(pVM), rc);
if (PGM_PAGE_GET_TYPE(pPage) != PGMPAGETYPE_MMIO)
{
pgmUnlock(pVM);
AssertMsgReturn(PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO2_ALIAS_MMIO,
("GCPhysPage=%RGp %R[pgmpage]\n", GCPhysPage, pPage),
VERR_PGM_PHYS_NOT_MMIO2);
return VINF_PGM_HANDLER_ALREADY_ALIASED;
}
Assert(PGM_PAGE_IS_ZERO(pPage));
/*
* Do the actual remapping here.
* This page now serves as an alias for the backing memory specified.
*/
LogFlow(("PGMHandlerPhysicalPageAlias: %RGp (%R[pgmpage]) alias for %RHp\n",
GCPhysPage, pPage, HCPhysPageRemap));
PGM_PAGE_SET_HCPHYS(pVM, pPage, HCPhysPageRemap);
PGM_PAGE_SET_TYPE(pVM, pPage, PGMPAGETYPE_MMIO2_ALIAS_MMIO);
PGM_PAGE_SET_STATE(pVM, pPage, PGM_PAGE_STATE_ALLOCATED);
/** @todo hack alert
* This needs to be done properly. Currently we get away with it as the recompiler directly calls
* IOM read and write functions. Access through PGMPhysRead/Write will crash the process.
*/
PGM_PAGE_SET_PAGEID(pVM, pPage, NIL_GMM_PAGEID);
PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, PGM_PAGE_HNDL_PHYS_STATE_DISABLED);
pCur->cAliasedPages++;
Assert(pCur->cAliasedPages <= pCur->cPages);
/* Flush its TLB entry. */
pgmPhysInvalidatePageMapTLBEntry(pVM, GCPhysPage);
LogFlow(("PGMHandlerPhysicalPageAliasHC: => %R[pgmpage]\n", pPage));
pgmUnlock(pVM);
return VINF_SUCCESS;
}
pgmUnlock(pVM);
AssertMsgFailed(("The page %#x is outside the range %#x-%#x\n",
GCPhysPage, pCur->Core.Key, pCur->Core.KeyLast));
return VERR_INVALID_PARAMETER;
}
pgmUnlock(pVM);
AssertMsgFailed(("Specified physical handler start address %#x is invalid.\n", GCPhys));
return VERR_PGM_HANDLER_NOT_FOUND;
}
/**
* Checks if a physical range is handled
*
* @returns boolean
* @param pVM Pointer to the VM.
* @param GCPhys Start physical address earlier passed to PGMR3HandlerPhysicalRegister().
* @remarks Caller must take the PGM lock...
* @thread EMT.
*/
VMMDECL(bool) PGMHandlerPhysicalIsRegistered(PVM pVM, RTGCPHYS GCPhys)
{
/*
* Find the handler.
*/
pgmLock(pVM);
PPGMPHYSHANDLER pCur = pgmHandlerPhysicalLookup(pVM, GCPhys);
if (pCur)
{
Assert(GCPhys >= pCur->Core.Key && GCPhys <= pCur->Core.KeyLast);
Assert( pCur->enmType == PGMPHYSHANDLERTYPE_PHYSICAL_WRITE
|| pCur->enmType == PGMPHYSHANDLERTYPE_PHYSICAL_ALL
|| pCur->enmType == PGMPHYSHANDLERTYPE_MMIO);
pgmUnlock(pVM);
return true;
}
pgmUnlock(pVM);
return false;
}
/**
* Checks if it's an disabled all access handler or write access handler at the
* given address.
*
* @returns true if it's an all access handler, false if it's a write access
* handler.
* @param pVM Pointer to the VM.
* @param GCPhys The address of the page with a disabled handler.
*
* @remarks The caller, PGMR3PhysTlbGCPhys2Ptr, must hold the PGM lock.
*/
bool pgmHandlerPhysicalIsAll(PVM pVM, RTGCPHYS GCPhys)
{
pgmLock(pVM);
PPGMPHYSHANDLER pCur = pgmHandlerPhysicalLookup(pVM, GCPhys);
if (!pCur)
{
pgmUnlock(pVM);
AssertFailed();
return true;
}
Assert( pCur->enmType == PGMPHYSHANDLERTYPE_PHYSICAL_WRITE
|| pCur->enmType == PGMPHYSHANDLERTYPE_PHYSICAL_ALL
|| pCur->enmType == PGMPHYSHANDLERTYPE_MMIO); /* sanity */
/* Only whole pages can be disabled. */
Assert( pCur->Core.Key <= (GCPhys & ~(RTGCPHYS)PAGE_OFFSET_MASK)
&& pCur->Core.KeyLast >= (GCPhys | PAGE_OFFSET_MASK));
bool bRet = pCur->enmType != PGMPHYSHANDLERTYPE_PHYSICAL_WRITE;
pgmUnlock(pVM);
return bRet;
}
/**
* Check if particular guest's VA is being monitored.
*
* @returns true or false
* @param pVM Pointer to the VM.
* @param GCPtr Virtual address.
* @remarks Will acquire the PGM lock.
* @thread Any.
*/
VMMDECL(bool) PGMHandlerVirtualIsRegistered(PVM pVM, RTGCPTR GCPtr)
{
pgmLock(pVM);
PPGMVIRTHANDLER pCur = (PPGMVIRTHANDLER)RTAvlroGCPtrGet(&pVM->pgm.s.CTX_SUFF(pTrees)->VirtHandlers, GCPtr);
pgmUnlock(pVM);
return pCur != NULL;
}
/**
* Search for virtual handler with matching physical address
*
* @returns VBox status code
* @param pVM Pointer to the VM.
* @param GCPhys GC physical address to search for.
* @param ppVirt Where to store the pointer to the virtual handler structure.
* @param piPage Where to store the pointer to the index of the cached physical page.
*/
int pgmHandlerVirtualFindByPhysAddr(PVM pVM, RTGCPHYS GCPhys, PPGMVIRTHANDLER *ppVirt, unsigned *piPage)
{
STAM_PROFILE_START(&pVM->pgm.s.CTX_MID_Z(Stat,VirtHandlerSearchByPhys), a);
Assert(ppVirt);
pgmLock(pVM);
PPGMPHYS2VIRTHANDLER pCur;
pCur = (PPGMPHYS2VIRTHANDLER)RTAvlroGCPhysRangeGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysToVirtHandlers, GCPhys);
if (pCur)
{
/* found a match! */
*ppVirt = (PPGMVIRTHANDLER)((uintptr_t)pCur + pCur->offVirtHandler);
*piPage = pCur - &(*ppVirt)->aPhysToVirt[0];
pgmUnlock(pVM);
#ifdef VBOX_STRICT_PGM_HANDLER_VIRTUAL
AssertRelease(pCur->offNextAlias & PGMPHYS2VIRTHANDLER_IS_HEAD);
#endif
LogFlow(("PHYS2VIRT: found match for %RGp -> %RGv *piPage=%#x\n", GCPhys, (*ppVirt)->Core.Key, *piPage));
STAM_PROFILE_STOP(&pVM->pgm.s.CTX_SUFF(pStats)->CTX_MID_Z(Stat,VirtHandlerSearchByPhys), a);
return VINF_SUCCESS;
}
pgmUnlock(pVM);
*ppVirt = NULL;
STAM_PROFILE_STOP(&pVM->pgm.s.CTX_SUFF(pStats)->CTX_MID_Z(Stat,VirtHandlerSearchByPhys), a);
return VERR_PGM_HANDLER_NOT_FOUND;
}
/**
* Deal with aliases in phys2virt.
*
* As pointed out by the various todos, this currently only deals with
* aliases where the two ranges match 100%.
*
* @param pVM Pointer to the VM.
* @param pPhys2Virt The node we failed insert.
*/
static void pgmHandlerVirtualInsertAliased(PVM pVM, PPGMPHYS2VIRTHANDLER pPhys2Virt)
{
/*
* First find the node which is conflicting with us.
*/
/** @todo Deal with partial overlapping. (Unlikely situation, so I'm too lazy to do anything about it now.) */
/** @todo check if the current head node covers the ground we do. This is highly unlikely
* and I'm too lazy to implement this now as it will require sorting the list and stuff like that. */
PPGMPHYS2VIRTHANDLER pHead = (PPGMPHYS2VIRTHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysToVirtHandlers, pPhys2Virt->Core.Key);
#ifdef VBOX_STRICT_PGM_HANDLER_VIRTUAL
AssertReleaseMsg(pHead != pPhys2Virt, ("%RGp-%RGp offVirtHandler=%#RX32\n",
pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offVirtHandler));
#endif
if (RT_UNLIKELY(!pHead || pHead->Core.KeyLast != pPhys2Virt->Core.KeyLast))
{
/** @todo do something clever here... */
LogRel(("pgmHandlerVirtualInsertAliased: %RGp-%RGp\n", pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast));
pPhys2Virt->offNextAlias = 0;
return;
}
/*
* Insert ourselves as the next node.
*/
if (!(pHead->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK))
pPhys2Virt->offNextAlias = PGMPHYS2VIRTHANDLER_IN_TREE;
else
{
PPGMPHYS2VIRTHANDLER pNext = (PPGMPHYS2VIRTHANDLER)((intptr_t)pHead + (pHead->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK));
pPhys2Virt->offNextAlias = ((intptr_t)pNext - (intptr_t)pPhys2Virt)
| PGMPHYS2VIRTHANDLER_IN_TREE;
}
pHead->offNextAlias = ((intptr_t)pPhys2Virt - (intptr_t)pHead)
| (pHead->offNextAlias & ~PGMPHYS2VIRTHANDLER_OFF_MASK);
Log(("pgmHandlerVirtualInsertAliased: %RGp-%RGp offNextAlias=%#RX32\n", pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offNextAlias));
}
/**
* Resets one virtual handler range.
*
* This is called by HandlerVirtualUpdate when it has detected some kind of
* problem and have started clearing the virtual handler page states (or
* when there have been registration/deregistrations). For this reason this
* function will only update the page status if it's lower than desired.
*
* @returns 0
* @param pNode Pointer to a PGMVIRTHANDLER.
* @param pvUser Pointer to the VM.
*/
DECLCALLBACK(int) pgmHandlerVirtualResetOne(PAVLROGCPTRNODECORE pNode, void *pvUser)
{
PPGMVIRTHANDLER pCur = (PPGMVIRTHANDLER)pNode;
PVM pVM = (PVM)pvUser;
PGM_LOCK_ASSERT_OWNER(pVM);
/*
* Iterate the pages and apply the new state.
*/
unsigned uState = pgmHandlerVirtualCalcState(pCur);
PPGMRAMRANGE pRamHint = NULL;
RTGCUINTPTR offPage = ((RTGCUINTPTR)pCur->Core.Key & PAGE_OFFSET_MASK);
RTGCUINTPTR cbLeft = pCur->cb;
for (unsigned iPage = 0; iPage < pCur->cPages; iPage++)
{
PPGMPHYS2VIRTHANDLER pPhys2Virt = &pCur->aPhysToVirt[iPage];
if (pPhys2Virt->Core.Key != NIL_RTGCPHYS)
{
/*
* Update the page state wrt virtual handlers.
*/
PPGMPAGE pPage;
int rc = pgmPhysGetPageWithHintEx(pVM, pPhys2Virt->Core.Key, &pPage, &pRamHint);
if ( RT_SUCCESS(rc)
&& PGM_PAGE_GET_HNDL_VIRT_STATE(pPage) < uState)
PGM_PAGE_SET_HNDL_VIRT_STATE(pPage, uState);
else
AssertRC(rc);
/*
* Need to insert the page in the Phys2Virt lookup tree?
*/
if (pPhys2Virt->Core.KeyLast == NIL_RTGCPHYS)
{
#ifdef VBOX_STRICT_PGM_HANDLER_VIRTUAL
AssertRelease(!pPhys2Virt->offNextAlias);
#endif
unsigned cbPhys = cbLeft;
if (cbPhys > PAGE_SIZE - offPage)
cbPhys = PAGE_SIZE - offPage;
else
Assert(iPage == pCur->cPages - 1);
pPhys2Virt->Core.KeyLast = pPhys2Virt->Core.Key + cbPhys - 1; /* inclusive */
pPhys2Virt->offNextAlias = PGMPHYS2VIRTHANDLER_IS_HEAD | PGMPHYS2VIRTHANDLER_IN_TREE;
if (!RTAvlroGCPhysInsert(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysToVirtHandlers, &pPhys2Virt->Core))
pgmHandlerVirtualInsertAliased(pVM, pPhys2Virt);
#ifdef VBOX_STRICT_PGM_HANDLER_VIRTUAL
else
AssertReleaseMsg(RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysToVirtHandlers, pPhys2Virt->Core.Key) == &pPhys2Virt->Core,
("%RGp-%RGp offNextAlias=%#RX32\n",
pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offNextAlias));
#endif
Log2(("PHYS2VIRT: Insert physical range %RGp-%RGp offNextAlias=%#RX32 %s\n",
pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offNextAlias, R3STRING(pCur->pszDesc)));
}
}
cbLeft -= PAGE_SIZE - offPage;
offPage = 0;
}
return 0;
}
#if defined(VBOX_STRICT) || defined(LOG_ENABLED)
/**
* Worker for pgmHandlerVirtualDumpPhysPages.
*
* @returns 0 (continue enumeration).
* @param pNode The virtual handler node.
* @param pvUser User argument, unused.
*/
static DECLCALLBACK(int) pgmHandlerVirtualDumpPhysPagesCallback(PAVLROGCPHYSNODECORE pNode, void *pvUser)
{
PPGMPHYS2VIRTHANDLER pCur = (PPGMPHYS2VIRTHANDLER)pNode;
PPGMVIRTHANDLER pVirt = (PPGMVIRTHANDLER)((uintptr_t)pCur + pCur->offVirtHandler);
NOREF(pvUser); NOREF(pVirt);
Log(("PHYS2VIRT: Range %RGp-%RGp for virtual handler: %s\n", pCur->Core.Key, pCur->Core.KeyLast, pVirt->pszDesc));
return 0;
}
/**
* Assertion / logging helper for dumping all the
* virtual handlers to the log.
*
* @param pVM Pointer to the VM.
*/
void pgmHandlerVirtualDumpPhysPages(PVM pVM)
{
RTAvlroGCPhysDoWithAll(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysToVirtHandlers, true /* from left */,
pgmHandlerVirtualDumpPhysPagesCallback, 0);
}
#endif /* VBOX_STRICT || LOG_ENABLED */
#ifdef VBOX_STRICT
/**
* State structure used by the PGMAssertHandlerAndFlagsInSync() function
* and its AVL enumerators.
*/
typedef struct PGMAHAFIS
{
/** The current physical address. */
RTGCPHYS GCPhys;
/** The state we've calculated. */
unsigned uVirtStateFound;
/** The state we're matching up to. */
unsigned uVirtState;
/** Number of errors. */
unsigned cErrors;
/** Pointer to the VM. */
PVM pVM;
} PGMAHAFIS, *PPGMAHAFIS;
#if 0 /* unused */
/**
* Verify virtual handler by matching physical address.
*
* @returns 0
* @param pNode Pointer to a PGMVIRTHANDLER.
* @param pvUser Pointer to user parameter.
*/
static DECLCALLBACK(int) pgmHandlerVirtualVerifyOneByPhysAddr(PAVLROGCPTRNODECORE pNode, void *pvUser)
{
PPGMVIRTHANDLER pCur = (PPGMVIRTHANDLER)pNode;
PPGMAHAFIS pState = (PPGMAHAFIS)pvUser;
for (unsigned iPage = 0; iPage < pCur->cPages; iPage++)
{
if ((pCur->aPhysToVirt[iPage].Core.Key & X86_PTE_PAE_PG_MASK) == pState->GCPhys)
{
unsigned uState = pgmHandlerVirtualCalcState(pCur);
if (pState->uVirtState < uState)
{
error
}
if (pState->uVirtState == uState)
break; //??
}
}
return 0;
}
#endif /* unused */
/**
* Verify a virtual handler (enumeration callback).
*
* Called by PGMAssertHandlerAndFlagsInSync to check the sanity of all
* the virtual handlers, esp. that the physical addresses matches up.
*
* @returns 0
* @param pNode Pointer to a PGMVIRTHANDLER.
* @param pvUser Pointer to a PPGMAHAFIS structure.
*/
static DECLCALLBACK(int) pgmHandlerVirtualVerifyOne(PAVLROGCPTRNODECORE pNode, void *pvUser)
{
PPGMVIRTHANDLER pVirt = (PPGMVIRTHANDLER)pNode;
PPGMAHAFIS pState = (PPGMAHAFIS)pvUser;
PVM pVM = pState->pVM;
/*
* Validate the type and calc state.
*/
switch (pVirt->enmType)
{
case PGMVIRTHANDLERTYPE_WRITE:
case PGMVIRTHANDLERTYPE_ALL:
break;
default:
AssertMsgFailed(("unknown/wrong enmType=%d\n", pVirt->enmType));
pState->cErrors++;
return 0;
}
const unsigned uState = pgmHandlerVirtualCalcState(pVirt);
/*
* Check key alignment.
*/
if ( (pVirt->aPhysToVirt[0].Core.Key & PAGE_OFFSET_MASK) != ((RTGCUINTPTR)pVirt->Core.Key & PAGE_OFFSET_MASK)
&& pVirt->aPhysToVirt[0].Core.Key != NIL_RTGCPHYS)
{
AssertMsgFailed(("virt handler phys has incorrect key! %RGp %RGv %s\n",
pVirt->aPhysToVirt[0].Core.Key, pVirt->Core.Key, R3STRING(pVirt->pszDesc)));
pState->cErrors++;
}
if ( (pVirt->aPhysToVirt[pVirt->cPages - 1].Core.KeyLast & PAGE_OFFSET_MASK) != ((RTGCUINTPTR)pVirt->Core.KeyLast & PAGE_OFFSET_MASK)
&& pVirt->aPhysToVirt[pVirt->cPages - 1].Core.Key != NIL_RTGCPHYS)
{
AssertMsgFailed(("virt handler phys has incorrect key! %RGp %RGv %s\n",
pVirt->aPhysToVirt[pVirt->cPages - 1].Core.KeyLast, pVirt->Core.KeyLast, R3STRING(pVirt->pszDesc)));
pState->cErrors++;
}
/*
* Check pages for sanity and state.
*/
RTGCUINTPTR GCPtr = (RTGCUINTPTR)pVirt->Core.Key;
for (unsigned iPage = 0; iPage < pVirt->cPages; iPage++, GCPtr += PAGE_SIZE)
{
for (VMCPUID i = 0; i < pVM->cCpus; i++)
{
PVMCPU pVCpu = &pVM->aCpus[i];
RTGCPHYS GCPhysGst;
uint64_t fGst;
int rc = PGMGstGetPage(pVCpu, (RTGCPTR)GCPtr, &fGst, &GCPhysGst);
if ( rc == VERR_PAGE_NOT_PRESENT
|| rc == VERR_PAGE_TABLE_NOT_PRESENT)
{
if (pVirt->aPhysToVirt[iPage].Core.Key != NIL_RTGCPHYS)
{
AssertMsgFailed(("virt handler phys out of sync. %RGp GCPhysNew=~0 iPage=%#x %RGv %s\n",
pVirt->aPhysToVirt[iPage].Core.Key, iPage, GCPtr, R3STRING(pVirt->pszDesc)));
pState->cErrors++;
}
continue;
}
AssertRCReturn(rc, 0);
if ((pVirt->aPhysToVirt[iPage].Core.Key & X86_PTE_PAE_PG_MASK) != GCPhysGst)
{
AssertMsgFailed(("virt handler phys out of sync. %RGp GCPhysGst=%RGp iPage=%#x %RGv %s\n",
pVirt->aPhysToVirt[iPage].Core.Key, GCPhysGst, iPage, GCPtr, R3STRING(pVirt->pszDesc)));
pState->cErrors++;
continue;
}
PPGMPAGE pPage = pgmPhysGetPage(pVM, GCPhysGst);
if (!pPage)
{
AssertMsgFailed(("virt handler getting ram flags. GCPhysGst=%RGp iPage=%#x %RGv %s\n",
GCPhysGst, iPage, GCPtr, R3STRING(pVirt->pszDesc)));
pState->cErrors++;
continue;
}
if (PGM_PAGE_GET_HNDL_VIRT_STATE(pPage) < uState)
{
AssertMsgFailed(("virt handler state mismatch. pPage=%R[pgmpage] GCPhysGst=%RGp iPage=%#x %RGv state=%d expected>=%d %s\n",
pPage, GCPhysGst, iPage, GCPtr, PGM_PAGE_GET_HNDL_VIRT_STATE(pPage), uState, R3STRING(pVirt->pszDesc)));
pState->cErrors++;
continue;
}
} /* for each VCPU */
} /* for pages in virtual mapping. */
return 0;
}
/**
* Asserts that the handlers+guest-page-tables == ramrange-flags and
* that the physical addresses associated with virtual handlers are correct.
*
* @returns Number of mismatches.
* @param pVM Pointer to the VM.
*/
VMMDECL(unsigned) PGMAssertHandlerAndFlagsInSync(PVM pVM)
{
PPGM pPGM = &pVM->pgm.s;
PGMAHAFIS State;
State.GCPhys = 0;
State.uVirtState = 0;
State.uVirtStateFound = 0;
State.cErrors = 0;
State.pVM = pVM;
PGM_LOCK_ASSERT_OWNER(pVM);
/*
* Check the RAM flags against the handlers.
*/
for (PPGMRAMRANGE pRam = pPGM->CTX_SUFF(pRamRangesX); pRam; pRam = pRam->CTX_SUFF(pNext))
{
const uint32_t cPages = pRam->cb >> PAGE_SHIFT;
for (uint32_t iPage = 0; iPage < cPages; iPage++)
{
PGMPAGE const *pPage = &pRam->aPages[iPage];
if (PGM_PAGE_HAS_ANY_HANDLERS(pPage))
{
State.GCPhys = pRam->GCPhys + (iPage << PAGE_SHIFT);
/*
* Physical first - calculate the state based on the handlers
* active on the page, then compare.
*/
if (PGM_PAGE_HAS_ANY_PHYSICAL_HANDLERS(pPage))
{
/* the first */
PPGMPHYSHANDLER pPhys = (PPGMPHYSHANDLER)RTAvlroGCPhysRangeGet(&pPGM->CTX_SUFF(pTrees)->PhysHandlers, State.GCPhys);
if (!pPhys)
{
pPhys = (PPGMPHYSHANDLER)RTAvlroGCPhysGetBestFit(&pPGM->CTX_SUFF(pTrees)->PhysHandlers, State.GCPhys, true);
if ( pPhys
&& pPhys->Core.Key > (State.GCPhys + PAGE_SIZE - 1))
pPhys = NULL;
Assert(!pPhys || pPhys->Core.Key >= State.GCPhys);
}
if (pPhys)
{
unsigned uState = pgmHandlerPhysicalCalcState(pPhys);
/* more? */
while (pPhys->Core.KeyLast < (State.GCPhys | PAGE_OFFSET_MASK))
{
PPGMPHYSHANDLER pPhys2 = (PPGMPHYSHANDLER)RTAvlroGCPhysGetBestFit(&pPGM->CTX_SUFF(pTrees)->PhysHandlers,
pPhys->Core.KeyLast + 1, true);
if ( !pPhys2
|| pPhys2->Core.Key > (State.GCPhys | PAGE_OFFSET_MASK))
break;
unsigned uState2 = pgmHandlerPhysicalCalcState(pPhys2);
uState = RT_MAX(uState, uState2);
pPhys = pPhys2;
}
/* compare.*/
if ( PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) != uState
&& PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) != PGM_PAGE_HNDL_PHYS_STATE_DISABLED)
{
AssertMsgFailed(("ram range vs phys handler flags mismatch. GCPhys=%RGp state=%d expected=%d %s\n",
State.GCPhys, PGM_PAGE_GET_HNDL_PHYS_STATE(pPage), uState, pPhys->pszDesc));
State.cErrors++;
}
#ifdef VBOX_WITH_REM
# ifdef IN_RING3
/* validate that REM is handling it. */
if ( !REMR3IsPageAccessHandled(pVM, State.GCPhys)
/* ignore shadowed ROM for the time being. */
&& PGM_PAGE_GET_TYPE(pPage) != PGMPAGETYPE_ROM_SHADOW)
{
AssertMsgFailed(("ram range vs phys handler REM mismatch. GCPhys=%RGp state=%d %s\n",
State.GCPhys, PGM_PAGE_GET_HNDL_PHYS_STATE(pPage), pPhys->pszDesc));
State.cErrors++;
}
# endif
#endif
}
else
{
AssertMsgFailed(("ram range vs phys handler mismatch. no handler for GCPhys=%RGp\n", State.GCPhys));
State.cErrors++;
}
}
/*
* Virtual handlers.
*/
if (PGM_PAGE_HAS_ACTIVE_VIRTUAL_HANDLERS(pPage))
{
State.uVirtState = PGM_PAGE_GET_HNDL_VIRT_STATE(pPage);
#if 1
/* locate all the matching physical ranges. */
State.uVirtStateFound = PGM_PAGE_HNDL_VIRT_STATE_NONE;
RTGCPHYS GCPhysKey = State.GCPhys;
for (;;)
{
PPGMPHYS2VIRTHANDLER pPhys2Virt = (PPGMPHYS2VIRTHANDLER)RTAvlroGCPhysGetBestFit(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysToVirtHandlers,
GCPhysKey, true /* above-or-equal */);
if ( !pPhys2Virt
|| (pPhys2Virt->Core.Key & X86_PTE_PAE_PG_MASK) != State.GCPhys)
break;
/* the head */
GCPhysKey = pPhys2Virt->Core.KeyLast;
PPGMVIRTHANDLER pCur = (PPGMVIRTHANDLER)((uintptr_t)pPhys2Virt + pPhys2Virt->offVirtHandler);
unsigned uState = pgmHandlerVirtualCalcState(pCur);
State.uVirtStateFound = RT_MAX(State.uVirtStateFound, uState);
/* any aliases */
while (pPhys2Virt->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK)
{
pPhys2Virt = (PPGMPHYS2VIRTHANDLER)((uintptr_t)pPhys2Virt + (pPhys2Virt->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK));
pCur = (PPGMVIRTHANDLER)((uintptr_t)pPhys2Virt + pPhys2Virt->offVirtHandler);
uState = pgmHandlerVirtualCalcState(pCur);
State.uVirtStateFound = RT_MAX(State.uVirtStateFound, uState);
}
/* done? */
if ((GCPhysKey & X86_PTE_PAE_PG_MASK) != State.GCPhys)
break;
}
#else
/* very slow */
RTAvlroGCPtrDoWithAll(&pVM->pgm.s.CTX_SUFF(pTrees)->VirtHandlers, true, pgmHandlerVirtualVerifyOneByPhysAddr, &State);
#endif
if (State.uVirtState != State.uVirtStateFound)
{
AssertMsgFailed(("ram range vs virt handler flags mismatch. GCPhys=%RGp uVirtState=%#x uVirtStateFound=%#x\n",
State.GCPhys, State.uVirtState, State.uVirtStateFound));
State.cErrors++;
}
}
}
} /* foreach page in ram range. */
} /* foreach ram range. */
/*
* Check that the physical addresses of the virtual handlers matches up
* and that they are otherwise sane.
*/
RTAvlroGCPtrDoWithAll(&pVM->pgm.s.CTX_SUFF(pTrees)->VirtHandlers, true, pgmHandlerVirtualVerifyOne, &State);
/*
* Do the reverse check for physical handlers.
*/
/** @todo */
return State.cErrors;
}
#endif /* VBOX_STRICT */