IOMAllMMIO.cpp revision 9d4c9e0a3e2dcc3bd19303d7b4e2d96d12c11814
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * IOM - Input / Output Monitor - Any Context, MMIO & String I/O.
c7814cf6e1240a519cbec0441e033d0e2470ed00vboxsync * Copyright (C) 2006-2010 Oracle Corporation
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * This file is part of VirtualBox Open Source Edition (OSE), as
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * available from http://www.virtualbox.org. This file is free software;
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * you can redistribute it and/or modify it under the terms of the GNU
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * General Public License (GPL) as published by the Free Software
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * Foundation, in version 2 as it comes in the "COPYING" file of the
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync/*******************************************************************************
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync* Header Files *
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync*******************************************************************************/
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync#if defined(IEM_VERIFICATION_MODE) && defined(IN_RING3)
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync/*******************************************************************************
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync* Global Variables *
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync*******************************************************************************/
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * Array for fast recode of the operand size (1/2/4/8 bytes) to bit shift value.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsyncstatic const unsigned g_aSize2Shift[] =
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync ~0U, /* 0 - invalid */
1c0d3d017f9a45748b4839bf6622b53e83a4f1f8vboxsync 0, /* *1 == 2^0 */
1c0d3d017f9a45748b4839bf6622b53e83a4f1f8vboxsync ~0U, /* 3 - invalid */
1c0d3d017f9a45748b4839bf6622b53e83a4f1f8vboxsync ~0U, /* 5 - invalid */
1c0d3d017f9a45748b4839bf6622b53e83a4f1f8vboxsync ~0U, /* 6 - invalid */
1c0d3d017f9a45748b4839bf6622b53e83a4f1f8vboxsync ~0U, /* 7 - invalid */
1c0d3d017f9a45748b4839bf6622b53e83a4f1f8vboxsync * Macro for fast recode of the operand size (1/2/4/8 bytes) to bit shift value.
1c0d3d017f9a45748b4839bf6622b53e83a4f1f8vboxsync * Deals with complicated MMIO writes.
4a9af9a8062589b741444d717d2dd1ed22b0f583vboxsync * Complicatd means unaligned or non-dword/qword align accesses depending on
4a9af9a8062589b741444d717d2dd1ed22b0f583vboxsync * the MMIO region's access mode flags.
4a9af9a8062589b741444d717d2dd1ed22b0f583vboxsync * @returns Strict VBox status code. Any EM scheduling status code,
4a9af9a8062589b741444d717d2dd1ed22b0f583vboxsync * VINF_IOM_R3_MMIO_WRITE, VINF_IOM_R3_MMIO_READ_WRITE or
1c0d3d017f9a45748b4839bf6622b53e83a4f1f8vboxsync * VINF_IOM_R3_MMIO_READ may be returned.
4a9af9a8062589b741444d717d2dd1ed22b0f583vboxsync * @param pVM The VM handle.
4a9af9a8062589b741444d717d2dd1ed22b0f583vboxsync * @param pRange The range to write to.
4a9af9a8062589b741444d717d2dd1ed22b0f583vboxsync * @param GCPhys The physical address to start writing.
4a9af9a8062589b741444d717d2dd1ed22b0f583vboxsync * @param pvValue Where to store the value.
4a9af9a8062589b741444d717d2dd1ed22b0f583vboxsync * @param cbValue The size of the value to write.
4a9af9a8062589b741444d717d2dd1ed22b0f583vboxsyncstatic VBOXSTRICTRC iomMMIODoComplicatedWrite(PVM pVM, PIOMMMIORANGE pRange, RTGCPHYS GCPhys, void const *pvValue, unsigned cbValue)
4a9af9a8062589b741444d717d2dd1ed22b0f583vboxsync AssertReturn( (pRange->fFlags & IOMMMIO_FLAGS_WRITE_MODE) != IOMMMIO_FLAGS_WRITE_PASSTHRU
4a9af9a8062589b741444d717d2dd1ed22b0f583vboxsync || (pRange->fFlags & IOMMMIO_FLAGS_WRITE_MODE) <= IOMMMIO_FLAGS_WRITE_DWORD_QWORD_READ_MISSING,
4a9af9a8062589b741444d717d2dd1ed22b0f583vboxsync AssertReturn(cbValue != 0 && cbValue <= 16, VERR_IOM_MMIO_IPE_2);
4a9af9a8062589b741444d717d2dd1ed22b0f583vboxsync RTGCPHYS const GCPhysStart = GCPhys; NOREF(GCPhysStart);
4a9af9a8062589b741444d717d2dd1ed22b0f583vboxsync bool const fReadMissing = (pRange->fFlags & IOMMMIO_FLAGS_WRITE_MODE) >= IOMMMIO_FLAGS_WRITE_DWORD_READ_MISSING;
4a9af9a8062589b741444d717d2dd1ed22b0f583vboxsync * Do debug stop if requested.
4a9af9a8062589b741444d717d2dd1ed22b0f583vboxsync if (pRange->fFlags & IOMMMIO_FLAGS_DBGSTOP_ON_COMPLICATED_WRITE)
4a9af9a8062589b741444d717d2dd1ed22b0f583vboxsync rc = DBGFR3EventSrc(pVM, DBGFEVENT_DEV_STOP, RT_SRC_POS,
4a9af9a8062589b741444d717d2dd1ed22b0f583vboxsync "Complicated write %#x byte at %RGp to %s\n", cbValue, GCPhys, R3STRING(pRange->pszDesc));
4a9af9a8062589b741444d717d2dd1ed22b0f583vboxsync * Split and conquer.
1c0d3d017f9a45748b4839bf6622b53e83a4f1f8vboxsync * Get the missing bits (if any).
1c0d3d017f9a45748b4839bf6622b53e83a4f1f8vboxsync int rc2 = pRange->CTX_SUFF(pfnReadCallback)(pRange->CTX_SUFF(pDevIns), pRange->CTX_SUFF(pvUser),
1c0d3d017f9a45748b4839bf6622b53e83a4f1f8vboxsync GCPhys & ~(RTGCPHYS)3, &u32MissingValue, sizeof(u32MissingValue));
1c0d3d017f9a45748b4839bf6622b53e83a4f1f8vboxsync /** @todo What if we've split a transfer and already read
1c0d3d017f9a45748b4839bf6622b53e83a4f1f8vboxsync * something? Since reads can have sideeffects we could be
1c0d3d017f9a45748b4839bf6622b53e83a4f1f8vboxsync * kind of screwed here... */
1c0d3d017f9a45748b4839bf6622b53e83a4f1f8vboxsync LogFlow(("iomMMIODoComplicatedWrite: GCPhys=%RGp GCPhysStart=%RGp cbValue=%u rc=%Rrc [read]\n", GCPhys, GCPhysStart, cbValue, rc2));
1c0d3d017f9a45748b4839bf6622b53e83a4f1f8vboxsync Log(("iomMMIODoComplicatedWrite: GCPhys=%RGp GCPhysStart=%RGp cbValue=%u rc=%Rrc [read]\n", GCPhys, GCPhysStart, cbValue, rc2));
1c0d3d017f9a45748b4839bf6622b53e83a4f1f8vboxsync AssertMsgReturn(rc2 >= VINF_EM_FIRST && rc2 <= VINF_EM_LAST, ("%Rrc\n", rc2), VERR_IPE_UNEXPECTED_INFO_STATUS);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * Merge missing and given bits.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync u32GivenValue = RT_MAKE_U32_FROM_U8(((uint8_t const *)pvValue)[0], ((uint8_t const *)pvValue)[1],
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync uint32_t u32Value = (u32MissingValue & ~u32GivenMask)
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * Do DWORD write to the device.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync int rc2 = pRange->CTX_SUFF(pfnWriteCallback)(pRange->CTX_SUFF(pDevIns), pRange->CTX_SUFF(pvUser),
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync GCPhys & ~(RTGCPHYS)3, &u32Value, sizeof(u32Value));
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync /** @todo What if we've split a transfer and already read
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * something? Since reads can have sideeffects we could be
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * kind of screwed here... */
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync LogFlow(("iomMMIODoComplicatedWrite: GCPhys=%RGp GCPhysStart=%RGp cbValue=%u rc=%Rrc [write]\n", GCPhys, GCPhysStart, cbValue, rc2));
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync Log(("iomMMIODoComplicatedWrite: GCPhys=%RGp GCPhysStart=%RGp cbValue=%u rc=%Rrc [write]\n", GCPhys, GCPhysStart, cbValue, rc2));
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync AssertMsgReturn(rc2 >= VINF_EM_FIRST && rc2 <= VINF_EM_LAST, ("%Rrc\n", rc2), VERR_IPE_UNEXPECTED_INFO_STATUS);
7b4ea63789001468ec3662bdfcd6432bf89095dfvboxsync * Wrapper which does the write and updates range statistics when such are enabled.
46737b2c6b2da473108a7670c3682d88474bd8b9vboxsync * @warning RT_SUCCESS(rc=VINF_IOM_R3_MMIO_WRITE) is TRUE!
7b4ea63789001468ec3662bdfcd6432bf89095dfvboxsyncstatic int iomMMIODoWrite(PVM pVM, PIOMMMIORANGE pRange, RTGCPHYS GCPhysFault, const void *pvData, unsigned cb)
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync PIOMMMIOSTATS pStats = iomMmioGetStats(pVM, GCPhysFault, pRange);
3fa7a7e633f46a212052b510cdb8cee41f279a67vboxsync STAM_PROFILE_START(&pStats->CTX_SUFF_Z(ProfWrite), a);
6902a98267d5180fb081cb5273751d0a628bf04dvboxsync || (pRange->fFlags & IOMMMIO_FLAGS_WRITE_MODE) == IOMMMIO_FLAGS_WRITE_PASSTHRU
1389294d44ac76b0a25f5655756c9d39855a73efvboxsync rc = pRange->CTX_SUFF(pfnWriteCallback)(pRange->CTX_SUFF(pDevIns), pRange->CTX_SUFF(pvUser),
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync GCPhysFault, (void *)pvData, cb); /** @todo fix const!! */
73ba84f95f918cc170be38908ad240fbb2f8f354vboxsync rc = iomMMIODoComplicatedWrite(pVM, pRange, GCPhysFault, pvData, cb);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync STAM_PROFILE_STOP(&pStats->CTX_SUFF_Z(ProfWrite), a);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * Deals with complicated MMIO reads.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * Complicatd means unaligned or non-dword/qword align accesses depending on
73ba84f95f918cc170be38908ad240fbb2f8f354vboxsync * the MMIO region's access mode flags.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @returns Strict VBox status code. Any EM scheduling status code,
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * VINF_IOM_R3_MMIO_READ, VINF_IOM_R3_MMIO_READ_WRITE or
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * VINF_IOM_R3_MMIO_WRITE may be returned.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @param pVM The VM handle.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @param pRange The range to read from.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @param GCPhys The physical address to start reading.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @param pvValue Where to store the value.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @param cbValue The size of the value to read.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsyncstatic VBOXSTRICTRC iomMMIODoComplicatedRead(PVM pVM, PIOMMMIORANGE pRange, RTGCPHYS GCPhys, void *pvValue, unsigned cbValue)
6902a98267d5180fb081cb5273751d0a628bf04dvboxsync AssertReturn( (pRange->fFlags & IOMMMIO_FLAGS_READ_MODE) == IOMMMIO_FLAGS_READ_DWORD
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync || (pRange->fFlags & IOMMMIO_FLAGS_READ_MODE) == IOMMMIO_FLAGS_READ_DWORD_QWORD,
73ba84f95f918cc170be38908ad240fbb2f8f354vboxsync AssertReturn(cbValue != 0 && cbValue <= 16, VERR_IOM_MMIO_IPE_2);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync RTGCPHYS const GCPhysStart = GCPhys; NOREF(GCPhysStart);
1389294d44ac76b0a25f5655756c9d39855a73efvboxsync * Do debug stop if requested.
73ba84f95f918cc170be38908ad240fbb2f8f354vboxsync if (pRange->fFlags & IOMMMIO_FLAGS_DBGSTOP_ON_COMPLICATED_READ)
73ba84f95f918cc170be38908ad240fbb2f8f354vboxsync rc = DBGFR3EventSrc(pVM, DBGFEVENT_DEV_STOP, RT_SRC_POS,
73ba84f95f918cc170be38908ad240fbb2f8f354vboxsync "Complicated read %#x byte at %RGp to %s\n", cbValue, GCPhys, R3STRING(pRange->pszDesc));
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * Split and conquer.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * Do DWORD read from the device.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync int rc2 = pRange->CTX_SUFF(pfnReadCallback)(pRange->CTX_SUFF(pDevIns), pRange->CTX_SUFF(pvUser),
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync GCPhys & ~(RTGCPHYS)3, &u32Value, sizeof(u32Value));
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync /** @todo What if we've split a transfer and already read
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * something? Since reads can have sideeffects we could be
73ba84f95f918cc170be38908ad240fbb2f8f354vboxsync * kind of screwed here... */
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync LogFlow(("iomMMIODoComplicatedRead: GCPhys=%RGp GCPhysStart=%RGp cbValue=%u rc=%Rrc\n", GCPhys, GCPhysStart, cbValue, rc2));
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync Log(("iomMMIODoComplicatedRead: GCPhys=%RGp GCPhysStart=%RGp cbValue=%u rc=%Rrc\n", GCPhys, GCPhysStart, cbValue, rc2));
46737b2c6b2da473108a7670c3682d88474bd8b9vboxsync AssertMsgReturn(rc2 >= VINF_EM_FIRST && rc2 <= VINF_EM_LAST, ("%Rrc\n", rc2), VERR_IPE_UNEXPECTED_INFO_STATUS);
ad290511521ce8388a9926b165241ecf83c330a7vboxsync * Write what we've read.
3fa7a7e633f46a212052b510cdb8cee41f279a67vboxsync * Implements VINF_IOM_MMIO_UNUSED_FF.
3fa7a7e633f46a212052b510cdb8cee41f279a67vboxsync * @returns VINF_SUCCESS.
3fa7a7e633f46a212052b510cdb8cee41f279a67vboxsync * @param pvValue Where to store the zeros.
329df9696e709dc71611f504a4774f323545be0avboxsync * @param cbValue How many bytes to read.
3ea1dbf096240fc221aea99352a74c17a367a9b6vboxsyncstatic int iomMMIODoReadFFs(void *pvValue, size_t cbValue)
4ecd4ad59281328476ad14f2baa51716b6f5f804vboxsync case 1: *(uint8_t *)pvValue = UINT8_C(0xff); break;
4ecd4ad59281328476ad14f2baa51716b6f5f804vboxsync case 2: *(uint16_t *)pvValue = UINT16_C(0xffff); break;
abac45bdfa95437daba28dd2d94bf7e0a25f75cdvboxsync case 4: *(uint32_t *)pvValue = UINT32_C(0xffffffff); break;
abac45bdfa95437daba28dd2d94bf7e0a25f75cdvboxsync case 8: *(uint64_t *)pvValue = UINT64_C(0xffffffffffffffff); break;
329df9696e709dc71611f504a4774f323545be0avboxsync * Implements VINF_IOM_MMIO_UNUSED_00.
329df9696e709dc71611f504a4774f323545be0avboxsync * @returns VINF_SUCCESS.
329df9696e709dc71611f504a4774f323545be0avboxsync * @param pvValue Where to store the zeros.
329df9696e709dc71611f504a4774f323545be0avboxsync * @param cbValue How many bytes to read.
329df9696e709dc71611f504a4774f323545be0avboxsyncstatic int iomMMIODoRead00s(void *pvValue, size_t cbValue)
46737b2c6b2da473108a7670c3682d88474bd8b9vboxsync case 1: *(uint8_t *)pvValue = UINT8_C(0x00); break;
329df9696e709dc71611f504a4774f323545be0avboxsync case 2: *(uint16_t *)pvValue = UINT16_C(0x0000); break;
329df9696e709dc71611f504a4774f323545be0avboxsync case 4: *(uint32_t *)pvValue = UINT32_C(0x00000000); break;
329df9696e709dc71611f504a4774f323545be0avboxsync case 8: *(uint64_t *)pvValue = UINT64_C(0x0000000000000000); break;
3fa7a7e633f46a212052b510cdb8cee41f279a67vboxsync * Wrapper which does the read and updates range statistics when such are enabled.
3fa7a7e633f46a212052b510cdb8cee41f279a67vboxsyncDECLINLINE(int) iomMMIODoRead(PVM pVM, PIOMMMIORANGE pRange, RTGCPHYS GCPhys, void *pvValue, unsigned cbValue)
3fa7a7e633f46a212052b510cdb8cee41f279a67vboxsync PIOMMMIOSTATS pStats = iomMmioGetStats(pVM, GCPhys, pRange);
09f4b412099acda62997fd82c8608075c453b3ebvboxsync STAM_PROFILE_START(&pStats->CTX_SUFF_Z(ProfRead), a);
09f4b412099acda62997fd82c8608075c453b3ebvboxsync || (pRange->fFlags & IOMMMIO_FLAGS_READ_MODE) == IOMMMIO_FLAGS_READ_PASSTHRU
09f4b412099acda62997fd82c8608075c453b3ebvboxsync rc = pRange->CTX_SUFF(pfnReadCallback)(pRange->CTX_SUFF(pDevIns), pRange->CTX_SUFF(pvUser), GCPhys, pvValue, cbValue);
09f4b412099acda62997fd82c8608075c453b3ebvboxsync rc = iomMMIODoComplicatedRead(pVM, pRange, GCPhys, pvValue, cbValue);
1389294d44ac76b0a25f5655756c9d39855a73efvboxsync case VINF_IOM_MMIO_UNUSED_FF: rc = iomMMIODoReadFFs(pvValue, cbValue); break;
09f4b412099acda62997fd82c8608075c453b3ebvboxsync case VINF_IOM_MMIO_UNUSED_00: rc = iomMMIODoRead00s(pvValue, cbValue); break;
09f4b412099acda62997fd82c8608075c453b3ebvboxsync STAM_PROFILE_STOP(&pStats->CTX_SUFF_Z(ProfRead), a);
1389294d44ac76b0a25f5655756c9d39855a73efvboxsync * Internal - statistics only.
09f4b412099acda62997fd82c8608075c453b3ebvboxsyncDECLINLINE(void) iomMMIOStatLength(PVM pVM, unsigned cb)
09f4b412099acda62997fd82c8608075c453b3ebvboxsync /* No way. */
09f4b412099acda62997fd82c8608075c453b3ebvboxsync * MOV reg, mem (read)
09f4b412099acda62997fd82c8608075c453b3ebvboxsync * MOVZX reg, mem (read)
09f4b412099acda62997fd82c8608075c453b3ebvboxsync * MOVSX reg, mem (read)
09f4b412099acda62997fd82c8608075c453b3ebvboxsync * @returns VBox status code.
09f4b412099acda62997fd82c8608075c453b3ebvboxsync * @param pVM The virtual machine.
09f4b412099acda62997fd82c8608075c453b3ebvboxsync * @param pRegFrame Pointer to CPUMCTXCORE guest registers structure.
09f4b412099acda62997fd82c8608075c453b3ebvboxsync * @param pCpu Disassembler CPU state.
09f4b412099acda62997fd82c8608075c453b3ebvboxsync * @param pRange Pointer MMIO range.
09f4b412099acda62997fd82c8608075c453b3ebvboxsync * @param GCPhysFault The GC physical address corresponding to pvFault.
09f4b412099acda62997fd82c8608075c453b3ebvboxsyncstatic int iomInterpretMOVxXRead(PVM pVM, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu, PIOMMMIORANGE pRange, RTGCPHYS GCPhysFault)
09f4b412099acda62997fd82c8608075c453b3ebvboxsync Assert(pRange->CTX_SUFF(pfnReadCallback) || !pRange->pfnReadCallbackR3);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * Get the data size from parameter 2,
dc959f60f6d3e0cba86f7da4d39aa475913a7e10vboxsync * and call the handler function to get the data.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync unsigned cb = DISGetParamSize(pCpu, &pCpu->param2);
dc959f60f6d3e0cba86f7da4d39aa475913a7e10vboxsync AssertMsg(cb > 0 && cb <= sizeof(uint64_t), ("cb=%d\n", cb));
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync int rc = iomMMIODoRead(pVM, pRange, GCPhysFault, &u64Data, cb);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * Do sign extension for MOVSX.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync /** @todo checkup MOVSX implementation! */
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync /* DWORD <- BYTE */
dc959f60f6d3e0cba86f7da4d39aa475913a7e10vboxsync /* DWORD <- WORD */
4c98b8b05f3783351cf256cc90cd4478fb28b62bvboxsync * Store the result to register (parameter 1).
4c98b8b05f3783351cf256cc90cd4478fb28b62bvboxsync bool fRc = iomSaveDataToReg(pCpu, &pCpu->param1, pRegFrame, u64Data);
4c98b8b05f3783351cf256cc90cd4478fb28b62bvboxsync AssertMsg(fRc, ("Failed to store register value!\n")); NOREF(fRc);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * MOV mem, reg|imm (write)
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @returns VBox status code.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @param pVM The virtual machine.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @param pRegFrame Pointer to CPUMCTXCORE guest registers structure.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @param pCpu Disassembler CPU state.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @param pRange Pointer MMIO range.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @param GCPhysFault The GC physical address corresponding to pvFault.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsyncstatic int iomInterpretMOVxXWrite(PVM pVM, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu, PIOMMMIORANGE pRange, RTGCPHYS GCPhysFault)
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync Assert(pRange->CTX_SUFF(pfnWriteCallback) || !pRange->pfnWriteCallbackR3);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * Get data to write from second parameter,
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * and call the callback to write it.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync unsigned cb = 0;
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync bool fRc = iomGetRegImmData(pCpu, &pCpu->param2, pRegFrame, &u64Data, &cb);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync AssertMsg(fRc, ("Failed to get reg/imm port number!\n")); NOREF(fRc);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync int rc = iomMMIODoWrite(pVM, pRange, GCPhysFault, &u64Data, cb);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync/** Wrapper for reading virtual memory. */
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsyncDECLINLINE(int) iomRamRead(PVMCPU pVCpu, void *pDest, RTGCPTR GCSrc, uint32_t cb)
4c98b8b05f3783351cf256cc90cd4478fb28b62bvboxsync /* Note: This will fail in R0 or RC if it hits an access handler. That
4c98b8b05f3783351cf256cc90cd4478fb28b62bvboxsync isn't a problem though since the operation can be restarted in REM. */
4c98b8b05f3783351cf256cc90cd4478fb28b62bvboxsync int rc = MMGCRamReadNoTrapHandler(pDest, (void *)(uintptr_t)GCSrc, cb);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync /* Page may be protected and not directly accessible. */
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync/** Wrapper for writing virtual memory. */
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsyncDECLINLINE(int) iomRamWrite(PVMCPU pVCpu, PCPUMCTXCORE pCtxCore, RTGCPTR GCPtrDst, void *pvSrc, uint32_t cb)
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync /** @todo Need to update PGMVerifyAccess to take access handlers into account for Ring-0 and
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * raw mode code. Some thought needs to be spent on theoretical concurrency issues as
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * as well since we're not behind the pgm lock and handler may change between calls.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * PGMPhysInterpretedWriteNoHandlers/PGMPhysWriteGCPtr may mess up
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * the state of some shadowed structures. */
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync return PGMPhysInterpretedWriteNoHandlers(pVCpu, pCtxCore, GCPtrDst, pvSrc, cb, false /*fRaiseTrap*/);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync return PGMPhysWriteGCPtr(pVCpu, GCPtrDst, pvSrc, cb);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync#if defined(IOM_WITH_MOVS_SUPPORT) && 0 /* locking prevents this from working. has buggy ecx handling. */
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * [REP] MOVSB
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * [REP] MOVSW
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * [REP] MOVSD
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * Restricted implementation.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @returns VBox status code.
73ba84f95f918cc170be38908ad240fbb2f8f354vboxsync * @param pVM The virtual machine.
73ba84f95f918cc170be38908ad240fbb2f8f354vboxsync * @param uErrorCode CPU Error code.
73ba84f95f918cc170be38908ad240fbb2f8f354vboxsync * @param pRegFrame Trap register frame.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @param GCPhysFault The GC physical address corresponding to pvFault.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @param pCpu Disassembler CPU state.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @param pRange Pointer MMIO range.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @param ppStat Which sub-sample to attribute this call to.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsyncstatic int iomInterpretMOVS(PVM pVM, bool fWriteAccess, PCPUMCTXCORE pRegFrame, RTGCPHYS GCPhysFault, PDISCPUSTATE pCpu, PIOMMMIORANGE pRange,
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * We do not support segment prefixes or REPNE.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync if (pCpu->fPrefix & (DISPREFIX_SEG | DISPREFIX_REPNE))
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync return VINF_IOM_R3_MMIO_READ_WRITE; /** @todo -> interpret whatever. */
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync if (SELMGetCpuModeFromSelector(pVM, pRegFrame->eflags, pRegFrame->cs, &pRegFrame->csHid) == DISCPUMODE_16BIT)
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync /* Get the current privilege level. */
105b1a31b6037dbe14acb8d09e60da540885202bvboxsync * Get data size.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync unsigned cb = DISGetParamSize(pCpu, &pCpu->param1);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync AssertMsg(cb > 0 && cb <= sizeof(uint64_t), ("cb=%d\n", cb));
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync int offIncrement = pRegFrame->eflags.Bits.u1DF ? -(signed)cb : (signed)cb;
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync if (pVM->iom.s.cMovsMaxBytes < (cTransfers << SIZE_2_SHIFT(cb)))
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync pVM->iom.s.cMovsMaxBytes = cTransfers << SIZE_2_SHIFT(cb);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync/** @todo re-evaluate on page boundaries. */
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * Write operation: [Mem] -> [MMIO]
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * ds:esi (Virt Src) -> es:edi (Phys Dst)
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync STAM_STATS({ *ppStat = &pVM->iom.s.StatRZInstMovsToMMIO; });
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync /* Check callback. */
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync /* Convert source address ds:esi. */
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync rc = SELMToFlatEx(pVM, DISSELREG_DS, pRegFrame, (RTGCPTR)pRegFrame->rsi,
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync /* Access verification first; we currently can't recover properly from traps inside this instruction */
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync rc = PGMVerifyAccess(pVCpu, pu8Virt, cTransfers * cb, (cpl == 3) ? X86_PTE_US : 0);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync Log(("MOVS will generate a trap -> recompiler, rc=%d\n", rc));
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync /* copy loop. */
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync rc = iomRamRead(pVCpu, &u32Data, (RTGCPTR)pu8Virt, cb);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync rc = iomMMIODoWrite(pVM, pRange, Phys, &u32Data, cb);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync /* Update ecx. */
cb0578a5309e1fc264e5a4acc30543bea075be43vboxsync * Read operation: [MMIO] -> [mem] or [MMIO] -> [MMIO]
cb0578a5309e1fc264e5a4acc30543bea075be43vboxsync * ds:[eSI] (Phys Src) -> es:[eDI] (Virt Dst)
cb0578a5309e1fc264e5a4acc30543bea075be43vboxsync STAM_STATS({ *ppStat = &pVM->iom.s.StatRZInstMovsFromMMIO; });
cb0578a5309e1fc264e5a4acc30543bea075be43vboxsync /* Check callback. */
cb0578a5309e1fc264e5a4acc30543bea075be43vboxsync /* Convert destination address. */
cb0578a5309e1fc264e5a4acc30543bea075be43vboxsync rc = SELMToFlatEx(pVM, DISSELREG_ES, pRegFrame, (RTGCPTR)pRegFrame->rdi,
cb0578a5309e1fc264e5a4acc30543bea075be43vboxsync /* Check if destination address is MMIO. */
cb0578a5309e1fc264e5a4acc30543bea075be43vboxsync rc = PGMGstGetPage(pVCpu, (RTGCPTR)pu8Virt, NULL, &PhysDst);
cb0578a5309e1fc264e5a4acc30543bea075be43vboxsync PhysDst |= (RTGCUINTPTR)pu8Virt & PAGE_OFFSET_MASK;
cb0578a5309e1fc264e5a4acc30543bea075be43vboxsync && (pMMIODst = iomMmioGetRangeWithRef(pVM, PhysDst)))
cb0578a5309e1fc264e5a4acc30543bea075be43vboxsync /** @todo implement per-device locks for MMIO access. */
cb0578a5309e1fc264e5a4acc30543bea075be43vboxsync Assert(!pMMIODst->CTX_SUFF(pDevIns)->CTX_SUFF(pCritSect));
cb0578a5309e1fc264e5a4acc30543bea075be43vboxsync * Extra: [MMIO] -> [MMIO]
cb0578a5309e1fc264e5a4acc30543bea075be43vboxsync STAM_STATS({ *ppStat = &pVM->iom.s.StatRZInstMovsMMIO; });
cb0578a5309e1fc264e5a4acc30543bea075be43vboxsync if (!pMMIODst->CTX_SUFF(pfnWriteCallback) && pMMIODst->pfnWriteCallbackR3)
cb0578a5309e1fc264e5a4acc30543bea075be43vboxsync /* copy loop. */
cb0578a5309e1fc264e5a4acc30543bea075be43vboxsync rc = iomMMIODoRead(pVM, pRange, Phys, &u32Data, cb);
cb0578a5309e1fc264e5a4acc30543bea075be43vboxsync rc = iomMMIODoWrite(pVM, pMMIODst, PhysDst, &u32Data, cb);
cb0578a5309e1fc264e5a4acc30543bea075be43vboxsync * Normal: [MMIO] -> [Mem]
ad290511521ce8388a9926b165241ecf83c330a7vboxsync /* Access verification first; we currently can't recover properly from traps inside this instruction */
cb0578a5309e1fc264e5a4acc30543bea075be43vboxsync rc = PGMVerifyAccess(pVCpu, pu8Virt, cTransfers * cb, X86_PTE_RW | ((cpl == 3) ? X86_PTE_US : 0));
cb0578a5309e1fc264e5a4acc30543bea075be43vboxsync Log(("MOVS will generate a trap -> recompiler, rc=%d\n", rc));
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync /* copy loop. */
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync rc = iomMMIODoRead(pVM, pRange, Phys, &u32Data, cb);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync rc = iomRamWrite(pVCpu, pRegFrame, (RTGCPTR)pu8Virt, &u32Data, cb);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync Log(("iomRamWrite %08X size=%d failed with %d\n", pu8Virt, cb, rc));
105b1a31b6037dbe14acb8d09e60da540885202bvboxsync /* Update ecx on exit. */
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync /* work statistics. */
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync#endif /* IOM_WITH_MOVS_SUPPORT */
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * Gets the address / opcode mask corresponding to the given CPU mode.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @returns Mask.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @param enmCpuMode CPU mode.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsyncstatic uint64_t iomDisModeToMask(DISCPUMODE enmCpuMode)
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * [REP] STOSB
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * [REP] STOSW
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * [REP] STOSD
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * Restricted implementation.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @returns VBox status code.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @param pVM The virtual machine.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @param pRegFrame Trap register frame.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @param GCPhysFault The GC physical address corresponding to pvFault.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @param pCpu Disassembler CPU state.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @param pRange Pointer MMIO range.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsyncstatic int iomInterpretSTOS(PVM pVM, PCPUMCTXCORE pRegFrame, RTGCPHYS GCPhysFault, PDISCPUSTATE pCpu, PIOMMMIORANGE pRange)
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * We do not support segment prefixes or REPNE..
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync if (pCpu->fPrefix & (DISPREFIX_SEG | DISPREFIX_REPNE))
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync return VINF_IOM_R3_MMIO_READ_WRITE; /** @todo -> REM instead of HC */
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync uint64_t const fAddrMask = iomDisModeToMask((DISCPUMODE)pCpu->uAddrMode);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync if ( CPUMIsGuestIn64BitCode(VMMGetCpu(pVM), pRegFrame)
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync/** @todo r=bird: bounds checks! */
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * Get data size.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync unsigned cb = DISGetParamSize(pCpu, &pCpu->param1);
4c98b8b05f3783351cf256cc90cd4478fb28b62bvboxsync AssertMsg(cb > 0 && cb <= sizeof(uint64_t), ("cb=%d\n", cb));
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync int offIncrement = pRegFrame->eflags.Bits.u1DF ? -(signed)cb : (signed)cb;
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync if (pVM->iom.s.cStosMaxBytes < (cTransfers << SIZE_2_SHIFT(cb)))
4c98b8b05f3783351cf256cc90cd4478fb28b62bvboxsync pVM->iom.s.cStosMaxBytes = cTransfers << SIZE_2_SHIFT(cb);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * Use the fill callback.
ad290511521ce8388a9926b165241ecf83c330a7vboxsync /** @todo pfnFillCallback must return number of bytes successfully written!!! */
cb0578a5309e1fc264e5a4acc30543bea075be43vboxsync /* addr++ variant. */
cb0578a5309e1fc264e5a4acc30543bea075be43vboxsync rc = pRange->CTX_SUFF(pfnFillCallback)(pRange->CTX_SUFF(pDevIns), pRange->CTX_SUFF(pvUser), Phys,
cb0578a5309e1fc264e5a4acc30543bea075be43vboxsync /* Update registers. */
cb0578a5309e1fc264e5a4acc30543bea075be43vboxsync pRegFrame->rdi = ((pRegFrame->rdi + (cTransfers << SIZE_2_SHIFT(cb))) & fAddrMask)
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync /* addr-- variant. */
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync rc = pRange->CTX_SUFF(pfnFillCallback)(pRange->CTX_SUFF(pDevIns), pRange->CTX_SUFF(pvUser),
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync /* Update registers. */
4c98b8b05f3783351cf256cc90cd4478fb28b62bvboxsync pRegFrame->rdi = ((pRegFrame->rdi - (cTransfers << SIZE_2_SHIFT(cb))) & fAddrMask)
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * Use the write callback.
4c98b8b05f3783351cf256cc90cd4478fb28b62bvboxsync Assert(pRange->CTX_SUFF(pfnWriteCallback) || !pRange->pfnWriteCallbackR3);
4c98b8b05f3783351cf256cc90cd4478fb28b62bvboxsync /* fill loop. */
09f4b412099acda62997fd82c8608075c453b3ebvboxsync rc = iomMMIODoWrite(pVM, pRange, Phys, &u64Data, cb);
c7d2f5508ab9703a7a6c5cce5c9d4bf335af660avboxsync pRegFrame->rdi = ((pRegFrame->rdi + offIncrement) & fAddrMask)
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync /* Update rcx on exit. */
67b8a5a52c43a79ea7e159dbbeec99687fb9cd3bvboxsync * Work statistics and return.
ad290511521ce8388a9926b165241ecf83c330a7vboxsync * [REP] LODSB
105b1a31b6037dbe14acb8d09e60da540885202bvboxsync * [REP] LODSW
6b2a50fc09aa4f7ce2082284f082d97a2c738321vboxsync * [REP] LODSD
3fa7a7e633f46a212052b510cdb8cee41f279a67vboxsync * Restricted implementation.
3fa7a7e633f46a212052b510cdb8cee41f279a67vboxsync * @returns VBox status code.
3fa7a7e633f46a212052b510cdb8cee41f279a67vboxsync * @param pVM The virtual machine.
3fa7a7e633f46a212052b510cdb8cee41f279a67vboxsync * @param pRegFrame Trap register frame.
3fa7a7e633f46a212052b510cdb8cee41f279a67vboxsync * @param GCPhysFault The GC physical address corresponding to pvFault.
3fa7a7e633f46a212052b510cdb8cee41f279a67vboxsync * @param pCpu Disassembler CPU state.
3fa7a7e633f46a212052b510cdb8cee41f279a67vboxsync * @param pRange Pointer MMIO range.
3fa7a7e633f46a212052b510cdb8cee41f279a67vboxsyncstatic int iomInterpretLODS(PVM pVM, PCPUMCTXCORE pRegFrame, RTGCPHYS GCPhysFault, PDISCPUSTATE pCpu, PIOMMMIORANGE pRange)
3fa7a7e633f46a212052b510cdb8cee41f279a67vboxsync Assert(pRange->CTX_SUFF(pfnReadCallback) || !pRange->pfnReadCallbackR3);
3fa7a7e633f46a212052b510cdb8cee41f279a67vboxsync * We do not support segment prefixes or REP*.
3fa7a7e633f46a212052b510cdb8cee41f279a67vboxsync if (pCpu->fPrefix & (DISPREFIX_SEG | DISPREFIX_REP | DISPREFIX_REPNE))
3fa7a7e633f46a212052b510cdb8cee41f279a67vboxsync return VINF_IOM_R3_MMIO_READ_WRITE; /** @todo -> REM instead of HC */
3fa7a7e633f46a212052b510cdb8cee41f279a67vboxsync * Get data size.
3fa7a7e633f46a212052b510cdb8cee41f279a67vboxsync unsigned cb = DISGetParamSize(pCpu, &pCpu->param2);
3fa7a7e633f46a212052b510cdb8cee41f279a67vboxsync AssertMsg(cb > 0 && cb <= sizeof(uint64_t), ("cb=%d\n", cb));
3fa7a7e633f46a212052b510cdb8cee41f279a67vboxsync int offIncrement = pRegFrame->eflags.Bits.u1DF ? -(signed)cb : (signed)cb;
3fa7a7e633f46a212052b510cdb8cee41f279a67vboxsync * Perform read.
3fa7a7e633f46a212052b510cdb8cee41f279a67vboxsync int rc = iomMMIODoRead(pVM, pRange, GCPhysFault, &pRegFrame->rax, cb);
3fa7a7e633f46a212052b510cdb8cee41f279a67vboxsync uint64_t const fAddrMask = iomDisModeToMask((DISCPUMODE)pCpu->uAddrMode);
3fa7a7e633f46a212052b510cdb8cee41f279a67vboxsync pRegFrame->rsi = ((pRegFrame->rsi + offIncrement) & fAddrMask)
3fa7a7e633f46a212052b510cdb8cee41f279a67vboxsync * Work statistics and return.
3fa7a7e633f46a212052b510cdb8cee41f279a67vboxsync * CMP [MMIO], reg|imm
3fa7a7e633f46a212052b510cdb8cee41f279a67vboxsync * CMP reg|imm, [MMIO]
3fa7a7e633f46a212052b510cdb8cee41f279a67vboxsync * Restricted implementation.
3fa7a7e633f46a212052b510cdb8cee41f279a67vboxsync * @returns VBox status code.
6b2a50fc09aa4f7ce2082284f082d97a2c738321vboxsync * @param pVM The virtual machine.
6b2a50fc09aa4f7ce2082284f082d97a2c738321vboxsync * @param pRegFrame Trap register frame.
6b2a50fc09aa4f7ce2082284f082d97a2c738321vboxsync * @param GCPhysFault The GC physical address corresponding to pvFault.
73ba84f95f918cc170be38908ad240fbb2f8f354vboxsync * @param pCpu Disassembler CPU state.
73ba84f95f918cc170be38908ad240fbb2f8f354vboxsync * @param pRange Pointer MMIO range.
5159c4c6485473c77871b515c15b59c3caa60b46vboxsyncstatic int iomInterpretCMP(PVM pVM, PCPUMCTXCORE pRegFrame, RTGCPHYS GCPhysFault, PDISCPUSTATE pCpu, PIOMMMIORANGE pRange)
5159c4c6485473c77871b515c15b59c3caa60b46vboxsync Assert(pRange->CTX_SUFF(pfnReadCallback) || !pRange->pfnReadCallbackR3);
5159c4c6485473c77871b515c15b59c3caa60b46vboxsync * Get the operands.
5159c4c6485473c77871b515c15b59c3caa60b46vboxsync unsigned cb = 0;
5159c4c6485473c77871b515c15b59c3caa60b46vboxsync if (iomGetRegImmData(pCpu, &pCpu->param1, pRegFrame, &uData1, &cb))
5159c4c6485473c77871b515c15b59c3caa60b46vboxsync /* cmp reg, [MMIO]. */
5159c4c6485473c77871b515c15b59c3caa60b46vboxsync rc = iomMMIODoRead(pVM, pRange, GCPhysFault, &uData2, cb);
5159c4c6485473c77871b515c15b59c3caa60b46vboxsync else if (iomGetRegImmData(pCpu, &pCpu->param2, pRegFrame, &uData2, &cb))
5159c4c6485473c77871b515c15b59c3caa60b46vboxsync /* cmp [MMIO], reg|imm. */
5159c4c6485473c77871b515c15b59c3caa60b46vboxsync rc = iomMMIODoRead(pVM, pRange, GCPhysFault, &uData1, cb);
73ba84f95f918cc170be38908ad240fbb2f8f354vboxsync /* Can't deal with 8 byte operands in our 32-bit emulation code. */
6b2a50fc09aa4f7ce2082284f082d97a2c738321vboxsync /* Emulate CMP and update guest flags. */
3fa7a7e633f46a212052b510cdb8cee41f279a67vboxsync uint32_t eflags = EMEmulateCmp(uData1, uData2, cb);
3fa7a7e633f46a212052b510cdb8cee41f279a67vboxsync pRegFrame->eflags.u32 = (pRegFrame->eflags.u32 & ~(X86_EFL_CF | X86_EFL_PF | X86_EFL_AF | X86_EFL_ZF | X86_EFL_SF | X86_EFL_OF))
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync | (eflags & (X86_EFL_CF | X86_EFL_PF | X86_EFL_AF | X86_EFL_ZF | X86_EFL_SF | X86_EFL_OF));
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * AND [MMIO], reg|imm
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * AND reg, [MMIO]
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * OR [MMIO], reg|imm
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * OR reg, [MMIO]
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * Restricted implementation.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @returns VBox status code.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @param pVM The virtual machine.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @param pRegFrame Trap register frame.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @param GCPhysFault The GC physical address corresponding to pvFault.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @param pCpu Disassembler CPU state.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @param pRange Pointer MMIO range.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @param pfnEmulate Instruction emulation function.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsyncstatic int iomInterpretOrXorAnd(PVM pVM, PCPUMCTXCORE pRegFrame, RTGCPHYS GCPhysFault, PDISCPUSTATE pCpu, PIOMMMIORANGE pRange, PFNEMULATEPARAM3 pfnEmulate)
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync unsigned cb = 0;
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync const char *pszInstr;
ad290511521ce8388a9926b165241ecf83c330a7vboxsync if (iomGetRegImmData(pCpu, &pCpu->param1, pRegFrame, &uData1, &cb))
105b1a31b6037dbe14acb8d09e60da540885202bvboxsync /* Can't deal with 8 byte operands in our 32-bit emulation code. */
3fa7a7e633f46a212052b510cdb8cee41f279a67vboxsync /* and reg, [MMIO]. */
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync Assert(pRange->CTX_SUFF(pfnReadCallback) || !pRange->pfnReadCallbackR3);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync rc = iomMMIODoRead(pVM, pRange, GCPhysFault, &uData2, cb);
3a343ca21a267ec3c54e2317e2ed18fe99b8ebbbvboxsync else if (iomGetRegImmData(pCpu, &pCpu->param2, pRegFrame, &uData2, &cb))
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync /* Can't deal with 8 byte operands in our 32-bit emulation code. */
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync /* and [MMIO], reg|imm. */
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync if ( (pRange->CTX_SUFF(pfnReadCallback) || !pRange->pfnReadCallbackR3)
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync && (pRange->CTX_SUFF(pfnWriteCallback) || !pRange->pfnWriteCallbackR3))
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync rc = iomMMIODoRead(pVM, pRange, GCPhysFault, &uData1, cb);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync /* Emulate AND and update guest flags. */
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync uint32_t eflags = pfnEmulate((uint32_t *)&uData1, uData2, cb);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync LogFlow(("iomInterpretOrXorAnd %s result %RX64\n", pszInstr, uData1));
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync /* Store result to MMIO. */
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync rc = iomMMIODoWrite(pVM, pRange, GCPhysFault, &uData1, cb);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync /* Store result to register. */
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync bool fRc = iomSaveDataToReg(pCpu, &pCpu->param1, pRegFrame, uData1);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync AssertMsg(fRc, ("Failed to store register value!\n")); NOREF(fRc);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync /* Update guest's eflags and finish. */
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync pRegFrame->eflags.u32 = (pRegFrame->eflags.u32 & ~(X86_EFL_CF | X86_EFL_PF | X86_EFL_AF | X86_EFL_ZF | X86_EFL_SF | X86_EFL_OF))
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync | (eflags & (X86_EFL_CF | X86_EFL_PF | X86_EFL_AF | X86_EFL_ZF | X86_EFL_SF | X86_EFL_OF));
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * TEST [MMIO], reg|imm
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * TEST reg, [MMIO]
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * Restricted implementation.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @returns VBox status code.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @param pVM The virtual machine.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @param pRegFrame Trap register frame.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @param GCPhysFault The GC physical address corresponding to pvFault.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @param pCpu Disassembler CPU state.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @param pRange Pointer MMIO range.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsyncstatic int iomInterpretTEST(PVM pVM, PCPUMCTXCORE pRegFrame, RTGCPHYS GCPhysFault, PDISCPUSTATE pCpu, PIOMMMIORANGE pRange)
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync Assert(pRange->CTX_SUFF(pfnReadCallback) || !pRange->pfnReadCallbackR3);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync unsigned cb = 0;
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync if (iomGetRegImmData(pCpu, &pCpu->param1, pRegFrame, &uData1, &cb))
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync /* and test, [MMIO]. */
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync rc = iomMMIODoRead(pVM, pRange, GCPhysFault, &uData2, cb);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync else if (iomGetRegImmData(pCpu, &pCpu->param2, pRegFrame, &uData2, &cb))
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync /* test [MMIO], reg|imm. */
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync rc = iomMMIODoRead(pVM, pRange, GCPhysFault, &uData1, cb);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync /* Can't deal with 8 byte operands in our 32-bit emulation code. */
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync /* Emulate TEST (=AND without write back) and update guest EFLAGS. */
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync uint32_t eflags = EMEmulateAnd((uint32_t *)&uData1, uData2, cb);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync pRegFrame->eflags.u32 = (pRegFrame->eflags.u32 & ~(X86_EFL_CF | X86_EFL_PF | X86_EFL_AF | X86_EFL_ZF | X86_EFL_SF | X86_EFL_OF))
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync | (eflags & (X86_EFL_CF | X86_EFL_PF | X86_EFL_AF | X86_EFL_ZF | X86_EFL_SF | X86_EFL_OF));
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * BT [MMIO], reg|imm
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * Restricted implementation.
cb0578a5309e1fc264e5a4acc30543bea075be43vboxsync * @returns VBox status code.
cb0578a5309e1fc264e5a4acc30543bea075be43vboxsync * @param pVM The virtual machine.
cb0578a5309e1fc264e5a4acc30543bea075be43vboxsync * @param pRegFrame Trap register frame.
cb0578a5309e1fc264e5a4acc30543bea075be43vboxsync * @param GCPhysFault The GC physical address corresponding to pvFault.
cb0578a5309e1fc264e5a4acc30543bea075be43vboxsync * @param pCpu Disassembler CPU state.
cb0578a5309e1fc264e5a4acc30543bea075be43vboxsync * @param pRange Pointer MMIO range.
cb0578a5309e1fc264e5a4acc30543bea075be43vboxsyncstatic int iomInterpretBT(PVM pVM, PCPUMCTXCORE pRegFrame, RTGCPHYS GCPhysFault, PDISCPUSTATE pCpu, PIOMMMIORANGE pRange)
cb0578a5309e1fc264e5a4acc30543bea075be43vboxsync Assert(pRange->CTX_SUFF(pfnReadCallback) || !pRange->pfnReadCallbackR3);
cb0578a5309e1fc264e5a4acc30543bea075be43vboxsync if (!iomGetRegImmData(pCpu, &pCpu->param2, pRegFrame, &uBit, &cbIgnored))
fdb57e5580007400346665b64c0e14ca1d149019vboxsync /* The size of the memory operand only matters here. */
fdb57e5580007400346665b64c0e14ca1d149019vboxsync unsigned cbData = DISGetParamSize(pCpu, &pCpu->param1);
cb0578a5309e1fc264e5a4acc30543bea075be43vboxsync /* bt [MMIO], reg|imm. */
cb0578a5309e1fc264e5a4acc30543bea075be43vboxsync int rc = iomMMIODoRead(pVM, pRange, GCPhysFault, &uData, cbData);
cb0578a5309e1fc264e5a4acc30543bea075be43vboxsync /* Find the bit inside the faulting address */
fdb57e5580007400346665b64c0e14ca1d149019vboxsync * XCHG [MMIO], reg
fdb57e5580007400346665b64c0e14ca1d149019vboxsync * XCHG reg, [MMIO]
fdb57e5580007400346665b64c0e14ca1d149019vboxsync * Restricted implementation.
fdb57e5580007400346665b64c0e14ca1d149019vboxsync * @returns VBox status code.
fdb57e5580007400346665b64c0e14ca1d149019vboxsync * @param pVM The virtual machine.
fdb57e5580007400346665b64c0e14ca1d149019vboxsync * @param pRegFrame Trap register frame.
fdb57e5580007400346665b64c0e14ca1d149019vboxsync * @param GCPhysFault The GC physical address corresponding to pvFault.
fdb57e5580007400346665b64c0e14ca1d149019vboxsync * @param pCpu Disassembler CPU state.
fdb57e5580007400346665b64c0e14ca1d149019vboxsync * @param pRange Pointer MMIO range.
fdb57e5580007400346665b64c0e14ca1d149019vboxsyncstatic int iomInterpretXCHG(PVM pVM, PCPUMCTXCORE pRegFrame, RTGCPHYS GCPhysFault, PDISCPUSTATE pCpu, PIOMMMIORANGE pRange)
7ea49b4765b66fc68d2e6c1cb2a647b53a4aea24vboxsync /* Check for read & write handlers since IOMMMIOHandler doesn't cover this. */
fdb57e5580007400346665b64c0e14ca1d149019vboxsync if ( (!pRange->CTX_SUFF(pfnReadCallback) && pRange->pfnReadCallbackR3)
fdb57e5580007400346665b64c0e14ca1d149019vboxsync || (!pRange->CTX_SUFF(pfnWriteCallback) && pRange->pfnWriteCallbackR3))
fdb57e5580007400346665b64c0e14ca1d149019vboxsync unsigned cb = 0;
fdb57e5580007400346665b64c0e14ca1d149019vboxsync if (iomGetRegImmData(pCpu, &pCpu->param1, pRegFrame, &uData1, &cb))
fdb57e5580007400346665b64c0e14ca1d149019vboxsync /* xchg reg, [MMIO]. */
fdb57e5580007400346665b64c0e14ca1d149019vboxsync rc = iomMMIODoRead(pVM, pRange, GCPhysFault, &uData2, cb);
fdb57e5580007400346665b64c0e14ca1d149019vboxsync /* Store result to MMIO. */
fdb57e5580007400346665b64c0e14ca1d149019vboxsync rc = iomMMIODoWrite(pVM, pRange, GCPhysFault, &uData1, cb);
fdb57e5580007400346665b64c0e14ca1d149019vboxsync /* Store result to register. */
fdb57e5580007400346665b64c0e14ca1d149019vboxsync bool fRc = iomSaveDataToReg(pCpu, &pCpu->param1, pRegFrame, uData2);
fdb57e5580007400346665b64c0e14ca1d149019vboxsync AssertMsg(fRc, ("Failed to store register value!\n")); NOREF(fRc);
fdb57e5580007400346665b64c0e14ca1d149019vboxsync Assert(rc == VINF_IOM_R3_MMIO_WRITE || rc == VINF_PATM_HC_MMIO_PATCH_WRITE);
fdb57e5580007400346665b64c0e14ca1d149019vboxsync Assert(rc == VINF_IOM_R3_MMIO_READ || rc == VINF_PATM_HC_MMIO_PATCH_READ);
fdb57e5580007400346665b64c0e14ca1d149019vboxsync else if (iomGetRegImmData(pCpu, &pCpu->param2, pRegFrame, &uData2, &cb))
fdb57e5580007400346665b64c0e14ca1d149019vboxsync /* xchg [MMIO], reg. */
fdb57e5580007400346665b64c0e14ca1d149019vboxsync rc = iomMMIODoRead(pVM, pRange, GCPhysFault, &uData1, cb);
fdb57e5580007400346665b64c0e14ca1d149019vboxsync /* Store result to MMIO. */
fdb57e5580007400346665b64c0e14ca1d149019vboxsync rc = iomMMIODoWrite(pVM, pRange, GCPhysFault, &uData2, cb);
fdb57e5580007400346665b64c0e14ca1d149019vboxsync /* Store result to register. */
fdb57e5580007400346665b64c0e14ca1d149019vboxsync bool fRc = iomSaveDataToReg(pCpu, &pCpu->param2, pRegFrame, uData1);
fdb57e5580007400346665b64c0e14ca1d149019vboxsync AssertMsg(fRc, ("Failed to store register value!\n")); NOREF(fRc);
fdb57e5580007400346665b64c0e14ca1d149019vboxsync AssertMsg(rc == VINF_IOM_R3_MMIO_READ_WRITE || rc == VINF_IOM_R3_MMIO_WRITE || rc == VINF_PATM_HC_MMIO_PATCH_WRITE, ("rc=%Rrc\n", rc));
fdb57e5580007400346665b64c0e14ca1d149019vboxsync AssertMsg(rc == VINF_IOM_R3_MMIO_READ_WRITE || rc == VINF_IOM_R3_MMIO_READ || rc == VINF_PATM_HC_MMIO_PATCH_READ, ("rc=%Rrc\n", rc));
1389294d44ac76b0a25f5655756c9d39855a73efvboxsync * \#PF Handler callback for MMIO ranges.
fdb57e5580007400346665b64c0e14ca1d149019vboxsync * @returns VBox status code (appropriate for GC return).
fdb57e5580007400346665b64c0e14ca1d149019vboxsync * @param pVM VM Handle.
fdb57e5580007400346665b64c0e14ca1d149019vboxsync * @param uErrorCode CPU Error code. This is UINT32_MAX when we don't have
fdb57e5580007400346665b64c0e14ca1d149019vboxsync * any error code (the EPT misconfig hack).
fdb57e5580007400346665b64c0e14ca1d149019vboxsync * @param pCtxCore Trap register frame.
fdb57e5580007400346665b64c0e14ca1d149019vboxsync * @param GCPhysFault The GC physical address corresponding to pvFault.
fdb57e5580007400346665b64c0e14ca1d149019vboxsync * @param pvUser Pointer to the MMIO ring-3 range entry.
fdb57e5580007400346665b64c0e14ca1d149019vboxsyncstatic int iomMMIOHandler(PVM pVM, uint32_t uErrorCode, PCPUMCTXCORE pCtxCore, RTGCPHYS GCPhysFault, void *pvUser)
fdb57e5580007400346665b64c0e14ca1d149019vboxsync /* Take the IOM lock before performing any MMIO. */
ad290511521ce8388a9926b165241ecf83c330a7vboxsync STAM_PROFILE_START(&pVM->iom.s.StatRZMMIOHandler, a);
cb0578a5309e1fc264e5a4acc30543bea075be43vboxsync Log(("iomMMIOHandler: GCPhys=%RGp uErr=%#x rip=%RGv\n",
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync Assert(pRange == iomMmioGetRange(pVM, GCPhysFault));
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * Locate the statistics, if > PAGE_SIZE we'll use the first byte for everything.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync PIOMMMIOSTATS pStats = iomMmioGetStats(pVM, GCPhysFault, pRange);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync STAM_PROFILE_STOP(&pVM->iom.s.StatRZMMIOHandler, a);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * Should we defer the request right away? This isn't usually the case, so
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * do the simple test first and the try deal with uErrorCode being N/A.
3ea1dbf096240fc221aea99352a74c17a367a9b6vboxsync if (RT_UNLIKELY( ( !pRange->CTX_SUFF(pfnWriteCallback)
3ea1dbf096240fc221aea99352a74c17a367a9b6vboxsync ? pRange->pfnWriteCallbackR3 || pRange->pfnReadCallbackR3
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync ? !pRange->CTX_SUFF(pfnWriteCallback) && pRange->pfnWriteCallbackR3
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync : !pRange->CTX_SUFF(pfnReadCallback) && pRange->pfnReadCallbackR3
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync STAM_PROFILE_STOP(&pVM->iom.s.StatRZMMIOHandler, a);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync#endif /* !IN_RING3 */
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * Retain the range and do locking.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync rc = PDMCritSectEnter(pDevIns->CTX_SUFF(pCritSectRo), VINF_IOM_R3_MMIO_READ_WRITE);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * Disassemble the instruction and interpret it.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync rc = EMInterpretDisasOne(pVM, pVCpu, pCtxCore, pDis, &cbOp);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync AssertMsg(uErrorCode == UINT32_MAX || DISUSE_IS_EFFECTIVE_ADDR(pDis->param1.fUse) == !!(uErrorCode & X86_TRAP_PF_RW), ("flags1=%#llx/%RTbool flags2=%#llx/%RTbool ErrCd=%#x\n", pDis->param1.fUse, DISUSE_IS_EFFECTIVE_ADDR(pDis->param1.fUse), pDis->param2.fUse, DISUSE_IS_EFFECTIVE_ADDR(pDis->param2.fUse), uErrorCode));
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync if (uErrorCode != UINT32_MAX /* EPT+MMIO optimization */
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync rc = iomInterpretMOVxXWrite(pVM, pCtxCore, pDis, pRange, GCPhysFault);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync rc = iomInterpretMOVxXRead(pVM, pCtxCore, pDis, pRange, GCPhysFault);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync STAM_PROFILE_ADV_START(&pVM->iom.s.StatRZInstMovs, c);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync rc = iomInterpretMOVS(pVM, !!(uErrorCode & X86_TRAP_PF_RW), pCtxCore, GCPhysFault, pDis, pRange, &pStat);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync STAM_PROFILE_ADV_STOP_EX(&pVM->iom.s.StatRZInstMovs, pStat, c);
e6ad2e18e663b076aeabfec994947514566a7accvboxsync rc = iomInterpretSTOS(pVM, pCtxCore, GCPhysFault, pDis, pRange);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync Assert(!(uErrorCode & X86_TRAP_PF_RW) || uErrorCode == UINT32_MAX);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync rc = iomInterpretLODS(pVM, pCtxCore, GCPhysFault, pDis, pRange);
105b1a31b6037dbe14acb8d09e60da540885202bvboxsync Assert(!(uErrorCode & X86_TRAP_PF_RW) || uErrorCode == UINT32_MAX);
105b1a31b6037dbe14acb8d09e60da540885202bvboxsync rc = iomInterpretCMP(pVM, pCtxCore, GCPhysFault, pDis, pRange);
105b1a31b6037dbe14acb8d09e60da540885202bvboxsync rc = iomInterpretOrXorAnd(pVM, pCtxCore, GCPhysFault, pDis, pRange, EMEmulateAnd);
105b1a31b6037dbe14acb8d09e60da540885202bvboxsync rc = iomInterpretOrXorAnd(pVM, pCtxCore, GCPhysFault, pDis, pRange, EMEmulateOr);
105b1a31b6037dbe14acb8d09e60da540885202bvboxsync rc = iomInterpretOrXorAnd(pVM, pCtxCore, GCPhysFault, pDis, pRange, EMEmulateXor);
105b1a31b6037dbe14acb8d09e60da540885202bvboxsync Assert(!(uErrorCode & X86_TRAP_PF_RW) || uErrorCode == UINT32_MAX);
105b1a31b6037dbe14acb8d09e60da540885202bvboxsync rc = iomInterpretTEST(pVM, pCtxCore, GCPhysFault, pDis, pRange);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync Assert(!(uErrorCode & X86_TRAP_PF_RW) || uErrorCode == UINT32_MAX);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync rc = iomInterpretBT(pVM, pCtxCore, GCPhysFault, pDis, pRange);
c58dc77ef4af214d7ae06910fa5ab18587d2ae08vboxsync rc = iomInterpretXCHG(pVM, pCtxCore, GCPhysFault, pDis, pRange);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * The instruction isn't supported. Hand it on to ring-3.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * On success advance EIP.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync#if defined(VBOX_WITH_STATISTICS) && !defined(IN_RING3)
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync STAM_PROFILE_STOP(&pVM->iom.s.StatRZMMIOHandler, a);
ad290511521ce8388a9926b165241ecf83c330a7vboxsync * \#PF Handler callback for MMIO ranges.
ad290511521ce8388a9926b165241ecf83c330a7vboxsync * @returns VBox status code (appropriate for GC return).
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @param pVM VM Handle.
423b1ce7f19ff0687e825ddc42d8bc6c68a4c9cdvboxsync * @param uErrorCode CPU Error code.
423b1ce7f19ff0687e825ddc42d8bc6c68a4c9cdvboxsync * @param pCtxCore Trap register frame.
fdb57e5580007400346665b64c0e14ca1d149019vboxsync * @param pvFault The fault address (cr2).
423b1ce7f19ff0687e825ddc42d8bc6c68a4c9cdvboxsync * @param GCPhysFault The GC physical address corresponding to pvFault.
fdb57e5580007400346665b64c0e14ca1d149019vboxsync * @param pvUser Pointer to the MMIO ring-3 range entry.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsyncVMMDECL(int) IOMMMIOHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pCtxCore, RTGCPTR pvFault, RTGCPHYS GCPhysFault, void *pvUser)
ad290511521ce8388a9926b165241ecf83c330a7vboxsync LogFlow(("IOMMMIOHandler: GCPhys=%RGp uErr=%#x pvFault=%RGv rip=%RGv\n",
cb0578a5309e1fc264e5a4acc30543bea075be43vboxsync GCPhysFault, (uint32_t)uErrorCode, pvFault, (RTGCPTR)pCtxCore->rip));
cb0578a5309e1fc264e5a4acc30543bea075be43vboxsync VBOXSTRICTRC rcStrict = iomMMIOHandler(pVM, (uint32_t)uErrorCode, pCtxCore, GCPhysFault, pvUser);
cb0578a5309e1fc264e5a4acc30543bea075be43vboxsync * Physical access handler for MMIO ranges.
cb0578a5309e1fc264e5a4acc30543bea075be43vboxsync * @returns VBox status code (appropriate for GC return).
cb0578a5309e1fc264e5a4acc30543bea075be43vboxsync * @param pVM VM Handle.
cb0578a5309e1fc264e5a4acc30543bea075be43vboxsync * @param uErrorCode CPU Error code.
cb0578a5309e1fc264e5a4acc30543bea075be43vboxsync * @param pCtxCore Trap register frame.
fdb57e5580007400346665b64c0e14ca1d149019vboxsync * @param GCPhysFault The GC physical address.
fdb57e5580007400346665b64c0e14ca1d149019vboxsyncVMMDECL(VBOXSTRICTRC) IOMMMIOPhysHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pCtxCore, RTGCPHYS GCPhysFault)
fdb57e5580007400346665b64c0e14ca1d149019vboxsync VBOXSTRICTRC rcStrict = iomMMIOHandler(pVM, (uint32_t)uErrorCode, pCtxCore, GCPhysFault, iomMmioGetRange(pVM, GCPhysFault));
fdb57e5580007400346665b64c0e14ca1d149019vboxsync * \#PF Handler callback for MMIO ranges.
fdb57e5580007400346665b64c0e14ca1d149019vboxsync * @returns VINF_SUCCESS if the handler have carried out the operation.
fdb57e5580007400346665b64c0e14ca1d149019vboxsync * @returns VINF_PGM_HANDLER_DO_DEFAULT if the caller should carry out the access operation.
fdb57e5580007400346665b64c0e14ca1d149019vboxsync * @param pVM VM Handle.
fdb57e5580007400346665b64c0e14ca1d149019vboxsync * @param GCPhys The physical address the guest is writing to.
fdb57e5580007400346665b64c0e14ca1d149019vboxsync * @param pvPhys The HC mapping of that address.
423b1ce7f19ff0687e825ddc42d8bc6c68a4c9cdvboxsync * @param pvBuf What the guest is reading/writing.
fdb57e5580007400346665b64c0e14ca1d149019vboxsync * @param cbBuf How much it's reading/writing.
fdb57e5580007400346665b64c0e14ca1d149019vboxsync * @param enmAccessType The access type.
fdb57e5580007400346665b64c0e14ca1d149019vboxsync * @param pvUser Pointer to the MMIO range entry.
423b1ce7f19ff0687e825ddc42d8bc6c68a4c9cdvboxsyncDECLCALLBACK(int) IOMR3MMIOHandler(PVM pVM, RTGCPHYS GCPhysFault, void *pvPhys, void *pvBuf, size_t cbBuf,
cb0578a5309e1fc264e5a4acc30543bea075be43vboxsync AssertMsg(cbBuf == 1 || cbBuf == 2 || cbBuf == 4 || cbBuf == 8, ("%zu\n", cbBuf));
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * Validate the range.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync Assert(pRange == iomMmioGetRange(pVM, GCPhysFault));
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * Perform locking.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync rc = PDMCritSectEnter(pDevIns->CTX_SUFF(pCritSectRo), VINF_IOM_R3_MMIO_READ_WRITE);
105b1a31b6037dbe14acb8d09e60da540885202bvboxsync * Perform the access.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync rc = iomMMIODoRead(pVM, pRange, GCPhysFault, pvBuf, (unsigned)cbBuf);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync rc = iomMMIODoWrite(pVM, pRange, GCPhysFault, pvBuf, (unsigned)cbBuf);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync#endif /* IN_RING3 */
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * Reads a MMIO register.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @returns VBox status code.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @param pVM VM handle.
9cdd4d805ecb43126372f7cf12e4032836cb738avboxsync * @param GCPhys The physical address to read.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @param pu32Value Where to store the value read.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @param cbValue The size of the register to read in bytes. 1, 2 or 4 bytes.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsyncVMMDECL(VBOXSTRICTRC) IOMMMIORead(PVM pVM, RTGCPHYS GCPhys, uint32_t *pu32Value, size_t cbValue)
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync /* Take the IOM lock before performing any MMIO. */
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync#if defined(IEM_VERIFICATION_MODE) && defined(IN_RING3)
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * Lookup the current context range node and statistics.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync PIOMMMIORANGE pRange = iomMmioGetRange(pVM, GCPhys);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync AssertMsgFailed(("Handlers and page tables are out of sync or something! GCPhys=%RGp cbValue=%d\n", GCPhys, cbValue));
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync PIOMMMIOSTATS pStats = iomMmioGetStats(pVM, GCPhys, pRange);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync#endif /* VBOX_WITH_STATISTICS */
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * Perform locking.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync rc = PDMCritSectEnter(pDevIns->CTX_SUFF(pCritSectRo), VINF_IOM_R3_MMIO_WRITE);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * Perform the read and deal with the result.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync STAM_PROFILE_START(&pStats->CTX_SUFF_Z(ProfRead), a);
3fa7a7e633f46a212052b510cdb8cee41f279a67vboxsync || (pRange->fFlags & IOMMMIO_FLAGS_READ_MODE) == IOMMMIO_FLAGS_READ_PASSTHRU
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync rc = pRange->CTX_SUFF(pfnReadCallback)(pRange->CTX_SUFF(pDevIns), pRange->CTX_SUFF(pvUser), GCPhys,
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync rc = iomMMIODoComplicatedRead(pVM, pRange, GCPhys, pu32Value, (unsigned)cbValue);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync STAM_PROFILE_STOP(&pStats->CTX_SUFF_Z(ProfRead), a);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync Log4(("IOMMMIORead: GCPhys=%RGp *pu32=%08RX32 cb=%d rc=VINF_SUCCESS\n", GCPhys, *pu32Value, cbValue));
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync Log4(("IOMMMIORead: GCPhys=%RGp *pu32=%08RX32 cb=%d rc=%Rrc\n", GCPhys, *pu32Value, cbValue, VBOXSTRICTRC_VAL(rc)));
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync Log4(("IOMMMIORead: GCPhys=%RGp *pu32=%08RX32 cb=%d rc=%Rrc\n", GCPhys, *pu32Value, cbValue, VBOXSTRICTRC_VAL(rc)));
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync Log4(("IOMMMIORead: GCPhys=%RGp *pu32=%08RX32 cb=%d rc=%Rrc\n", GCPhys, *pu32Value, cbValue, VBOXSTRICTRC_VAL(rc)));
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync /* not reached */
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * Unassigned memory - this is actually not supposed t happen...
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync STAM_PROFILE_START(&pStats->CTX_SUFF_Z(ProfRead), a); /** @todo STAM_PROFILE_ADD_ZERO_PERIOD */
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync STAM_PROFILE_STOP(&pStats->CTX_SUFF_Z(ProfRead), a);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync Log4(("IOMMMIORead: GCPhys=%RGp *pu32=%08RX32 cb=%d rc=VINF_SUCCESS\n", GCPhys, *pu32Value, cbValue));
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * Writes to a MMIO register.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @returns VBox status code.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @param pVM VM handle.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @param GCPhys The physical address to write to.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @param u32Value The value to write.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @param cbValue The size of the register to read in bytes. 1, 2 or 4 bytes.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsyncVMMDECL(VBOXSTRICTRC) IOMMMIOWrite(PVM pVM, RTGCPHYS GCPhys, uint32_t u32Value, size_t cbValue)
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync /* Take the IOM lock before performing any MMIO. */
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync#if defined(IEM_VERIFICATION_MODE) && defined(IN_RING3)
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync IEMNotifyMMIOWrite(pVM, GCPhys, u32Value, cbValue);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * Lookup the current context range node.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync PIOMMMIORANGE pRange = iomMmioGetRange(pVM, GCPhys);
2721dfb0e330d57ba888311520f5a343c64e7cefvboxsync AssertMsgFailed(("Handlers and page tables are out of sync or something! GCPhys=%RGp cbValue=%d\n", GCPhys, cbValue));
e6ad2e18e663b076aeabfec994947514566a7accvboxsync PIOMMMIOSTATS pStats = iomMmioGetStats(pVM, GCPhys, pRange);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync#endif /* VBOX_WITH_STATISTICS */
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * Perform locking.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync rc = PDMCritSectEnter(pDevIns->CTX_SUFF(pCritSectRo), VINF_IOM_R3_MMIO_READ);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * Perform the write.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync STAM_PROFILE_START(&pStats->CTX_SUFF_Z(ProfWrite), a);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync || (pRange->fFlags & IOMMMIO_FLAGS_WRITE_MODE) == IOMMMIO_FLAGS_WRITE_PASSTHRU
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync rc = pRange->CTX_SUFF(pfnWriteCallback)(pRange->CTX_SUFF(pDevIns), pRange->CTX_SUFF(pvUser),
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync rc = iomMMIODoComplicatedWrite(pVM, pRange, GCPhys, &u32Value, (unsigned)cbValue);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync STAM_PROFILE_STOP(&pStats->CTX_SUFF_Z(ProfWrite), a);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync Log4(("IOMMMIOWrite: GCPhys=%RGp u32=%08RX32 cb=%d rc=%Rrc\n", GCPhys, u32Value, cbValue, VBOXSTRICTRC_VAL(rc)));
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * No write handler, nothing to do.
73ba84f95f918cc170be38908ad240fbb2f8f354vboxsync STAM_PROFILE_START(&pStats->CTX_SUFF_Z(ProfWrite), a);
6b2a50fc09aa4f7ce2082284f082d97a2c738321vboxsync STAM_PROFILE_STOP(&pStats->CTX_SUFF_Z(ProfWrite), a);
73ba84f95f918cc170be38908ad240fbb2f8f354vboxsync Log4(("IOMMMIOWrite: GCPhys=%RGp u32=%08RX32 cb=%d rc=%Rrc\n", GCPhys, u32Value, cbValue, VINF_SUCCESS));
71c0735a959eefb3e0b7a3bd8c8640a5660584cavboxsync * ES:EDI,DX[,ECX]
71c0735a959eefb3e0b7a3bd8c8640a5660584cavboxsync * @remark Assumes caller checked the access privileges (IOMInterpretCheckPortIOAccess)
73ba84f95f918cc170be38908ad240fbb2f8f354vboxsync * @returns Strict VBox status code. Informational status codes other than the one documented
73ba84f95f918cc170be38908ad240fbb2f8f354vboxsync * here are to be treated as internal failure. Use IOM_SUCCESS() to check for success.
73ba84f95f918cc170be38908ad240fbb2f8f354vboxsync * @retval VINF_SUCCESS Success.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @retval VINF_EM_FIRST-VINF_EM_LAST Success with some exceptions (see IOM_SUCCESS()), the
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * status code must be passed on to EM.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @retval VINF_IOM_R3_IOPORT_READ Defer the read to ring-3. (R0/GC only)
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @retval VINF_EM_RAW_EMULATE_INSTR Defer the read to the REM.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @retval VINF_EM_RAW_GUEST_TRAP The exception was left pending. (TRPMRaiseXcptErr)
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @retval VINF_TRPM_XCPT_DISPATCHED The exception was raised and dispatched for raw-mode execution. (TRPMRaiseXcptErr)
4c98b8b05f3783351cf256cc90cd4478fb28b62bvboxsync * @retval VINF_EM_RESCHEDULE_REM The exception was dispatched and cannot be executed in raw-mode. (TRPMRaiseXcptErr)
4c98b8b05f3783351cf256cc90cd4478fb28b62bvboxsync * @param pVM The virtual machine.
4c98b8b05f3783351cf256cc90cd4478fb28b62bvboxsync * @param pRegFrame Pointer to CPUMCTXCORE guest registers structure.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @param uPort IO Port
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @param uPrefix IO instruction prefix
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @param enmAddrMode The address mode.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @param cbTransfer Size of transfer unit
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsyncVMMDECL(VBOXSTRICTRC) IOMInterpretINSEx(PVM pVM, PCPUMCTXCORE pRegFrame, uint32_t uPort, uint32_t uPrefix,
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * We do not support REPNE or decrementing destination
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * pointer. Segment prefixes are deliberately ignored, as per the instruction specification.
73ba84f95f918cc170be38908ad240fbb2f8f354vboxsync * Get bytes/words/dwords count to transfer.
73ba84f95f918cc170be38908ad240fbb2f8f354vboxsync uint64_t const fAddrMask = iomDisModeToMask(enmAddrMode);
73ba84f95f918cc170be38908ad240fbb2f8f354vboxsync /* Convert destination address es:edi. */
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync int rc2 = SELMToFlatEx(pVCpu, DISSELREG_ES, pRegFrame, pRegFrame->rdi & fAddrMask,
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync Log(("INS destination address conversion failed -> fallback, rc2=%d\n", rc2));
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync /* Access verification first; we can't recover from traps inside this instruction, as the port read cannot be repeated. */
1389294d44ac76b0a25f5655756c9d39855a73efvboxsync uint32_t const cpl = CPUMGetGuestCPL(pVCpu, pRegFrame);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync rc2 = PGMVerifyAccess(pVCpu, (RTGCUINTPTR)GCPtrDst, cTransfers * cbTransfer,
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync Log(("INS will generate a trap -> fallback, rc2=%d\n", rc2));
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync Log(("IOM: rep ins%d port %#x count %d\n", cbTransfer * 8, uPort, cTransfers));
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync /* If the device supports string transfers, ask it to do as
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * much as it wants. The rest is done with single-word transfers. */
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync rcStrict = IOMIOPortReadString(pVM, uPort, &GCPtrDst, &cTransfers, cbTransfer);
1389294d44ac76b0a25f5655756c9d39855a73efvboxsync AssertRC(VBOXSTRICTRC_VAL(rcStrict)); Assert(cTransfers <= cTransfersOrg);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync pRegFrame->rdi = ((pRegFrame->rdi + (cTransfersOrg - cTransfers) * cbTransfer) & fAddrMask)
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync rcStrict = IOMIOPortRead(pVM, uPort, &u32Value, cbTransfer);
be99a23d38fa03a9e93de71398f43ce4c4d7c685vboxsync rc2 = iomRamWrite(pVCpu, pRegFrame, GCPtrDst, &u32Value, cbTransfer);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync GCPtrDst = (RTGCPTR)((RTGCUINTPTR)GCPtrDst + cbTransfer);
73ba84f95f918cc170be38908ad240fbb2f8f354vboxsync pRegFrame->rdi = ((pRegFrame->rdi + cbTransfer) & fAddrMask)
73ba84f95f918cc170be38908ad240fbb2f8f354vboxsync /* Update rcx on exit. */
73ba84f95f918cc170be38908ad240fbb2f8f354vboxsync AssertMsg(rcStrict == VINF_SUCCESS || rcStrict == VINF_IOM_R3_IOPORT_READ || (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST) || RT_FAILURE(rcStrict), ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
b6b29a7e040f2b46480aa596fe0861bb16ce3da5vboxsync * ES:EDI,DX[,ECX]
fc080a2caa666d6cdc9f978d31b49587fdc91125vboxsync * @returns Strict VBox status code. Informational status codes other than the one documented
ad290511521ce8388a9926b165241ecf83c330a7vboxsync * here are to be treated as internal failure. Use IOM_SUCCESS() to check for success.
b6b29a7e040f2b46480aa596fe0861bb16ce3da5vboxsync * @retval VINF_SUCCESS Success.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @retval VINF_EM_FIRST-VINF_EM_LAST Success with some exceptions (see IOM_SUCCESS()), the
b6b29a7e040f2b46480aa596fe0861bb16ce3da5vboxsync * status code must be passed on to EM.
b6b29a7e040f2b46480aa596fe0861bb16ce3da5vboxsync * @retval VINF_IOM_R3_IOPORT_READ Defer the read to ring-3. (R0/GC only)
b6b29a7e040f2b46480aa596fe0861bb16ce3da5vboxsync * @retval VINF_EM_RAW_EMULATE_INSTR Defer the read to the REM.
b6b29a7e040f2b46480aa596fe0861bb16ce3da5vboxsync * @retval VINF_EM_RAW_GUEST_TRAP The exception was left pending. (TRPMRaiseXcptErr)
b6b29a7e040f2b46480aa596fe0861bb16ce3da5vboxsync * @retval VINF_TRPM_XCPT_DISPATCHED The exception was raised and dispatched for raw-mode execution. (TRPMRaiseXcptErr)
b6b29a7e040f2b46480aa596fe0861bb16ce3da5vboxsync * @retval VINF_EM_RESCHEDULE_REM The exception was dispatched and cannot be executed in raw-mode. (TRPMRaiseXcptErr)
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @param pVM The virtual machine.
a7ba3d5f31ca70d04a3933e570374e5ec5eff84avboxsync * @param pRegFrame Pointer to CPUMCTXCORE guest registers structure.
b6b29a7e040f2b46480aa596fe0861bb16ce3da5vboxsync * @param pCpu Disassembler CPU state.
73ba84f95f918cc170be38908ad240fbb2f8f354vboxsyncVMMDECL(VBOXSTRICTRC) IOMInterpretINS(PVM pVM, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu)
73ba84f95f918cc170be38908ad240fbb2f8f354vboxsync * Get port number directly from the register (no need to bother the
73ba84f95f918cc170be38908ad240fbb2f8f354vboxsync * disassembler). And get the I/O register size from the opcode / prefix.
73ba84f95f918cc170be38908ad240fbb2f8f354vboxsync unsigned cb = 0;
b6b29a7e040f2b46480aa596fe0861bb16ce3da5vboxsync cb = (pCpu->uOpMode == DISCPUMODE_16BIT) ? 2 : 4; /* dword in both 32 & 64 bits mode */
b6b29a7e040f2b46480aa596fe0861bb16ce3da5vboxsync VBOXSTRICTRC rcStrict = IOMInterpretCheckPortIOAccess(pVM, pRegFrame, Port, cb);
6b2a50fc09aa4f7ce2082284f082d97a2c738321vboxsync AssertMsg(rcStrict == VINF_EM_RAW_GUEST_TRAP || rcStrict == VINF_TRPM_XCPT_DISPATCHED || rcStrict == VINF_TRPM_XCPT_DISPATCHED || RT_FAILURE(rcStrict), ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync return IOMInterpretINSEx(pVM, pRegFrame, Port, pCpu->fPrefix, (DISCPUMODE)pCpu->uAddrMode, cb);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * DS:ESI,DX[,ECX]
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @remark Assumes caller checked the access privileges (IOMInterpretCheckPortIOAccess)
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @returns Strict VBox status code. Informational status codes other than the one documented
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * here are to be treated as internal failure. Use IOM_SUCCESS() to check for success.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @retval VINF_SUCCESS Success.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @retval VINF_EM_FIRST-VINF_EM_LAST Success with some exceptions (see IOM_SUCCESS()), the
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * status code must be passed on to EM.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @retval VINF_IOM_R3_IOPORT_WRITE Defer the write to ring-3. (R0/GC only)
4c98b8b05f3783351cf256cc90cd4478fb28b62bvboxsync * @retval VINF_EM_RAW_GUEST_TRAP The exception was left pending. (TRPMRaiseXcptErr)
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @retval VINF_TRPM_XCPT_DISPATCHED The exception was raised and dispatched for raw-mode execution. (TRPMRaiseXcptErr)
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @retval VINF_EM_RESCHEDULE_REM The exception was dispatched and cannot be executed in raw-mode. (TRPMRaiseXcptErr)
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @param pVM The virtual machine.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @param pRegFrame Pointer to CPUMCTXCORE guest registers structure.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @param uPort IO Port
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @param uPrefix IO instruction prefix
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @param enmAddrMode The address mode.
4c98b8b05f3783351cf256cc90cd4478fb28b62bvboxsync * @param cbTransfer Size of transfer unit
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsyncVMMDECL(VBOXSTRICTRC) IOMInterpretOUTSEx(PVM pVM, PCPUMCTXCORE pRegFrame, uint32_t uPort, uint32_t uPrefix,
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * We do not support segment prefixes, REPNE or
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * decrementing source pointer.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * Get bytes/words/dwords count to transfer.
9cdd4d805ecb43126372f7cf12e4032836cb738avboxsync uint64_t const fAddrMask = iomDisModeToMask(enmAddrMode);
9cdd4d805ecb43126372f7cf12e4032836cb738avboxsync /* Convert source address ds:esi. */
9cdd4d805ecb43126372f7cf12e4032836cb738avboxsync int rc2 = SELMToFlatEx(pVCpu, DISSELREG_DS, pRegFrame, pRegFrame->rsi & fAddrMask,
9cdd4d805ecb43126372f7cf12e4032836cb738avboxsync Log(("OUTS source address conversion failed -> fallback, rc2=%Rrc\n", rc2));
9cdd4d805ecb43126372f7cf12e4032836cb738avboxsync /* Access verification first; we currently can't recover properly from traps inside this instruction */
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync uint32_t const cpl = CPUMGetGuestCPL(pVCpu, pRegFrame);
9cdd4d805ecb43126372f7cf12e4032836cb738avboxsync rc2 = PGMVerifyAccess(pVCpu, (RTGCUINTPTR)GCPtrSrc, cTransfers * cbTransfer,
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync Log(("OUTS will generate a trap -> fallback, rc2=%Rrc\n", rc2));
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync Log(("IOM: rep outs%d port %#x count %d\n", cbTransfer * 8, uPort, cTransfers));
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * If the device supports string transfers, ask it to do as
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * much as it wants. The rest is done with single-word transfers.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync rcStrict = IOMIOPortWriteString(pVM, uPort, &GCPtrSrc, &cTransfers, cbTransfer);
105b1a31b6037dbe14acb8d09e60da540885202bvboxsync AssertRC(VBOXSTRICTRC_VAL(rcStrict)); Assert(cTransfers <= cTransfersOrg);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync pRegFrame->rsi = ((pRegFrame->rsi + (cTransfersOrg - cTransfers) * cbTransfer) & fAddrMask)
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync rcStrict = iomRamRead(pVCpu, &u32Value, GCPtrSrc, cbTransfer);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync rcStrict = IOMIOPortWrite(pVM, uPort, u32Value, cbTransfer);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync GCPtrSrc = (RTGCPTR)((RTUINTPTR)GCPtrSrc + cbTransfer);
73ba84f95f918cc170be38908ad240fbb2f8f354vboxsync pRegFrame->rsi = ((pRegFrame->rsi + cbTransfer) & fAddrMask)
105b1a31b6037dbe14acb8d09e60da540885202bvboxsync /* Update rcx on exit. */
105b1a31b6037dbe14acb8d09e60da540885202bvboxsync AssertMsg(rcStrict == VINF_SUCCESS || rcStrict == VINF_IOM_R3_IOPORT_WRITE || (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST) || RT_FAILURE(rcStrict), ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
105b1a31b6037dbe14acb8d09e60da540885202bvboxsync * DS:ESI,DX[,ECX]
105b1a31b6037dbe14acb8d09e60da540885202bvboxsync * @returns Strict VBox status code. Informational status codes other than the one documented
105b1a31b6037dbe14acb8d09e60da540885202bvboxsync * here are to be treated as internal failure. Use IOM_SUCCESS() to check for success.
105b1a31b6037dbe14acb8d09e60da540885202bvboxsync * @retval VINF_SUCCESS Success.
105b1a31b6037dbe14acb8d09e60da540885202bvboxsync * @retval VINF_EM_FIRST-VINF_EM_LAST Success with some exceptions (see IOM_SUCCESS()), the
105b1a31b6037dbe14acb8d09e60da540885202bvboxsync * status code must be passed on to EM.
105b1a31b6037dbe14acb8d09e60da540885202bvboxsync * @retval VINF_IOM_R3_IOPORT_WRITE Defer the write to ring-3. (R0/GC only)
105b1a31b6037dbe14acb8d09e60da540885202bvboxsync * @retval VINF_EM_RAW_EMULATE_INSTR Defer the write to the REM.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @retval VINF_EM_RAW_GUEST_TRAP The exception was left pending. (TRPMRaiseXcptErr)
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @retval VINF_TRPM_XCPT_DISPATCHED The exception was raised and dispatched for raw-mode execution. (TRPMRaiseXcptErr)
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @retval VINF_EM_RESCHEDULE_REM The exception was dispatched and cannot be executed in raw-mode. (TRPMRaiseXcptErr)
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @param pVM The virtual machine.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @param pRegFrame Pointer to CPUMCTXCORE guest registers structure.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @param pCpu Disassembler CPU state.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsyncVMMDECL(VBOXSTRICTRC) IOMInterpretOUTS(PVM pVM, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu)
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * Get port number from the first parameter.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * And get the I/O register size from the opcode / prefix.
9cdd4d805ecb43126372f7cf12e4032836cb738avboxsync unsigned cb = 0;
9cdd4d805ecb43126372f7cf12e4032836cb738avboxsync bool fRc = iomGetRegImmData(pCpu, &pCpu->param1, pRegFrame, &Port, &cb);
9cdd4d805ecb43126372f7cf12e4032836cb738avboxsync AssertMsg(fRc, ("Failed to get reg/imm port number!\n")); NOREF(fRc);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync cb = (pCpu->uOpMode == DISCPUMODE_16BIT) ? 2 : 4; /* dword in both 32 & 64 bits mode */
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync VBOXSTRICTRC rcStrict = IOMInterpretCheckPortIOAccess(pVM, pRegFrame, Port, cb);
9cdd4d805ecb43126372f7cf12e4032836cb738avboxsync AssertMsg(rcStrict == VINF_EM_RAW_GUEST_TRAP || rcStrict == VINF_TRPM_XCPT_DISPATCHED || rcStrict == VINF_TRPM_XCPT_DISPATCHED || RT_FAILURE(rcStrict), ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
9cdd4d805ecb43126372f7cf12e4032836cb738avboxsync return IOMInterpretOUTSEx(pVM, pRegFrame, Port, pCpu->fPrefix, (DISCPUMODE)pCpu->uAddrMode, cb);
9cdd4d805ecb43126372f7cf12e4032836cb738avboxsync * Mapping an MMIO2 page in place of an MMIO page for direct access.
9cdd4d805ecb43126372f7cf12e4032836cb738avboxsync * (This is a special optimization used by the VGA device.)
9cdd4d805ecb43126372f7cf12e4032836cb738avboxsync * @returns VBox status code. This API may return VINF_SUCCESS even if no
9cdd4d805ecb43126372f7cf12e4032836cb738avboxsync * remapping is made,.
9cdd4d805ecb43126372f7cf12e4032836cb738avboxsync * @param pVM The virtual machine.
9cdd4d805ecb43126372f7cf12e4032836cb738avboxsync * @param GCPhys The address of the MMIO page to be changed.
9cdd4d805ecb43126372f7cf12e4032836cb738avboxsync * @param GCPhysRemapped The address of the MMIO2 page.
9cdd4d805ecb43126372f7cf12e4032836cb738avboxsync * @param fPageFlags Page flags to set. Must be (X86_PTE_RW | X86_PTE_P)
9cdd4d805ecb43126372f7cf12e4032836cb738avboxsync * for the time being.
9cdd4d805ecb43126372f7cf12e4032836cb738avboxsyncVMMDECL(int) IOMMMIOMapMMIO2Page(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysRemapped, uint64_t fPageFlags)
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync /* Currently only called from the VGA device during MMIO. */
9cdd4d805ecb43126372f7cf12e4032836cb738avboxsync Log(("IOMMMIOMapMMIO2Page %RGp -> %RGp flags=%RX64\n", GCPhys, GCPhysRemapped, fPageFlags));
9cdd4d805ecb43126372f7cf12e4032836cb738avboxsync AssertReturn(fPageFlags == (X86_PTE_RW | X86_PTE_P), VERR_INVALID_PARAMETER);
9cdd4d805ecb43126372f7cf12e4032836cb738avboxsync /* This currently only works in real mode, protected mode without paging or with nested paging. */
9cdd4d805ecb43126372f7cf12e4032836cb738avboxsync if ( !HWACCMIsEnabled(pVM) /* useless without VT-x/AMD-V */
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync return VINF_SUCCESS; /* better luck the next time around */
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * Lookup the context range node the page belongs to.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync PIOMMMIORANGE pRange = iomMmioGetRange(pVM, GCPhys);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync ("Handlers and page tables are out of sync or something! GCPhys=%RGp\n", GCPhys), VERR_IOM_MMIO_RANGE_NOT_FOUND);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync Assert((pRange->Core.KeyLast & PAGE_OFFSET_MASK) == PAGE_OFFSET_MASK);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * Do the aliasing; page align the addresses since PGM is picky.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync rc = PGMHandlerPhysicalPageAlias(pVM, pRange->GCPhys, GCPhys, GCPhysRemapped);
73ba84f95f918cc170be38908ad240fbb2f8f354vboxsync * Modify the shadow page table. Since it's an MMIO page it won't be present and we
73ba84f95f918cc170be38908ad240fbb2f8f354vboxsync * can simply prefetch it.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * Note: This is a NOP in the EPT case; we'll just let it fault again to resync the page.
4a9af9a8062589b741444d717d2dd1ed22b0f583vboxsync#if 0 /* The assertion is wrong for the PGM_SYNC_CLEAR_PGM_POOL and VINF_PGM_HANDLER_ALREADY_ALIASED cases. */
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync rc = PGMShwGetPage(pVCpu, (RTGCPTR)GCPhys, &fFlags, &HCPhys);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync Assert(rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync Assert(rc == VINF_SUCCESS || rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * Mapping a HC page in place of an MMIO page for direct access.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * (This is a special optimization used by the APIC in the VT-x case.)
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @returns VBox status code.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @param pVM The virtual machine.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @param GCPhys The address of the MMIO page to be changed.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @param HCPhys The address of the host physical page.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @param fPageFlags Page flags to set. Must be (X86_PTE_RW | X86_PTE_P)
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * for the time being.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsyncVMMDECL(int) IOMMMIOMapMMIOHCPage(PVM pVM, RTGCPHYS GCPhys, RTHCPHYS HCPhys, uint64_t fPageFlags)
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync /* Currently only called from VT-x code during a page fault. */
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync Log(("IOMMMIOMapMMIOHCPage %RGp -> %RGp flags=%RX64\n", GCPhys, HCPhys, fPageFlags));
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync AssertReturn(fPageFlags == (X86_PTE_RW | X86_PTE_P), VERR_INVALID_PARAMETER);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * Lookup the context range node the page belongs to.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync /* Can't lock IOM here due to potential deadlocks in the VGA device; not safe to access. */
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync PIOMMMIORANGE pRange = iomMMIOGetRangeUnsafe(pVM, GCPhys);
73ba84f95f918cc170be38908ad240fbb2f8f354vboxsync ("Handlers and page tables are out of sync or something! GCPhys=%RGp\n", GCPhys), VERR_IOM_MMIO_RANGE_NOT_FOUND);
73ba84f95f918cc170be38908ad240fbb2f8f354vboxsync Assert((pRange->Core.KeyLast & PAGE_OFFSET_MASK) == PAGE_OFFSET_MASK);
1389294d44ac76b0a25f5655756c9d39855a73efvboxsync * Do the aliasing; page align the addresses since PGM is picky.
3a343ca21a267ec3c54e2317e2ed18fe99b8ebbbvboxsync int rc = PGMHandlerPhysicalPageAliasHC(pVM, GCPhys, GCPhys, HCPhys);
3a343ca21a267ec3c54e2317e2ed18fe99b8ebbbvboxsync * Modify the shadow page table. Since it's an MMIO page it won't be present and we
3a343ca21a267ec3c54e2317e2ed18fe99b8ebbbvboxsync * can simply prefetch it.
3a343ca21a267ec3c54e2317e2ed18fe99b8ebbbvboxsync * Note: This is a NOP in the EPT case; we'll just let it fault again to resync the page.
1389294d44ac76b0a25f5655756c9d39855a73efvboxsync Assert(rc == VINF_SUCCESS || rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * Reset a previously modified MMIO region; restore the access flags.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @returns VBox status code.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @param pVM The virtual machine.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * @param GCPhys Physical address that's part of the MMIO region to be reset.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsyncVMMDECL(int) IOMMMIOResetRegion(PVM pVM, RTGCPHYS GCPhys)
73ba84f95f918cc170be38908ad240fbb2f8f354vboxsync /* This currently only works in real mode, protected mode without paging or with nested paging. */
73ba84f95f918cc170be38908ad240fbb2f8f354vboxsync if ( !HWACCMIsEnabled(pVM) /* useless without VT-x/AMD-V */
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * Lookup the context range node the page belongs to.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync /* Can't lock IOM here due to potential deadlocks in the VGA device; not safe to access. */
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync PIOMMMIORANGE pRange = iomMMIOGetRangeUnsafe(pVM, GCPhys);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync ("Handlers and page tables are out of sync or something! GCPhys=%RGp\n", GCPhys), VERR_IOM_MMIO_RANGE_NOT_FOUND);
521d8df5a1a304406b911c2e2c7bf9214d6d9200vboxsync Assert((pRange->Core.KeyLast & PAGE_OFFSET_MASK) == PAGE_OFFSET_MASK);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * Call PGM to do the job work.
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * After the call, all the pages should be non-present... unless there is
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync * a page pool flush pending (unlikely).
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync rc = PGMShwGetPage(pVCpu, (RTGCPTR)GCPhys, &fFlags, &HCPhys);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync Assert(rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT);
9055f61bb57d2a625c6434d55beac7565c3b3c0dvboxsync#endif /* !IN_RC */