IOMAllMMIO.cpp revision 1f24d758b35a86f1075a86a4760da9bbc1e80229
323b78bf4831666c95416edf3b6e54657a769e5dvboxsync * IOM - Input / Output Monitor - Any Context, MMIO & String I/O.
1c94c0a63ba68be1a7b2c640e70d7a06464e4fcavboxsync * Copyright (C) 2006-2007 Sun Microsystems, Inc.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * This file is part of VirtualBox Open Source Edition (OSE), as
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * available from http://www.virtualbox.org. This file is free software;
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * you can redistribute it and/or modify it under the terms of the GNU
a16eb14ad7a4b5ef91ddc22d3e8e92d930f736fcvboxsync * General Public License (GPL) as published by the Free Software
a16eb14ad7a4b5ef91ddc22d3e8e92d930f736fcvboxsync * Foundation, in version 2 as it comes in the "COPYING" file of the
a16eb14ad7a4b5ef91ddc22d3e8e92d930f736fcvboxsync * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
a16eb14ad7a4b5ef91ddc22d3e8e92d930f736fcvboxsync * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
1c94c0a63ba68be1a7b2c640e70d7a06464e4fcavboxsync * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
1c94c0a63ba68be1a7b2c640e70d7a06464e4fcavboxsync * Clara, CA 95054 USA or visit http://www.sun.com if you need
1c94c0a63ba68be1a7b2c640e70d7a06464e4fcavboxsync * additional information or have any questions.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync/*******************************************************************************
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync* Header Files *
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync*******************************************************************************/
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync/*******************************************************************************
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync* Global Variables *
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync*******************************************************************************/
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * Array for fast recode of the operand size (1/2/4/8 bytes) to bit shift value.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsyncstatic const unsigned g_aSize2Shift[] =
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync ~0, /* 0 - invalid */
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync 0, /* *1 == 2^0 */
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync ~0, /* 3 - invalid */
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync ~0, /* 5 - invalid */
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync ~0, /* 6 - invalid */
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync ~0, /* 7 - invalid */
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * Macro for fast recode of the operand size (1/2/4/8 bytes) to bit shift value.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * Wrapper which does the write and updates range statistics when such are enabled.
323b78bf4831666c95416edf3b6e54657a769e5dvboxsync * @warning RT_SUCCESS(rc=VINF_IOM_HC_MMIO_WRITE) is TRUE!
dd8efff5286a99cf8d9b3a5e8dd62340973f3cc1vboxsyncDECLINLINE(int) iomMMIODoWrite(PVM pVM, PIOMMMIORANGE pRange, RTGCPHYS GCPhysFault, const void *pvData, unsigned cb)
dd8efff5286a99cf8d9b3a5e8dd62340973f3cc1vboxsync PIOMMMIOSTATS pStats = iomMMIOGetStats(&pVM->iom.s, GCPhysFault, pRange);
323b78bf4831666c95416edf3b6e54657a769e5dvboxsync rc = pRange->CTX_SUFF(pfnWriteCallback)(pRange->CTX_SUFF(pDevIns), pRange->CTX_SUFF(pvUser), GCPhysFault, (void *)pvData, cb); /* @todo fix const!! */
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * Wrapper which does the read and updates range statistics when such are enabled.
05406988cc320ac1b0971de976b6cf0c986044a9vboxsyncDECLINLINE(int) iomMMIODoRead(PVM pVM, PIOMMMIORANGE pRange, RTGCPHYS GCPhys, void *pvValue, unsigned cbValue)
05406988cc320ac1b0971de976b6cf0c986044a9vboxsync PIOMMMIOSTATS pStats = iomMMIOGetStats(&pVM->iom.s, GCPhys, pRange);
05406988cc320ac1b0971de976b6cf0c986044a9vboxsync rc = pRange->CTX_SUFF(pfnReadCallback)(pRange->CTX_SUFF(pDevIns), pRange->CTX_SUFF(pvUser), GCPhys, pvValue, cbValue);
05406988cc320ac1b0971de976b6cf0c986044a9vboxsync case 1: *(uint8_t *)pvValue = UINT8_C(0xff); break;
05406988cc320ac1b0971de976b6cf0c986044a9vboxsync case 2: *(uint16_t *)pvValue = UINT16_C(0xffff); break;
05406988cc320ac1b0971de976b6cf0c986044a9vboxsync case 4: *(uint32_t *)pvValue = UINT32_C(0xffffffff); break;
05406988cc320ac1b0971de976b6cf0c986044a9vboxsync case 8: *(uint64_t *)pvValue = UINT64_C(0xffffffffffffffff); break;
1db6afc370c2fa84144478dffa9c1ed3c28c7158vboxsync default: AssertReleaseMsgFailed(("cbValue=%d GCPhys=%RGp\n", cbValue, GCPhys)); break;
05406988cc320ac1b0971de976b6cf0c986044a9vboxsync case 1: *(uint8_t *)pvValue = UINT8_C(0x00); break;
05406988cc320ac1b0971de976b6cf0c986044a9vboxsync case 2: *(uint16_t *)pvValue = UINT16_C(0x0000); break;
05406988cc320ac1b0971de976b6cf0c986044a9vboxsync case 4: *(uint32_t *)pvValue = UINT32_C(0x00000000); break;
05406988cc320ac1b0971de976b6cf0c986044a9vboxsync case 8: *(uint64_t *)pvValue = UINT64_C(0x0000000000000000); break;
1db6afc370c2fa84144478dffa9c1ed3c28c7158vboxsync default: AssertReleaseMsgFailed(("cbValue=%d GCPhys=%RGp\n", cbValue, GCPhys)); break;
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * Internal - statistics only.
dd8efff5286a99cf8d9b3a5e8dd62340973f3cc1vboxsyncDECLINLINE(void) iomMMIOStatLength(PVM pVM, unsigned cb)
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* No way. */
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * MOV reg, mem (read)
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * MOVZX reg, mem (read)
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * MOVSX reg, mem (read)
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @returns VBox status code.
e11fe099decbb0f65cfcc7e2939fa00bacefbb1cvboxsync * @param pVM The virtual machine.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param pRegFrame Pointer to CPUMCTXCORE guest registers structure.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param pCpu Disassembler CPU state.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param pRange Pointer MMIO range.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param GCPhysFault The GC physical address corresponding to pvFault.
dd8efff5286a99cf8d9b3a5e8dd62340973f3cc1vboxsyncstatic int iomInterpretMOVxXRead(PVM pVM, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu, PIOMMMIORANGE pRange, RTGCPHYS GCPhysFault)
323b78bf4831666c95416edf3b6e54657a769e5dvboxsync Assert(pRange->CTX_SUFF(pfnReadCallback) || !pRange->pfnReadCallbackR3);
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * Get the data size from parameter 2,
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * and call the handler function to get the data.
8dee1778d3770cdc584752c84acf4899d8bfc9f9vboxsync unsigned cb = DISGetParamSize(pCpu, &pCpu->param2);
61e80138f3c5ea5213990bde94a973c8e64d1dadvboxsync AssertMsg(cb > 0 && cb <= sizeof(uint64_t), ("cb=%d\n", cb));
61e80138f3c5ea5213990bde94a973c8e64d1dadvboxsync int rc = iomMMIODoRead(pVM, pRange, GCPhysFault, &u64Data, cb);
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * Do sign extension for MOVSX.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /** @todo checkup MOVSX implementation! */
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* DWORD <- BYTE */
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* DWORD <- WORD */
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * Store the result to register (parameter 1).
61e80138f3c5ea5213990bde94a973c8e64d1dadvboxsync bool fRc = iomSaveDataToReg(pCpu, &pCpu->param1, pRegFrame, u64Data);
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync AssertMsg(fRc, ("Failed to store register value!\n")); NOREF(fRc);
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * MOV mem, reg|imm (write)
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @returns VBox status code.
e11fe099decbb0f65cfcc7e2939fa00bacefbb1cvboxsync * @param pVM The virtual machine.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param pRegFrame Pointer to CPUMCTXCORE guest registers structure.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param pCpu Disassembler CPU state.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param pRange Pointer MMIO range.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param GCPhysFault The GC physical address corresponding to pvFault.
dd8efff5286a99cf8d9b3a5e8dd62340973f3cc1vboxsyncstatic int iomInterpretMOVxXWrite(PVM pVM, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu, PIOMMMIORANGE pRange, RTGCPHYS GCPhysFault)
323b78bf4831666c95416edf3b6e54657a769e5dvboxsync Assert(pRange->CTX_SUFF(pfnWriteCallback) || !pRange->pfnWriteCallbackR3);
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * Get data to write from second parameter,
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * and call the callback to write it.
8dee1778d3770cdc584752c84acf4899d8bfc9f9vboxsync unsigned cb = 0;
be9bc9b4ba510c4b4159c193f783d024633ef8e9vboxsync bool fRc = iomGetRegImmData(pCpu, &pCpu->param2, pRegFrame, &u64Data, &cb);
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync AssertMsg(fRc, ("Failed to get reg/imm port number!\n")); NOREF(fRc);
be9bc9b4ba510c4b4159c193f783d024633ef8e9vboxsync int rc = iomMMIODoWrite(pVM, pRange, GCPhysFault, &u64Data, cb);
dd8efff5286a99cf8d9b3a5e8dd62340973f3cc1vboxsync/** Wrapper for reading virtual memory. */
42c1972c22e09797b4b24afbd0ec114ed076c37cvboxsyncDECLINLINE(int) iomRamRead(PVMCPU pVCpu, void *pDest, RTGCPTR GCSrc, uint32_t cb)
090f6abdd6282f48527b83162b8b441425f05e36vboxsync /* Note: This will fail in R0 or RC if it hits an access handler. That
090f6abdd6282f48527b83162b8b441425f05e36vboxsync isn't a problem though since the operation can be restarted in REM. */
78a205e3fc6719d59e8c561b3d287d3a4f879852vboxsync return MMGCRamReadNoTrapHandler(pDest, (void *)GCSrc, cb);
dd8efff5286a99cf8d9b3a5e8dd62340973f3cc1vboxsync/** Wrapper for writing virtual memory. */
42c1972c22e09797b4b24afbd0ec114ed076c37cvboxsyncDECLINLINE(int) iomRamWrite(PVMCPU pVCpu, PCPUMCTXCORE pCtxCore, RTGCPTR GCPtrDst, void *pvSrc, uint32_t cb)
090f6abdd6282f48527b83162b8b441425f05e36vboxsync /** @todo Need to update PGMVerifyAccess to take access handlers into account for Ring-0 and
090f6abdd6282f48527b83162b8b441425f05e36vboxsync * raw mode code. Some thought needs to be spent on theoretical concurrency issues as
090f6abdd6282f48527b83162b8b441425f05e36vboxsync * as well since we're not behind the pgm lock and handler may change between calls.
090f6abdd6282f48527b83162b8b441425f05e36vboxsync * MMGCRamWriteNoTrapHandler may also trap if the page isn't shadowed, or was kicked
090f6abdd6282f48527b83162b8b441425f05e36vboxsync * out from both the shadow pt (SMP or our changes) and TLB.
090f6abdd6282f48527b83162b8b441425f05e36vboxsync * Currently MMGCRamWriteNoTrapHandler may also fail when it hits a write access handler.
090f6abdd6282f48527b83162b8b441425f05e36vboxsync * PGMPhysInterpretedWriteNoHandlers/PGMPhysWriteGCPtr OTOH may mess up the state
090f6abdd6282f48527b83162b8b441425f05e36vboxsync * of some shadowed structure in R0. */
090f6abdd6282f48527b83162b8b441425f05e36vboxsync return MMGCRamWriteNoTrapHandler((void *)GCPtrDst, pvSrc, cb);
42c1972c22e09797b4b24afbd0ec114ed076c37cvboxsync return PGMPhysInterpretedWriteNoHandlers(pVCpu, pCtxCore, GCPtrDst, pvSrc, cb, false /*fRaiseTrap*/);
42c1972c22e09797b4b24afbd0ec114ed076c37cvboxsync return PGMPhysWriteGCPtr(pVCpu, GCPtrDst, pvSrc, cb);
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * [REP] MOVSB
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * [REP] MOVSW
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * [REP] MOVSD
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * Restricted implementation.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @returns VBox status code.
e11fe099decbb0f65cfcc7e2939fa00bacefbb1cvboxsync * @param pVM The virtual machine.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param uErrorCode CPU Error code.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param pRegFrame Trap register frame.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param GCPhysFault The GC physical address corresponding to pvFault.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param pCpu Disassembler CPU state.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param pRange Pointer MMIO range.
323b78bf4831666c95416edf3b6e54657a769e5dvboxsync * @param ppStat Which sub-sample to attribute this call to.
323b78bf4831666c95416edf3b6e54657a769e5dvboxsyncstatic int iomInterpretMOVS(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPHYS GCPhysFault, PDISCPUSTATE pCpu, PIOMMMIORANGE pRange, PSTAMPROFILE *ppStat)
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * We do not support segment prefixes or REPNE.
dd8efff5286a99cf8d9b3a5e8dd62340973f3cc1vboxsync return VINF_IOM_HC_MMIO_READ_WRITE; /** @todo -> interpret whatever. */
f5395a2af3050ddd694b0ad505975f7b717ab4f1vboxsync if (SELMGetCpuModeFromSelector(pVM, pRegFrame->eflags, pRegFrame->cs, &pRegFrame->csHid) == CPUMODE_16BIT)
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* Get the current privilege level. */
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * Get data size.
8dee1778d3770cdc584752c84acf4899d8bfc9f9vboxsync unsigned cb = DISGetParamSize(pCpu, &pCpu->param1);
332ccb6ac6feb4b50ec24d63ff029119164182ffvboxsync AssertMsg(cb > 0 && cb <= sizeof(uint64_t), ("cb=%d\n", cb));
8dee1778d3770cdc584752c84acf4899d8bfc9f9vboxsync int offIncrement = pRegFrame->eflags.Bits.u1DF ? -(signed)cb : (signed)cb;
8dee1778d3770cdc584752c84acf4899d8bfc9f9vboxsync if (pVM->iom.s.cMovsMaxBytes < (cTransfers << SIZE_2_SHIFT(cb)))
8dee1778d3770cdc584752c84acf4899d8bfc9f9vboxsync pVM->iom.s.cMovsMaxBytes = cTransfers << SIZE_2_SHIFT(cb);
dd8efff5286a99cf8d9b3a5e8dd62340973f3cc1vboxsync/** @todo re-evaluate on page boundraries. */
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * Write operation: [Mem] -> [MMIO]
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * ds:esi (Virt Src) -> es:edi (Phys Dst)
323b78bf4831666c95416edf3b6e54657a769e5dvboxsync STAM_STATS({ *ppStat = &pVM->iom.s.StatRZInstMovsToMMIO; });
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* Check callback. */
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* Convert source address ds:esi. */
13d75a5db336ccb682d7ab28b397a4f0b8982ea3vboxsync rc = SELMToFlatEx(pVM, DIS_SELREG_DS, pRegFrame, (RTGCPTR)pRegFrame->rsi,
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* Access verification first; we currently can't recover properly from traps inside this instruction */
d45f7f7fe0c28b500b45b2dc88d7a04f4c0be6b8vboxsync rc = PGMVerifyAccess(pVCpu, pu8Virt, cTransfers * cb, (cpl == 3) ? X86_PTE_US : 0);
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync Log(("MOVS will generate a trap -> recompiler, rc=%d\n", rc));
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* copy loop. */
42c1972c22e09797b4b24afbd0ec114ed076c37cvboxsync rc = iomRamRead(pVCpu, &u32Data, (RTGCPTR)pu8Virt, cb);
8dee1778d3770cdc584752c84acf4899d8bfc9f9vboxsync rc = iomMMIODoWrite(pVM, pRange, Phys, &u32Data, cb);
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* Update ecx. */
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * Read operation: [MMIO] -> [mem] or [MMIO] -> [MMIO]
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * ds:[eSI] (Phys Src) -> es:[eDI] (Virt Dst)
323b78bf4831666c95416edf3b6e54657a769e5dvboxsync STAM_STATS({ *ppStat = &pVM->iom.s.StatRZInstMovsFromMMIO; });
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* Check callback. */
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* Convert destination address. */
13d75a5db336ccb682d7ab28b397a4f0b8982ea3vboxsync rc = SELMToFlatEx(pVM, DIS_SELREG_ES, pRegFrame, (RTGCPTR)pRegFrame->rdi,
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* Check if destination address is MMIO. */
bee1a7d4b183cab9654f247b3ea8cf680842bed5vboxsync rc = PGMGstGetPage(pVCpu, (RTGCPTR)pu8Virt, NULL, &PhysDst);
dd8efff5286a99cf8d9b3a5e8dd62340973f3cc1vboxsync PhysDst |= (RTGCUINTPTR)pu8Virt & PAGE_OFFSET_MASK;
dd8efff5286a99cf8d9b3a5e8dd62340973f3cc1vboxsync && (pMMIODst = iomMMIOGetRange(&pVM->iom.s, PhysDst)))
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * Extra: [MMIO] -> [MMIO]
323b78bf4831666c95416edf3b6e54657a769e5dvboxsync STAM_STATS({ *ppStat = &pVM->iom.s.StatRZInstMovsMMIO; });
323b78bf4831666c95416edf3b6e54657a769e5dvboxsync if (!pMMIODst->CTX_SUFF(pfnWriteCallback) && pMMIODst->pfnWriteCallbackR3)
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* copy loop. */
8dee1778d3770cdc584752c84acf4899d8bfc9f9vboxsync rc = iomMMIODoRead(pVM, pRange, Phys, &u32Data, cb);
8dee1778d3770cdc584752c84acf4899d8bfc9f9vboxsync rc = iomMMIODoWrite(pVM, pMMIODst, PhysDst, &u32Data, cb);
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * Normal: [MMIO] -> [Mem]
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* Access verification first; we currently can't recover properly from traps inside this instruction */
d45f7f7fe0c28b500b45b2dc88d7a04f4c0be6b8vboxsync rc = PGMVerifyAccess(pVCpu, pu8Virt, cTransfers * cb, X86_PTE_RW | ((cpl == 3) ? X86_PTE_US : 0));
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync Log(("MOVS will generate a trap -> recompiler, rc=%d\n", rc));
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* copy loop. */
8dee1778d3770cdc584752c84acf4899d8bfc9f9vboxsync rc = iomMMIODoRead(pVM, pRange, Phys, &u32Data, cb);
42c1972c22e09797b4b24afbd0ec114ed076c37cvboxsync rc = iomRamWrite(pVCpu, pRegFrame, (RTGCPTR)pu8Virt, &u32Data, cb);
8dee1778d3770cdc584752c84acf4899d8bfc9f9vboxsync Log(("iomRamWrite %08X size=%d failed with %d\n", pu8Virt, cb, rc));
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* Update ecx on exit. */
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* work statistics. */
323b78bf4831666c95416edf3b6e54657a769e5dvboxsync#endif /* IOM_WITH_MOVS_SUPPORT */
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * [REP] STOSB
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * [REP] STOSW
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * [REP] STOSD
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * Restricted implementation.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @returns VBox status code.
ebe05ec36d1fcd24d62e7066dedcb4eb2e691358vboxsync * @param pVM The virtual machine.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param pRegFrame Trap register frame.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param GCPhysFault The GC physical address corresponding to pvFault.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param pCpu Disassembler CPU state.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param pRange Pointer MMIO range.
dd8efff5286a99cf8d9b3a5e8dd62340973f3cc1vboxsyncstatic int iomInterpretSTOS(PVM pVM, PCPUMCTXCORE pRegFrame, RTGCPHYS GCPhysFault, PDISCPUSTATE pCpu, PIOMMMIORANGE pRange)
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * We do not support segment prefixes or REPNE..
dd8efff5286a99cf8d9b3a5e8dd62340973f3cc1vboxsync return VINF_IOM_HC_MMIO_READ_WRITE; /** @todo -> REM instead of HC */
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * Get bytes/words/dwords count to copy.
42c1972c22e09797b4b24afbd0ec114ed076c37cvboxsync if ( CPUMIsGuestIn64BitCode(VMMGetCpu(pVM), pRegFrame)
f5395a2af3050ddd694b0ad505975f7b717ab4f1vboxsync if (SELMGetCpuModeFromSelector(pVM, pRegFrame->eflags, pRegFrame->cs, &pRegFrame->csHid) == CPUMODE_16BIT)
323b78bf4831666c95416edf3b6e54657a769e5dvboxsync/** @todo r=bird: bounds checks! */
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * Get data size.
8dee1778d3770cdc584752c84acf4899d8bfc9f9vboxsync unsigned cb = DISGetParamSize(pCpu, &pCpu->param1);
332ccb6ac6feb4b50ec24d63ff029119164182ffvboxsync AssertMsg(cb > 0 && cb <= sizeof(uint64_t), ("cb=%d\n", cb));
8dee1778d3770cdc584752c84acf4899d8bfc9f9vboxsync int offIncrement = pRegFrame->eflags.Bits.u1DF ? -(signed)cb : (signed)cb;
8dee1778d3770cdc584752c84acf4899d8bfc9f9vboxsync if (pVM->iom.s.cStosMaxBytes < (cTransfers << SIZE_2_SHIFT(cb)))
8dee1778d3770cdc584752c84acf4899d8bfc9f9vboxsync pVM->iom.s.cStosMaxBytes = cTransfers << SIZE_2_SHIFT(cb);
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * Use the fill callback.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /** @todo pfnFillCallback must return number of bytes successfully written!!! */
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* addr++ variant. */
323b78bf4831666c95416edf3b6e54657a769e5dvboxsync rc = pRange->CTX_SUFF(pfnFillCallback)(pRange->CTX_SUFF(pDevIns), pRange->CTX_SUFF(pvUser), Phys, u32Data, cb, cTransfers);
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* Update registers. */
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* addr-- variant. */
323b78bf4831666c95416edf3b6e54657a769e5dvboxsync rc = pRange->CTX_SUFF(pfnFillCallback)(pRange->CTX_SUFF(pDevIns), pRange->CTX_SUFF(pvUser), (Phys - (cTransfers - 1)) << SIZE_2_SHIFT(cb), u32Data, cb, cTransfers);
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* Update registers. */
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * Use the write callback.
323b78bf4831666c95416edf3b6e54657a769e5dvboxsync Assert(pRange->CTX_SUFF(pfnWriteCallback) || !pRange->pfnWriteCallbackR3);
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* fill loop. */
8dee1778d3770cdc584752c84acf4899d8bfc9f9vboxsync rc = iomMMIODoWrite(pVM, pRange, Phys, &u32Data, cb);
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* Update ecx on exit. */
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * Work statistics and return.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * [REP] LODSB
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * [REP] LODSW
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * [REP] LODSD
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * Restricted implementation.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @returns VBox status code.
e11fe099decbb0f65cfcc7e2939fa00bacefbb1cvboxsync * @param pVM The virtual machine.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param pRegFrame Trap register frame.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param GCPhysFault The GC physical address corresponding to pvFault.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param pCpu Disassembler CPU state.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param pRange Pointer MMIO range.
dd8efff5286a99cf8d9b3a5e8dd62340973f3cc1vboxsyncstatic int iomInterpretLODS(PVM pVM, PCPUMCTXCORE pRegFrame, RTGCPHYS GCPhysFault, PDISCPUSTATE pCpu, PIOMMMIORANGE pRange)
323b78bf4831666c95416edf3b6e54657a769e5dvboxsync Assert(pRange->CTX_SUFF(pfnReadCallback) || !pRange->pfnReadCallbackR3);
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * We do not support segment prefixes or REP*.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync if (pCpu->prefix & (PREFIX_SEG | PREFIX_REP | PREFIX_REPNE))
dd8efff5286a99cf8d9b3a5e8dd62340973f3cc1vboxsync return VINF_IOM_HC_MMIO_READ_WRITE; /** @todo -> REM instead of HC */
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * Get data size.
8dee1778d3770cdc584752c84acf4899d8bfc9f9vboxsync unsigned cb = DISGetParamSize(pCpu, &pCpu->param2);
1df4b0cdc5ec23d817014f9347ef28222b51e3fbvboxsync AssertMsg(cb > 0 && cb <= sizeof(uint64_t), ("cb=%d\n", cb));
8dee1778d3770cdc584752c84acf4899d8bfc9f9vboxsync int offIncrement = pRegFrame->eflags.Bits.u1DF ? -(signed)cb : (signed)cb;
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * Perform read.
1df4b0cdc5ec23d817014f9347ef28222b51e3fbvboxsync int rc = iomMMIODoRead(pVM, pRange, GCPhysFault, &pRegFrame->rax, cb);
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * Work statistics and return.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * CMP [MMIO], reg|imm
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * CMP reg|imm, [MMIO]
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * Restricted implementation.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @returns VBox status code.
e11fe099decbb0f65cfcc7e2939fa00bacefbb1cvboxsync * @param pVM The virtual machine.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param pRegFrame Trap register frame.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param GCPhysFault The GC physical address corresponding to pvFault.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param pCpu Disassembler CPU state.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param pRange Pointer MMIO range.
dd8efff5286a99cf8d9b3a5e8dd62340973f3cc1vboxsyncstatic int iomInterpretCMP(PVM pVM, PCPUMCTXCORE pRegFrame, RTGCPHYS GCPhysFault, PDISCPUSTATE pCpu, PIOMMMIORANGE pRange)
323b78bf4831666c95416edf3b6e54657a769e5dvboxsync Assert(pRange->CTX_SUFF(pfnReadCallback) || !pRange->pfnReadCallbackR3);
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * Get the operands.
8dee1778d3770cdc584752c84acf4899d8bfc9f9vboxsync unsigned cb = 0;
8dee1778d3770cdc584752c84acf4899d8bfc9f9vboxsync if (iomGetRegImmData(pCpu, &pCpu->param1, pRegFrame, &uData1, &cb))
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* cmp reg, [MMIO]. */
8dee1778d3770cdc584752c84acf4899d8bfc9f9vboxsync rc = iomMMIODoRead(pVM, pRange, GCPhysFault, &uData2, cb);
8dee1778d3770cdc584752c84acf4899d8bfc9f9vboxsync else if (iomGetRegImmData(pCpu, &pCpu->param2, pRegFrame, &uData2, &cb))
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* cmp [MMIO], reg|imm. */
8dee1778d3770cdc584752c84acf4899d8bfc9f9vboxsync rc = iomMMIODoRead(pVM, pRange, GCPhysFault, &uData1, cb);
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* Emulate CMP and update guest flags. */
8dee1778d3770cdc584752c84acf4899d8bfc9f9vboxsync uint32_t eflags = EMEmulateCmp(uData1, uData2, cb);
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync pRegFrame->eflags.u32 = (pRegFrame->eflags.u32 & ~(X86_EFL_CF | X86_EFL_PF | X86_EFL_AF | X86_EFL_ZF | X86_EFL_SF | X86_EFL_OF))
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync | (eflags & (X86_EFL_CF | X86_EFL_PF | X86_EFL_AF | X86_EFL_ZF | X86_EFL_SF | X86_EFL_OF));
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * AND [MMIO], reg|imm
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * AND reg, [MMIO]
ebf9e36b6e5548e4db69cebbef120e669a459afevboxsync * OR [MMIO], reg|imm
ebf9e36b6e5548e4db69cebbef120e669a459afevboxsync * OR reg, [MMIO]
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * Restricted implementation.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @returns VBox status code.
e11fe099decbb0f65cfcc7e2939fa00bacefbb1cvboxsync * @param pVM The virtual machine.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param pRegFrame Trap register frame.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param GCPhysFault The GC physical address corresponding to pvFault.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param pCpu Disassembler CPU state.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param pRange Pointer MMIO range.
ebf9e36b6e5548e4db69cebbef120e669a459afevboxsync * @param pfnEmulate Instruction emulation function.
ab0130d1627b2b214952b929de71b89e4ba41eb1vboxsyncstatic int iomInterpretOrXorAnd(PVM pVM, PCPUMCTXCORE pRegFrame, RTGCPHYS GCPhysFault, PDISCPUSTATE pCpu, PIOMMMIORANGE pRange, PFNEMULATEPARAM3 pfnEmulate)
9f16100a870e25701da9bc9819e15c0f9fb3870evboxsync unsigned cb = 0;
ebf9e36b6e5548e4db69cebbef120e669a459afevboxsync const char *pszInstr;
8dee1778d3770cdc584752c84acf4899d8bfc9f9vboxsync if (iomGetRegImmData(pCpu, &pCpu->param1, pRegFrame, &uData1, &cb))
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* and reg, [MMIO]. */
323b78bf4831666c95416edf3b6e54657a769e5dvboxsync Assert(pRange->CTX_SUFF(pfnReadCallback) || !pRange->pfnReadCallbackR3);
dd8efff5286a99cf8d9b3a5e8dd62340973f3cc1vboxsync rc = iomMMIODoRead(pVM, pRange, GCPhysFault, &uData2, cb);
8dee1778d3770cdc584752c84acf4899d8bfc9f9vboxsync else if (iomGetRegImmData(pCpu, &pCpu->param2, pRegFrame, &uData2, &cb))
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* and [MMIO], reg|imm. */
323b78bf4831666c95416edf3b6e54657a769e5dvboxsync if ( (pRange->CTX_SUFF(pfnReadCallback) || !pRange->pfnReadCallbackR3)
323b78bf4831666c95416edf3b6e54657a769e5dvboxsync && (pRange->CTX_SUFF(pfnWriteCallback) || !pRange->pfnWriteCallbackR3))
8dee1778d3770cdc584752c84acf4899d8bfc9f9vboxsync rc = iomMMIODoRead(pVM, pRange, GCPhysFault, &uData1, cb);
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* Emulate AND and update guest flags. */
ebf9e36b6e5548e4db69cebbef120e669a459afevboxsync uint32_t eflags = pfnEmulate((uint32_t *)&uData1, uData2, cb);
ebf9e36b6e5548e4db69cebbef120e669a459afevboxsync LogFlow(("iomInterpretOrXorAnd %s result %RX64\n", pszInstr, uData1));
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* Store result to MMIO. */
8dee1778d3770cdc584752c84acf4899d8bfc9f9vboxsync rc = iomMMIODoWrite(pVM, pRange, GCPhysFault, &uData1, cb);
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* Store result to register. */
61283d6341bac43f73cf33c9ec754a59f674fa19vboxsync bool fRc = iomSaveDataToReg(pCpu, &pCpu->param1, pRegFrame, uData1);
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync AssertMsg(fRc, ("Failed to store register value!\n")); NOREF(fRc);
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* Update guest's eflags and finish. */
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync pRegFrame->eflags.u32 = (pRegFrame->eflags.u32 & ~(X86_EFL_CF | X86_EFL_PF | X86_EFL_AF | X86_EFL_ZF | X86_EFL_SF | X86_EFL_OF))
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync | (eflags & (X86_EFL_CF | X86_EFL_PF | X86_EFL_AF | X86_EFL_ZF | X86_EFL_SF | X86_EFL_OF));
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * TEST [MMIO], reg|imm
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * TEST reg, [MMIO]
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * Restricted implementation.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @returns VBox status code.
e11fe099decbb0f65cfcc7e2939fa00bacefbb1cvboxsync * @param pVM The virtual machine.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param pRegFrame Trap register frame.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param GCPhysFault The GC physical address corresponding to pvFault.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param pCpu Disassembler CPU state.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param pRange Pointer MMIO range.
dd8efff5286a99cf8d9b3a5e8dd62340973f3cc1vboxsyncstatic int iomInterpretTEST(PVM pVM, PCPUMCTXCORE pRegFrame, RTGCPHYS GCPhysFault, PDISCPUSTATE pCpu, PIOMMMIORANGE pRange)
323b78bf4831666c95416edf3b6e54657a769e5dvboxsync Assert(pRange->CTX_SUFF(pfnReadCallback) || !pRange->pfnReadCallbackR3);
9f16100a870e25701da9bc9819e15c0f9fb3870evboxsync unsigned cb = 0;
8dee1778d3770cdc584752c84acf4899d8bfc9f9vboxsync if (iomGetRegImmData(pCpu, &pCpu->param1, pRegFrame, &uData1, &cb))
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* and test, [MMIO]. */
dd8efff5286a99cf8d9b3a5e8dd62340973f3cc1vboxsync rc = iomMMIODoRead(pVM, pRange, GCPhysFault, &uData2, cb);
8dee1778d3770cdc584752c84acf4899d8bfc9f9vboxsync else if (iomGetRegImmData(pCpu, &pCpu->param2, pRegFrame, &uData2, &cb))
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* test [MMIO], reg|imm. */
dd8efff5286a99cf8d9b3a5e8dd62340973f3cc1vboxsync rc = iomMMIODoRead(pVM, pRange, GCPhysFault, &uData1, cb);
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* Emulate TEST (=AND without write back) and update guest EFLAGS. */
be9bc9b4ba510c4b4159c193f783d024633ef8e9vboxsync uint32_t eflags = EMEmulateAnd((uint32_t *)&uData1, uData2, cb);
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync pRegFrame->eflags.u32 = (pRegFrame->eflags.u32 & ~(X86_EFL_CF | X86_EFL_PF | X86_EFL_AF | X86_EFL_ZF | X86_EFL_SF | X86_EFL_OF))
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync | (eflags & (X86_EFL_CF | X86_EFL_PF | X86_EFL_AF | X86_EFL_ZF | X86_EFL_SF | X86_EFL_OF));
ebf9e36b6e5548e4db69cebbef120e669a459afevboxsync * BT [MMIO], reg|imm
ebf9e36b6e5548e4db69cebbef120e669a459afevboxsync * Restricted implementation.
ebf9e36b6e5548e4db69cebbef120e669a459afevboxsync * @returns VBox status code.
e11fe099decbb0f65cfcc7e2939fa00bacefbb1cvboxsync * @param pVM The virtual machine.
ebf9e36b6e5548e4db69cebbef120e669a459afevboxsync * @param pRegFrame Trap register frame.
ebf9e36b6e5548e4db69cebbef120e669a459afevboxsync * @param GCPhysFault The GC physical address corresponding to pvFault.
ebf9e36b6e5548e4db69cebbef120e669a459afevboxsync * @param pCpu Disassembler CPU state.
ebf9e36b6e5548e4db69cebbef120e669a459afevboxsync * @param pRange Pointer MMIO range.
ebf9e36b6e5548e4db69cebbef120e669a459afevboxsyncstatic int iomInterpretBT(PVM pVM, PCPUMCTXCORE pRegFrame, RTGCPHYS GCPhysFault, PDISCPUSTATE pCpu, PIOMMMIORANGE pRange)
323b78bf4831666c95416edf3b6e54657a769e5dvboxsync Assert(pRange->CTX_SUFF(pfnReadCallback) || !pRange->pfnReadCallbackR3);
1f24d758b35a86f1075a86a4760da9bbc1e80229vboxsync if (!iomGetRegImmData(pCpu, &pCpu->param2, pRegFrame, &uBit, &cbIgnored))
1f24d758b35a86f1075a86a4760da9bbc1e80229vboxsync /* The size of the memory operand only matters here. */
1f24d758b35a86f1075a86a4760da9bbc1e80229vboxsync unsigned cbData = DISGetParamSize(pCpu, &pCpu->param1);
1f24d758b35a86f1075a86a4760da9bbc1e80229vboxsync /* bt [MMIO], reg|imm. */
1f24d758b35a86f1075a86a4760da9bbc1e80229vboxsync int rc = iomMMIODoRead(pVM, pRange, GCPhysFault, &uData, cbData);
ebf9e36b6e5548e4db69cebbef120e669a459afevboxsync /* Find the bit inside the faulting address */
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * XCHG [MMIO], reg
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * XCHG reg, [MMIO]
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * Restricted implementation.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @returns VBox status code.
e11fe099decbb0f65cfcc7e2939fa00bacefbb1cvboxsync * @param pVM The virtual machine.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param pRegFrame Trap register frame.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param GCPhysFault The GC physical address corresponding to pvFault.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param pCpu Disassembler CPU state.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param pRange Pointer MMIO range.
dd8efff5286a99cf8d9b3a5e8dd62340973f3cc1vboxsyncstatic int iomInterpretXCHG(PVM pVM, PCPUMCTXCORE pRegFrame, RTGCPHYS GCPhysFault, PDISCPUSTATE pCpu, PIOMMMIORANGE pRange)
dd8efff5286a99cf8d9b3a5e8dd62340973f3cc1vboxsync /* Check for read & write handlers since IOMMMIOHandler doesn't cover this. */
323b78bf4831666c95416edf3b6e54657a769e5dvboxsync if ( (!pRange->CTX_SUFF(pfnReadCallback) && pRange->pfnReadCallbackR3)
323b78bf4831666c95416edf3b6e54657a769e5dvboxsync || (!pRange->CTX_SUFF(pfnWriteCallback) && pRange->pfnWriteCallbackR3))
9f16100a870e25701da9bc9819e15c0f9fb3870evboxsync unsigned cb = 0;
8dee1778d3770cdc584752c84acf4899d8bfc9f9vboxsync if (iomGetRegImmData(pCpu, &pCpu->param1, pRegFrame, &uData1, &cb))
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* xchg reg, [MMIO]. */
8dee1778d3770cdc584752c84acf4899d8bfc9f9vboxsync rc = iomMMIODoRead(pVM, pRange, GCPhysFault, &uData2, cb);
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* Store result to MMIO. */
8dee1778d3770cdc584752c84acf4899d8bfc9f9vboxsync rc = iomMMIODoWrite(pVM, pRange, GCPhysFault, &uData1, cb);
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* Store result to register. */
61283d6341bac43f73cf33c9ec754a59f674fa19vboxsync bool fRc = iomSaveDataToReg(pCpu, &pCpu->param1, pRegFrame, uData2);
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync AssertMsg(fRc, ("Failed to store register value!\n")); NOREF(fRc);
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync Assert(rc == VINF_IOM_HC_MMIO_WRITE || rc == VINF_PATM_HC_MMIO_PATCH_WRITE);
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync Assert(rc == VINF_IOM_HC_MMIO_READ || rc == VINF_PATM_HC_MMIO_PATCH_READ);
dd8efff5286a99cf8d9b3a5e8dd62340973f3cc1vboxsync else if (iomGetRegImmData(pCpu, &pCpu->param2, pRegFrame, &uData2, &cb))
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* xchg [MMIO], reg. */
8dee1778d3770cdc584752c84acf4899d8bfc9f9vboxsync rc = iomMMIODoRead(pVM, pRange, GCPhysFault, &uData1, cb);
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* Store result to MMIO. */
8dee1778d3770cdc584752c84acf4899d8bfc9f9vboxsync rc = iomMMIODoWrite(pVM, pRange, GCPhysFault, &uData2, cb);
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* Store result to register. */
61283d6341bac43f73cf33c9ec754a59f674fa19vboxsync bool fRc = iomSaveDataToReg(pCpu, &pCpu->param2, pRegFrame, uData1);
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync AssertMsg(fRc, ("Failed to store register value!\n")); NOREF(fRc);
f3a0f5af19a0af82d4afa126e62789a778420261vboxsync AssertMsg(rc == VINF_IOM_HC_MMIO_READ_WRITE || rc == VINF_IOM_HC_MMIO_WRITE || rc == VINF_PATM_HC_MMIO_PATCH_WRITE, ("rc=%Vrc\n", rc));
f3a0f5af19a0af82d4afa126e62789a778420261vboxsync AssertMsg(rc == VINF_IOM_HC_MMIO_READ_WRITE || rc == VINF_IOM_HC_MMIO_READ || rc == VINF_PATM_HC_MMIO_PATCH_READ, ("rc=%Vrc\n", rc));
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * \#PF Handler callback for MMIO ranges.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @returns VBox status code (appropriate for GC return).
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param pVM VM Handle.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param uErrorCode CPU Error code.
dd8efff5286a99cf8d9b3a5e8dd62340973f3cc1vboxsync * @param pCtxCore Trap register frame.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param GCPhysFault The GC physical address corresponding to pvFault.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param pvUser Pointer to the MMIO ring-3 range entry.
8bc010ff67963900f9c39d93ce1a64a4e1c08ba1vboxsyncint iomMMIOHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pCtxCore, RTGCPHYS GCPhysFault, void *pvUser)
22408fe91738075b3c413b14a421d641aacad508vboxsync /* Take the IOM lock before performing any MMIO. */
22408fe91738075b3c413b14a421d641aacad508vboxsync return (uErrorCode & X86_TRAP_PF_RW) ? VINF_IOM_HC_MMIO_WRITE : VINF_IOM_HC_MMIO_READ;
323b78bf4831666c95416edf3b6e54657a769e5dvboxsync STAM_PROFILE_START(&pVM->iom.s.StatRZMMIOHandler, a);
8bc010ff67963900f9c39d93ce1a64a4e1c08ba1vboxsync Log(("iomMMIOHandler: GCPhys=%RGp uErr=%#x pvFault=%RGv rip=%RGv\n",
8bc010ff67963900f9c39d93ce1a64a4e1c08ba1vboxsync GCPhysFault, (uint32_t)uErrorCode, (RTGCPTR)pCtxCore->rip));
dd8efff5286a99cf8d9b3a5e8dd62340973f3cc1vboxsync Assert(pRange == iomMMIOGetRange(&pVM->iom.s, GCPhysFault));
dd8efff5286a99cf8d9b3a5e8dd62340973f3cc1vboxsync * Locate the statistics, if > PAGE_SIZE we'll use the first byte for everything.
dd8efff5286a99cf8d9b3a5e8dd62340973f3cc1vboxsync PIOMMMIOSTATS pStats = iomMMIOGetStats(&pVM->iom.s, GCPhysFault, pRange);
323b78bf4831666c95416edf3b6e54657a769e5dvboxsync STAM_PROFILE_STOP(&pVM->iom.s.StatRZMMIOHandler, a);
22408fe91738075b3c413b14a421d641aacad508vboxsync return (uErrorCode & X86_TRAP_PF_RW) ? VINF_IOM_HC_MMIO_WRITE : VINF_IOM_HC_MMIO_READ;
dd8efff5286a99cf8d9b3a5e8dd62340973f3cc1vboxsync * Should we defer the request right away?
323b78bf4831666c95416edf3b6e54657a769e5dvboxsync ? !pRange->CTX_SUFF(pfnWriteCallback) && pRange->pfnWriteCallbackR3
323b78bf4831666c95416edf3b6e54657a769e5dvboxsync : !pRange->CTX_SUFF(pfnReadCallback) && pRange->pfnReadCallbackR3)
323b78bf4831666c95416edf3b6e54657a769e5dvboxsync STAM_PROFILE_STOP(&pVM->iom.s.StatRZMMIOHandler, a);
22408fe91738075b3c413b14a421d641aacad508vboxsync return (uErrorCode & X86_TRAP_PF_RW ? VINF_IOM_HC_MMIO_WRITE : VINF_IOM_HC_MMIO_READ);
dd8efff5286a99cf8d9b3a5e8dd62340973f3cc1vboxsync#endif /* !IN_RING3 */
352f5cf617a287b8a3ca2fbe1f23afe258874ce9vboxsync * Disassemble the instruction and interpret it.
3cbb4f9a6a320e58ed398ef7aaa004cc8727abc5vboxsync rc = EMInterpretDisasOne(pVM, pVCpu, pCtxCore, pDis, &cbOp);
3cbb4f9a6a320e58ed398ef7aaa004cc8727abc5vboxsync rc = iomInterpretMOVxXWrite(pVM, pCtxCore, pDis, pRange, GCPhysFault);
3cbb4f9a6a320e58ed398ef7aaa004cc8727abc5vboxsync rc = iomInterpretMOVxXRead(pVM, pCtxCore, pDis, pRange, GCPhysFault);
323b78bf4831666c95416edf3b6e54657a769e5dvboxsync STAM_PROFILE_ADV_START(&pVM->iom.s.StatRZInstMovs, c);
3cbb4f9a6a320e58ed398ef7aaa004cc8727abc5vboxsync rc = iomInterpretMOVS(pVM, uErrorCode, pCtxCore, GCPhysFault, pDis, pRange, &pStat);
323b78bf4831666c95416edf3b6e54657a769e5dvboxsync STAM_PROFILE_ADV_STOP_EX(&pVM->iom.s.StatRZInstMovs, pStat, c);
3cbb4f9a6a320e58ed398ef7aaa004cc8727abc5vboxsync rc = iomInterpretSTOS(pVM, pCtxCore, GCPhysFault, pDis, pRange);
3cbb4f9a6a320e58ed398ef7aaa004cc8727abc5vboxsync rc = iomInterpretLODS(pVM, pCtxCore, GCPhysFault, pDis, pRange);
3cbb4f9a6a320e58ed398ef7aaa004cc8727abc5vboxsync rc = iomInterpretCMP(pVM, pCtxCore, GCPhysFault, pDis, pRange);
3cbb4f9a6a320e58ed398ef7aaa004cc8727abc5vboxsync rc = iomInterpretOrXorAnd(pVM, pCtxCore, GCPhysFault, pDis, pRange, EMEmulateAnd);
3cbb4f9a6a320e58ed398ef7aaa004cc8727abc5vboxsync rc = iomInterpretOrXorAnd(pVM, pCtxCore, GCPhysFault, pDis, pRange, EMEmulateOr);
3cbb4f9a6a320e58ed398ef7aaa004cc8727abc5vboxsync rc = iomInterpretOrXorAnd(pVM, pCtxCore, GCPhysFault, pDis, pRange, EMEmulateXor);
3cbb4f9a6a320e58ed398ef7aaa004cc8727abc5vboxsync rc = iomInterpretTEST(pVM, pCtxCore, GCPhysFault, pDis, pRange);
3cbb4f9a6a320e58ed398ef7aaa004cc8727abc5vboxsync rc = iomInterpretBT(pVM, pCtxCore, GCPhysFault, pDis, pRange);
3cbb4f9a6a320e58ed398ef7aaa004cc8727abc5vboxsync rc = iomInterpretXCHG(pVM, pCtxCore, GCPhysFault, pDis, pRange);
dd8efff5286a99cf8d9b3a5e8dd62340973f3cc1vboxsync * The instruction isn't supported. Hand it on to ring-3.
dd8efff5286a99cf8d9b3a5e8dd62340973f3cc1vboxsync rc = (uErrorCode & X86_TRAP_PF_RW) ? VINF_IOM_HC_MMIO_WRITE : VINF_IOM_HC_MMIO_READ;
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * On success advance EIP.
dd8efff5286a99cf8d9b3a5e8dd62340973f3cc1vboxsync#if defined(VBOX_WITH_STATISTICS) && !defined(IN_RING3)
323b78bf4831666c95416edf3b6e54657a769e5dvboxsync STAM_PROFILE_STOP(&pVM->iom.s.StatRZMMIOHandler, a);
8bc010ff67963900f9c39d93ce1a64a4e1c08ba1vboxsync * \#PF Handler callback for MMIO ranges.
8bc010ff67963900f9c39d93ce1a64a4e1c08ba1vboxsync * @returns VBox status code (appropriate for GC return).
8bc010ff67963900f9c39d93ce1a64a4e1c08ba1vboxsync * @param pVM VM Handle.
8bc010ff67963900f9c39d93ce1a64a4e1c08ba1vboxsync * @param uErrorCode CPU Error code.
8bc010ff67963900f9c39d93ce1a64a4e1c08ba1vboxsync * @param pCtxCore Trap register frame.
8bc010ff67963900f9c39d93ce1a64a4e1c08ba1vboxsync * @param pvFault The fault address (cr2).
8bc010ff67963900f9c39d93ce1a64a4e1c08ba1vboxsync * @param GCPhysFault The GC physical address corresponding to pvFault.
8bc010ff67963900f9c39d93ce1a64a4e1c08ba1vboxsync * @param pvUser Pointer to the MMIO ring-3 range entry.
8bc010ff67963900f9c39d93ce1a64a4e1c08ba1vboxsyncVMMDECL(int) IOMMMIOHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pCtxCore, RTGCPTR pvFault, RTGCPHYS GCPhysFault, void *pvUser)
8bc010ff67963900f9c39d93ce1a64a4e1c08ba1vboxsync LogFlow(("IOMMMIOHandler: GCPhys=%RGp uErr=%#x pvFault=%RGv rip=%RGv\n",
8bc010ff67963900f9c39d93ce1a64a4e1c08ba1vboxsync GCPhysFault, (uint32_t)uErrorCode, pvFault, (RTGCPTR)pCtxCore->rip));
ed5875886aed64570809cf39f881a0fcb93f44a7vboxsync VBOXSTRICTRC rcStrict = iomMMIOHandler(pVM, uErrorCode, pCtxCore, GCPhysFault, pvUser);
8bc010ff67963900f9c39d93ce1a64a4e1c08ba1vboxsync * Physical access handler for MMIO ranges.
8bc010ff67963900f9c39d93ce1a64a4e1c08ba1vboxsync * @returns VBox status code (appropriate for GC return).
8bc010ff67963900f9c39d93ce1a64a4e1c08ba1vboxsync * @param pVM VM Handle.
8bc010ff67963900f9c39d93ce1a64a4e1c08ba1vboxsync * @param uErrorCode CPU Error code.
8bc010ff67963900f9c39d93ce1a64a4e1c08ba1vboxsync * @param pCtxCore Trap register frame.
8bc010ff67963900f9c39d93ce1a64a4e1c08ba1vboxsync * @param GCPhysFault The GC physical address.
ed5875886aed64570809cf39f881a0fcb93f44a7vboxsyncVMMDECL(VBOXSTRICTRC) IOMMMIOPhysHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pCtxCore, RTGCPHYS GCPhysFault)
51afd9e19409617e8f3a204d58e96e22ee618e57vboxsync return (uErrorCode & X86_TRAP_PF_RW) ? VINF_IOM_HC_MMIO_WRITE : VINF_IOM_HC_MMIO_READ;
ed5875886aed64570809cf39f881a0fcb93f44a7vboxsync VBOXSTRICTRC rcStrict = iomMMIOHandler(pVM, uErrorCode, pCtxCore, GCPhysFault, iomMMIOGetRange(&pVM->iom.s, GCPhysFault));
e131925debcc0add6ebecf92e6d09d62150476a4vboxsync * \#PF Handler callback for MMIO ranges.
e131925debcc0add6ebecf92e6d09d62150476a4vboxsync * @returns VINF_SUCCESS if the handler have carried out the operation.
e131925debcc0add6ebecf92e6d09d62150476a4vboxsync * @returns VINF_PGM_HANDLER_DO_DEFAULT if the caller should carry out the access operation.
e131925debcc0add6ebecf92e6d09d62150476a4vboxsync * @param pVM VM Handle.
e131925debcc0add6ebecf92e6d09d62150476a4vboxsync * @param GCPhys The physical address the guest is writing to.
e131925debcc0add6ebecf92e6d09d62150476a4vboxsync * @param pvPhys The HC mapping of that address.
e131925debcc0add6ebecf92e6d09d62150476a4vboxsync * @param pvBuf What the guest is reading/writing.
e131925debcc0add6ebecf92e6d09d62150476a4vboxsync * @param cbBuf How much it's reading/writing.
e131925debcc0add6ebecf92e6d09d62150476a4vboxsync * @param enmAccessType The access type.
e131925debcc0add6ebecf92e6d09d62150476a4vboxsync * @param pvUser Pointer to the MMIO range entry.
e131925debcc0add6ebecf92e6d09d62150476a4vboxsyncDECLCALLBACK(int) IOMR3MMIOHandler(PVM pVM, RTGCPHYS GCPhysFault, void *pvPhys, void *pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser)
22408fe91738075b3c413b14a421d641aacad508vboxsync /* Take the IOM lock before performing any MMIO. */
323b78bf4831666c95416edf3b6e54657a769e5dvboxsync AssertMsg(cbBuf == 1 || cbBuf == 2 || cbBuf == 4 || cbBuf == 8, ("%zu\n", cbBuf));
e131925debcc0add6ebecf92e6d09d62150476a4vboxsync Assert(pRange == iomMMIOGetRange(&pVM->iom.s, GCPhysFault));
5ae72b1f28e1d602e74d89e79e43778c9fc18203vboxsync rc = iomMMIODoRead(pVM, pRange, GCPhysFault, pvBuf, (unsigned)cbBuf);
5ae72b1f28e1d602e74d89e79e43778c9fc18203vboxsync rc = iomMMIODoWrite(pVM, pRange, GCPhysFault, pvBuf, (unsigned)cbBuf);
e131925debcc0add6ebecf92e6d09d62150476a4vboxsync#endif /* IN_RING3 */
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * Reads a MMIO register.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @returns VBox status code.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param pVM VM handle.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param GCPhys The physical address to read.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param pu32Value Where to store the value read.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param cbValue The size of the register to read in bytes. 1, 2 or 4 bytes.
ed5875886aed64570809cf39f881a0fcb93f44a7vboxsyncVMMDECL(VBOXSTRICTRC) IOMMMIORead(PVM pVM, RTGCPHYS GCPhys, uint32_t *pu32Value, size_t cbValue)
22408fe91738075b3c413b14a421d641aacad508vboxsync /* Take the IOM lock before performing any MMIO. */
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * Lookup the current context range node and statistics.
dd8efff5286a99cf8d9b3a5e8dd62340973f3cc1vboxsync PIOMMMIORANGE pRange = iomMMIOGetRange(&pVM->iom.s, GCPhys);
22408fe91738075b3c413b14a421d641aacad508vboxsync AssertMsg(pRange, ("Handlers and page tables are out of sync or something! GCPhys=%RGp cbValue=%d\n", GCPhys, cbValue));
dd8efff5286a99cf8d9b3a5e8dd62340973f3cc1vboxsync PIOMMMIOSTATS pStats = iomMMIOGetStats(&pVM->iom.s, GCPhys, pRange);
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync#endif /* VBOX_WITH_STATISTICS */
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * Perform the read and deal with the result.
be2a61911f40a64584c3c7188104f45e0c4311ddvboxsync STAM_PROFILE_ADV_START(&pStats->CTX_SUFF_Z(ProfRead), a);
22408fe91738075b3c413b14a421d641aacad508vboxsync rc = pRange->CTX_SUFF(pfnReadCallback)(pRange->CTX_SUFF(pDevIns), pRange->CTX_SUFF(pvUser), GCPhys, pu32Value, (unsigned)cbValue);
be2a61911f40a64584c3c7188104f45e0c4311ddvboxsync STAM_PROFILE_ADV_STOP(&pStats->CTX_SUFF_Z(ProfRead), a);
b3547e42ce5221377866e3fa041b3086b7cc1562vboxsync Log4(("IOMMMIORead: GCPhys=%RGp *pu32=%08RX32 cb=%d rc=%Rrc\n", GCPhys, *pu32Value, cbValue, rc));
212d777d7378ef2a3ecc028df71ca7b82b9cb1dcvboxsync case 1: *(uint8_t *)pu32Value = UINT8_C(0x00); break;
212d777d7378ef2a3ecc028df71ca7b82b9cb1dcvboxsync case 2: *(uint16_t *)pu32Value = UINT16_C(0x0000); break;
212d777d7378ef2a3ecc028df71ca7b82b9cb1dcvboxsync case 4: *(uint32_t *)pu32Value = UINT32_C(0x00000000); break;
212d777d7378ef2a3ecc028df71ca7b82b9cb1dcvboxsync case 8: *(uint64_t *)pu32Value = UINT64_C(0x0000000000000000); break;
b1c3cdef473df2fbc621d5da81acc82dbfb8a11avboxsync default: AssertReleaseMsgFailed(("cbValue=%d GCPhys=%RGp\n", cbValue, GCPhys)); break;
b3547e42ce5221377866e3fa041b3086b7cc1562vboxsync Log4(("IOMMMIORead: GCPhys=%RGp *pu32=%08RX32 cb=%d rc=%Rrc\n", GCPhys, *pu32Value, cbValue, rc));
212d777d7378ef2a3ecc028df71ca7b82b9cb1dcvboxsync case 1: *(uint8_t *)pu32Value = UINT8_C(0xff); break;
212d777d7378ef2a3ecc028df71ca7b82b9cb1dcvboxsync case 2: *(uint16_t *)pu32Value = UINT16_C(0xffff); break;
212d777d7378ef2a3ecc028df71ca7b82b9cb1dcvboxsync case 4: *(uint32_t *)pu32Value = UINT32_C(0xffffffff); break;
212d777d7378ef2a3ecc028df71ca7b82b9cb1dcvboxsync case 8: *(uint64_t *)pu32Value = UINT64_C(0xffffffffffffffff); break;
b1c3cdef473df2fbc621d5da81acc82dbfb8a11avboxsync default: AssertReleaseMsgFailed(("cbValue=%d GCPhys=%RGp\n", cbValue, GCPhys)); break;
b3547e42ce5221377866e3fa041b3086b7cc1562vboxsync Log4(("IOMMMIORead: GCPhys=%RGp *pu32=%08RX32 cb=%d rc=%Rrc\n", GCPhys, *pu32Value, cbValue, rc));
dd8efff5286a99cf8d9b3a5e8dd62340973f3cc1vboxsync * Lookup the ring-3 range.
afc45562e8673a50bc8cb53333049d67fef30bcbvboxsync /* Unassigned memory; this is actually not supposed to happen. */
e718c14033c9205b4264213b6583a936692861d2vboxsync case 1: *(uint8_t *)pu32Value = UINT8_C(0xff); break;
e718c14033c9205b4264213b6583a936692861d2vboxsync case 2: *(uint16_t *)pu32Value = UINT16_C(0xffff); break;
e718c14033c9205b4264213b6583a936692861d2vboxsync case 4: *(uint32_t *)pu32Value = UINT32_C(0xffffffff); break;
e718c14033c9205b4264213b6583a936692861d2vboxsync case 8: *(uint64_t *)pu32Value = UINT64_C(0xffffffffffffffff); break;
b1c3cdef473df2fbc621d5da81acc82dbfb8a11avboxsync default: AssertReleaseMsgFailed(("cbValue=%d GCPhys=%RGp\n", cbValue, GCPhys)); break;
dd8efff5286a99cf8d9b3a5e8dd62340973f3cc1vboxsync Log4(("IOMMMIORead: GCPhys=%RGp *pu32=%08RX32 cb=%d rc=VINF_SUCCESS\n", GCPhys, *pu32Value, cbValue));
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * Writes to a MMIO register.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @returns VBox status code.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param pVM VM handle.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param GCPhys The physical address to write to.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param u32Value The value to write.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param cbValue The size of the register to read in bytes. 1, 2 or 4 bytes.
ed5875886aed64570809cf39f881a0fcb93f44a7vboxsyncVMMDECL(VBOXSTRICTRC) IOMMMIOWrite(PVM pVM, RTGCPHYS GCPhys, uint32_t u32Value, size_t cbValue)
22408fe91738075b3c413b14a421d641aacad508vboxsync /* Take the IOM lock before performing any MMIO. */
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * Lookup the current context range node.
dd8efff5286a99cf8d9b3a5e8dd62340973f3cc1vboxsync PIOMMMIORANGE pRange = iomMMIOGetRange(&pVM->iom.s, GCPhys);
22408fe91738075b3c413b14a421d641aacad508vboxsync AssertMsg(pRange, ("Handlers and page tables are out of sync or something! GCPhys=%RGp cbValue=%d\n", GCPhys, cbValue));
dd8efff5286a99cf8d9b3a5e8dd62340973f3cc1vboxsync PIOMMMIOSTATS pStats = iomMMIOGetStats(&pVM->iom.s, GCPhys, pRange);
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync#endif /* VBOX_WITH_STATISTICS */
dd8efff5286a99cf8d9b3a5e8dd62340973f3cc1vboxsync * Perform the write if there's a write handler. R0/GC may have
dd8efff5286a99cf8d9b3a5e8dd62340973f3cc1vboxsync * to defer it to ring-3.
be2a61911f40a64584c3c7188104f45e0c4311ddvboxsync STAM_PROFILE_ADV_START(&pStats->CTX_SUFF_Z(ProfWrite), a);
22408fe91738075b3c413b14a421d641aacad508vboxsync rc = pRange->CTX_SUFF(pfnWriteCallback)(pRange->CTX_SUFF(pDevIns), pRange->CTX_SUFF(pvUser), GCPhys, &u32Value, (unsigned)cbValue);
be2a61911f40a64584c3c7188104f45e0c4311ddvboxsync STAM_PROFILE_ADV_STOP(&pStats->CTX_SUFF_Z(ProfWrite), a);
b3547e42ce5221377866e3fa041b3086b7cc1562vboxsync Log4(("IOMMMIOWrite: GCPhys=%RGp u32=%08RX32 cb=%d rc=%Rrc\n", GCPhys, u32Value, cbValue, rc));
dd8efff5286a99cf8d9b3a5e8dd62340973f3cc1vboxsync * No write handler, nothing to do.
b3547e42ce5221377866e3fa041b3086b7cc1562vboxsync Log4(("IOMMMIOWrite: GCPhys=%RGp u32=%08RX32 cb=%d rc=%Rrc\n", GCPhys, u32Value, cbValue, VINF_SUCCESS));
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * ES:EDI,DX[,ECX]
d8df004f4caf4f71e78f0be1cc2e2a918358ae9fvboxsync * @remark Assumes caller checked the access privileges (IOMInterpretCheckPortIOAccess)
a82df5167acec0c75d741d08c1d05a4007e3d50evboxsync * @returns Strict VBox status code. Informational status codes other than the one documented
be2589a6f7086676e45b18d204bb1064889dc586vboxsync * here are to be treated as internal failure. Use IOM_SUCCESS() to check for success.
d8df004f4caf4f71e78f0be1cc2e2a918358ae9fvboxsync * @retval VINF_SUCCESS Success.
a82df5167acec0c75d741d08c1d05a4007e3d50evboxsync * @retval VINF_EM_FIRST-VINF_EM_LAST Success with some exceptions (see IOM_SUCCESS()), the
be2589a6f7086676e45b18d204bb1064889dc586vboxsync * status code must be passed on to EM.
d8df004f4caf4f71e78f0be1cc2e2a918358ae9fvboxsync * @retval VINF_IOM_HC_IOPORT_READ Defer the read to ring-3. (R0/GC only)
a82df5167acec0c75d741d08c1d05a4007e3d50evboxsync * @retval VINF_EM_RAW_EMULATE_INSTR Defer the read to the REM.
d8df004f4caf4f71e78f0be1cc2e2a918358ae9fvboxsync * @retval VINF_EM_RAW_GUEST_TRAP The exception was left pending. (TRPMRaiseXcptErr)
d8df004f4caf4f71e78f0be1cc2e2a918358ae9fvboxsync * @retval VINF_TRPM_XCPT_DISPATCHED The exception was raised and dispatched for raw-mode execution. (TRPMRaiseXcptErr)
d8df004f4caf4f71e78f0be1cc2e2a918358ae9fvboxsync * @retval VINF_EM_RESCHEDULE_REM The exception was dispatched and cannot be executed in raw-mode. (TRPMRaiseXcptErr)
e11fe099decbb0f65cfcc7e2939fa00bacefbb1cvboxsync * @param pVM The virtual machine.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param pRegFrame Pointer to CPUMCTXCORE guest registers structure.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param uPort IO Port
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param uPrefix IO instruction prefix
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param cbTransfer Size of transfer unit
ed5875886aed64570809cf39f881a0fcb93f44a7vboxsyncVMMDECL(VBOXSTRICTRC) IOMInterpretINSEx(PVM pVM, PCPUMCTXCORE pRegFrame, uint32_t uPort, uint32_t uPrefix, uint32_t cbTransfer)
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * We do not support REPNE or decrementing destination
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * pointer. Segment prefixes are deliberately ignored, as per the instruction specification.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * Get bytes/words/dwords count to transfer.
f5395a2af3050ddd694b0ad505975f7b717ab4f1vboxsync if (SELMGetCpuModeFromSelector(pVM, pRegFrame->eflags, pRegFrame->cs, &pRegFrame->csHid) == CPUMODE_16BIT)
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* Convert destination address es:edi. */
ed5875886aed64570809cf39f881a0fcb93f44a7vboxsync int rc2 = SELMToFlatEx(pVM, DIS_SELREG_ES, pRegFrame, (RTGCPTR)pRegFrame->rdi,
ed5875886aed64570809cf39f881a0fcb93f44a7vboxsync Log(("INS destination address conversion failed -> fallback, rc2=%d\n", rc2));
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* Access verification first; we can't recover from traps inside this instruction, as the port read cannot be repeated. */
ed5875886aed64570809cf39f881a0fcb93f44a7vboxsync rc2 = PGMVerifyAccess(pVCpu, (RTGCUINTPTR)GCPtrDst, cTransfers * cbTransfer,
ed5875886aed64570809cf39f881a0fcb93f44a7vboxsync Log(("INS will generate a trap -> fallback, rc2=%d\n", rc2));
65047a71308d9524254c8f60dc1371cf5679d53avboxsync Log(("IOM: rep ins%d port %#x count %d\n", cbTransfer * 8, uPort, cTransfers));
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* If the device supports string transfers, ask it to do as
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * much as it wants. The rest is done with single-word transfers. */
ed5875886aed64570809cf39f881a0fcb93f44a7vboxsync rcStrict = IOMIOPortReadString(pVM, uPort, &GCPtrDst, &cTransfers, cbTransfer);
ed5875886aed64570809cf39f881a0fcb93f44a7vboxsync AssertRC(VBOXSTRICTRC_VAL(rcStrict)); Assert(cTransfers <= cTransfersOrg);
13d75a5db336ccb682d7ab28b397a4f0b8982ea3vboxsync pRegFrame->rdi += (cTransfersOrg - cTransfers) * cbTransfer;
ed5875886aed64570809cf39f881a0fcb93f44a7vboxsync rcStrict = IOMIOPortRead(pVM, uPort, &u32Value, cbTransfer);
a9147f75af731f500aea9d37566e83a1f0e2c51dvboxsync rc2 = iomRamWrite(pVCpu, pRegFrame, GCPtrDst, &u32Value, cbTransfer);
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync GCPtrDst = (RTGCPTR)((RTGCUINTPTR)GCPtrDst + cbTransfer);
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* Update ecx on exit. */
ed5875886aed64570809cf39f881a0fcb93f44a7vboxsync AssertMsg(rcStrict == VINF_SUCCESS || rcStrict == VINF_IOM_HC_IOPORT_READ || (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST) || RT_FAILURE(rcStrict), ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * ES:EDI,DX[,ECX]
a82df5167acec0c75d741d08c1d05a4007e3d50evboxsync * @returns Strict VBox status code. Informational status codes other than the one documented
be2589a6f7086676e45b18d204bb1064889dc586vboxsync * here are to be treated as internal failure. Use IOM_SUCCESS() to check for success.
d8df004f4caf4f71e78f0be1cc2e2a918358ae9fvboxsync * @retval VINF_SUCCESS Success.
a82df5167acec0c75d741d08c1d05a4007e3d50evboxsync * @retval VINF_EM_FIRST-VINF_EM_LAST Success with some exceptions (see IOM_SUCCESS()), the
be2589a6f7086676e45b18d204bb1064889dc586vboxsync * status code must be passed on to EM.
d8df004f4caf4f71e78f0be1cc2e2a918358ae9fvboxsync * @retval VINF_IOM_HC_IOPORT_READ Defer the read to ring-3. (R0/GC only)
a82df5167acec0c75d741d08c1d05a4007e3d50evboxsync * @retval VINF_EM_RAW_EMULATE_INSTR Defer the read to the REM.
d8df004f4caf4f71e78f0be1cc2e2a918358ae9fvboxsync * @retval VINF_EM_RAW_GUEST_TRAP The exception was left pending. (TRPMRaiseXcptErr)
d8df004f4caf4f71e78f0be1cc2e2a918358ae9fvboxsync * @retval VINF_TRPM_XCPT_DISPATCHED The exception was raised and dispatched for raw-mode execution. (TRPMRaiseXcptErr)
d8df004f4caf4f71e78f0be1cc2e2a918358ae9fvboxsync * @retval VINF_EM_RESCHEDULE_REM The exception was dispatched and cannot be executed in raw-mode. (TRPMRaiseXcptErr)
e11fe099decbb0f65cfcc7e2939fa00bacefbb1cvboxsync * @param pVM The virtual machine.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param pRegFrame Pointer to CPUMCTXCORE guest registers structure.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param pCpu Disassembler CPU state.
ed5875886aed64570809cf39f881a0fcb93f44a7vboxsyncVMMDECL(VBOXSTRICTRC) IOMInterpretINS(PVM pVM, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu)
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * Get port number directly from the register (no need to bother the
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * disassembler). And get the I/O register size from the opcode / prefix.
8dee1778d3770cdc584752c84acf4899d8bfc9f9vboxsync unsigned cb = 0;
fe376b8f218c234c1ba918513340aff917aa7925vboxsync cb = (pCpu->opmode == CPUMODE_16BIT) ? 2 : 4; /* dword in both 32 & 64 bits mode */
ed5875886aed64570809cf39f881a0fcb93f44a7vboxsync VBOXSTRICTRC rcStrict = IOMInterpretCheckPortIOAccess(pVM, pRegFrame, Port, cb);
ed5875886aed64570809cf39f881a0fcb93f44a7vboxsync AssertMsg(rcStrict == VINF_EM_RAW_GUEST_TRAP || rcStrict == VINF_TRPM_XCPT_DISPATCHED || rcStrict == VINF_TRPM_XCPT_DISPATCHED || RT_FAILURE(rcStrict), ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
8dee1778d3770cdc584752c84acf4899d8bfc9f9vboxsync return IOMInterpretINSEx(pVM, pRegFrame, Port, pCpu->prefix, cb);
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * DS:ESI,DX[,ECX]
d8df004f4caf4f71e78f0be1cc2e2a918358ae9fvboxsync * @remark Assumes caller checked the access privileges (IOMInterpretCheckPortIOAccess)
a82df5167acec0c75d741d08c1d05a4007e3d50evboxsync * @returns Strict VBox status code. Informational status codes other than the one documented
be2589a6f7086676e45b18d204bb1064889dc586vboxsync * here are to be treated as internal failure. Use IOM_SUCCESS() to check for success.
d8df004f4caf4f71e78f0be1cc2e2a918358ae9fvboxsync * @retval VINF_SUCCESS Success.
a82df5167acec0c75d741d08c1d05a4007e3d50evboxsync * @retval VINF_EM_FIRST-VINF_EM_LAST Success with some exceptions (see IOM_SUCCESS()), the
be2589a6f7086676e45b18d204bb1064889dc586vboxsync * status code must be passed on to EM.
d8df004f4caf4f71e78f0be1cc2e2a918358ae9fvboxsync * @retval VINF_IOM_HC_IOPORT_WRITE Defer the write to ring-3. (R0/GC only)
d8df004f4caf4f71e78f0be1cc2e2a918358ae9fvboxsync * @retval VINF_EM_RAW_GUEST_TRAP The exception was left pending. (TRPMRaiseXcptErr)
d8df004f4caf4f71e78f0be1cc2e2a918358ae9fvboxsync * @retval VINF_TRPM_XCPT_DISPATCHED The exception was raised and dispatched for raw-mode execution. (TRPMRaiseXcptErr)
d8df004f4caf4f71e78f0be1cc2e2a918358ae9fvboxsync * @retval VINF_EM_RESCHEDULE_REM The exception was dispatched and cannot be executed in raw-mode. (TRPMRaiseXcptErr)
e11fe099decbb0f65cfcc7e2939fa00bacefbb1cvboxsync * @param pVM The virtual machine.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param pRegFrame Pointer to CPUMCTXCORE guest registers structure.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param uPort IO Port
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param uPrefix IO instruction prefix
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param cbTransfer Size of transfer unit
ed5875886aed64570809cf39f881a0fcb93f44a7vboxsyncVMMDECL(VBOXSTRICTRC) IOMInterpretOUTSEx(PVM pVM, PCPUMCTXCORE pRegFrame, uint32_t uPort, uint32_t uPrefix, uint32_t cbTransfer)
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * We do not support segment prefixes, REPNE or
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * decrementing source pointer.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * Get bytes/words/dwords count to transfer.
f5395a2af3050ddd694b0ad505975f7b717ab4f1vboxsync if (SELMGetCpuModeFromSelector(pVM, pRegFrame->eflags, pRegFrame->cs, &pRegFrame->csHid) == CPUMODE_16BIT)
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* Convert source address ds:esi. */
ed5875886aed64570809cf39f881a0fcb93f44a7vboxsync int rc2 = SELMToFlatEx(pVM, DIS_SELREG_DS, pRegFrame, (RTGCPTR)pRegFrame->rsi,
ed5875886aed64570809cf39f881a0fcb93f44a7vboxsync Log(("OUTS source address conversion failed -> fallback, rc2=%Rrc\n", rc2));
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* Access verification first; we currently can't recover properly from traps inside this instruction */
ed5875886aed64570809cf39f881a0fcb93f44a7vboxsync rc2 = PGMVerifyAccess(pVCpu, (RTGCUINTPTR)GCPtrSrc, cTransfers * cbTransfer,
ed5875886aed64570809cf39f881a0fcb93f44a7vboxsync Log(("OUTS will generate a trap -> fallback, rc2=%Rrc\n", rc2));
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync Log(("IOM: rep outs%d port %#x count %d\n", cbTransfer * 8, uPort, cTransfers));
d8df004f4caf4f71e78f0be1cc2e2a918358ae9fvboxsync * If the device supports string transfers, ask it to do as
d8df004f4caf4f71e78f0be1cc2e2a918358ae9fvboxsync * much as it wants. The rest is done with single-word transfers.
ed5875886aed64570809cf39f881a0fcb93f44a7vboxsync rcStrict = IOMIOPortWriteString(pVM, uPort, &GCPtrSrc, &cTransfers, cbTransfer);
ed5875886aed64570809cf39f881a0fcb93f44a7vboxsync AssertRC(VBOXSTRICTRC_VAL(rcStrict)); Assert(cTransfers <= cTransfersOrg);
13d75a5db336ccb682d7ab28b397a4f0b8982ea3vboxsync pRegFrame->rsi += (cTransfersOrg - cTransfers) * cbTransfer;
ed5875886aed64570809cf39f881a0fcb93f44a7vboxsync rcStrict = iomRamRead(pVCpu, &u32Value, GCPtrSrc, cbTransfer);
ed5875886aed64570809cf39f881a0fcb93f44a7vboxsync rcStrict = IOMIOPortWrite(pVM, uPort, u32Value, cbTransfer);
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync GCPtrSrc = (RTGCPTR)((RTUINTPTR)GCPtrSrc + cbTransfer);
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync /* Update ecx on exit. */
ed5875886aed64570809cf39f881a0fcb93f44a7vboxsync AssertMsg(rcStrict == VINF_SUCCESS || rcStrict == VINF_IOM_HC_IOPORT_WRITE || (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST) || RT_FAILURE(rcStrict), ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * DS:ESI,DX[,ECX]
a82df5167acec0c75d741d08c1d05a4007e3d50evboxsync * @returns Strict VBox status code. Informational status codes other than the one documented
be2589a6f7086676e45b18d204bb1064889dc586vboxsync * here are to be treated as internal failure. Use IOM_SUCCESS() to check for success.
d8df004f4caf4f71e78f0be1cc2e2a918358ae9fvboxsync * @retval VINF_SUCCESS Success.
a82df5167acec0c75d741d08c1d05a4007e3d50evboxsync * @retval VINF_EM_FIRST-VINF_EM_LAST Success with some exceptions (see IOM_SUCCESS()), the
be2589a6f7086676e45b18d204bb1064889dc586vboxsync * status code must be passed on to EM.
d8df004f4caf4f71e78f0be1cc2e2a918358ae9fvboxsync * @retval VINF_IOM_HC_IOPORT_WRITE Defer the write to ring-3. (R0/GC only)
a82df5167acec0c75d741d08c1d05a4007e3d50evboxsync * @retval VINF_EM_RAW_EMULATE_INSTR Defer the write to the REM.
d8df004f4caf4f71e78f0be1cc2e2a918358ae9fvboxsync * @retval VINF_EM_RAW_GUEST_TRAP The exception was left pending. (TRPMRaiseXcptErr)
d8df004f4caf4f71e78f0be1cc2e2a918358ae9fvboxsync * @retval VINF_TRPM_XCPT_DISPATCHED The exception was raised and dispatched for raw-mode execution. (TRPMRaiseXcptErr)
d8df004f4caf4f71e78f0be1cc2e2a918358ae9fvboxsync * @retval VINF_EM_RESCHEDULE_REM The exception was dispatched and cannot be executed in raw-mode. (TRPMRaiseXcptErr)
e11fe099decbb0f65cfcc7e2939fa00bacefbb1cvboxsync * @param pVM The virtual machine.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param pRegFrame Pointer to CPUMCTXCORE guest registers structure.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * @param pCpu Disassembler CPU state.
ed5875886aed64570809cf39f881a0fcb93f44a7vboxsyncVMMDECL(VBOXSTRICTRC) IOMInterpretOUTS(PVM pVM, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu)
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * Get port number from the first parameter.
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync * And get the I/O register size from the opcode / prefix.
8dee1778d3770cdc584752c84acf4899d8bfc9f9vboxsync unsigned cb = 0;
8dee1778d3770cdc584752c84acf4899d8bfc9f9vboxsync bool fRc = iomGetRegImmData(pCpu, &pCpu->param1, pRegFrame, &Port, &cb);
d408b82da0773c7e8cd4b3a01cb8a065a2c73a2dvboxsync AssertMsg(fRc, ("Failed to get reg/imm port number!\n")); NOREF(fRc);
fe376b8f218c234c1ba918513340aff917aa7925vboxsync cb = (pCpu->opmode == CPUMODE_16BIT) ? 2 : 4; /* dword in both 32 & 64 bits mode */
ed5875886aed64570809cf39f881a0fcb93f44a7vboxsync VBOXSTRICTRC rcStrict = IOMInterpretCheckPortIOAccess(pVM, pRegFrame, Port, cb);
ed5875886aed64570809cf39f881a0fcb93f44a7vboxsync AssertMsg(rcStrict == VINF_EM_RAW_GUEST_TRAP || rcStrict == VINF_TRPM_XCPT_DISPATCHED || rcStrict == VINF_TRPM_XCPT_DISPATCHED || RT_FAILURE(rcStrict), ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
8dee1778d3770cdc584752c84acf4899d8bfc9f9vboxsync return IOMInterpretOUTSEx(pVM, pRegFrame, Port, pCpu->prefix, cb);
15cb2a15b8a2bf93c7e5e83d801e6184ed3ab3e2vboxsync * Mapping an MMIO2 page in place of an MMIO page for direct access.
15cb2a15b8a2bf93c7e5e83d801e6184ed3ab3e2vboxsync * (This is a special optimization used by the VGA device.)
ebe05ec36d1fcd24d62e7066dedcb4eb2e691358vboxsync * @returns VBox status code.
e11fe099decbb0f65cfcc7e2939fa00bacefbb1cvboxsync * @param pVM The virtual machine.
15cb2a15b8a2bf93c7e5e83d801e6184ed3ab3e2vboxsync * @param GCPhys The address of the MMIO page to be changed.
15cb2a15b8a2bf93c7e5e83d801e6184ed3ab3e2vboxsync * @param GCPhysRemapped The address of the MMIO2 page.
15cb2a15b8a2bf93c7e5e83d801e6184ed3ab3e2vboxsync * @param fPageFlags Page flags to set. Must be (X86_PTE_RW | X86_PTE_P)
15cb2a15b8a2bf93c7e5e83d801e6184ed3ab3e2vboxsync * for the time being.
3f87e8441654102266beb3bda1446e4878360a84vboxsyncVMMDECL(int) IOMMMIOMapMMIO2Page(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysRemapped, uint64_t fPageFlags)
51afd9e19409617e8f3a204d58e96e22ee618e57vboxsync /* Currently only called from the VGA device during MMIO. */
d7f13a056a2bfd91ca8973baf89c7d87c2d1bf80vboxsync Log(("IOMMMIOMapMMIO2Page %RGp -> %RGp flags=%RX64\n", GCPhys, GCPhysRemapped, fPageFlags));
15cb2a15b8a2bf93c7e5e83d801e6184ed3ab3e2vboxsync AssertReturn(fPageFlags == (X86_PTE_RW | X86_PTE_P), VERR_INVALID_PARAMETER);
be9322776c5e79993df07a0728780a4397be7388vboxsync /* This currently only works in real mode, protected mode without paging or with nested paging. */
be9322776c5e79993df07a0728780a4397be7388vboxsync if ( !HWACCMIsEnabled(pVM) /* useless without VT-x/AMD-V */
15cb2a15b8a2bf93c7e5e83d801e6184ed3ab3e2vboxsync * Lookup the context range node the page belongs to.
e11fe099decbb0f65cfcc7e2939fa00bacefbb1cvboxsync PIOMMMIORANGE pRange = iomMMIOGetRange(&pVM->iom.s, GCPhys);
51afd9e19409617e8f3a204d58e96e22ee618e57vboxsync ("Handlers and page tables are out of sync or something! GCPhys=%RGp\n", GCPhys), VERR_IOM_MMIO_RANGE_NOT_FOUND);
15cb2a15b8a2bf93c7e5e83d801e6184ed3ab3e2vboxsync Assert((pRange->Core.KeyLast & PAGE_OFFSET_MASK) == PAGE_OFFSET_MASK);
15cb2a15b8a2bf93c7e5e83d801e6184ed3ab3e2vboxsync * Do the aliasing; page align the addresses since PGM is picky.
e11fe099decbb0f65cfcc7e2939fa00bacefbb1cvboxsync int rc = PGMHandlerPhysicalPageAlias(pVM, pRange->GCPhys, GCPhys, GCPhysRemapped);
15cb2a15b8a2bf93c7e5e83d801e6184ed3ab3e2vboxsync * Modify the shadow page table. Since it's an MMIO page it won't be present and we
15cb2a15b8a2bf93c7e5e83d801e6184ed3ab3e2vboxsync * can simply prefetch it.
15cb2a15b8a2bf93c7e5e83d801e6184ed3ab3e2vboxsync * Note: This is a NOP in the EPT case; we'll just let it fault again to resync the page.
0d0687880459ea33aa3e9c5a74d736edcb0937devboxsync#if 0 /* The assertion is wrong for the PGM_SYNC_CLEAR_PGM_POOL and VINF_PGM_HANDLER_ALREADY_ALIASED cases. */
d45f7f7fe0c28b500b45b2dc88d7a04f4c0be6b8vboxsync rc = PGMShwGetPage(pVCpu, (RTGCPTR)GCPhys, &fFlags, &HCPhys);
7250d2692ab7cbd235c2feeb78e48f0bdb302f14vboxsync Assert(rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT);
7250d2692ab7cbd235c2feeb78e48f0bdb302f14vboxsync Assert(rc == VINF_SUCCESS || rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT);
2af2d8756d82236367dfee425f88eb7141a490cbvboxsync * Mapping a HC page in place of an MMIO page for direct access.
2af2d8756d82236367dfee425f88eb7141a490cbvboxsync * (This is a special optimization used by the APIC in the VT-x case.)
2af2d8756d82236367dfee425f88eb7141a490cbvboxsync * @returns VBox status code.
2af2d8756d82236367dfee425f88eb7141a490cbvboxsync * @param pVM The virtual machine.
2af2d8756d82236367dfee425f88eb7141a490cbvboxsync * @param GCPhys The address of the MMIO page to be changed.
2af2d8756d82236367dfee425f88eb7141a490cbvboxsync * @param HCPhys The address of the host physical page.
2af2d8756d82236367dfee425f88eb7141a490cbvboxsync * @param fPageFlags Page flags to set. Must be (X86_PTE_RW | X86_PTE_P)
2af2d8756d82236367dfee425f88eb7141a490cbvboxsync * for the time being.
2af2d8756d82236367dfee425f88eb7141a490cbvboxsyncVMMDECL(int) IOMMMIOMapMMIOHCPage(PVM pVM, RTGCPHYS GCPhys, RTHCPHYS HCPhys, uint64_t fPageFlags)
51afd9e19409617e8f3a204d58e96e22ee618e57vboxsync /* Currently only called from VT-x code during a page fault. */
2af2d8756d82236367dfee425f88eb7141a490cbvboxsync Log(("IOMMMIOMapMMIOHCPage %RGp -> %RGp flags=%RX64\n", GCPhys, HCPhys, fPageFlags));
2af2d8756d82236367dfee425f88eb7141a490cbvboxsync AssertReturn(fPageFlags == (X86_PTE_RW | X86_PTE_P), VERR_INVALID_PARAMETER);
2af2d8756d82236367dfee425f88eb7141a490cbvboxsync * Lookup the context range node the page belongs to.
51afd9e19409617e8f3a204d58e96e22ee618e57vboxsync /* Can't lock IOM here due to potential deadlocks in the VGA device; not safe to access. */
51afd9e19409617e8f3a204d58e96e22ee618e57vboxsync PIOMMMIORANGE pRange = iomMMIOGetRangeUnsafe(&pVM->iom.s, GCPhys);
51afd9e19409617e8f3a204d58e96e22ee618e57vboxsync ("Handlers and page tables are out of sync or something! GCPhys=%RGp\n", GCPhys), VERR_IOM_MMIO_RANGE_NOT_FOUND);
2af2d8756d82236367dfee425f88eb7141a490cbvboxsync Assert((pRange->Core.KeyLast & PAGE_OFFSET_MASK) == PAGE_OFFSET_MASK);
2af2d8756d82236367dfee425f88eb7141a490cbvboxsync * Do the aliasing; page align the addresses since PGM is picky.
51afd9e19409617e8f3a204d58e96e22ee618e57vboxsync int rc = PGMHandlerPhysicalPageAliasHC(pVM, GCPhys, GCPhys, HCPhys);
2af2d8756d82236367dfee425f88eb7141a490cbvboxsync * Modify the shadow page table. Since it's an MMIO page it won't be present and we
2af2d8756d82236367dfee425f88eb7141a490cbvboxsync * can simply prefetch it.
2af2d8756d82236367dfee425f88eb7141a490cbvboxsync * Note: This is a NOP in the EPT case; we'll just let it fault again to resync the page.
2af2d8756d82236367dfee425f88eb7141a490cbvboxsync Assert(rc == VINF_SUCCESS || rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT);
e11fe099decbb0f65cfcc7e2939fa00bacefbb1cvboxsync * Reset a previously modified MMIO region; restore the access flags.
ebe05ec36d1fcd24d62e7066dedcb4eb2e691358vboxsync * @returns VBox status code.
e11fe099decbb0f65cfcc7e2939fa00bacefbb1cvboxsync * @param pVM The virtual machine.
e11fe099decbb0f65cfcc7e2939fa00bacefbb1cvboxsync * @param GCPhys Physical address that's part of the MMIO region to be reset.
15cb2a15b8a2bf93c7e5e83d801e6184ed3ab3e2vboxsyncVMMDECL(int) IOMMMIOResetRegion(PVM pVM, RTGCPHYS GCPhys)
be9322776c5e79993df07a0728780a4397be7388vboxsync /* This currently only works in real mode, protected mode without paging or with nested paging. */
be9322776c5e79993df07a0728780a4397be7388vboxsync if ( !HWACCMIsEnabled(pVM) /* useless without VT-x/AMD-V */
15cb2a15b8a2bf93c7e5e83d801e6184ed3ab3e2vboxsync * Lookup the context range node the page belongs to.
51afd9e19409617e8f3a204d58e96e22ee618e57vboxsync /* Can't lock IOM here due to potential deadlocks in the VGA device; not safe to access. */
51afd9e19409617e8f3a204d58e96e22ee618e57vboxsync PIOMMMIORANGE pRange = iomMMIOGetRangeUnsafe(&pVM->iom.s, GCPhys);
51afd9e19409617e8f3a204d58e96e22ee618e57vboxsync ("Handlers and page tables are out of sync or something! GCPhys=%RGp\n", GCPhys), VERR_IOM_MMIO_RANGE_NOT_FOUND);
51afd9e19409617e8f3a204d58e96e22ee618e57vboxsync Assert((pRange->Core.KeyLast & PAGE_OFFSET_MASK) == PAGE_OFFSET_MASK);
15cb2a15b8a2bf93c7e5e83d801e6184ed3ab3e2vboxsync * Call PGM to do the job work.
15cb2a15b8a2bf93c7e5e83d801e6184ed3ab3e2vboxsync * After the call, all the pages should be non-present... unless there is
15cb2a15b8a2bf93c7e5e83d801e6184ed3ab3e2vboxsync * a page pool flush pending (unlikely).
87fe4d73d7e6e53fbcec40dc6be2372479851cd4vboxsync rc = PGMShwGetPage(pVCpu, (RTGCPTR)GCPhys, &fFlags, &HCPhys);
15cb2a15b8a2bf93c7e5e83d801e6184ed3ab3e2vboxsync Assert(rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT);
7e960d3a0a8a3a84d7aba2cca45d72b1c31cc97bvboxsync#endif /* !IN_RC */