IEMAllInstructions.cpp.h revision f74327eabb87ebb53205b7f1c0ae2258f13989ff
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * IEM - Instruction Decoding and Emulation.
b3eb676cebf5407921b8f535095ca7655edb9db3vboxsync * Copyright (C) 2011-2012 Oracle Corporation
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * This file is part of VirtualBox Open Source Edition (OSE), as
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * available from http://www.virtualbox.org. This file is free software;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * you can redistribute it and/or modify it under the terms of the GNU
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * General Public License (GPL) as published by the Free Software
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Foundation, in version 2 as it comes in the "COPYING" file of the
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
8f28e374e0b8ea801e7b5364bccd8a7e0a6211d3vboxsync/*******************************************************************************
8f28e374e0b8ea801e7b5364bccd8a7e0a6211d3vboxsync* Global Variables *
8f28e374e0b8ea801e7b5364bccd8a7e0a6211d3vboxsync*******************************************************************************/
8f28e374e0b8ea801e7b5364bccd8a7e0a6211d3vboxsyncextern const PFNIEMOP g_apfnOneByteMap[256]; /* not static since we need to forward declare it. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Common worker for instructions like ADD, AND, OR, ++ with a byte
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * memory/register as the destination.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * @param pImpl Pointer to the instruction implementation (assembly).
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_DEF_1(iemOpHlpBinaryOperator_rm_r8, PCIEMOPBINSIZES, pImpl)
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * If rm is denoting a register, no more instruction bytes.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U8(u8Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U8(pu8Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU8, pu8Dst, u8Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * We're accessing memory.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Note! We're putting the eflags on the stack here so we can commit them
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * after the memory.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync uint32_t const fAccess = pImpl->pfnLockedU8 ? IEM_ACCESS_DATA_RW : IEM_ACCESS_DATA_R; /* CMP,TEST */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_MAP(pu8Dst, fAccess, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U8(u8Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU8, pu8Dst, u8Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnLockedU8, pu8Dst, u8Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Common worker for word/dword/qword instructions like ADD, AND, OR, ++ with
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * memory/register as the destination.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * @param pImpl Pointer to the instruction implementation (assembly).
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_DEF_1(iemOpHlpBinaryOperator_rm_rv, PCIEMOPBINSIZES, pImpl)
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * If rm is denoting a register, no more instruction bytes.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U16(u16Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U16(pu16Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU16, pu16Dst, u16Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U32(u32Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U32(pu32Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU32, pu32Dst, u32Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U64(u64Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U64(pu64Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU64, pu64Dst, u64Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * We're accessing memory.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Note! We're putting the eflags on the stack here so we can commit them
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * after the memory.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync uint32_t const fAccess = pImpl->pfnLockedU8 ? IEM_ACCESS_DATA_RW : IEM_ACCESS_DATA_R /* CMP,TEST */;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_MAP(pu16Dst, fAccess, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U16(u16Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU16, pu16Dst, u16Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnLockedU16, pu16Dst, u16Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_MAP(pu32Dst, fAccess, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U32(u32Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU32, pu32Dst, u32Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnLockedU32, pu32Dst, u32Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_MAP(pu64Dst, fAccess, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U64(u64Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU64, pu64Dst, u64Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnLockedU64, pu64Dst, u64Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Common worker for byte instructions like ADD, AND, OR, ++ with a register as
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * the destination.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * @param pImpl Pointer to the instruction implementation (assembly).
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_DEF_1(iemOpHlpBinaryOperator_r8_rm, PCIEMOPBINSIZES, pImpl)
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * If rm is denoting a register, no more instruction bytes.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U8(u8Src, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U8(pu8Dst, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU8, pu8Dst, u8Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * We're accessing memory.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_MEM_U8(u8Src, pIemCpu->iEffSeg, GCPtrEffDst);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U8(pu8Dst, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU8, pu8Dst, u8Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Common worker for word/dword/qword instructions like ADD, AND, OR, ++ with a
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * register as the destination.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * @param pImpl Pointer to the instruction implementation (assembly).
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_DEF_1(iemOpHlpBinaryOperator_rv_rm, PCIEMOPBINSIZES, pImpl)
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * If rm is denoting a register, no more instruction bytes.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U16(u16Src, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U16(pu16Dst, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU16, pu16Dst, u16Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U32(u32Src, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U32(pu32Dst, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU32, pu32Dst, u32Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U64(u64Src, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U64(pu64Dst, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU64, pu64Dst, u64Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * We're accessing memory.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_MEM_U16(u16Src, pIemCpu->iEffSeg, GCPtrEffDst);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U16(pu16Dst, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU16, pu16Dst, u16Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_MEM_U32(u32Src, pIemCpu->iEffSeg, GCPtrEffDst);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U32(pu32Dst, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU32, pu32Dst, u32Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_MEM_U64(u64Src, pIemCpu->iEffSeg, GCPtrEffDst);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U64(pu64Dst, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU64, pu64Dst, u64Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Common worker for instructions like ADD, AND, OR, ++ with working on AL with
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * a byte immediate.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * @param pImpl Pointer to the instruction implementation (assembly).
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_DEF_1(iemOpHlpBinaryOperator_AL_Ib, PCIEMOPBINSIZES, pImpl)
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU8, pu8Dst, u8Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Common worker for instructions like ADD, AND, OR, ++ with working on
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * @param pImpl Pointer to the instruction implementation (assembly).
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_DEF_1(iemOpHlpBinaryOperator_rAX_Iz, PCIEMOPBINSIZES, pImpl)
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_ARG_CONST(uint16_t, u16Src,/*=*/ u16Imm, 1);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU16, pu16Dst, u16Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_ARG_CONST(uint32_t, u32Src,/*=*/ u32Imm, 1);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU32, pu32Dst, u32Src, pEFlags);
ea4433aedd4105e6599e57e0c5f6cb32a68e963cvboxsync uint64_t u64Imm; IEM_OPCODE_GET_NEXT_S32_SX_U64(&u64Imm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_ARG_CONST(uint64_t, u64Src,/*=*/ u64Imm, 1);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU64, pu64Dst, u64Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcodes 0xf1, 0xd6. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** @name ..... opcodes.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** @name Two byte opcodes (first byte 0x0f).
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x00 /0. */
acebf0f8a1553ee17c6669acc236dc77e15b57a4vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
acebf0f8a1553ee17c6669acc236dc77e15b57a4vboxsync IEM_MC_STORE_GREG_U16((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, u16Ldtr);
acebf0f8a1553ee17c6669acc236dc77e15b57a4vboxsync IEM_MC_STORE_GREG_U32((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, u32Ldtr);
acebf0f8a1553ee17c6669acc236dc77e15b57a4vboxsync IEM_MC_STORE_GREG_U64((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, u64Ldtr);
acebf0f8a1553ee17c6669acc236dc77e15b57a4vboxsync IEM_MC_STORE_MEM_U16(pIemCpu->iEffSeg, GCPtrEffDst, u16Ldtr);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x00 /1. */
acebf0f8a1553ee17c6669acc236dc77e15b57a4vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
acebf0f8a1553ee17c6669acc236dc77e15b57a4vboxsync IEM_MC_STORE_GREG_U16((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, u16Tr);
acebf0f8a1553ee17c6669acc236dc77e15b57a4vboxsync IEM_MC_STORE_GREG_U32((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, u32Tr);
acebf0f8a1553ee17c6669acc236dc77e15b57a4vboxsync IEM_MC_STORE_GREG_U64((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, u64Tr);
acebf0f8a1553ee17c6669acc236dc77e15b57a4vboxsync IEM_MC_STORE_MEM_U16(pIemCpu->iEffSeg, GCPtrEffDst, u16Tr);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x00 /2. */
d4a8f6749f70bad88edc04de808643d372faa35avboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
d4a8f6749f70bad88edc04de808643d372faa35avboxsync IEM_MC_FETCH_GREG_U16(u16Sel, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
d4a8f6749f70bad88edc04de808643d372faa35avboxsync IEM_MC_FETCH_MEM_U16(u16Sel, pIemCpu->iEffSeg, GCPtrEffSrc);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x00 /3. */
d4a8f6749f70bad88edc04de808643d372faa35avboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
d4a8f6749f70bad88edc04de808643d372faa35avboxsync IEM_MC_FETCH_GREG_U16(u16Sel, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
d4a8f6749f70bad88edc04de808643d372faa35avboxsync IEM_MC_FETCH_MEM_U16(u16Sel, pIemCpu->iEffSeg, GCPtrEffSrc);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x00 /4. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x00 /5. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x00. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 0: return FNIEMOP_CALL_1(iemOp_Grp6_sldt, bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 1: return FNIEMOP_CALL_1(iemOp_Grp6_str, bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 2: return FNIEMOP_CALL_1(iemOp_Grp6_lldt, bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 3: return FNIEMOP_CALL_1(iemOp_Grp6_ltr, bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 4: return FNIEMOP_CALL_1(iemOp_Grp6_verr, bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 5: return FNIEMOP_CALL_1(iemOp_Grp6_verw, bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x01 /0. */
cc8fc24b48b6dcfb5b11e66d68d08ac3ae46b401vboxsync IEM_MC_ARG_CONST(uint8_t, iEffSeg, /*=*/pIemCpu->iEffSeg, 0);
cc8fc24b48b6dcfb5b11e66d68d08ac3ae46b401vboxsync IEM_MC_ARG_CONST(IEMMODE, enmEffOpSizeArg,/*=*/pIemCpu->enmEffOpSize, 2);
cc8fc24b48b6dcfb5b11e66d68d08ac3ae46b401vboxsync IEM_MC_CALL_CIMPL_3(iemCImpl_sgdt, iEffSeg, GCPtrEffSrc, enmEffOpSizeArg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x01 /0. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x01 /0. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x01 /0. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x01 /0. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x01 /1. */
cc8fc24b48b6dcfb5b11e66d68d08ac3ae46b401vboxsync IEM_MC_ARG_CONST(uint8_t, iEffSeg, /*=*/pIemCpu->iEffSeg, 0);
cc8fc24b48b6dcfb5b11e66d68d08ac3ae46b401vboxsync IEM_MC_ARG_CONST(IEMMODE, enmEffOpSizeArg,/*=*/pIemCpu->enmEffOpSize, 2);
cc8fc24b48b6dcfb5b11e66d68d08ac3ae46b401vboxsync IEM_MC_CALL_CIMPL_3(iemCImpl_sidt, iEffSeg, GCPtrEffSrc, enmEffOpSizeArg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x01 /1. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x01 /1. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x01 /2. */
cc8fc24b48b6dcfb5b11e66d68d08ac3ae46b401vboxsync IEM_MC_ARG_CONST(uint8_t, iEffSeg, /*=*/pIemCpu->iEffSeg, 0);
cc8fc24b48b6dcfb5b11e66d68d08ac3ae46b401vboxsync IEM_MC_ARG_CONST(IEMMODE, enmEffOpSizeArg,/*=*/pIemCpu->enmEffOpSize, 2);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_CIMPL_3(iemCImpl_lgdt, iEffSeg, GCPtrEffSrc, enmEffOpSizeArg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x01 /2. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x01 /2. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x01 /3. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMMODE enmEffOpSize = pIemCpu->enmCpuMode == IEMMODE_64BIT
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_ARG_CONST(uint8_t, iEffSeg, /*=*/pIemCpu->iEffSeg, 0);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_ARG_CONST(IEMMODE, enmEffOpSizeArg,/*=*/enmEffOpSize, 2);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_CIMPL_3(iemCImpl_lidt, iEffSeg, GCPtrEffSrc, enmEffOpSizeArg);
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync/** Opcode 0x0f 0x01 0xd8. */
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync/** Opcode 0x0f 0x01 0xd9. */
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync/** Opcode 0x0f 0x01 0xda. */
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync/** Opcode 0x0f 0x01 0xdb. */
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync/** Opcode 0x0f 0x01 0xdc. */
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync/** Opcode 0x0f 0x01 0xdd. */
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync/** Opcode 0x0f 0x01 0xde. */
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync/** Opcode 0x0f 0x01 0xdf. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x01 /4. */
374f0b5fc4e70777b3f9ad8586ad7aa2551f37ccvboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
374f0b5fc4e70777b3f9ad8586ad7aa2551f37ccvboxsync IEM_MC_STORE_GREG_U16((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, u16Tmp);
374f0b5fc4e70777b3f9ad8586ad7aa2551f37ccvboxsync IEM_MC_STORE_GREG_U32((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, u32Tmp);
374f0b5fc4e70777b3f9ad8586ad7aa2551f37ccvboxsync IEM_MC_STORE_GREG_U64((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, u64Tmp);
374f0b5fc4e70777b3f9ad8586ad7aa2551f37ccvboxsync /* Ignore operand size here, memory refs are always 16-bit. */
374f0b5fc4e70777b3f9ad8586ad7aa2551f37ccvboxsync IEM_MC_STORE_MEM_U16(pIemCpu->iEffSeg, GCPtrEffDst, u16Tmp);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x01 /6. */
374f0b5fc4e70777b3f9ad8586ad7aa2551f37ccvboxsync /* The operand size is effectively ignored, all is 16-bit and only the
374f0b5fc4e70777b3f9ad8586ad7aa2551f37ccvboxsync lower 3-bits are used. */
374f0b5fc4e70777b3f9ad8586ad7aa2551f37ccvboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
374f0b5fc4e70777b3f9ad8586ad7aa2551f37ccvboxsync IEM_MC_FETCH_GREG_U16(u16Tmp, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
374f0b5fc4e70777b3f9ad8586ad7aa2551f37ccvboxsync IEM_MC_FETCH_MEM_U16(u16Tmp, pIemCpu->iEffSeg, GCPtrEffDst);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x01 /7. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x01 /7. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x01 /7. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x01. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) != (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) != (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) != (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) != (3 << X86_MODRM_MOD_SHIFT))
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync case 1: return FNIEMOP_CALL(iemOp_Grp7_Amd_vmmcall);
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync case 2: return FNIEMOP_CALL(iemOp_Grp7_Amd_vmload);
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync case 3: return FNIEMOP_CALL(iemOp_Grp7_Amd_vmsave);
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync case 6: return FNIEMOP_CALL(iemOp_Grp7_Amd_skinit);
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync case 7: return FNIEMOP_CALL(iemOp_Grp7_Amd_invlpga);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) != (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x02. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x03. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x04. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x05. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x06. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x08. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x09. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x0b. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x0d. */
324e9d5fe84f23a35c4feb6853ed3ee9b3b1fad9vboxsync /* AMD prefetch group, Intel implements this as NOP Ev (and so do we). */
24986763e9e9e6633a4a54479be945d577fdfd34vboxsync if (!IEM_IS_AMD_CPUID_FEATURES_ANY_PRESENT(X86_CPUID_EXT_FEATURE_EDX_LONG_MODE | X86_CPUID_AMD_FEATURE_EDX_3DNOW,
324e9d5fe84f23a35c4feb6853ed3ee9b3b1fad9vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
324e9d5fe84f23a35c4feb6853ed3ee9b3b1fad9vboxsync switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
324e9d5fe84f23a35c4feb6853ed3ee9b3b1fad9vboxsync /* Currently a NOP. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x0e. */
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync/** Opcode 0x0f 0x0f 0x0c. */
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync/** Opcode 0x0f 0x0f 0x0d. */
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync/** Opcode 0x0f 0x0f 0x1c. */
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync/** Opcode 0x0f 0x0f 0x1d. */
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync/** Opcode 0x0f 0x0f 0x8a. */
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync/** Opcode 0x0f 0x0f 0x8e. */
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync/** Opcode 0x0f 0x0f 0x90. */
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync/** Opcode 0x0f 0x0f 0x94. */
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync/** Opcode 0x0f 0x0f 0x96. */
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync/** Opcode 0x0f 0x0f 0x97. */
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync/** Opcode 0x0f 0x0f 0x9a. */
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync/** Opcode 0x0f 0x0f 0x9e. */
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync/** Opcode 0x0f 0x0f 0xa0. */
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync/** Opcode 0x0f 0x0f 0xa4. */
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync/** Opcode 0x0f 0x0f 0xa6. */
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync/** Opcode 0x0f 0x0f 0xa7. */
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync/** Opcode 0x0f 0x0f 0xaa. */
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync/** Opcode 0x0f 0x0f 0xae. */
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync/** Opcode 0x0f 0x0f 0xb0. */
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync/** Opcode 0x0f 0x0f 0xb4. */
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync/** Opcode 0x0f 0x0f 0xb6. */
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync/** Opcode 0x0f 0x0f 0xb7. */
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync/** Opcode 0x0f 0x0f 0xbb. */
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync/** Opcode 0x0f 0x0f 0xbf. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x0f. */
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync if (!IEM_IS_AMD_CPUID_FEATURE_PRESENT_EDX(X86_CPUID_AMD_FEATURE_EDX_3DNOW))
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync /* This is pretty sparse, use switch instead of table. */
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync case 0x0c: return FNIEMOP_CALL(iemOp_3Dnow_pi2fw_Pq_Qq);
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync case 0x0d: return FNIEMOP_CALL(iemOp_3Dnow_pi2fd_Pq_Qq);
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync case 0x1c: return FNIEMOP_CALL(iemOp_3Dnow_pf2fw_Pq_Qq);
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync case 0x1d: return FNIEMOP_CALL(iemOp_3Dnow_pf2fd_Pq_Qq);
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync case 0x8a: return FNIEMOP_CALL(iemOp_3Dnow_pfnacc_Pq_Qq);
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync case 0x8e: return FNIEMOP_CALL(iemOp_3Dnow_pfpnacc_Pq_Qq);
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync case 0x90: return FNIEMOP_CALL(iemOp_3Dnow_pfcmpge_Pq_Qq);
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync case 0x94: return FNIEMOP_CALL(iemOp_3Dnow_pfmin_Pq_Qq);
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync case 0x96: return FNIEMOP_CALL(iemOp_3Dnow_pfrcp_Pq_Qq);
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync case 0x97: return FNIEMOP_CALL(iemOp_3Dnow_pfrsqrt_Pq_Qq);
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync case 0x9a: return FNIEMOP_CALL(iemOp_3Dnow_pfsub_Pq_Qq);
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync case 0x9e: return FNIEMOP_CALL(iemOp_3Dnow_pfadd_PQ_Qq);
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync case 0xa0: return FNIEMOP_CALL(iemOp_3Dnow_pfcmpgt_Pq_Qq);
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync case 0xa4: return FNIEMOP_CALL(iemOp_3Dnow_pfmax_Pq_Qq);
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync case 0xa6: return FNIEMOP_CALL(iemOp_3Dnow_pfrcpit1_Pq_Qq);
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync case 0xa7: return FNIEMOP_CALL(iemOp_3Dnow_pfrsqit1_Pq_Qq);
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync case 0xaa: return FNIEMOP_CALL(iemOp_3Dnow_pfsubr_Pq_Qq);
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync case 0xae: return FNIEMOP_CALL(iemOp_3Dnow_pfacc_PQ_Qq);
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync case 0xb0: return FNIEMOP_CALL(iemOp_3Dnow_pfcmpeq_Pq_Qq);
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync case 0xb4: return FNIEMOP_CALL(iemOp_3Dnow_pfmul_Pq_Qq);
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync case 0xb6: return FNIEMOP_CALL(iemOp_3Dnow_pfrcpit2_Pq_Qq);
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync case 0xb7: return FNIEMOP_CALL(iemOp_3Dnow_pmulhrw_Pq_Qq);
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync case 0xbb: return FNIEMOP_CALL(iemOp_3Dnow_pswapd_Pq_Qq);
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync case 0xbf: return FNIEMOP_CALL(iemOp_3Dnow_pavgusb_PQ_Qq);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x10. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_movups_Vps_Wps__movupd_Vpd_Wpd__movss_Vss_Wss__movsd_Vsd_Wsd);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x11. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_movups_Wps_Vps__movupd_Wpd_Vpd__movss_Wss_Vss__movsd_Vsd_Wsd);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x12. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_movlps_Vq_Mq__movhlps_Vq_Uq__movlpd_Vq_Mq__movsldup_Vq_Wq__movddup_Vq_Wq);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x13. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x14. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_unpckhlps_Vps_Wq__unpcklpd_Vpd_Wq);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x15. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_unpckhps_Vps_Wq__unpckhpd_Vpd_Wq);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x16. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_movhps_Vq_Mq__movlhps_Vq_Uq__movhpd_Vq_Mq__movshdup_Vq_Wq);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x17. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x18. */
324e9d5fe84f23a35c4feb6853ed3ee9b3b1fad9vboxsync if ((bRm & X86_MODRM_MOD_MASK) != (3 << X86_MODRM_MOD_SHIFT))
324e9d5fe84f23a35c4feb6853ed3ee9b3b1fad9vboxsync switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
324e9d5fe84f23a35c4feb6853ed3ee9b3b1fad9vboxsync case 4: /* Aliased to /0 for the time being according to AMD. */
324e9d5fe84f23a35c4feb6853ed3ee9b3b1fad9vboxsync case 5: /* Aliased to /0 for the time being according to AMD. */
324e9d5fe84f23a35c4feb6853ed3ee9b3b1fad9vboxsync case 6: /* Aliased to /0 for the time being according to AMD. */
324e9d5fe84f23a35c4feb6853ed3ee9b3b1fad9vboxsync case 7: /* Aliased to /0 for the time being according to AMD. */
324e9d5fe84f23a35c4feb6853ed3ee9b3b1fad9vboxsync /* Currently a NOP. */
324e9d5fe84f23a35c4feb6853ed3ee9b3b1fad9vboxsync/** Opcode 0x0f 0x19..0x1f. */
324e9d5fe84f23a35c4feb6853ed3ee9b3b1fad9vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
324e9d5fe84f23a35c4feb6853ed3ee9b3b1fad9vboxsync /* Currently a NOP. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x20. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* mod is ignored, as is operand size overrides. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync pIemCpu->enmEffOpSize = pIemCpu->enmDefOpSize = IEMMODE_64BIT;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync pIemCpu->enmEffOpSize = pIemCpu->enmDefOpSize = IEMMODE_32BIT;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync uint8_t iCrReg = ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* The lock prefix can be used to encode CR8 accesses on some CPUs. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if (!IEM_IS_AMD_CPUID_FEATURE_PRESENT_ECX(X86_CPUID_AMD_FEATURE_ECX_CR8L))
7dfd3f41f200bede0714c89735d9cc8d310e3f1cvboxsync return IEMOP_RAISE_INVALID_LOCK_PREFIX(); /* #UD takes precedence over #GP(), see test. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return IEM_MC_DEFER_TO_CIMPL_2(iemCImpl_mov_Rd_Cd, (X86_MODRM_RM_MASK & bRm) | pIemCpu->uRexB, iCrReg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x21. */
0bbe08c3ee3c834593be35ccfbe0183116509ae2vboxsync ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK));
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x22. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* mod is ignored, as is operand size overrides. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync pIemCpu->enmEffOpSize = pIemCpu->enmDefOpSize = IEMMODE_64BIT;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync pIemCpu->enmEffOpSize = pIemCpu->enmDefOpSize = IEMMODE_32BIT;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync uint8_t iCrReg = ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* The lock prefix can be used to encode CR8 accesses on some CPUs. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if (!IEM_IS_AMD_CPUID_FEATURE_PRESENT_ECX(X86_CPUID_AMD_FEATURE_ECX_CR8L))
7dfd3f41f200bede0714c89735d9cc8d310e3f1cvboxsync return IEMOP_RAISE_INVALID_LOCK_PREFIX(); /* #UD takes precedence over #GP(), see test. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return IEM_MC_DEFER_TO_CIMPL_2(iemCImpl_mov_Cd_Rd, iCrReg, (X86_MODRM_RM_MASK & bRm) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x23. */
0bbe08c3ee3c834593be35ccfbe0183116509ae2vboxsync ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK),
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x24. */
7dfd3f41f200bede0714c89735d9cc8d310e3f1cvboxsync /* The RM byte is not considered, see testcase. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x26. */
7dfd3f41f200bede0714c89735d9cc8d310e3f1cvboxsync /* The RM byte is not considered, see testcase. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x28. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x29. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x2a. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_cvtpi2ps_Vps_Qpi__cvtpi2pd_Vpd_Qpi__cvtsi2ss_Vss_Ey__cvtsi2sd_Vsd_Ey);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x2b. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_movntps_Mps_Vps__movntpd_Mpd_Vpd);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x2c. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_cvttps2pi_Ppi_Wps__cvttpd2pi_Ppi_Wpd__cvttss2si_Gy_Wss__cvttsd2si_Yu_Wsd);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x2d. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_cvtps2pi_Ppi_Wps__cvtpd2pi_QpiWpd__cvtss2si_Gy_Wss__cvtsd2si_Gy_Wsd);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x2e. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_ucomiss_Vss_Wss__ucomisd_Vsd_Wsd);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x2f. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x30. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x31. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x33. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x34. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x34. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x35. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x37. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x38. */
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsyncFNIEMOP_UD_STUB(iemOp_3byte_Esc_A4); /* Here there be dragons... */
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync/** Opcode 0x0f 0x3a. */
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsyncFNIEMOP_UD_STUB(iemOp_3byte_Esc_A5); /* Here there be dragons... */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x3c (?). */
a13bd47f22085c82960265c150f10f2195369630vboxsync * Implements a conditional move.
a13bd47f22085c82960265c150f10f2195369630vboxsync * Wish there was an obvious way to do this where we could share and reduce
a13bd47f22085c82960265c150f10f2195369630vboxsync * code bloat.
a13bd47f22085c82960265c150f10f2195369630vboxsync * @param a_Cnd The conditional "microcode" operation.
a13bd47f22085c82960265c150f10f2195369630vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT)) \
a13bd47f22085c82960265c150f10f2195369630vboxsync IEM_MC_FETCH_GREG_U16(u16Tmp, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB); \
a13bd47f22085c82960265c150f10f2195369630vboxsync IEM_MC_STORE_GREG_U16(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u16Tmp); \
a13bd47f22085c82960265c150f10f2195369630vboxsync IEM_MC_FETCH_GREG_U32(u32Tmp, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB); \
a13bd47f22085c82960265c150f10f2195369630vboxsync IEM_MC_STORE_GREG_U32(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u32Tmp); \
a13bd47f22085c82960265c150f10f2195369630vboxsync IEM_MC_CLEAR_HIGH_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg); \
a13bd47f22085c82960265c150f10f2195369630vboxsync IEM_MC_FETCH_GREG_U64(u64Tmp, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB); \
a13bd47f22085c82960265c150f10f2195369630vboxsync IEM_MC_STORE_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u64Tmp); \
a13bd47f22085c82960265c150f10f2195369630vboxsync IEM_MC_FETCH_MEM_U16(u16Tmp, pIemCpu->iEffSeg, GCPtrEffSrc); \
a13bd47f22085c82960265c150f10f2195369630vboxsync IEM_MC_STORE_GREG_U16(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u16Tmp); \
a13bd47f22085c82960265c150f10f2195369630vboxsync IEM_MC_FETCH_MEM_U32(u32Tmp, pIemCpu->iEffSeg, GCPtrEffSrc); \
a13bd47f22085c82960265c150f10f2195369630vboxsync IEM_MC_STORE_GREG_U32(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u32Tmp); \
a13bd47f22085c82960265c150f10f2195369630vboxsync IEM_MC_CLEAR_HIGH_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg); \
a13bd47f22085c82960265c150f10f2195369630vboxsync IEM_MC_FETCH_MEM_U64(u64Tmp, pIemCpu->iEffSeg, GCPtrEffSrc); \
a13bd47f22085c82960265c150f10f2195369630vboxsync IEM_MC_STORE_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u64Tmp); \
a13bd47f22085c82960265c150f10f2195369630vboxsync } do {} while (0)
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x40. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x41. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x42. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x43. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x44. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x45. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x46. */
a13bd47f22085c82960265c150f10f2195369630vboxsync CMOV_X(IEM_MC_IF_EFL_ANY_BITS_SET(X86_EFL_CF | X86_EFL_ZF));
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x47. */
a13bd47f22085c82960265c150f10f2195369630vboxsync CMOV_X(IEM_MC_IF_EFL_NO_BITS_SET(X86_EFL_CF | X86_EFL_ZF));
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x48. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x49. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x4a. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x4b. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x4c. */
a13bd47f22085c82960265c150f10f2195369630vboxsync CMOV_X(IEM_MC_IF_EFL_BITS_NE(X86_EFL_SF, X86_EFL_OF));
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x4d. */
a13bd47f22085c82960265c150f10f2195369630vboxsync CMOV_X(IEM_MC_IF_EFL_BITS_EQ(X86_EFL_SF, X86_EFL_OF));
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x4e. */
a13bd47f22085c82960265c150f10f2195369630vboxsync CMOV_X(IEM_MC_IF_EFL_BIT_SET_OR_BITS_NE(X86_EFL_ZF, X86_EFL_SF, X86_EFL_OF));
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x4f. */
0bbe08c3ee3c834593be35ccfbe0183116509ae2vboxsync CMOV_X(IEM_MC_IF_EFL_BIT_NOT_SET_AND_BITS_EQ(X86_EFL_ZF, X86_EFL_SF, X86_EFL_OF));
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x50. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_movmskps_Gy_Ups__movmskpd_Gy_Upd);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x51. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_sqrtps_Wps_Vps__sqrtpd_Wpd_Vpd__sqrtss_Vss_Wss__sqrtsd_Vsd_Wsd);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x52. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_rsqrtps_Wps_Vps__rsqrtss_Vss_Wss);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x53. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x54. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x55. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x56. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x57. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x58. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_addps_Vps_Wps__addpd_Vpd_Wpd__addss_Vss_Wss__addsd_Vsd_Wsd);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x59. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_mulps_Vps_Wps__mulpd_Vpd_Wpd__mulss_Vss__Wss__mulsd_Vsd_Wsd);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x5a. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_cvtps2pd_Vpd_Wps__cvtpd2ps_Vps_Wpd__cvtss2sd_Vsd_Wss__cvtsd2ss_Vss_Wsd);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x5b. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_cvtdq2ps_Vps_Wdq__cvtps2dq_Vdq_Wps__cvtps2dq_Vdq_Wps);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x5c. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_subps_Vps_Wps__subpd_Vps_Wdp__subss_Vss_Wss__subsd_Vsd_Wsd);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x5d. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_minps_Vps_Wps__minpd_Vpd_Wpd__minss_Vss_Wss__minsd_Vsd_Wsd);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x5e. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_divps_Vps_Wps__divpd_Vpd_Wpd__divss_Vss_Wss__divsd_Vsd_Wsd);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x5f. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_maxps_Vps_Wps__maxpd_Vpd_Wpd__maxss_Vss_Wss__maxsd_Vsd_Wsd);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x60. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_punpcklbw_Pq_Qd__punpcklbw_Vdq_Wdq);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x61. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_punpcklwd_Pq_Qd__punpcklwd_Vdq_Wdq);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x62. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_punpckldq_Pq_Qd__punpckldq_Vdq_Wdq);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x63. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_packsswb_Pq_Qq__packsswb_Vdq_Wdq);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x64. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x65. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x66. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x67. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_packuswb_Pq_Qq__packuswb_Vdq_Wdq);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x68. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_punpckhbw_Pq_Qq__punpckhbw_Vdq_Wdq);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x69. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_punpckhwd_Pq_Qd__punpckhwd_Vdq_Wdq);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x6a. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_punpckhdq_Pq_Qd__punpckhdq_Vdq_Wdq);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x6b. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_packssdw_Pq_Qd__packssdq_Vdq_Wdq);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x6c. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x6d. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x6e. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x6f. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_movq_Pq_Qq__movdqa_Vdq_Wdq__movdqu_Vdq_Wdq);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x70. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_pshufw_Pq_Qq_Ib__pshufd_Vdq_Wdq_Ib__pshufhw_Vdq_Wdq_Ib__pshuflq_Vdq_Wdq_Ib);
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync/** Opcode 0x0f 0x71 11/2. */
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsyncFNIEMOP_STUB_1(iemOp_Grp12_psrlw_Nq_Ib, uint8_t, bRm);
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync/** Opcode 0x66 0x0f 0x71 11/2. */
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsyncFNIEMOP_STUB_1(iemOp_Grp12_psrlw_Udq_Ib, uint8_t, bRm);
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync/** Opcode 0x0f 0x71 11/4. */
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsyncFNIEMOP_STUB_1(iemOp_Grp12_psraw_Nq_Ib, uint8_t, bRm);
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync/** Opcode 0x66 0x0f 0x71 11/4. */
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsyncFNIEMOP_STUB_1(iemOp_Grp12_psraw_Udq_Ib, uint8_t, bRm);
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync/** Opcode 0x0f 0x71 11/6. */
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsyncFNIEMOP_STUB_1(iemOp_Grp12_psllw_Nq_Ib, uint8_t, bRm);
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync/** Opcode 0x66 0x0f 0x71 11/6. */
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsyncFNIEMOP_STUB_1(iemOp_Grp12_psllw_Udq_Ib, uint8_t, bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x71. */
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync if ((bRm & X86_MODRM_MOD_MASK) != (3 << X86_MODRM_MOD_SHIFT))
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync switch (pIemCpu->fPrefixes & (IEM_OP_PRF_SIZE_OP | IEM_OP_PRF_REPZ | IEM_OP_PRF_REPNZ))
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync case 0: return FNIEMOP_CALL_1(iemOp_Grp12_psrlw_Nq_Ib, bRm);
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync case IEM_OP_PRF_SIZE_OP: return FNIEMOP_CALL_1(iemOp_Grp12_psrlw_Udq_Ib, bRm);
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync default: return IEMOP_RAISE_INVALID_OPCODE();
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync switch (pIemCpu->fPrefixes & (IEM_OP_PRF_SIZE_OP | IEM_OP_PRF_REPZ | IEM_OP_PRF_REPNZ))
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync case 0: return FNIEMOP_CALL_1(iemOp_Grp12_psraw_Nq_Ib, bRm);
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync case IEM_OP_PRF_SIZE_OP: return FNIEMOP_CALL_1(iemOp_Grp12_psraw_Udq_Ib, bRm);
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync default: return IEMOP_RAISE_INVALID_OPCODE();
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync switch (pIemCpu->fPrefixes & (IEM_OP_PRF_SIZE_OP | IEM_OP_PRF_REPZ | IEM_OP_PRF_REPNZ))
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync case 0: return FNIEMOP_CALL_1(iemOp_Grp12_psllw_Nq_Ib, bRm);
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync case IEM_OP_PRF_SIZE_OP: return FNIEMOP_CALL_1(iemOp_Grp12_psllw_Udq_Ib, bRm);
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync default: return IEMOP_RAISE_INVALID_OPCODE();
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync/** Opcode 0x0f 0x72 11/2. */
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsyncFNIEMOP_STUB_1(iemOp_Grp13_psrld_Nq_Ib, uint8_t, bRm);
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync/** Opcode 0x66 0x0f 0x72 11/2. */
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsyncFNIEMOP_STUB_1(iemOp_Grp13_psrld_Udq_Ib, uint8_t, bRm);
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync/** Opcode 0x0f 0x72 11/4. */
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsyncFNIEMOP_STUB_1(iemOp_Grp13_psrad_Nq_Ib, uint8_t, bRm);
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync/** Opcode 0x66 0x0f 0x72 11/4. */
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsyncFNIEMOP_STUB_1(iemOp_Grp13_psrad_Udq_Ib, uint8_t, bRm);
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync/** Opcode 0x0f 0x72 11/6. */
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsyncFNIEMOP_STUB_1(iemOp_Grp13_pslld_Nq_Ib, uint8_t, bRm);
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync/** Opcode 0x66 0x0f 0x72 11/6. */
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsyncFNIEMOP_STUB_1(iemOp_Grp13_pslld_Udq_Ib, uint8_t, bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x72. */
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync if ((bRm & X86_MODRM_MOD_MASK) != (3 << X86_MODRM_MOD_SHIFT))
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync switch (pIemCpu->fPrefixes & (IEM_OP_PRF_SIZE_OP | IEM_OP_PRF_REPZ | IEM_OP_PRF_REPNZ))
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync case 0: return FNIEMOP_CALL_1(iemOp_Grp13_psrld_Nq_Ib, bRm);
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync case IEM_OP_PRF_SIZE_OP: return FNIEMOP_CALL_1(iemOp_Grp13_psrld_Udq_Ib, bRm);
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync default: return IEMOP_RAISE_INVALID_OPCODE();
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync switch (pIemCpu->fPrefixes & (IEM_OP_PRF_SIZE_OP | IEM_OP_PRF_REPZ | IEM_OP_PRF_REPNZ))
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync case 0: return FNIEMOP_CALL_1(iemOp_Grp13_psrad_Nq_Ib, bRm);
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync case IEM_OP_PRF_SIZE_OP: return FNIEMOP_CALL_1(iemOp_Grp13_psrad_Udq_Ib, bRm);
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync default: return IEMOP_RAISE_INVALID_OPCODE();
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync switch (pIemCpu->fPrefixes & (IEM_OP_PRF_SIZE_OP | IEM_OP_PRF_REPZ | IEM_OP_PRF_REPNZ))
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync case 0: return FNIEMOP_CALL_1(iemOp_Grp13_pslld_Nq_Ib, bRm);
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync case IEM_OP_PRF_SIZE_OP: return FNIEMOP_CALL_1(iemOp_Grp13_pslld_Udq_Ib, bRm);
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync default: return IEMOP_RAISE_INVALID_OPCODE();
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync/** Opcode 0x0f 0x73 11/2. */
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsyncFNIEMOP_STUB_1(iemOp_Grp14_psrlq_Nq_Ib, uint8_t, bRm);
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync/** Opcode 0x66 0x0f 0x73 11/2. */
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsyncFNIEMOP_STUB_1(iemOp_Grp14_psrlq_Udq_Ib, uint8_t, bRm);
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync/** Opcode 0x66 0x0f 0x73 11/3. */
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsyncFNIEMOP_STUB_1(iemOp_Grp14_psrldq_Udq_Ib, uint8_t, bRm);
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync/** Opcode 0x0f 0x73 11/6. */
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsyncFNIEMOP_STUB_1(iemOp_Grp14_psllq_Nq_Ib, uint8_t, bRm);
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync/** Opcode 0x66 0x0f 0x73 11/6. */
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsyncFNIEMOP_STUB_1(iemOp_Grp14_psllq_Udq_Ib, uint8_t, bRm);
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync/** Opcode 0x66 0x0f 0x73 11/7. */
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsyncFNIEMOP_STUB_1(iemOp_Grp14_pslldq_Udq_Ib, uint8_t, bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x73. */
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync if ((bRm & X86_MODRM_MOD_MASK) != (3 << X86_MODRM_MOD_SHIFT))
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync switch (pIemCpu->fPrefixes & (IEM_OP_PRF_SIZE_OP | IEM_OP_PRF_REPZ | IEM_OP_PRF_REPNZ))
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync case 0: return FNIEMOP_CALL_1(iemOp_Grp14_psrlq_Nq_Ib, bRm);
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync case IEM_OP_PRF_SIZE_OP: return FNIEMOP_CALL_1(iemOp_Grp14_psrlq_Udq_Ib, bRm);
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync default: return IEMOP_RAISE_INVALID_OPCODE();
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync switch (pIemCpu->fPrefixes & (IEM_OP_PRF_SIZE_OP | IEM_OP_PRF_REPZ | IEM_OP_PRF_REPNZ))
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync case IEM_OP_PRF_SIZE_OP: return FNIEMOP_CALL_1(iemOp_Grp14_psrldq_Udq_Ib, bRm);
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync default: return IEMOP_RAISE_INVALID_OPCODE();
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync switch (pIemCpu->fPrefixes & (IEM_OP_PRF_SIZE_OP | IEM_OP_PRF_REPZ | IEM_OP_PRF_REPNZ))
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync case 0: return FNIEMOP_CALL_1(iemOp_Grp14_psllq_Nq_Ib, bRm);
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync case IEM_OP_PRF_SIZE_OP: return FNIEMOP_CALL_1(iemOp_Grp14_psllq_Udq_Ib, bRm);
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync default: return IEMOP_RAISE_INVALID_OPCODE();
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync switch (pIemCpu->fPrefixes & (IEM_OP_PRF_SIZE_OP | IEM_OP_PRF_REPZ | IEM_OP_PRF_REPNZ))
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync case IEM_OP_PRF_SIZE_OP: return FNIEMOP_CALL_1(iemOp_Grp14_pslldq_Udq_Ib, bRm);
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync default: return IEMOP_RAISE_INVALID_OPCODE();
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x74. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x75. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x76. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x77. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x78. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x79. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x7c. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x7d. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x7e. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_movd_q_Ey_Pd__movd_q_Ey_Vy__movq_Vq_Wq);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x7f. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_movq_Qq_Pq__movq_movdqa_Wdq_Vdq__movdqu_Wdq_Vdq);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x80. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x81. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x82. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x83. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x84. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x85. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x86. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_IF_EFL_ANY_BITS_SET(X86_EFL_CF | X86_EFL_ZF) {
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_IF_EFL_ANY_BITS_SET(X86_EFL_CF | X86_EFL_ZF) {
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x87. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_IF_EFL_ANY_BITS_SET(X86_EFL_CF | X86_EFL_ZF) {
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_IF_EFL_ANY_BITS_SET(X86_EFL_CF | X86_EFL_ZF) {
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x88. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x89. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x8a. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x8b. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x8c. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x8d. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x8e. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_IF_EFL_BIT_SET_OR_BITS_NE(X86_EFL_ZF, X86_EFL_SF, X86_EFL_OF) {
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_IF_EFL_BIT_SET_OR_BITS_NE(X86_EFL_ZF, X86_EFL_SF, X86_EFL_OF) {
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x8f. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_IF_EFL_BIT_SET_OR_BITS_NE(X86_EFL_ZF, X86_EFL_SF, X86_EFL_OF) {
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_IF_EFL_BIT_SET_OR_BITS_NE(X86_EFL_ZF, X86_EFL_SF, X86_EFL_OF) {
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x90. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo too early? */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /** @todo Encoding test: Check if the 'reg' field is ignored or decoded in
b1e4667c5a9588bd509d569ce252127891b44923vboxsync * any way. AMD says it's "unused", whatever that means. We're
b1e4667c5a9588bd509d569ce252127891b44923vboxsync * ignoring for now. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /* register target */
ea4433aedd4105e6599e57e0c5f6cb32a68e963cvboxsync IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
ea4433aedd4105e6599e57e0c5f6cb32a68e963cvboxsync IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /* memory target */
c2f73fbf271131906a68f2583f744fe791dd0f11vboxsync IEM_MC_STORE_MEM_U8_CONST(pIemCpu->iEffSeg, GCPtrEffDst, 1);
c2f73fbf271131906a68f2583f744fe791dd0f11vboxsync IEM_MC_STORE_MEM_U8_CONST(pIemCpu->iEffSeg, GCPtrEffDst, 0);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x91. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo too early? */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /** @todo Encoding test: Check if the 'reg' field is ignored or decoded in
b1e4667c5a9588bd509d569ce252127891b44923vboxsync * any way. AMD says it's "unused", whatever that means. We're
b1e4667c5a9588bd509d569ce252127891b44923vboxsync * ignoring for now. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /* register target */
ea4433aedd4105e6599e57e0c5f6cb32a68e963cvboxsync IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
ea4433aedd4105e6599e57e0c5f6cb32a68e963cvboxsync IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /* memory target */
c2f73fbf271131906a68f2583f744fe791dd0f11vboxsync IEM_MC_STORE_MEM_U8_CONST(pIemCpu->iEffSeg, GCPtrEffDst, 0);
c2f73fbf271131906a68f2583f744fe791dd0f11vboxsync IEM_MC_STORE_MEM_U8_CONST(pIemCpu->iEffSeg, GCPtrEffDst, 1);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x92. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo too early? */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /** @todo Encoding test: Check if the 'reg' field is ignored or decoded in
b1e4667c5a9588bd509d569ce252127891b44923vboxsync * any way. AMD says it's "unused", whatever that means. We're
b1e4667c5a9588bd509d569ce252127891b44923vboxsync * ignoring for now. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /* register target */
ea4433aedd4105e6599e57e0c5f6cb32a68e963cvboxsync IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
ea4433aedd4105e6599e57e0c5f6cb32a68e963cvboxsync IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /* memory target */
c2f73fbf271131906a68f2583f744fe791dd0f11vboxsync IEM_MC_STORE_MEM_U8_CONST(pIemCpu->iEffSeg, GCPtrEffDst, 1);
c2f73fbf271131906a68f2583f744fe791dd0f11vboxsync IEM_MC_STORE_MEM_U8_CONST(pIemCpu->iEffSeg, GCPtrEffDst, 0);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x93. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo too early? */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /** @todo Encoding test: Check if the 'reg' field is ignored or decoded in
b1e4667c5a9588bd509d569ce252127891b44923vboxsync * any way. AMD says it's "unused", whatever that means. We're
b1e4667c5a9588bd509d569ce252127891b44923vboxsync * ignoring for now. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /* register target */
ea4433aedd4105e6599e57e0c5f6cb32a68e963cvboxsync IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
ea4433aedd4105e6599e57e0c5f6cb32a68e963cvboxsync IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /* memory target */
c2f73fbf271131906a68f2583f744fe791dd0f11vboxsync IEM_MC_STORE_MEM_U8_CONST(pIemCpu->iEffSeg, GCPtrEffDst, 0);
c2f73fbf271131906a68f2583f744fe791dd0f11vboxsync IEM_MC_STORE_MEM_U8_CONST(pIemCpu->iEffSeg, GCPtrEffDst, 1);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x94. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo too early? */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /** @todo Encoding test: Check if the 'reg' field is ignored or decoded in
b1e4667c5a9588bd509d569ce252127891b44923vboxsync * any way. AMD says it's "unused", whatever that means. We're
b1e4667c5a9588bd509d569ce252127891b44923vboxsync * ignoring for now. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /* register target */
ea4433aedd4105e6599e57e0c5f6cb32a68e963cvboxsync IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
ea4433aedd4105e6599e57e0c5f6cb32a68e963cvboxsync IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /* memory target */
c2f73fbf271131906a68f2583f744fe791dd0f11vboxsync IEM_MC_STORE_MEM_U8_CONST(pIemCpu->iEffSeg, GCPtrEffDst, 1);
c2f73fbf271131906a68f2583f744fe791dd0f11vboxsync IEM_MC_STORE_MEM_U8_CONST(pIemCpu->iEffSeg, GCPtrEffDst, 0);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x95. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo too early? */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /** @todo Encoding test: Check if the 'reg' field is ignored or decoded in
b1e4667c5a9588bd509d569ce252127891b44923vboxsync * any way. AMD says it's "unused", whatever that means. We're
b1e4667c5a9588bd509d569ce252127891b44923vboxsync * ignoring for now. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /* register target */
ea4433aedd4105e6599e57e0c5f6cb32a68e963cvboxsync IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
ea4433aedd4105e6599e57e0c5f6cb32a68e963cvboxsync IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /* memory target */
c2f73fbf271131906a68f2583f744fe791dd0f11vboxsync IEM_MC_STORE_MEM_U8_CONST(pIemCpu->iEffSeg, GCPtrEffDst, 0);
c2f73fbf271131906a68f2583f744fe791dd0f11vboxsync IEM_MC_STORE_MEM_U8_CONST(pIemCpu->iEffSeg, GCPtrEffDst, 1);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x96. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo too early? */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /** @todo Encoding test: Check if the 'reg' field is ignored or decoded in
b1e4667c5a9588bd509d569ce252127891b44923vboxsync * any way. AMD says it's "unused", whatever that means. We're
b1e4667c5a9588bd509d569ce252127891b44923vboxsync * ignoring for now. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /* register target */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_IF_EFL_ANY_BITS_SET(X86_EFL_CF | X86_EFL_ZF) {
ea4433aedd4105e6599e57e0c5f6cb32a68e963cvboxsync IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
ea4433aedd4105e6599e57e0c5f6cb32a68e963cvboxsync IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /* memory target */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_IF_EFL_ANY_BITS_SET(X86_EFL_CF | X86_EFL_ZF) {
c2f73fbf271131906a68f2583f744fe791dd0f11vboxsync IEM_MC_STORE_MEM_U8_CONST(pIemCpu->iEffSeg, GCPtrEffDst, 1);
c2f73fbf271131906a68f2583f744fe791dd0f11vboxsync IEM_MC_STORE_MEM_U8_CONST(pIemCpu->iEffSeg, GCPtrEffDst, 0);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x97. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo too early? */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /** @todo Encoding test: Check if the 'reg' field is ignored or decoded in
b1e4667c5a9588bd509d569ce252127891b44923vboxsync * any way. AMD says it's "unused", whatever that means. We're
b1e4667c5a9588bd509d569ce252127891b44923vboxsync * ignoring for now. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /* register target */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_IF_EFL_ANY_BITS_SET(X86_EFL_CF | X86_EFL_ZF) {
ea4433aedd4105e6599e57e0c5f6cb32a68e963cvboxsync IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
ea4433aedd4105e6599e57e0c5f6cb32a68e963cvboxsync IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /* memory target */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_IF_EFL_ANY_BITS_SET(X86_EFL_CF | X86_EFL_ZF) {
c2f73fbf271131906a68f2583f744fe791dd0f11vboxsync IEM_MC_STORE_MEM_U8_CONST(pIemCpu->iEffSeg, GCPtrEffDst, 0);
c2f73fbf271131906a68f2583f744fe791dd0f11vboxsync IEM_MC_STORE_MEM_U8_CONST(pIemCpu->iEffSeg, GCPtrEffDst, 1);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x98. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo too early? */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /** @todo Encoding test: Check if the 'reg' field is ignored or decoded in
b1e4667c5a9588bd509d569ce252127891b44923vboxsync * any way. AMD says it's "unused", whatever that means. We're
b1e4667c5a9588bd509d569ce252127891b44923vboxsync * ignoring for now. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /* register target */
ea4433aedd4105e6599e57e0c5f6cb32a68e963cvboxsync IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
ea4433aedd4105e6599e57e0c5f6cb32a68e963cvboxsync IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /* memory target */
c2f73fbf271131906a68f2583f744fe791dd0f11vboxsync IEM_MC_STORE_MEM_U8_CONST(pIemCpu->iEffSeg, GCPtrEffDst, 1);
c2f73fbf271131906a68f2583f744fe791dd0f11vboxsync IEM_MC_STORE_MEM_U8_CONST(pIemCpu->iEffSeg, GCPtrEffDst, 0);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x99. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo too early? */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /** @todo Encoding test: Check if the 'reg' field is ignored or decoded in
b1e4667c5a9588bd509d569ce252127891b44923vboxsync * any way. AMD says it's "unused", whatever that means. We're
b1e4667c5a9588bd509d569ce252127891b44923vboxsync * ignoring for now. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /* register target */
ea4433aedd4105e6599e57e0c5f6cb32a68e963cvboxsync IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
ea4433aedd4105e6599e57e0c5f6cb32a68e963cvboxsync IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /* memory target */
c2f73fbf271131906a68f2583f744fe791dd0f11vboxsync IEM_MC_STORE_MEM_U8_CONST(pIemCpu->iEffSeg, GCPtrEffDst, 0);
c2f73fbf271131906a68f2583f744fe791dd0f11vboxsync IEM_MC_STORE_MEM_U8_CONST(pIemCpu->iEffSeg, GCPtrEffDst, 1);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x9a. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo too early? */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /** @todo Encoding test: Check if the 'reg' field is ignored or decoded in
b1e4667c5a9588bd509d569ce252127891b44923vboxsync * any way. AMD says it's "unused", whatever that means. We're
b1e4667c5a9588bd509d569ce252127891b44923vboxsync * ignoring for now. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /* register target */
ea4433aedd4105e6599e57e0c5f6cb32a68e963cvboxsync IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
ea4433aedd4105e6599e57e0c5f6cb32a68e963cvboxsync IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /* memory target */
c2f73fbf271131906a68f2583f744fe791dd0f11vboxsync IEM_MC_STORE_MEM_U8_CONST(pIemCpu->iEffSeg, GCPtrEffDst, 1);
c2f73fbf271131906a68f2583f744fe791dd0f11vboxsync IEM_MC_STORE_MEM_U8_CONST(pIemCpu->iEffSeg, GCPtrEffDst, 0);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x9b. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo too early? */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /** @todo Encoding test: Check if the 'reg' field is ignored or decoded in
b1e4667c5a9588bd509d569ce252127891b44923vboxsync * any way. AMD says it's "unused", whatever that means. We're
b1e4667c5a9588bd509d569ce252127891b44923vboxsync * ignoring for now. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /* register target */
ea4433aedd4105e6599e57e0c5f6cb32a68e963cvboxsync IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
ea4433aedd4105e6599e57e0c5f6cb32a68e963cvboxsync IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /* memory target */
c2f73fbf271131906a68f2583f744fe791dd0f11vboxsync IEM_MC_STORE_MEM_U8_CONST(pIemCpu->iEffSeg, GCPtrEffDst, 0);
c2f73fbf271131906a68f2583f744fe791dd0f11vboxsync IEM_MC_STORE_MEM_U8_CONST(pIemCpu->iEffSeg, GCPtrEffDst, 1);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x9c. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo too early? */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /** @todo Encoding test: Check if the 'reg' field is ignored or decoded in
b1e4667c5a9588bd509d569ce252127891b44923vboxsync * any way. AMD says it's "unused", whatever that means. We're
b1e4667c5a9588bd509d569ce252127891b44923vboxsync * ignoring for now. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /* register target */
ea4433aedd4105e6599e57e0c5f6cb32a68e963cvboxsync IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
ea4433aedd4105e6599e57e0c5f6cb32a68e963cvboxsync IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /* memory target */
c2f73fbf271131906a68f2583f744fe791dd0f11vboxsync IEM_MC_STORE_MEM_U8_CONST(pIemCpu->iEffSeg, GCPtrEffDst, 1);
c2f73fbf271131906a68f2583f744fe791dd0f11vboxsync IEM_MC_STORE_MEM_U8_CONST(pIemCpu->iEffSeg, GCPtrEffDst, 0);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x9d. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo too early? */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /** @todo Encoding test: Check if the 'reg' field is ignored or decoded in
b1e4667c5a9588bd509d569ce252127891b44923vboxsync * any way. AMD says it's "unused", whatever that means. We're
b1e4667c5a9588bd509d569ce252127891b44923vboxsync * ignoring for now. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /* register target */
ea4433aedd4105e6599e57e0c5f6cb32a68e963cvboxsync IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
ea4433aedd4105e6599e57e0c5f6cb32a68e963cvboxsync IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /* memory target */
c2f73fbf271131906a68f2583f744fe791dd0f11vboxsync IEM_MC_STORE_MEM_U8_CONST(pIemCpu->iEffSeg, GCPtrEffDst, 0);
c2f73fbf271131906a68f2583f744fe791dd0f11vboxsync IEM_MC_STORE_MEM_U8_CONST(pIemCpu->iEffSeg, GCPtrEffDst, 1);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x9e. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo too early? */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /** @todo Encoding test: Check if the 'reg' field is ignored or decoded in
b1e4667c5a9588bd509d569ce252127891b44923vboxsync * any way. AMD says it's "unused", whatever that means. We're
b1e4667c5a9588bd509d569ce252127891b44923vboxsync * ignoring for now. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /* register target */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_IF_EFL_BIT_SET_OR_BITS_NE(X86_EFL_ZF, X86_EFL_SF, X86_EFL_OF) {
ea4433aedd4105e6599e57e0c5f6cb32a68e963cvboxsync IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
ea4433aedd4105e6599e57e0c5f6cb32a68e963cvboxsync IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /* memory target */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_IF_EFL_BIT_SET_OR_BITS_NE(X86_EFL_ZF, X86_EFL_SF, X86_EFL_OF) {
c2f73fbf271131906a68f2583f744fe791dd0f11vboxsync IEM_MC_STORE_MEM_U8_CONST(pIemCpu->iEffSeg, GCPtrEffDst, 1);
c2f73fbf271131906a68f2583f744fe791dd0f11vboxsync IEM_MC_STORE_MEM_U8_CONST(pIemCpu->iEffSeg, GCPtrEffDst, 0);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x9f. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo too early? */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /** @todo Encoding test: Check if the 'reg' field is ignored or decoded in
b1e4667c5a9588bd509d569ce252127891b44923vboxsync * any way. AMD says it's "unused", whatever that means. We're
b1e4667c5a9588bd509d569ce252127891b44923vboxsync * ignoring for now. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /* register target */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_IF_EFL_BIT_SET_OR_BITS_NE(X86_EFL_ZF, X86_EFL_SF, X86_EFL_OF) {
ea4433aedd4105e6599e57e0c5f6cb32a68e963cvboxsync IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
ea4433aedd4105e6599e57e0c5f6cb32a68e963cvboxsync IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /* memory target */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_IF_EFL_BIT_SET_OR_BITS_NE(X86_EFL_ZF, X86_EFL_SF, X86_EFL_OF) {
c2f73fbf271131906a68f2583f744fe791dd0f11vboxsync IEM_MC_STORE_MEM_U8_CONST(pIemCpu->iEffSeg, GCPtrEffDst, 0);
c2f73fbf271131906a68f2583f744fe791dd0f11vboxsync IEM_MC_STORE_MEM_U8_CONST(pIemCpu->iEffSeg, GCPtrEffDst, 1);
064e87232010cd1a6a7e554428a5ba8053e96612vboxsync * Common 'push segment-register' helper.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xa0. */
064e87232010cd1a6a7e554428a5ba8053e96612vboxsync return FNIEMOP_CALL_1(iemOpCommonPushSReg, X86_SREG_FS);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xa1. */
0bbe08c3ee3c834593be35ccfbe0183116509ae2vboxsync return IEM_MC_DEFER_TO_CIMPL_2(iemCImpl_pop_Sreg, X86_SREG_FS, pIemCpu->enmEffOpSize);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xa2. */
b64efece437bfca8872b81be9d0568ba90389d91vboxsync * Common worker for iemOp_bt_Ev_Gv, iemOp_btc_Ev_Gv, iemOp_btr_Ev_Gv and
b64efece437bfca8872b81be9d0568ba90389d91vboxsync * iemOp_bts_Ev_Gv.
b64efece437bfca8872b81be9d0568ba90389d91vboxsyncFNIEMOP_DEF_1(iemOpCommonBit_Ev_Gv, PCIEMOPBINSIZES, pImpl)
b64efece437bfca8872b81be9d0568ba90389d91vboxsync IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_OF | X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF);
b64efece437bfca8872b81be9d0568ba90389d91vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
b64efece437bfca8872b81be9d0568ba90389d91vboxsync /* register destination. */
b64efece437bfca8872b81be9d0568ba90389d91vboxsync IEM_MC_FETCH_GREG_U16(u16Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
b64efece437bfca8872b81be9d0568ba90389d91vboxsync IEM_MC_REF_GREG_U16(pu16Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
b64efece437bfca8872b81be9d0568ba90389d91vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU16, pu16Dst, u16Src, pEFlags);
b64efece437bfca8872b81be9d0568ba90389d91vboxsync IEM_MC_FETCH_GREG_U32(u32Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
b64efece437bfca8872b81be9d0568ba90389d91vboxsync IEM_MC_REF_GREG_U32(pu32Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
b64efece437bfca8872b81be9d0568ba90389d91vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU32, pu32Dst, u32Src, pEFlags);
b64efece437bfca8872b81be9d0568ba90389d91vboxsync IEM_MC_FETCH_GREG_U64(u64Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
b64efece437bfca8872b81be9d0568ba90389d91vboxsync IEM_MC_REF_GREG_U64(pu64Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
b64efece437bfca8872b81be9d0568ba90389d91vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU64, pu64Dst, u64Src, pEFlags);
b64efece437bfca8872b81be9d0568ba90389d91vboxsync /* memory destination. */
b64efece437bfca8872b81be9d0568ba90389d91vboxsync else /* BT */
b64efece437bfca8872b81be9d0568ba90389d91vboxsync /** @todo test negative bit offsets! */
b64efece437bfca8872b81be9d0568ba90389d91vboxsync IEM_MC_FETCH_GREG_U16(u16Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
b64efece437bfca8872b81be9d0568ba90389d91vboxsync IEM_MC_ADD_LOCAL_S16_TO_EFF_ADDR(GCPtrEffDst, i16AddrAdj);
b64efece437bfca8872b81be9d0568ba90389d91vboxsync IEM_MC_MEM_MAP(pu16Dst, IEM_ACCESS_DATA_RW, pIemCpu->iEffSeg, GCPtrEffDst, 0);
b64efece437bfca8872b81be9d0568ba90389d91vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU16, pu16Dst, u16Src, pEFlags);
b64efece437bfca8872b81be9d0568ba90389d91vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnLockedU16, pu16Dst, u16Src, pEFlags);
b64efece437bfca8872b81be9d0568ba90389d91vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pu16Dst, IEM_ACCESS_DATA_RW);
b64efece437bfca8872b81be9d0568ba90389d91vboxsync IEM_MC_FETCH_GREG_U32(u32Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
b64efece437bfca8872b81be9d0568ba90389d91vboxsync IEM_MC_ADD_LOCAL_S32_TO_EFF_ADDR(GCPtrEffDst, i32AddrAdj);
b64efece437bfca8872b81be9d0568ba90389d91vboxsync IEM_MC_MEM_MAP(pu32Dst, IEM_ACCESS_DATA_RW, pIemCpu->iEffSeg, GCPtrEffDst, 0);
b64efece437bfca8872b81be9d0568ba90389d91vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU32, pu32Dst, u32Src, pEFlags);
b64efece437bfca8872b81be9d0568ba90389d91vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnLockedU32, pu32Dst, u32Src, pEFlags);
b64efece437bfca8872b81be9d0568ba90389d91vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pu32Dst, IEM_ACCESS_DATA_RW);
b64efece437bfca8872b81be9d0568ba90389d91vboxsync IEM_MC_FETCH_GREG_U64(u64Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
b64efece437bfca8872b81be9d0568ba90389d91vboxsync IEM_MC_ADD_LOCAL_S64_TO_EFF_ADDR(GCPtrEffDst, i64AddrAdj);
b64efece437bfca8872b81be9d0568ba90389d91vboxsync IEM_MC_MEM_MAP(pu64Dst, IEM_ACCESS_DATA_RW, pIemCpu->iEffSeg, GCPtrEffDst, 0);
b64efece437bfca8872b81be9d0568ba90389d91vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU64, pu64Dst, u64Src, pEFlags);
b64efece437bfca8872b81be9d0568ba90389d91vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnLockedU64, pu64Dst, u64Src, pEFlags);
b64efece437bfca8872b81be9d0568ba90389d91vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pu64Dst, IEM_ACCESS_DATA_RW);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xa3. */
b64efece437bfca8872b81be9d0568ba90389d91vboxsync return FNIEMOP_CALL_1(iemOpCommonBit_Ev_Gv, &g_iemAImpl_bt);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync * Common worker for iemOp_shrd_Ev_Gv_Ib and iemOp_shld_Ev_Gv_Ib.
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsyncFNIEMOP_DEF_1(iemOpCommonShldShrd_Ib, PCIEMOPSHIFTDBLSIZES, pImpl)
b64efece437bfca8872b81be9d0568ba90389d91vboxsync IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_AF | X86_EFL_OF);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_ARG_CONST(uint8_t, cShiftArg, /*=*/cShift, 2);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_FETCH_GREG_U16(u16Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_REF_GREG_U16(pu16Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_CALL_VOID_AIMPL_4(pImpl->pfnNormalU16, pu16Dst, u16Src, cShiftArg, pEFlags);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_ARG_CONST(uint8_t, cShiftArg, /*=*/cShift, 2);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_FETCH_GREG_U32(u32Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_REF_GREG_U32(pu32Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_CALL_VOID_AIMPL_4(pImpl->pfnNormalU32, pu32Dst, u32Src, cShiftArg, pEFlags);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_ARG_CONST(uint8_t, cShiftArg, /*=*/cShift, 2);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_FETCH_GREG_U64(u64Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_REF_GREG_U64(pu64Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_CALL_VOID_AIMPL_4(pImpl->pfnNormalU64, pu64Dst, u64Src, cShiftArg, pEFlags);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo too early? */
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_FETCH_GREG_U16(u16Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_MEM_MAP(pu16Dst, IEM_ACCESS_DATA_RW, pIemCpu->iEffSeg, GCPtrEffDst, 0);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_CALL_VOID_AIMPL_4(pImpl->pfnNormalU16, pu16Dst, u16Src, cShiftArg, pEFlags);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pu16Dst, IEM_ACCESS_DATA_RW);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_FETCH_GREG_U32(u32Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_MEM_MAP(pu32Dst, IEM_ACCESS_DATA_RW, pIemCpu->iEffSeg, GCPtrEffDst, 0);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_CALL_VOID_AIMPL_4(pImpl->pfnNormalU32, pu32Dst, u32Src, cShiftArg, pEFlags);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pu32Dst, IEM_ACCESS_DATA_RW);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_FETCH_GREG_U64(u64Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_MEM_MAP(pu64Dst, IEM_ACCESS_DATA_RW, pIemCpu->iEffSeg, GCPtrEffDst, 0);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_CALL_VOID_AIMPL_4(pImpl->pfnNormalU64, pu64Dst, u64Src, cShiftArg, pEFlags);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pu64Dst, IEM_ACCESS_DATA_RW);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync * Common worker for iemOp_shrd_Ev_Gv_CL and iemOp_shld_Ev_Gv_CL.
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsyncFNIEMOP_DEF_1(iemOpCommonShldShrd_CL, PCIEMOPSHIFTDBLSIZES, pImpl)
b64efece437bfca8872b81be9d0568ba90389d91vboxsync IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_AF | X86_EFL_OF);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_FETCH_GREG_U16(u16Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_REF_GREG_U16(pu16Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_CALL_VOID_AIMPL_4(pImpl->pfnNormalU16, pu16Dst, u16Src, cShiftArg, pEFlags);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_FETCH_GREG_U32(u32Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_REF_GREG_U32(pu32Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_CALL_VOID_AIMPL_4(pImpl->pfnNormalU32, pu32Dst, u32Src, cShiftArg, pEFlags);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_FETCH_GREG_U64(u64Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_REF_GREG_U64(pu64Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_CALL_VOID_AIMPL_4(pImpl->pfnNormalU64, pu64Dst, u64Src, cShiftArg, pEFlags);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo too early? */
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_FETCH_GREG_U16(u16Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_MEM_MAP(pu16Dst, IEM_ACCESS_DATA_RW, pIemCpu->iEffSeg, GCPtrEffDst, 0);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_CALL_VOID_AIMPL_4(pImpl->pfnNormalU16, pu16Dst, u16Src, cShiftArg, pEFlags);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pu16Dst, IEM_ACCESS_DATA_RW);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_FETCH_GREG_U32(u32Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_MEM_MAP(pu32Dst, IEM_ACCESS_DATA_RW, pIemCpu->iEffSeg, GCPtrEffDst, 0);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_CALL_VOID_AIMPL_4(pImpl->pfnNormalU32, pu32Dst, u32Src, cShiftArg, pEFlags);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pu32Dst, IEM_ACCESS_DATA_RW);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_FETCH_GREG_U64(u64Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_MEM_MAP(pu64Dst, IEM_ACCESS_DATA_RW, pIemCpu->iEffSeg, GCPtrEffDst, 0);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_CALL_VOID_AIMPL_4(pImpl->pfnNormalU64, pu64Dst, u64Src, cShiftArg, pEFlags);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pu64Dst, IEM_ACCESS_DATA_RW);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xa4. */
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync return FNIEMOP_CALL_1(iemOpCommonShldShrd_Ib, &g_iemAImpl_shld);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xa7. */
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync return FNIEMOP_CALL_1(iemOpCommonShldShrd_CL, &g_iemAImpl_shld);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xa8. */
064e87232010cd1a6a7e554428a5ba8053e96612vboxsync return FNIEMOP_CALL_1(iemOpCommonPushSReg, X86_SREG_GS);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xa9. */
0bbe08c3ee3c834593be35ccfbe0183116509ae2vboxsync return IEM_MC_DEFER_TO_CIMPL_2(iemCImpl_pop_Sreg, X86_SREG_GS, pIemCpu->enmEffOpSize);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xaa. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xab. */
b64efece437bfca8872b81be9d0568ba90389d91vboxsync return FNIEMOP_CALL_1(iemOpCommonBit_Ev_Gv, &g_iemAImpl_bts);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xac. */
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync return FNIEMOP_CALL_1(iemOpCommonShldShrd_Ib, &g_iemAImpl_shrd);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xad. */
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync return FNIEMOP_CALL_1(iemOpCommonShldShrd_CL, &g_iemAImpl_shrd);
5b14ea747085486dbf2abdf7d9c01b7f754063e3vboxsync/** Opcode 0x0f 0xae mem/0. */
ca82e9e77743b3e6caae138a83a4c2ca942294e4vboxsync if (!IEM_IS_INTEL_CPUID_FEATURE_PRESENT_EDX(X86_CPUID_FEATURE_EDX_FXSR))
0a95afbe3fe6dc98bfb031c8b7a45606752c7d22vboxsync IEM_MC_ARG_CONST(uint8_t, iEffSeg,/*=*/pIemCpu->iEffSeg, 0);
0a95afbe3fe6dc98bfb031c8b7a45606752c7d22vboxsync IEM_MC_ARG_CONST(IEMMODE, enmEffOpSize,/*=*/pIemCpu->enmEffOpSize, 2);
0a95afbe3fe6dc98bfb031c8b7a45606752c7d22vboxsync IEM_MC_CALL_CIMPL_3(iemCImpl_fxsave, iEffSeg, GCPtrEff, enmEffOpSize);
5b14ea747085486dbf2abdf7d9c01b7f754063e3vboxsync/** Opcode 0x0f 0xae mem/1. */
ca82e9e77743b3e6caae138a83a4c2ca942294e4vboxsync if (!IEM_IS_INTEL_CPUID_FEATURE_PRESENT_EDX(X86_CPUID_FEATURE_EDX_FXSR))
0a95afbe3fe6dc98bfb031c8b7a45606752c7d22vboxsync IEM_MC_ARG_CONST(uint8_t, iEffSeg,/*=*/pIemCpu->iEffSeg, 0);
0a95afbe3fe6dc98bfb031c8b7a45606752c7d22vboxsync IEM_MC_ARG_CONST(IEMMODE, enmEffOpSize,/*=*/pIemCpu->enmEffOpSize, 2);
0a95afbe3fe6dc98bfb031c8b7a45606752c7d22vboxsync IEM_MC_CALL_CIMPL_3(iemCImpl_fxrstor, iEffSeg, GCPtrEff, enmEffOpSize);
5b14ea747085486dbf2abdf7d9c01b7f754063e3vboxsync/** Opcode 0x0f 0xae mem/2. */
5b14ea747085486dbf2abdf7d9c01b7f754063e3vboxsync/** Opcode 0x0f 0xae mem/3. */
5b14ea747085486dbf2abdf7d9c01b7f754063e3vboxsync/** Opcode 0x0f 0xae mem/4. */
5b14ea747085486dbf2abdf7d9c01b7f754063e3vboxsync/** Opcode 0x0f 0xae mem/5. */
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsyncFNIEMOP_UD_STUB_1(iemOp_Grp15_xrstor, uint8_t, bRm);
5b14ea747085486dbf2abdf7d9c01b7f754063e3vboxsync/** Opcode 0x0f 0xae mem/6. */
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsyncFNIEMOP_UD_STUB_1(iemOp_Grp15_xsaveopt, uint8_t, bRm);
5b14ea747085486dbf2abdf7d9c01b7f754063e3vboxsync/** Opcode 0x0f 0xae mem/7. */
5b14ea747085486dbf2abdf7d9c01b7f754063e3vboxsync/** Opcode 0x0f 0xae 11b/5. */
5b14ea747085486dbf2abdf7d9c01b7f754063e3vboxsync/** Opcode 0x0f 0xae 11b/6. */
5b14ea747085486dbf2abdf7d9c01b7f754063e3vboxsync/** Opcode 0x0f 0xae 11b/7. */
5b14ea747085486dbf2abdf7d9c01b7f754063e3vboxsync/** Opcode 0xf3 0x0f 0xae 11b/0. */
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsyncFNIEMOP_UD_STUB_1(iemOp_Grp15_rdfsbase, uint8_t, bRm);
5b14ea747085486dbf2abdf7d9c01b7f754063e3vboxsync/** Opcode 0xf3 0x0f 0xae 11b/1. */
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsyncFNIEMOP_UD_STUB_1(iemOp_Grp15_rdgsbase, uint8_t, bRm);
5b14ea747085486dbf2abdf7d9c01b7f754063e3vboxsync/** Opcode 0xf3 0x0f 0xae 11b/2. */
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsyncFNIEMOP_UD_STUB_1(iemOp_Grp15_wrfsbase, uint8_t, bRm);
5b14ea747085486dbf2abdf7d9c01b7f754063e3vboxsync/** Opcode 0xf3 0x0f 0xae 11b/3. */
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsyncFNIEMOP_UD_STUB_1(iemOp_Grp15_wrgsbase, uint8_t, bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xae. */
b891b477f403c0a8a1eea185f9bc4ef9c99caf2dvboxsync if ((bRm & X86_MODRM_MOD_MASK) != (3 << X86_MODRM_MOD_SHIFT))
5b14ea747085486dbf2abdf7d9c01b7f754063e3vboxsync switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
5b14ea747085486dbf2abdf7d9c01b7f754063e3vboxsync case 0: return FNIEMOP_CALL_1(iemOp_Grp15_fxsave, bRm);
5b14ea747085486dbf2abdf7d9c01b7f754063e3vboxsync case 1: return FNIEMOP_CALL_1(iemOp_Grp15_fxrstor, bRm);
5b14ea747085486dbf2abdf7d9c01b7f754063e3vboxsync case 2: return FNIEMOP_CALL_1(iemOp_Grp15_ldmxcsr, bRm);
5b14ea747085486dbf2abdf7d9c01b7f754063e3vboxsync case 3: return FNIEMOP_CALL_1(iemOp_Grp15_stmxcsr, bRm);
5b14ea747085486dbf2abdf7d9c01b7f754063e3vboxsync case 4: return FNIEMOP_CALL_1(iemOp_Grp15_xsave, bRm);
5b14ea747085486dbf2abdf7d9c01b7f754063e3vboxsync case 5: return FNIEMOP_CALL_1(iemOp_Grp15_xrstor, bRm);
5b14ea747085486dbf2abdf7d9c01b7f754063e3vboxsync case 6: return FNIEMOP_CALL_1(iemOp_Grp15_xsaveopt,bRm);
5b14ea747085486dbf2abdf7d9c01b7f754063e3vboxsync case 7: return FNIEMOP_CALL_1(iemOp_Grp15_clflush, bRm);
5b14ea747085486dbf2abdf7d9c01b7f754063e3vboxsync switch (pIemCpu->fPrefixes & (IEM_OP_PRF_REPZ | IEM_OP_PRF_REPNZ | IEM_OP_PRF_SIZE_OP | IEM_OP_PRF_LOCK))
5b14ea747085486dbf2abdf7d9c01b7f754063e3vboxsync switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
5b14ea747085486dbf2abdf7d9c01b7f754063e3vboxsync case 0: return IEMOP_RAISE_INVALID_OPCODE();
5b14ea747085486dbf2abdf7d9c01b7f754063e3vboxsync case 5: return FNIEMOP_CALL_1(iemOp_Grp15_lfence, bRm);
5b14ea747085486dbf2abdf7d9c01b7f754063e3vboxsync case 6: return FNIEMOP_CALL_1(iemOp_Grp15_mfence, bRm);
5b14ea747085486dbf2abdf7d9c01b7f754063e3vboxsync case 7: return FNIEMOP_CALL_1(iemOp_Grp15_sfence, bRm);
5b14ea747085486dbf2abdf7d9c01b7f754063e3vboxsync switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
5b14ea747085486dbf2abdf7d9c01b7f754063e3vboxsync case 0: return FNIEMOP_CALL_1(iemOp_Grp15_rdfsbase, bRm);
5b14ea747085486dbf2abdf7d9c01b7f754063e3vboxsync case 1: return FNIEMOP_CALL_1(iemOp_Grp15_rdgsbase, bRm);
5b14ea747085486dbf2abdf7d9c01b7f754063e3vboxsync case 2: return FNIEMOP_CALL_1(iemOp_Grp15_wrfsbase, bRm);
5b14ea747085486dbf2abdf7d9c01b7f754063e3vboxsync case 3: return FNIEMOP_CALL_1(iemOp_Grp15_wrgsbase, bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xaf. */
b64efece437bfca8872b81be9d0568ba90389d91vboxsync IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF);
064e87232010cd1a6a7e554428a5ba8053e96612vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rv_rm, &g_iemAImpl_imul_two);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xb0. */
f74327eabb87ebb53205b7f1c0ae2258f13989ffvboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
f74327eabb87ebb53205b7f1c0ae2258f13989ffvboxsync IEM_MC_FETCH_GREG_U8(u8Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
f74327eabb87ebb53205b7f1c0ae2258f13989ffvboxsync IEM_MC_REF_GREG_U8(pu8Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
f74327eabb87ebb53205b7f1c0ae2258f13989ffvboxsync IEM_MC_CALL_VOID_AIMPL_4(iemAImpl_cmpxchg_u8, pu8Dst, pu8Al, u8Src, pEFlags);
f74327eabb87ebb53205b7f1c0ae2258f13989ffvboxsync IEM_MC_CALL_VOID_AIMPL_4(iemAImpl_cmpxchg_u8_locked, pu8Dst, pu8Al, u8Src, pEFlags);
f74327eabb87ebb53205b7f1c0ae2258f13989ffvboxsync IEM_MC_MEM_MAP(pu8Dst, IEM_ACCESS_DATA_RW, pIemCpu->iEffSeg, GCPtrEffDst, 0);
f74327eabb87ebb53205b7f1c0ae2258f13989ffvboxsync IEM_MC_FETCH_GREG_U8(u8Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
f74327eabb87ebb53205b7f1c0ae2258f13989ffvboxsync IEM_MC_CALL_VOID_AIMPL_4(iemAImpl_cmpxchg_u8, pu8Dst, pu8Al, u8Src, pEFlags);
f74327eabb87ebb53205b7f1c0ae2258f13989ffvboxsync IEM_MC_CALL_VOID_AIMPL_4(iemAImpl_cmpxchg_u8_locked, pu8Dst, pu8Al, u8Src, pEFlags);
f74327eabb87ebb53205b7f1c0ae2258f13989ffvboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pu8Dst, IEM_ACCESS_DATA_RW);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xb1. */
f74327eabb87ebb53205b7f1c0ae2258f13989ffvboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
f74327eabb87ebb53205b7f1c0ae2258f13989ffvboxsync IEM_MC_FETCH_GREG_U16(u16Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
f74327eabb87ebb53205b7f1c0ae2258f13989ffvboxsync IEM_MC_REF_GREG_U16(pu16Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
f74327eabb87ebb53205b7f1c0ae2258f13989ffvboxsync IEM_MC_CALL_VOID_AIMPL_4(iemAImpl_cmpxchg_u16, pu16Dst, pu16Ax, u16Src, pEFlags);
f74327eabb87ebb53205b7f1c0ae2258f13989ffvboxsync IEM_MC_CALL_VOID_AIMPL_4(iemAImpl_cmpxchg_u16_locked, pu16Dst, pu16Ax, u16Src, pEFlags);
f74327eabb87ebb53205b7f1c0ae2258f13989ffvboxsync IEM_MC_FETCH_GREG_U32(u32Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
f74327eabb87ebb53205b7f1c0ae2258f13989ffvboxsync IEM_MC_REF_GREG_U32(pu32Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
f74327eabb87ebb53205b7f1c0ae2258f13989ffvboxsync IEM_MC_CALL_VOID_AIMPL_4(iemAImpl_cmpxchg_u32, pu32Dst, pu32Eax, u32Src, pEFlags);
f74327eabb87ebb53205b7f1c0ae2258f13989ffvboxsync IEM_MC_CALL_VOID_AIMPL_4(iemAImpl_cmpxchg_u32_locked, pu32Dst, pu32Eax, u32Src, pEFlags);
f74327eabb87ebb53205b7f1c0ae2258f13989ffvboxsync IEM_MC_REF_GREG_U64(pu64Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
f74327eabb87ebb53205b7f1c0ae2258f13989ffvboxsync IEM_MC_REF_GREG_U64(pu64Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
f74327eabb87ebb53205b7f1c0ae2258f13989ffvboxsync IEM_MC_CALL_VOID_AIMPL_4(iemAImpl_cmpxchg_u64, pu64Dst, pu64Rax, pu64Src, pEFlags);
f74327eabb87ebb53205b7f1c0ae2258f13989ffvboxsync IEM_MC_CALL_VOID_AIMPL_4(iemAImpl_cmpxchg_u64_locked, pu64Dst, pu64Rax, pu64Src, pEFlags);
f74327eabb87ebb53205b7f1c0ae2258f13989ffvboxsync IEM_MC_FETCH_GREG_U64(u64Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
f74327eabb87ebb53205b7f1c0ae2258f13989ffvboxsync IEM_MC_CALL_VOID_AIMPL_4(iemAImpl_cmpxchg_u64, pu64Dst, pu64Rax, u64Src, pEFlags);
f74327eabb87ebb53205b7f1c0ae2258f13989ffvboxsync IEM_MC_CALL_VOID_AIMPL_4(iemAImpl_cmpxchg_u64_locked, pu64Dst, pu64Rax, u64Src, pEFlags);
f74327eabb87ebb53205b7f1c0ae2258f13989ffvboxsync IEM_MC_MEM_MAP(pu16Dst, IEM_ACCESS_DATA_RW, pIemCpu->iEffSeg, GCPtrEffDst, 0);
f74327eabb87ebb53205b7f1c0ae2258f13989ffvboxsync IEM_MC_FETCH_GREG_U16(u16Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
f74327eabb87ebb53205b7f1c0ae2258f13989ffvboxsync IEM_MC_CALL_VOID_AIMPL_4(iemAImpl_cmpxchg_u16, pu16Dst, pu16Ax, u16Src, pEFlags);
f74327eabb87ebb53205b7f1c0ae2258f13989ffvboxsync IEM_MC_CALL_VOID_AIMPL_4(iemAImpl_cmpxchg_u16_locked, pu16Dst, pu16Ax, u16Src, pEFlags);
f74327eabb87ebb53205b7f1c0ae2258f13989ffvboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pu16Dst, IEM_ACCESS_DATA_RW);
f74327eabb87ebb53205b7f1c0ae2258f13989ffvboxsync IEM_MC_MEM_MAP(pu32Dst, IEM_ACCESS_DATA_RW, pIemCpu->iEffSeg, GCPtrEffDst, 0);
f74327eabb87ebb53205b7f1c0ae2258f13989ffvboxsync IEM_MC_FETCH_GREG_U32(u32Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
f74327eabb87ebb53205b7f1c0ae2258f13989ffvboxsync IEM_MC_CALL_VOID_AIMPL_4(iemAImpl_cmpxchg_u32, pu32Dst, pu32Eax, u32Src, pEFlags);
f74327eabb87ebb53205b7f1c0ae2258f13989ffvboxsync IEM_MC_CALL_VOID_AIMPL_4(iemAImpl_cmpxchg_u32_locked, pu32Dst, pu32Eax, u32Src, pEFlags);
f74327eabb87ebb53205b7f1c0ae2258f13989ffvboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pu32Dst, IEM_ACCESS_DATA_RW);
f74327eabb87ebb53205b7f1c0ae2258f13989ffvboxsync IEM_MC_MEM_MAP(pu64Dst, IEM_ACCESS_DATA_RW, pIemCpu->iEffSeg, GCPtrEffDst, 0);
f74327eabb87ebb53205b7f1c0ae2258f13989ffvboxsync IEM_MC_REF_GREG_U64(pu64Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
f74327eabb87ebb53205b7f1c0ae2258f13989ffvboxsync IEM_MC_CALL_VOID_AIMPL_4(iemAImpl_cmpxchg_u64, pu64Dst, pu64Rax, pu64Src, pEFlags);
f74327eabb87ebb53205b7f1c0ae2258f13989ffvboxsync IEM_MC_CALL_VOID_AIMPL_4(iemAImpl_cmpxchg_u64_locked, pu64Dst, pu64Rax, pu64Src, pEFlags);
f74327eabb87ebb53205b7f1c0ae2258f13989ffvboxsync IEM_MC_FETCH_GREG_U64(u64Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
f74327eabb87ebb53205b7f1c0ae2258f13989ffvboxsync IEM_MC_CALL_VOID_AIMPL_4(iemAImpl_cmpxchg_u64, pu64Dst, pu64Rax, u64Src, pEFlags);
f74327eabb87ebb53205b7f1c0ae2258f13989ffvboxsync IEM_MC_CALL_VOID_AIMPL_4(iemAImpl_cmpxchg_u64_locked, pu64Dst, pu64Rax, u64Src, pEFlags);
f74327eabb87ebb53205b7f1c0ae2258f13989ffvboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pu64Dst, IEM_ACCESS_DATA_RW);
e41f0459369a6d814aa36bf4def225482fc56026vboxsyncFNIEMOP_DEF_1(iemOpCommonLoadSRegAndGreg, uint8_t, iSegReg)
e41f0459369a6d814aa36bf4def225482fc56026vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
e41f0459369a6d814aa36bf4def225482fc56026vboxsync /* The source cannot be a register. */
e41f0459369a6d814aa36bf4def225482fc56026vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
e28cf5340505fcf342ca7a8d86f5dfec2d152c40vboxsync uint8_t const iGReg = ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg;
e41f0459369a6d814aa36bf4def225482fc56026vboxsync IEM_MC_ARG_CONST(uint8_t, iSegRegArg,/*=*/iSegReg, 2);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync IEM_MC_ARG_CONST(uint8_t, iGRegArg, /*=*/iGReg, 3);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync IEM_MC_ARG_CONST(IEMMODE, enmEffOpSize,/*=*/pIemCpu->enmEffOpSize, 4);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync IEM_MC_FETCH_MEM_U16(offSeg, pIemCpu->iEffSeg, GCPtrEff);
c2f73fbf271131906a68f2583f744fe791dd0f11vboxsync IEM_MC_FETCH_MEM_U16_DISP(uSel, pIemCpu->iEffSeg, GCPtrEff, 2);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync IEM_MC_CALL_CIMPL_5(iemCImpl_load_SReg_Greg, uSel, offSeg, iSegRegArg, iGRegArg, enmEffOpSize);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync IEM_MC_ARG_CONST(uint8_t, iSegRegArg,/*=*/iSegReg, 2);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync IEM_MC_ARG_CONST(uint8_t, iGRegArg, /*=*/iGReg, 3);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync IEM_MC_ARG_CONST(IEMMODE, enmEffOpSize,/*=*/pIemCpu->enmEffOpSize, 4);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync IEM_MC_FETCH_MEM_U32(offSeg, pIemCpu->iEffSeg, GCPtrEff);
c2f73fbf271131906a68f2583f744fe791dd0f11vboxsync IEM_MC_FETCH_MEM_U16_DISP(uSel, pIemCpu->iEffSeg, GCPtrEff, 4);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync IEM_MC_CALL_CIMPL_5(iemCImpl_load_SReg_Greg, uSel, offSeg, iSegRegArg, iGRegArg, enmEffOpSize);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync IEM_MC_ARG_CONST(uint8_t, iSegRegArg,/*=*/iSegReg, 2);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync IEM_MC_ARG_CONST(uint8_t, iGRegArg, /*=*/iGReg, 3);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync IEM_MC_ARG_CONST(IEMMODE, enmEffOpSize,/*=*/pIemCpu->enmEffOpSize, 4);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync IEM_MC_FETCH_MEM_U64(offSeg, pIemCpu->iEffSeg, GCPtrEff);
c2f73fbf271131906a68f2583f744fe791dd0f11vboxsync IEM_MC_FETCH_MEM_U16_DISP(uSel, pIemCpu->iEffSeg, GCPtrEff, 8);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync IEM_MC_CALL_CIMPL_5(iemCImpl_load_SReg_Greg, uSel, offSeg, iSegRegArg, iGRegArg, enmEffOpSize);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xb2. */
e41f0459369a6d814aa36bf4def225482fc56026vboxsync return FNIEMOP_CALL_1(iemOpCommonLoadSRegAndGreg, X86_SREG_SS);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xb3. */
b64efece437bfca8872b81be9d0568ba90389d91vboxsync return FNIEMOP_CALL_1(iemOpCommonBit_Ev_Gv, &g_iemAImpl_btr);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xb4. */
e41f0459369a6d814aa36bf4def225482fc56026vboxsync return FNIEMOP_CALL_1(iemOpCommonLoadSRegAndGreg, X86_SREG_FS);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xb5. */
e41f0459369a6d814aa36bf4def225482fc56026vboxsync return FNIEMOP_CALL_1(iemOpCommonLoadSRegAndGreg, X86_SREG_GS);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xb6. */
6e9b663a1ac9b2adc21436da50bf52d56c8950b7vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
6e9b663a1ac9b2adc21436da50bf52d56c8950b7vboxsync * If rm is denoting a register, no more instruction bytes.
6e9b663a1ac9b2adc21436da50bf52d56c8950b7vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
6e9b663a1ac9b2adc21436da50bf52d56c8950b7vboxsync IEM_MC_FETCH_GREG_U8_ZX_U16(u16Value, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
6e9b663a1ac9b2adc21436da50bf52d56c8950b7vboxsync IEM_MC_STORE_GREG_U16(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u16Value);
6e9b663a1ac9b2adc21436da50bf52d56c8950b7vboxsync IEM_MC_FETCH_GREG_U8_ZX_U32(u32Value, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
6e9b663a1ac9b2adc21436da50bf52d56c8950b7vboxsync IEM_MC_STORE_GREG_U32(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u32Value);
6e9b663a1ac9b2adc21436da50bf52d56c8950b7vboxsync IEM_MC_FETCH_GREG_U8_ZX_U64(u64Value, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
6e9b663a1ac9b2adc21436da50bf52d56c8950b7vboxsync IEM_MC_STORE_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u64Value);
6e9b663a1ac9b2adc21436da50bf52d56c8950b7vboxsync * We're loading a register from memory.
6e9b663a1ac9b2adc21436da50bf52d56c8950b7vboxsync IEM_MC_FETCH_MEM_U8_ZX_U16(u16Value, pIemCpu->iEffSeg, GCPtrEffDst);
6e9b663a1ac9b2adc21436da50bf52d56c8950b7vboxsync IEM_MC_STORE_GREG_U16(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u16Value);
6e9b663a1ac9b2adc21436da50bf52d56c8950b7vboxsync IEM_MC_FETCH_MEM_U8_ZX_U32(u32Value, pIemCpu->iEffSeg, GCPtrEffDst);
6e9b663a1ac9b2adc21436da50bf52d56c8950b7vboxsync IEM_MC_STORE_GREG_U32(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u32Value);
6e9b663a1ac9b2adc21436da50bf52d56c8950b7vboxsync IEM_MC_FETCH_MEM_U8_ZX_U64(u64Value, pIemCpu->iEffSeg, GCPtrEffDst);
6e9b663a1ac9b2adc21436da50bf52d56c8950b7vboxsync IEM_MC_STORE_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u64Value);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xb7. */
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync /** @todo Not entirely sure how the operand size prefix is handled here,
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync * assuming that it will be ignored. Would be nice to have a few
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync * test for this. */
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync * If rm is denoting a register, no more instruction bytes.
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync IEM_MC_FETCH_GREG_U16_ZX_U32(u32Value, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync IEM_MC_STORE_GREG_U32(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u32Value);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync IEM_MC_FETCH_GREG_U16_ZX_U64(u64Value, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync IEM_MC_STORE_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u64Value);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync * We're loading a register from memory.
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync IEM_MC_FETCH_MEM_U16_ZX_U32(u32Value, pIemCpu->iEffSeg, GCPtrEffDst);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync IEM_MC_STORE_GREG_U32(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u32Value);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync IEM_MC_FETCH_MEM_U16_ZX_U64(u64Value, pIemCpu->iEffSeg, GCPtrEffDst);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync IEM_MC_STORE_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u64Value);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xb8. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xb9. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xba. */
b64efece437bfca8872b81be9d0568ba90389d91vboxsync switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
b64efece437bfca8872b81be9d0568ba90389d91vboxsync case 4: pImpl = &g_iemAImpl_bt; IEMOP_MNEMONIC("bt Ev,Ib"); break;
b64efece437bfca8872b81be9d0568ba90389d91vboxsync case 5: pImpl = &g_iemAImpl_bts; IEMOP_MNEMONIC("bts Ev,Ib"); break;
b64efece437bfca8872b81be9d0568ba90389d91vboxsync case 6: pImpl = &g_iemAImpl_btr; IEMOP_MNEMONIC("btr Ev,Ib"); break;
b64efece437bfca8872b81be9d0568ba90389d91vboxsync case 7: pImpl = &g_iemAImpl_btc; IEMOP_MNEMONIC("btc Ev,Ib"); break;
b64efece437bfca8872b81be9d0568ba90389d91vboxsync IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_OF | X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF);
b64efece437bfca8872b81be9d0568ba90389d91vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
b64efece437bfca8872b81be9d0568ba90389d91vboxsync /* register destination. */
b64efece437bfca8872b81be9d0568ba90389d91vboxsync IEM_MC_ARG_CONST(uint16_t, u16Src, /*=*/ u8Bit & 0x0f, 1);
b64efece437bfca8872b81be9d0568ba90389d91vboxsync IEM_MC_REF_GREG_U16(pu16Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
b64efece437bfca8872b81be9d0568ba90389d91vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU16, pu16Dst, u16Src, pEFlags);
b64efece437bfca8872b81be9d0568ba90389d91vboxsync IEM_MC_ARG_CONST(uint32_t, u32Src, /*=*/ u8Bit & 0x1f, 1);
b64efece437bfca8872b81be9d0568ba90389d91vboxsync IEM_MC_REF_GREG_U32(pu32Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
b64efece437bfca8872b81be9d0568ba90389d91vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU32, pu32Dst, u32Src, pEFlags);
b64efece437bfca8872b81be9d0568ba90389d91vboxsync IEM_MC_ARG_CONST(uint64_t, u64Src, /*=*/ u8Bit & 0x3f, 1);
b64efece437bfca8872b81be9d0568ba90389d91vboxsync IEM_MC_REF_GREG_U64(pu64Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
b64efece437bfca8872b81be9d0568ba90389d91vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU64, pu64Dst, u64Src, pEFlags);
b64efece437bfca8872b81be9d0568ba90389d91vboxsync /* memory destination. */
b64efece437bfca8872b81be9d0568ba90389d91vboxsync else /* BT */
b64efece437bfca8872b81be9d0568ba90389d91vboxsync /** @todo test negative bit offsets! */
b64efece437bfca8872b81be9d0568ba90389d91vboxsync IEM_MC_MEM_MAP(pu16Dst, IEM_ACCESS_DATA_RW, pIemCpu->iEffSeg, GCPtrEffDst, 0);
b64efece437bfca8872b81be9d0568ba90389d91vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU16, pu16Dst, u16Src, pEFlags);
b64efece437bfca8872b81be9d0568ba90389d91vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnLockedU16, pu16Dst, u16Src, pEFlags);
b64efece437bfca8872b81be9d0568ba90389d91vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pu16Dst, IEM_ACCESS_DATA_RW);
b64efece437bfca8872b81be9d0568ba90389d91vboxsync IEM_MC_MEM_MAP(pu32Dst, IEM_ACCESS_DATA_RW, pIemCpu->iEffSeg, GCPtrEffDst, 0);
b64efece437bfca8872b81be9d0568ba90389d91vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU32, pu32Dst, u32Src, pEFlags);
b64efece437bfca8872b81be9d0568ba90389d91vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnLockedU32, pu32Dst, u32Src, pEFlags);
b64efece437bfca8872b81be9d0568ba90389d91vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pu32Dst, IEM_ACCESS_DATA_RW);
b64efece437bfca8872b81be9d0568ba90389d91vboxsync IEM_MC_MEM_MAP(pu64Dst, IEM_ACCESS_DATA_RW, pIemCpu->iEffSeg, GCPtrEffDst, 0);
b64efece437bfca8872b81be9d0568ba90389d91vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU64, pu64Dst, u64Src, pEFlags);
b64efece437bfca8872b81be9d0568ba90389d91vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnLockedU64, pu64Dst, u64Src, pEFlags);
b64efece437bfca8872b81be9d0568ba90389d91vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pu64Dst, IEM_ACCESS_DATA_RW);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xbb. */
b64efece437bfca8872b81be9d0568ba90389d91vboxsync return FNIEMOP_CALL_1(iemOpCommonBit_Ev_Gv, &g_iemAImpl_btc);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xbc. */
b64efece437bfca8872b81be9d0568ba90389d91vboxsync IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_OF | X86_EFL_SF | X86_EFL_AF | X86_EFL_PF | X86_EFL_CF);
b64efece437bfca8872b81be9d0568ba90389d91vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rv_rm, &g_iemAImpl_bsf);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xbd. */
b64efece437bfca8872b81be9d0568ba90389d91vboxsync IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_OF | X86_EFL_SF | X86_EFL_AF | X86_EFL_PF | X86_EFL_CF);
b64efece437bfca8872b81be9d0568ba90389d91vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rv_rm, &g_iemAImpl_bsr);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xbe. */
d4a8f6749f70bad88edc04de808643d372faa35avboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
d4a8f6749f70bad88edc04de808643d372faa35avboxsync * If rm is denoting a register, no more instruction bytes.
d4a8f6749f70bad88edc04de808643d372faa35avboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
d4a8f6749f70bad88edc04de808643d372faa35avboxsync IEM_MC_FETCH_GREG_U8_SX_U16(u16Value, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
d4a8f6749f70bad88edc04de808643d372faa35avboxsync IEM_MC_STORE_GREG_U16(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u16Value);
d4a8f6749f70bad88edc04de808643d372faa35avboxsync IEM_MC_FETCH_GREG_U8_SX_U32(u32Value, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
d4a8f6749f70bad88edc04de808643d372faa35avboxsync IEM_MC_STORE_GREG_U32(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u32Value);
d4a8f6749f70bad88edc04de808643d372faa35avboxsync IEM_MC_FETCH_GREG_U8_SX_U64(u64Value, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
d4a8f6749f70bad88edc04de808643d372faa35avboxsync IEM_MC_STORE_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u64Value);
d4a8f6749f70bad88edc04de808643d372faa35avboxsync * We're loading a register from memory.
d4a8f6749f70bad88edc04de808643d372faa35avboxsync IEM_MC_FETCH_MEM_U8_SX_U16(u16Value, pIemCpu->iEffSeg, GCPtrEffDst);
d4a8f6749f70bad88edc04de808643d372faa35avboxsync IEM_MC_STORE_GREG_U16(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u16Value);
d4a8f6749f70bad88edc04de808643d372faa35avboxsync IEM_MC_FETCH_MEM_U8_SX_U32(u32Value, pIemCpu->iEffSeg, GCPtrEffDst);
d4a8f6749f70bad88edc04de808643d372faa35avboxsync IEM_MC_STORE_GREG_U32(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u32Value);
d4a8f6749f70bad88edc04de808643d372faa35avboxsync IEM_MC_FETCH_MEM_U8_SX_U64(u64Value, pIemCpu->iEffSeg, GCPtrEffDst);
d4a8f6749f70bad88edc04de808643d372faa35avboxsync IEM_MC_STORE_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u64Value);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xbf. */
d4a8f6749f70bad88edc04de808643d372faa35avboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
d4a8f6749f70bad88edc04de808643d372faa35avboxsync /** @todo Not entirely sure how the operand size prefix is handled here,
d4a8f6749f70bad88edc04de808643d372faa35avboxsync * assuming that it will be ignored. Would be nice to have a few
d4a8f6749f70bad88edc04de808643d372faa35avboxsync * test for this. */
d4a8f6749f70bad88edc04de808643d372faa35avboxsync * If rm is denoting a register, no more instruction bytes.
d4a8f6749f70bad88edc04de808643d372faa35avboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
d4a8f6749f70bad88edc04de808643d372faa35avboxsync IEM_MC_FETCH_GREG_U16_SX_U32(u32Value, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
d4a8f6749f70bad88edc04de808643d372faa35avboxsync IEM_MC_STORE_GREG_U32(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u32Value);
d4a8f6749f70bad88edc04de808643d372faa35avboxsync IEM_MC_FETCH_GREG_U16_SX_U64(u64Value, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
d4a8f6749f70bad88edc04de808643d372faa35avboxsync IEM_MC_STORE_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u64Value);
d4a8f6749f70bad88edc04de808643d372faa35avboxsync * We're loading a register from memory.
d4a8f6749f70bad88edc04de808643d372faa35avboxsync IEM_MC_FETCH_MEM_U16_SX_U32(u32Value, pIemCpu->iEffSeg, GCPtrEffDst);
d4a8f6749f70bad88edc04de808643d372faa35avboxsync IEM_MC_STORE_GREG_U32(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u32Value);
d4a8f6749f70bad88edc04de808643d372faa35avboxsync IEM_MC_FETCH_MEM_U16_SX_U64(u64Value, pIemCpu->iEffSeg, GCPtrEffDst);
d4a8f6749f70bad88edc04de808643d372faa35avboxsync IEM_MC_STORE_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u64Value);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xc0. */
1afc174efd532be60bfaaf42a70bc3db4ec1b675vboxsync * If rm is denoting a register, no more instruction bytes.
1afc174efd532be60bfaaf42a70bc3db4ec1b675vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
35325cf3fc008a76e3801f31e76a761a17f0bea4vboxsync IEM_MC_REF_GREG_U8(pu8Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
35325cf3fc008a76e3801f31e76a761a17f0bea4vboxsync IEM_MC_REF_GREG_U8(pu8Reg, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
1afc174efd532be60bfaaf42a70bc3db4ec1b675vboxsync IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_xadd_u8, pu8Dst, pu8Reg, pEFlags);
1afc174efd532be60bfaaf42a70bc3db4ec1b675vboxsync * We're accessing memory.
1afc174efd532be60bfaaf42a70bc3db4ec1b675vboxsync IEM_MC_MEM_MAP(pu8Dst, IEM_ACCESS_DATA_RW, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
35325cf3fc008a76e3801f31e76a761a17f0bea4vboxsync IEM_MC_FETCH_GREG_U8(u8RegCopy, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
1afc174efd532be60bfaaf42a70bc3db4ec1b675vboxsync IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_xadd_u8, pu8Dst, pu8Reg, pEFlags);
1afc174efd532be60bfaaf42a70bc3db4ec1b675vboxsync IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_xadd_u8_locked, pu8Dst, pu8Reg, pEFlags);
1afc174efd532be60bfaaf42a70bc3db4ec1b675vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pu8Dst, IEM_ACCESS_DATA_RW);
35325cf3fc008a76e3801f31e76a761a17f0bea4vboxsync IEM_MC_STORE_GREG_U8(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u8RegCopy);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xc1. */
1afc174efd532be60bfaaf42a70bc3db4ec1b675vboxsync * If rm is denoting a register, no more instruction bytes.
1afc174efd532be60bfaaf42a70bc3db4ec1b675vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
35325cf3fc008a76e3801f31e76a761a17f0bea4vboxsync IEM_MC_REF_GREG_U16(pu16Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
35325cf3fc008a76e3801f31e76a761a17f0bea4vboxsync IEM_MC_REF_GREG_U16(pu16Reg, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
1afc174efd532be60bfaaf42a70bc3db4ec1b675vboxsync IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_xadd_u16, pu16Dst, pu16Reg, pEFlags);
35325cf3fc008a76e3801f31e76a761a17f0bea4vboxsync IEM_MC_REF_GREG_U32(pu32Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
35325cf3fc008a76e3801f31e76a761a17f0bea4vboxsync IEM_MC_REF_GREG_U32(pu32Reg, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
1afc174efd532be60bfaaf42a70bc3db4ec1b675vboxsync IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_xadd_u32, pu32Dst, pu32Reg, pEFlags);
35325cf3fc008a76e3801f31e76a761a17f0bea4vboxsync IEM_MC_REF_GREG_U64(pu64Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
35325cf3fc008a76e3801f31e76a761a17f0bea4vboxsync IEM_MC_REF_GREG_U64(pu64Reg, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
1afc174efd532be60bfaaf42a70bc3db4ec1b675vboxsync IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_xadd_u64, pu64Dst, pu64Reg, pEFlags);
1afc174efd532be60bfaaf42a70bc3db4ec1b675vboxsync * We're accessing memory.
1afc174efd532be60bfaaf42a70bc3db4ec1b675vboxsync IEM_MC_MEM_MAP(pu16Dst, IEM_ACCESS_DATA_RW, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
35325cf3fc008a76e3801f31e76a761a17f0bea4vboxsync IEM_MC_FETCH_GREG_U16(u16RegCopy, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
1afc174efd532be60bfaaf42a70bc3db4ec1b675vboxsync IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_xadd_u16, pu16Dst, pu16Reg, pEFlags);
1afc174efd532be60bfaaf42a70bc3db4ec1b675vboxsync IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_xadd_u16_locked, pu16Dst, pu16Reg, pEFlags);
1afc174efd532be60bfaaf42a70bc3db4ec1b675vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pu16Dst, IEM_ACCESS_DATA_RW);
35325cf3fc008a76e3801f31e76a761a17f0bea4vboxsync IEM_MC_STORE_GREG_U16(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u16RegCopy);
1afc174efd532be60bfaaf42a70bc3db4ec1b675vboxsync IEM_MC_MEM_MAP(pu32Dst, IEM_ACCESS_DATA_RW, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
35325cf3fc008a76e3801f31e76a761a17f0bea4vboxsync IEM_MC_FETCH_GREG_U32(u32RegCopy, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
1afc174efd532be60bfaaf42a70bc3db4ec1b675vboxsync IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_xadd_u32, pu32Dst, pu32Reg, pEFlags);
1afc174efd532be60bfaaf42a70bc3db4ec1b675vboxsync IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_xadd_u32_locked, pu32Dst, pu32Reg, pEFlags);
1afc174efd532be60bfaaf42a70bc3db4ec1b675vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pu32Dst, IEM_ACCESS_DATA_RW);
35325cf3fc008a76e3801f31e76a761a17f0bea4vboxsync IEM_MC_STORE_GREG_U32(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u32RegCopy);
1afc174efd532be60bfaaf42a70bc3db4ec1b675vboxsync IEM_MC_MEM_MAP(pu64Dst, IEM_ACCESS_DATA_RW, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
35325cf3fc008a76e3801f31e76a761a17f0bea4vboxsync IEM_MC_FETCH_GREG_U64(u64RegCopy, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
1afc174efd532be60bfaaf42a70bc3db4ec1b675vboxsync IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_xadd_u64, pu64Dst, pu64Reg, pEFlags);
1afc174efd532be60bfaaf42a70bc3db4ec1b675vboxsync IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_xadd_u64_locked, pu64Dst, pu64Reg, pEFlags);
1afc174efd532be60bfaaf42a70bc3db4ec1b675vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pu64Dst, IEM_ACCESS_DATA_RW);
35325cf3fc008a76e3801f31e76a761a17f0bea4vboxsync IEM_MC_STORE_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u64RegCopy);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xc2. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_cmpps_Vps_Wps_Ib__cmppd_Vpd_Wpd_Ib__cmpss_Vss_Wss_Ib__cmpsd_Vsd_Wsd_Ib);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xc3. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xc4. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_pinsrw_Pq_Ry_Mw_Ib__pinsrw_Vdq_Ry_Mw_Ib);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xc5. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_pextrw_Gd_Nq_Ib__pextrw_Gd_Udq_Ib);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xc6. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_shufps_Vps_Wps_Ib__shufdp_Vpd_Wpd_Ib);
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync/** Opcode 0x0f 0xc7 !11/1. */
4edc278439db2c83a5a59a104ec85e379d4c07dfvboxsyncFNIEMOP_DEF_1(iemOp_Grp9_cmpxchg8b_Mq, uint8_t, bRm)
4edc278439db2c83a5a59a104ec85e379d4c07dfvboxsync IEM_MC_MEM_MAP(pu64MemDst, IEM_ACCESS_DATA_RW, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
4edc278439db2c83a5a59a104ec85e379d4c07dfvboxsync IEM_MC_FETCH_GREG_U32(u64EaxEdx.s.Lo, X86_GREG_xAX);
4edc278439db2c83a5a59a104ec85e379d4c07dfvboxsync IEM_MC_FETCH_GREG_U32(u64EaxEdx.s.Hi, X86_GREG_xDX);
4edc278439db2c83a5a59a104ec85e379d4c07dfvboxsync IEM_MC_FETCH_GREG_U32(u64EbxEcx.s.Lo, X86_GREG_xBX);
4edc278439db2c83a5a59a104ec85e379d4c07dfvboxsync IEM_MC_FETCH_GREG_U32(u64EbxEcx.s.Hi, X86_GREG_xCX);
4edc278439db2c83a5a59a104ec85e379d4c07dfvboxsync IEM_MC_CALL_VOID_AIMPL_4(iemAImpl_cmpxchg8b, pu64MemDst, pu64EaxEdx, pu64EbxEcx, pEFlags);
4edc278439db2c83a5a59a104ec85e379d4c07dfvboxsync IEM_MC_CALL_VOID_AIMPL_4(iemAImpl_cmpxchg8b_locked, pu64MemDst, pu64EaxEdx, pu64EbxEcx, pEFlags);
4edc278439db2c83a5a59a104ec85e379d4c07dfvboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pu64MemDst, IEM_ACCESS_DATA_RW);
4edc278439db2c83a5a59a104ec85e379d4c07dfvboxsync /** @todo Testcase: Check effect of cmpxchg8b on bits 63:32 in rax and rdx. */
4edc278439db2c83a5a59a104ec85e379d4c07dfvboxsync IEM_MC_STORE_GREG_U32(X86_GREG_xAX, u64EaxEdx.s.Lo);
4edc278439db2c83a5a59a104ec85e379d4c07dfvboxsync IEM_MC_STORE_GREG_U32(X86_GREG_xDX, u64EaxEdx.s.Hi);
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync/** Opcode REX.W 0x0f 0xc7 !11/1. */
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsyncFNIEMOP_UD_STUB_1(iemOp_Grp9_cmpxchg16b_Mdq, uint8_t, bRm);
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync/** Opcode 0x0f 0xc7 11/6. */
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsyncFNIEMOP_UD_STUB_1(iemOp_Grp9_rdrand_Rv, uint8_t, bRm);
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync/** Opcode 0x0f 0xc7 !11/6. */
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsyncFNIEMOP_UD_STUB_1(iemOp_Grp9_vmptrld_Mq, uint8_t, bRm);
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync/** Opcode 0x66 0x0f 0xc7 !11/6. */
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsyncFNIEMOP_UD_STUB_1(iemOp_Grp9_vmclear_Mq, uint8_t, bRm);
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync/** Opcode 0xf3 0x0f 0xc7 !11/6. */
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsyncFNIEMOP_UD_STUB_1(iemOp_Grp9_vmxon_Mq, uint8_t, bRm);
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync/** Opcode [0xf3] 0x0f 0xc7 !11/7. */
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsyncFNIEMOP_UD_STUB_1(iemOp_Grp9_vmptrst_Mq, uint8_t, bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xc7. */
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync /** @todo Testcase: Check mixing 0x66 and 0xf3. Check the effect of 0xf2. */
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync /** @todo Testcase: Check prefix effects on cmpxchg8b/16b. */
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync if ( (bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT)
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync || (pIemCpu->fPrefixes & (IEM_OP_PRF_SIZE_OP | IEM_OP_PRF_REPZ))) /** @todo Testcase: AMD seems to express a different idea here wrt prefixes. */
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync return FNIEMOP_CALL_1(iemOp_Grp9_cmpxchg16b_Mdq, bRm);
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync return FNIEMOP_CALL_1(iemOp_Grp9_cmpxchg8b_Mq, bRm);
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync switch (pIemCpu->fPrefixes & (IEM_OP_PRF_SIZE_OP | IEM_OP_PRF_REPZ))
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync switch (pIemCpu->fPrefixes & (IEM_OP_PRF_SIZE_OP | IEM_OP_PRF_REPZ))
5d5736ee87bba61ed37c0112a5f89f32b57e775bvboxsync * Common 'bswap register' helper.
869b801c85bf466f1f7c9d183e336e60dd5a1da7vboxsync IEM_MC_REF_GREG_U32(pu32Dst, iReg); /* Don't clear the high dword! */
869b801c85bf466f1f7c9d183e336e60dd5a1da7vboxsync IEM_MC_CALL_VOID_AIMPL_1(iemAImpl_bswap_u16, pu32Dst);
869b801c85bf466f1f7c9d183e336e60dd5a1da7vboxsync IEM_MC_CALL_VOID_AIMPL_1(iemAImpl_bswap_u32, pu32Dst);
869b801c85bf466f1f7c9d183e336e60dd5a1da7vboxsync IEM_MC_CALL_VOID_AIMPL_1(iemAImpl_bswap_u64, pu64Dst);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xc8. */
869b801c85bf466f1f7c9d183e336e60dd5a1da7vboxsync return FNIEMOP_CALL_1(iemOpCommonBswapGReg, X86_GREG_xAX | pIemCpu->uRexReg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xc9. */
869b801c85bf466f1f7c9d183e336e60dd5a1da7vboxsync return FNIEMOP_CALL_1(iemOpCommonBswapGReg, X86_GREG_xCX | pIemCpu->uRexReg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xca. */
869b801c85bf466f1f7c9d183e336e60dd5a1da7vboxsync return FNIEMOP_CALL_1(iemOpCommonBswapGReg, X86_GREG_xDX | pIemCpu->uRexReg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xcb. */
869b801c85bf466f1f7c9d183e336e60dd5a1da7vboxsync return FNIEMOP_CALL_1(iemOpCommonBswapGReg, X86_GREG_xBX | pIemCpu->uRexReg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xcc. */
869b801c85bf466f1f7c9d183e336e60dd5a1da7vboxsync return FNIEMOP_CALL_1(iemOpCommonBswapGReg, X86_GREG_xSP | pIemCpu->uRexReg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xcd. */
869b801c85bf466f1f7c9d183e336e60dd5a1da7vboxsync return FNIEMOP_CALL_1(iemOpCommonBswapGReg, X86_GREG_xBP | pIemCpu->uRexReg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xce. */
869b801c85bf466f1f7c9d183e336e60dd5a1da7vboxsync return FNIEMOP_CALL_1(iemOpCommonBswapGReg, X86_GREG_xSI | pIemCpu->uRexReg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xcf. */
869b801c85bf466f1f7c9d183e336e60dd5a1da7vboxsync return FNIEMOP_CALL_1(iemOpCommonBswapGReg, X86_GREG_xDI | pIemCpu->uRexReg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xd0. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_addsubpd_Vpd_Wpd__addsubps_Vps_Wps);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xd1. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xd2. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xd3. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xd4. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xd5. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xd6. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_movq_Wq_Vq__movq2dq_Vdq_Nq__movdq2q_Pq_Uq);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xd7. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_pmovmskb_Gd_Nq__pmovmskb_Gd_Udq);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xd8. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xd9. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xda. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xdb. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xdc. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xdd. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xde. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xdf. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xe0. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xe1. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xe2. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xe3. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xe4. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xe5. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xe6. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_cvttpd2dq_Vdq_Wdp__cvtdq2pd_Vdq_Wpd__cvtpd2dq_Vdq_Wpd);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xe7. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xe8. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xe9. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xea. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xeb. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xec. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xed. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xee. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xef. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xf0. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xf1. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xf2. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xf3. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xf4. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xf5. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xf6. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xf7. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_maskmovq_Pq_Nq__maskmovdqu_Vdq_Udq);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xf8. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xf9. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xfa. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xfb. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xfc. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xfd. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xfe. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x10 */ iemOp_movups_Vps_Wps__movupd_Vpd_Wpd__movss_Vss_Wss__movsd_Vsd_Wsd,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x11 */ iemOp_movups_Wps_Vps__movupd_Wpd_Vpd__movss_Wss_Vss__movsd_Vsd_Wsd,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x12 */ iemOp_movlps_Vq_Mq__movhlps_Vq_Uq__movlpd_Vq_Mq__movsldup_Vq_Wq__movddup_Vq_Wq,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x14 */ iemOp_unpckhlps_Vps_Wq__unpcklpd_Vpd_Wq,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x16 */ iemOp_movhps_Vq_Mq__movlhps_Vq_Uq__movhpd_Vq_Mq__movshdup_Vq_Wq,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x2a */ iemOp_cvtpi2ps_Vps_Qpi__cvtpi2pd_Vpd_Qpi__cvtsi2ss_Vss_Ey__cvtsi2sd_Vsd_Ey,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x2c */ iemOp_cvttps2pi_Ppi_Wps__cvttpd2pi_Ppi_Wpd__cvttss2si_Gy_Wss__cvttsd2si_Yu_Wsd,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x2d */ iemOp_cvtps2pi_Ppi_Wps__cvtpd2pi_QpiWpd__cvtss2si_Gy_Wss__cvtsd2si_Gy_Wsd,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x51 */ iemOp_sqrtps_Wps_Vps__sqrtpd_Wpd_Vpd__sqrtss_Vss_Wss__sqrtsd_Vsd_Wsd,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x58 */ iemOp_addps_Vps_Wps__addpd_Vpd_Wpd__addss_Vss_Wss__addsd_Vsd_Wsd,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x59 */ iemOp_mulps_Vps_Wps__mulpd_Vpd_Wpd__mulss_Vss__Wss__mulsd_Vsd_Wsd,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x5a */ iemOp_cvtps2pd_Vpd_Wps__cvtpd2ps_Vps_Wpd__cvtss2sd_Vsd_Wss__cvtsd2ss_Vss_Wsd,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x5b */ iemOp_cvtdq2ps_Vps_Wdq__cvtps2dq_Vdq_Wps__cvtps2dq_Vdq_Wps,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x5c */ iemOp_subps_Vps_Wps__subpd_Vps_Wdp__subss_Vss_Wss__subsd_Vsd_Wsd,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x5d */ iemOp_minps_Vps_Wps__minpd_Vpd_Wpd__minss_Vss_Wss__minsd_Vsd_Wsd,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x5e */ iemOp_divps_Vps_Wps__divpd_Vpd_Wpd__divss_Vss_Wss__divsd_Vsd_Wsd,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x5f */ iemOp_maxps_Vps_Wps__maxpd_Vpd_Wpd__maxss_Vss_Wss__maxsd_Vsd_Wsd,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x60 */ iemOp_punpcklbw_Pq_Qd__punpcklbw_Vdq_Wdq,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x61 */ iemOp_punpcklwd_Pq_Qd__punpcklwd_Vdq_Wdq,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x62 */ iemOp_punpckldq_Pq_Qd__punpckldq_Vdq_Wdq,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x68 */ iemOp_punpckhbw_Pq_Qq__punpckhbw_Vdq_Wdq,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x69 */ iemOp_punpckhwd_Pq_Qd__punpckhwd_Vdq_Wdq,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x6a */ iemOp_punpckhdq_Pq_Qd__punpckhdq_Vdq_Wdq,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x6f */ iemOp_movq_Pq_Qq__movdqa_Vdq_Wdq__movdqu_Vdq_Wdq,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x70 */ iemOp_pshufw_Pq_Qq_Ib__pshufd_Vdq_Wdq_Ib__pshufhw_Vdq_Wdq_Ib__pshuflq_Vdq_Wdq_Ib,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x7e */ iemOp_movd_q_Ey_Pd__movd_q_Ey_Vy__movq_Vq_Wq,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x7f */ iemOp_movq_Qq_Pq__movq_movdqa_Wdq_Vdq__movdqu_Wdq_Vdq,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0xc2 */ iemOp_cmpps_Vps_Wps_Ib__cmppd_Vpd_Wpd_Ib__cmpss_Vss_Wss_Ib__cmpsd_Vsd_Wsd_Ib,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0xc4 */ iemOp_pinsrw_Pq_Ry_Mw_Ib__pinsrw_Vdq_Ry_Mw_Ib,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0xc5 */ iemOp_pextrw_Gd_Nq_Ib__pextrw_Gd_Udq_Ib,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0xc6 */ iemOp_shufps_Vps_Wps_Ib__shufdp_Vpd_Wpd_Ib,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0xd0 */ iemOp_addsubpd_Vpd_Wpd__addsubps_Vps_Wps,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0xd6 */ iemOp_movq_Wq_Vq__movq2dq_Vdq_Nq__movdq2q_Pq_Uq,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0xe6 */ iemOp_cvttpd2dq_Vdq_Wdp__cvtdq2pd_Vdq_Wpd__cvtpd2dq_Vdq_Wpd,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0xf7 */ iemOp_maskmovq_Pq_Nq__maskmovdqu_Vdq_Udq,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** @name One byte opcodes.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x00. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rm_r8, &g_iemAImpl_add);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x01. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rm_rv, &g_iemAImpl_add);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x02. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_r8_rm, &g_iemAImpl_add);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x03. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rv_rm, &g_iemAImpl_add);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x04. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_AL_Ib, &g_iemAImpl_add);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x05. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rAX_Iz, &g_iemAImpl_add);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x06. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonPushSReg, X86_SREG_ES);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x07. */
0bbe08c3ee3c834593be35ccfbe0183116509ae2vboxsync return IEM_MC_DEFER_TO_CIMPL_2(iemCImpl_pop_Sreg, X86_SREG_ES, pIemCpu->enmEffOpSize);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x08. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rm_r8, &g_iemAImpl_or);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x09. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rm_rv, &g_iemAImpl_or);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0a. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_r8_rm, &g_iemAImpl_or);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0b. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rv_rm, &g_iemAImpl_or);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0c. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_AL_Ib, &g_iemAImpl_or);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0d. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rAX_Iz, &g_iemAImpl_or);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0e. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonPushSReg, X86_SREG_CS);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x10. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rm_r8, &g_iemAImpl_adc);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x11. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rm_rv, &g_iemAImpl_adc);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x12. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_r8_rm, &g_iemAImpl_adc);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x13. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rv_rm, &g_iemAImpl_adc);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x14. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_AL_Ib, &g_iemAImpl_adc);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x15. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rAX_Iz, &g_iemAImpl_adc);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x16. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonPushSReg, X86_SREG_SS);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x17. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMOP_MNEMONIC("pop ss"); /** @todo implies instruction fusing? */
0bbe08c3ee3c834593be35ccfbe0183116509ae2vboxsync return IEM_MC_DEFER_TO_CIMPL_2(iemCImpl_pop_Sreg, X86_SREG_SS, pIemCpu->enmEffOpSize);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x18. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rm_r8, &g_iemAImpl_sbb);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x19. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rm_rv, &g_iemAImpl_sbb);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x1a. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_r8_rm, &g_iemAImpl_sbb);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x1b. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rv_rm, &g_iemAImpl_sbb);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x1c. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_AL_Ib, &g_iemAImpl_sbb);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x1d. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rAX_Iz, &g_iemAImpl_sbb);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x1e. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonPushSReg, X86_SREG_DS);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x1f. */
0bbe08c3ee3c834593be35ccfbe0183116509ae2vboxsync return IEM_MC_DEFER_TO_CIMPL_2(iemCImpl_pop_Sreg, X86_SREG_DS, pIemCpu->enmEffOpSize);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x20. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rm_r8, &g_iemAImpl_and);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x21. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rm_rv, &g_iemAImpl_and);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x22. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_r8_rm, &g_iemAImpl_and);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x23. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rv_rm, &g_iemAImpl_and);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x24. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_AL_Ib, &g_iemAImpl_and);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x25. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rAX_Iz, &g_iemAImpl_and);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x26. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x27. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x28. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rm_r8, &g_iemAImpl_sub);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x29. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rm_rv, &g_iemAImpl_sub);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x2a. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_r8_rm, &g_iemAImpl_sub);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x2b. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rv_rm, &g_iemAImpl_sub);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x2c. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_AL_Ib, &g_iemAImpl_sub);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x2d. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rAX_Iz, &g_iemAImpl_sub);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x2e. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x2f. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x30. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rm_r8, &g_iemAImpl_xor);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x31. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rm_rv, &g_iemAImpl_xor);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x32. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_r8_rm, &g_iemAImpl_xor);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x33. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rv_rm, &g_iemAImpl_xor);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x34. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_AL_Ib, &g_iemAImpl_xor);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x35. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rAX_Iz, &g_iemAImpl_xor);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x36. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x37. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x38. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo do we have to decode the whole instruction first? */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rm_r8, &g_iemAImpl_cmp);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x39. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo do we have to decode the whole instruction first? */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rm_rv, &g_iemAImpl_cmp);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x3a. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_r8_rm, &g_iemAImpl_cmp);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x3b. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rv_rm, &g_iemAImpl_cmp);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x3c. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_AL_Ib, &g_iemAImpl_cmp);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x3d. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rAX_Iz, &g_iemAImpl_cmp);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x3e. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x3f. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_DEF_2(iemOpCommonUnaryGReg, PCIEMOPUNARYSIZES, pImpl, uint8_t, iReg)
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_2(pImpl->pfnNormalU16, pu16Dst, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_2(pImpl->pfnNormalU32, pu32Dst, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_2(pImpl->pfnNormalU64, pu64Dst, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x40. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * This is a REX prefix in 64-bit mode.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_2(iemOpCommonUnaryGReg, &g_iemAImpl_inc, X86_GREG_xAX);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x41. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * This is a REX prefix in 64-bit mode.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync pIemCpu->fPrefixes |= IEM_OP_PRF_REX | IEM_OP_PRF_REX_B;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_2(iemOpCommonUnaryGReg, &g_iemAImpl_inc, X86_GREG_xCX);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x42. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * This is a REX prefix in 64-bit mode.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync pIemCpu->fPrefixes |= IEM_OP_PRF_REX | IEM_OP_PRF_REX_X;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_2(iemOpCommonUnaryGReg, &g_iemAImpl_inc, X86_GREG_xDX);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x43. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * This is a REX prefix in 64-bit mode.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync pIemCpu->fPrefixes |= IEM_OP_PRF_REX | IEM_OP_PRF_REX_B | IEM_OP_PRF_REX_X;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_2(iemOpCommonUnaryGReg, &g_iemAImpl_inc, X86_GREG_xBX);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x44. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * This is a REX prefix in 64-bit mode.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync pIemCpu->fPrefixes |= IEM_OP_PRF_REX | IEM_OP_PRF_REX_R;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_2(iemOpCommonUnaryGReg, &g_iemAImpl_inc, X86_GREG_xSP);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x45. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * This is a REX prefix in 64-bit mode.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync pIemCpu->fPrefixes |= IEM_OP_PRF_REX | IEM_OP_PRF_REX_R | IEM_OP_PRF_REX_B;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_2(iemOpCommonUnaryGReg, &g_iemAImpl_inc, X86_GREG_xBP);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x46. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * This is a REX prefix in 64-bit mode.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync pIemCpu->fPrefixes |= IEM_OP_PRF_REX | IEM_OP_PRF_REX_R | IEM_OP_PRF_REX_X;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_2(iemOpCommonUnaryGReg, &g_iemAImpl_inc, X86_GREG_xSI);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x47. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * This is a REX prefix in 64-bit mode.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync pIemCpu->fPrefixes |= IEM_OP_PRF_REX | IEM_OP_PRF_REX_R | IEM_OP_PRF_REX_B | IEM_OP_PRF_REX_X;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_2(iemOpCommonUnaryGReg, &g_iemAImpl_inc, X86_GREG_xDI);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x48. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * This is a REX prefix in 64-bit mode.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync pIemCpu->fPrefixes |= IEM_OP_PRF_REX | IEM_OP_PRF_SIZE_REX_W;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_2(iemOpCommonUnaryGReg, &g_iemAImpl_dec, X86_GREG_xAX);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x49. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * This is a REX prefix in 64-bit mode.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync pIemCpu->fPrefixes |= IEM_OP_PRF_REX | IEM_OP_PRF_REX_B | IEM_OP_PRF_SIZE_REX_W;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_2(iemOpCommonUnaryGReg, &g_iemAImpl_dec, X86_GREG_xCX);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x4a. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * This is a REX prefix in 64-bit mode.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync pIemCpu->fPrefixes |= IEM_OP_PRF_REX | IEM_OP_PRF_REX_X | IEM_OP_PRF_SIZE_REX_W;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_2(iemOpCommonUnaryGReg, &g_iemAImpl_dec, X86_GREG_xDX);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x4b. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * This is a REX prefix in 64-bit mode.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync pIemCpu->fPrefixes |= IEM_OP_PRF_REX | IEM_OP_PRF_REX_B | IEM_OP_PRF_REX_X | IEM_OP_PRF_SIZE_REX_W;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_2(iemOpCommonUnaryGReg, &g_iemAImpl_dec, X86_GREG_xBX);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x4c. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * This is a REX prefix in 64-bit mode.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync pIemCpu->fPrefixes |= IEM_OP_PRF_REX | IEM_OP_PRF_REX_R | IEM_OP_PRF_SIZE_REX_W;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_2(iemOpCommonUnaryGReg, &g_iemAImpl_dec, X86_GREG_xSP);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x4d. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * This is a REX prefix in 64-bit mode.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync pIemCpu->fPrefixes |= IEM_OP_PRF_REX | IEM_OP_PRF_REX_R | IEM_OP_PRF_REX_B | IEM_OP_PRF_SIZE_REX_W;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_2(iemOpCommonUnaryGReg, &g_iemAImpl_dec, X86_GREG_xBP);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x4e. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * This is a REX prefix in 64-bit mode.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync pIemCpu->fPrefixes |= IEM_OP_PRF_REX | IEM_OP_PRF_REX_R | IEM_OP_PRF_REX_X | IEM_OP_PRF_SIZE_REX_W;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_2(iemOpCommonUnaryGReg, &g_iemAImpl_dec, X86_GREG_xSI);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x4f. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * This is a REX prefix in 64-bit mode.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync pIemCpu->fPrefixes |= IEM_OP_PRF_REX | IEM_OP_PRF_REX_R | IEM_OP_PRF_REX_B | IEM_OP_PRF_REX_X | IEM_OP_PRF_SIZE_REX_W;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_2(iemOpCommonUnaryGReg, &g_iemAImpl_dec, X86_GREG_xDI);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Common 'push register' helper.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync pIemCpu->enmEffOpSize = !(pIemCpu->fPrefixes & IEM_OP_PRF_SIZE_OP) ? IEMMODE_64BIT : IEMMODE_16BIT;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x50. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonPushGReg, X86_GREG_xAX);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x51. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonPushGReg, X86_GREG_xCX);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x52. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonPushGReg, X86_GREG_xDX);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x53. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonPushGReg, X86_GREG_xBX);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x54. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonPushGReg, X86_GREG_xSP);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x55. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonPushGReg, X86_GREG_xBP);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x56. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonPushGReg, X86_GREG_xSI);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x57. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonPushGReg, X86_GREG_xDI);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Common 'pop register' helper.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync pIemCpu->enmEffOpSize = !(pIemCpu->fPrefixes & IEM_OP_PRF_SIZE_OP) ? IEMMODE_64BIT : IEMMODE_16BIT;
f44d6fa3e2499e24568e13bf478400381a5493b1vboxsync/** @todo How does this code handle iReg==X86_GREG_xSP. How does a real CPU
f44d6fa3e2499e24568e13bf478400381a5493b1vboxsync * handle it, for that matter (Intel pseudo code hints that the popped
f44d6fa3e2499e24568e13bf478400381a5493b1vboxsync * value is incremented by the stack item size.) Test it, both encodings
f44d6fa3e2499e24568e13bf478400381a5493b1vboxsync * and all three register sizes. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x58. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonPopGReg, X86_GREG_xAX);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x59. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonPopGReg, X86_GREG_xCX);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x5a. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonPopGReg, X86_GREG_xDX);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x5b. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonPopGReg, X86_GREG_xBX);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x5c. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonPopGReg, X86_GREG_xSP);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x5d. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonPopGReg, X86_GREG_xBP);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x5e. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonPopGReg, X86_GREG_xSI);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x5f. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonPopGReg, X86_GREG_xDI);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x60. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x61. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x62. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x63. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x64. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x65. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x66. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x67. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_16BIT: pIemCpu->enmEffAddrMode = IEMMODE_32BIT; break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_32BIT: pIemCpu->enmEffAddrMode = IEMMODE_16BIT; break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_64BIT: pIemCpu->enmEffAddrMode = IEMMODE_32BIT; break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x68. */
ea4433aedd4105e6599e57e0c5f6cb32a68e963cvboxsync uint64_t u64Imm; IEM_OPCODE_GET_NEXT_S32_SX_U64(&u64Imm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x69. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMOP_MNEMONIC("imul Gv,Ev,Iz"); /* Gv = Ev * Iz; */
b64efece437bfca8872b81be9d0568ba90389d91vboxsync IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* register operand */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U16(u16Tmp, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_imul_two_u16, pu16Dst, u16Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U16(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u16Tmp);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* memory operand */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_MEM_U16(u16Tmp, pIemCpu->iEffSeg, GCPtrEffDst);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_imul_two_u16, pu16Dst, u16Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U16(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u16Tmp);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* register operand */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U32(u32Tmp, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_imul_two_u32, pu32Dst, u32Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U32(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u32Tmp);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* memory operand */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_MEM_U32(u32Tmp, pIemCpu->iEffSeg, GCPtrEffDst);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_imul_two_u32, pu32Dst, u32Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U32(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u32Tmp);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* register operand */
eefd98087b0d2ffd437b0d535a96d8271963e17dvboxsync uint64_t u64Imm; IEM_OPCODE_GET_NEXT_S32_SX_U64(&u64Imm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U64(u64Tmp, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_imul_two_u64, pu64Dst, u64Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u64Tmp);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* memory operand */
eefd98087b0d2ffd437b0d535a96d8271963e17dvboxsync uint64_t u64Imm; IEM_OPCODE_GET_NEXT_S32_SX_U64(&u64Imm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_MEM_U64(u64Tmp, pIemCpu->iEffSeg, GCPtrEffDst);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_imul_two_u64, pu64Dst, u64Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u64Tmp);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x6a. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x6b. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMOP_MNEMONIC("imul Gv,Ev,Ib"); /* Gv = Ev * Iz; */
b64efece437bfca8872b81be9d0568ba90389d91vboxsync IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* register operand */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_ARG_CONST(uint16_t, u16Src,/*=*/ (int8_t)u8Imm, 1);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U16(u16Tmp, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_imul_two_u16, pu16Dst, u16Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U16(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u16Tmp);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* memory operand */
eefd98087b0d2ffd437b0d535a96d8271963e17dvboxsync uint16_t u16Imm; IEM_OPCODE_GET_NEXT_S8_SX_U16(&u16Imm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_MEM_U16(u16Tmp, pIemCpu->iEffSeg, GCPtrEffDst);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_imul_two_u16, pu16Dst, u16Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U16(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u16Tmp);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* register operand */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_ARG_CONST(uint32_t, u32Src,/*=*/ (int8_t)u8Imm, 1);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U32(u32Tmp, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_imul_two_u32, pu32Dst, u32Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U32(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u32Tmp);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* memory operand */
eefd98087b0d2ffd437b0d535a96d8271963e17dvboxsync uint32_t u32Imm; IEM_OPCODE_GET_NEXT_S8_SX_U32(&u32Imm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_MEM_U32(u32Tmp, pIemCpu->iEffSeg, GCPtrEffDst);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_imul_two_u32, pu32Dst, u32Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U32(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u32Tmp);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* register operand */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_ARG_CONST(uint64_t, u64Src,/*=*/ (int8_t)u8Imm, 1);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U64(u64Tmp, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_imul_two_u64, pu64Dst, u64Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u64Tmp);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* memory operand */
eefd98087b0d2ffd437b0d535a96d8271963e17dvboxsync uint64_t u64Imm; IEM_OPCODE_GET_NEXT_S8_SX_U64(&u64Imm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_MEM_U64(u64Tmp, pIemCpu->iEffSeg, GCPtrEffDst);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_imul_two_u64, pu64Dst, u64Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u64Tmp);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x6c. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if (pIemCpu->fPrefixes & (IEM_OP_PRF_REPNZ | IEM_OP_PRF_REPZ))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_16BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_rep_ins_op8_addr16);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_rep_ins_op8_addr32);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_rep_ins_op8_addr64);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_16BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_ins_op8_addr16);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_ins_op8_addr32);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_ins_op8_addr64);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x6d. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if (pIemCpu->fPrefixes & (IEM_OP_PRF_REPZ | IEM_OP_PRF_REPNZ))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_16BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_rep_ins_op16_addr16);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_rep_ins_op16_addr32);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_rep_ins_op16_addr64);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_16BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_rep_ins_op32_addr16);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_rep_ins_op32_addr32);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_rep_ins_op32_addr64);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_16BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_ins_op16_addr16);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_ins_op16_addr32);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_ins_op16_addr64);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_16BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_ins_op32_addr16);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_ins_op32_addr32);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_ins_op32_addr64);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x6e. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if (pIemCpu->fPrefixes & (IEM_OP_PRF_REPNZ | IEM_OP_PRF_REPZ))
e41f0459369a6d814aa36bf4def225482fc56026vboxsync case IEMMODE_16BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_rep_outs_op8_addr16, pIemCpu->iEffSeg);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_rep_outs_op8_addr32, pIemCpu->iEffSeg);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_rep_outs_op8_addr64, pIemCpu->iEffSeg);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync case IEMMODE_16BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_outs_op8_addr16, pIemCpu->iEffSeg);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_outs_op8_addr32, pIemCpu->iEffSeg);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_outs_op8_addr64, pIemCpu->iEffSeg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x6f. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if (pIemCpu->fPrefixes & (IEM_OP_PRF_REPZ | IEM_OP_PRF_REPNZ))
e41f0459369a6d814aa36bf4def225482fc56026vboxsync case IEMMODE_16BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_rep_outs_op16_addr16, pIemCpu->iEffSeg);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_rep_outs_op16_addr32, pIemCpu->iEffSeg);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_rep_outs_op16_addr64, pIemCpu->iEffSeg);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync case IEMMODE_16BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_rep_outs_op32_addr16, pIemCpu->iEffSeg);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_rep_outs_op32_addr32, pIemCpu->iEffSeg);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_rep_outs_op32_addr64, pIemCpu->iEffSeg);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync case IEMMODE_16BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_outs_op16_addr16, pIemCpu->iEffSeg);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_outs_op16_addr32, pIemCpu->iEffSeg);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_outs_op16_addr64, pIemCpu->iEffSeg);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync case IEMMODE_16BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_outs_op32_addr16, pIemCpu->iEffSeg);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_outs_op32_addr32, pIemCpu->iEffSeg);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_outs_op32_addr64, pIemCpu->iEffSeg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x70. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x71. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x72. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x73. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x74. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x75. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x76. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_IF_EFL_ANY_BITS_SET(X86_EFL_CF | X86_EFL_ZF) {
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x77. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_IF_EFL_ANY_BITS_SET(X86_EFL_CF | X86_EFL_ZF) {
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x78. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x79. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x7a. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x7b. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x7c. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x7d. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x7e. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_IF_EFL_BIT_SET_OR_BITS_NE(X86_EFL_ZF, X86_EFL_SF, X86_EFL_OF) {
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x7f. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_IF_EFL_BIT_SET_OR_BITS_NE(X86_EFL_ZF, X86_EFL_SF, X86_EFL_OF) {
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x80. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMOP_MNEMONIC2("add\0or\0\0adc\0sbb\0and\0sub\0xor\0cmp" + ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)*4, "Eb,Ib");
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync PCIEMOPBINSIZES pImpl = g_apIemImplGrp1[(bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK];
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* register target */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U8(pu8Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU8, pu8Dst, u8Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* memory target */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync { /* CMP */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_MAP(pu8Dst, fAccess, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU8, pu8Dst, u8Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnLockedU8, pu8Dst, u8Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x81. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMOP_MNEMONIC2("add\0or\0\0adc\0sbb\0and\0sub\0xor\0cmp" + ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)*4, "Ev,Iz");
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync PCIEMOPBINSIZES pImpl = g_apIemImplGrp1[(bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK];
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* register target */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_ARG_CONST(uint16_t, u16Src, /*=*/ u16Imm, 1);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U16(pu16Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU16, pu16Dst, u16Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* memory target */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync { /* CMP, TEST */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_MAP(pu16Dst, fAccess, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU16, pu16Dst, u16Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnLockedU16, pu16Dst, u16Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* register target */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_ARG_CONST(uint32_t, u32Src, /*=*/ u32Imm, 1);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U32(pu32Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU32, pu32Dst, u32Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* memory target */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync { /* CMP, TEST */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_MAP(pu32Dst, fAccess, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU32, pu32Dst, u32Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnLockedU32, pu32Dst, u32Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* register target */
ea4433aedd4105e6599e57e0c5f6cb32a68e963cvboxsync uint64_t u64Imm; IEM_OPCODE_GET_NEXT_S32_SX_U64(&u64Imm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_ARG_CONST(uint64_t, u64Src, /*=*/ u64Imm, 1);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U64(pu64Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU64, pu64Dst, u64Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* memory target */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync { /* CMP */
ea4433aedd4105e6599e57e0c5f6cb32a68e963cvboxsync uint64_t u64Imm; IEM_OPCODE_GET_NEXT_S32_SX_U64(&u64Imm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_MAP(pu64Dst, fAccess, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU64, pu64Dst, u64Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnLockedU64, pu64Dst, u64Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x82. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMOP_HLP_NO_64BIT(); /** @todo do we need to decode the whole instruction or is this ok? */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x83. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMOP_MNEMONIC2("add\0or\0\0adc\0sbb\0and\0sub\0xor\0cmp" + ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)*4, "Ev,Ib");
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync PCIEMOPBINSIZES pImpl = g_apIemImplGrp1[(bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK];
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Register target
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_ARG_CONST(uint16_t, u16Src, /*=*/ (int8_t)u8Imm,1);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U16(pu16Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU16, pu16Dst, u16Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_ARG_CONST(uint32_t, u32Src, /*=*/ (int8_t)u8Imm,1);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U32(pu32Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU32, pu32Dst, u32Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_ARG_CONST(uint64_t, u64Src, /*=*/ (int8_t)u8Imm,1);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U64(pu64Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU64, pu64Dst, u64Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Memory target.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync { /* CMP */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_MAP(pu16Dst, fAccess, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU16, pu16Dst, u16Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnLockedU16, pu16Dst, u16Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_MAP(pu32Dst, fAccess, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU32, pu32Dst, u32Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnLockedU32, pu32Dst, u32Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_MAP(pu64Dst, fAccess, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU64, pu64Dst, u64Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnLockedU64, pu64Dst, u64Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x84. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo do we have to decode the whole instruction first? */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rm_r8, &g_iemAImpl_test);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x85. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo do we have to decode the whole instruction first? */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rm_rv, &g_iemAImpl_test);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x86. */
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync * If rm is denoting a register, no more instruction bytes.
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync IEM_MC_FETCH_GREG_U8(uTmp1, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync IEM_MC_FETCH_GREG_U8(uTmp2, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync IEM_MC_STORE_GREG_U8((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, uTmp1);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync IEM_MC_STORE_GREG_U8(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, uTmp2);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync * We're accessing memory.
1afc174efd532be60bfaaf42a70bc3db4ec1b675vboxsync/** @todo the register must be committed separately! */
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync IEM_MC_MEM_MAP(pu8Mem, IEM_ACCESS_DATA_RW, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync IEM_MC_REF_GREG_U8(pu8Reg, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync IEM_MC_CALL_VOID_AIMPL_2(iemAImpl_xchg_u8, pu8Mem, pu8Reg);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pu8Mem, IEM_ACCESS_DATA_RW);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x87. */
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync * If rm is denoting a register, no more instruction bytes.
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync IEM_MC_FETCH_GREG_U16(uTmp1, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync IEM_MC_FETCH_GREG_U16(uTmp2, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync IEM_MC_STORE_GREG_U16((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, uTmp1);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync IEM_MC_STORE_GREG_U16(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, uTmp2);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync IEM_MC_FETCH_GREG_U32(uTmp1, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync IEM_MC_FETCH_GREG_U32(uTmp2, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync IEM_MC_STORE_GREG_U32((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, uTmp1);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync IEM_MC_STORE_GREG_U32(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, uTmp2);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync IEM_MC_FETCH_GREG_U64(uTmp1, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync IEM_MC_FETCH_GREG_U64(uTmp2, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync IEM_MC_STORE_GREG_U64((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, uTmp1);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync IEM_MC_STORE_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, uTmp2);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync * We're accessing memory.
1afc174efd532be60bfaaf42a70bc3db4ec1b675vboxsync/** @todo the register must be committed separately! */
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync IEM_MC_MEM_MAP(pu16Mem, IEM_ACCESS_DATA_RW, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync IEM_MC_REF_GREG_U16(pu16Reg, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync IEM_MC_CALL_VOID_AIMPL_2(iemAImpl_xchg_u16, pu16Mem, pu16Reg);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pu16Mem, IEM_ACCESS_DATA_RW);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync IEM_MC_MEM_MAP(pu32Mem, IEM_ACCESS_DATA_RW, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync IEM_MC_REF_GREG_U32(pu32Reg, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync IEM_MC_CALL_VOID_AIMPL_2(iemAImpl_xchg_u32, pu32Mem, pu32Reg);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pu32Mem, IEM_ACCESS_DATA_RW);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync IEM_MC_MEM_MAP(pu64Mem, IEM_ACCESS_DATA_RW, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync IEM_MC_REF_GREG_U64(pu64Reg, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync IEM_MC_CALL_VOID_AIMPL_2(iemAImpl_xchg_u64, pu64Mem, pu64Reg);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pu64Mem, IEM_ACCESS_DATA_RW);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x88. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * If rm is denoting a register, no more instruction bytes.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U8(u8Value, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U8((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, u8Value);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * We're writing a register to memory.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U8(u8Value, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_MEM_U8(pIemCpu->iEffSeg, GCPtrEffDst, u8Value);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x89. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * If rm is denoting a register, no more instruction bytes.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U16(u16Value, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U16((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, u16Value);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U32(u32Value, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U32((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, u32Value);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U64(u64Value, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U64((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, u64Value);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * We're writing a register to memory.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U16(u16Value, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_MEM_U16(pIemCpu->iEffSeg, GCPtrEffDst, u16Value);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U32(u32Value, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_MEM_U32(pIemCpu->iEffSeg, GCPtrEffDst, u32Value);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U64(u64Value, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_MEM_U64(pIemCpu->iEffSeg, GCPtrEffDst, u64Value);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x8a. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * If rm is denoting a register, no more instruction bytes.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U8(u8Value, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U8(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u8Value);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * We're loading a register from memory.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_MEM_U8(u8Value, pIemCpu->iEffSeg, GCPtrEffDst);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U8(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u8Value);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x8b. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * If rm is denoting a register, no more instruction bytes.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U16(u16Value, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U16(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u16Value);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U32(u32Value, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U32(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u32Value);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U64(u64Value, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u64Value);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * We're loading a register from memory.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_MEM_U16(u16Value, pIemCpu->iEffSeg, GCPtrEffDst);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U16(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u16Value);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_MEM_U32(u32Value, pIemCpu->iEffSeg, GCPtrEffDst);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U32(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u32Value);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_MEM_U64(u64Value, pIemCpu->iEffSeg, GCPtrEffDst);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u64Value);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x8c. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Check that the destination register exists. The REX.R prefix is ignored.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync uint8_t const iSegReg = ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return IEMOP_RAISE_INVALID_OPCODE(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * If rm is denoting a register, no more instruction bytes.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * In that case, the operand size is respected and the upper bits are
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * cleared (starting with some pentium).
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U16((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, u16Value);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U32((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, u32Value);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U64((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, u64Value);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * We're saving the register to memory. The access is word sized
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * regardless of operand size prefixes.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync#if 0 /* not necessary */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync pIemCpu->enmEffOpSize = pIemCpu->enmDefOpSize = IEMMODE_16BIT;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_MEM_U16(pIemCpu->iEffSeg, GCPtrEffDst, u16Value);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x8d. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return IEMOP_RAISE_INVALID_LOCK_PREFIX(); /* no register form */
ea4433aedd4105e6599e57e0c5f6cb32a68e963cvboxsync IEM_MC_STORE_GREG_U16(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u16Cast);
ea4433aedd4105e6599e57e0c5f6cb32a68e963cvboxsync IEM_MC_STORE_GREG_U32(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u32Cast);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, GCPtrEffSrc);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x8e. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * The practical operand size is 16-bit.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync#if 0 /* not necessary */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync pIemCpu->enmEffOpSize = pIemCpu->enmDefOpSize = IEMMODE_16BIT;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Check that the destination register exists and can be used with this
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * instruction. The REX.R prefix is ignored.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync uint8_t const iSegReg = ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return IEMOP_RAISE_INVALID_OPCODE(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * If rm is denoting a register, no more instruction bytes.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U16(u16Value, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
05216b943fc4c290a399c4b75356ada3e4396fe7vboxsync IEM_MC_CALL_CIMPL_2(iemCImpl_load_SReg, iSRegArg, u16Value);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * We're loading the register from memory. The access is word sized
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * regardless of operand size prefixes.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_MEM_U16(u16Value, pIemCpu->iEffSeg, GCPtrEffDst);
05216b943fc4c290a399c4b75356ada3e4396fe7vboxsync IEM_MC_CALL_CIMPL_2(iemCImpl_load_SReg, iSRegArg, u16Value);
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync/** Opcode 0x8f /0. */
f44d6fa3e2499e24568e13bf478400381a5493b1vboxsync /* This bugger is rather annoying as it requires rSP to be updated before
f44d6fa3e2499e24568e13bf478400381a5493b1vboxsync doing the effective address calculations. Will eventually require a
f44d6fa3e2499e24568e13bf478400381a5493b1vboxsync split between the R/M+SIB decoding and the effective address
f44d6fa3e2499e24568e13bf478400381a5493b1vboxsync calculation - which is something that is required for any attempt at
f44d6fa3e2499e24568e13bf478400381a5493b1vboxsync reusing this code for a recompiler. It may also be good to have if we
f44d6fa3e2499e24568e13bf478400381a5493b1vboxsync need to delay #UD exception caused by invalid lock prefixes.
f44d6fa3e2499e24568e13bf478400381a5493b1vboxsync For now, we'll do a mostly safe interpreter-only implementation here. */
f44d6fa3e2499e24568e13bf478400381a5493b1vboxsync /** @todo What's the deal with the 'reg' field and pop Ev? Ignorning it for
f44d6fa3e2499e24568e13bf478400381a5493b1vboxsync * now until tests show it's checked.. */
f44d6fa3e2499e24568e13bf478400381a5493b1vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
f44d6fa3e2499e24568e13bf478400381a5493b1vboxsync /* Register access is relatively easy and can share code. */
f44d6fa3e2499e24568e13bf478400381a5493b1vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
f44d6fa3e2499e24568e13bf478400381a5493b1vboxsync return FNIEMOP_CALL_1(iemOpCommonPopGReg, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
f44d6fa3e2499e24568e13bf478400381a5493b1vboxsync * Memory target.
f44d6fa3e2499e24568e13bf478400381a5493b1vboxsync * Intel says that RSP is incremented before it's used in any effective
f44d6fa3e2499e24568e13bf478400381a5493b1vboxsync * address calcuations. This means some serious extra annoyance here since
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync * we decode and calculate the effective address in one step and like to
f44d6fa3e2499e24568e13bf478400381a5493b1vboxsync * delay committing registers till everything is done.
f44d6fa3e2499e24568e13bf478400381a5493b1vboxsync * So, we'll decode and calculate the effective address twice. This will
f44d6fa3e2499e24568e13bf478400381a5493b1vboxsync * require some recoding if turned into a recompiler.
f44d6fa3e2499e24568e13bf478400381a5493b1vboxsync IEMOP_HLP_DEFAULT_64BIT_OP_SIZE(); /* The common code does this differently. */
f44d6fa3e2499e24568e13bf478400381a5493b1vboxsync /* Calc effective address with modified ESP. */
f44d6fa3e2499e24568e13bf478400381a5493b1vboxsync rcStrict = iemOpHlpCalcRmEffAddr(pIemCpu, bRm, &GCPtrEff);
f44d6fa3e2499e24568e13bf478400381a5493b1vboxsync case IEMMODE_16BIT: iemRegAddToRsp(pCtx, 2); break;
f44d6fa3e2499e24568e13bf478400381a5493b1vboxsync case IEMMODE_32BIT: iemRegAddToRsp(pCtx, 4); break;
f44d6fa3e2499e24568e13bf478400381a5493b1vboxsync case IEMMODE_64BIT: iemRegAddToRsp(pCtx, 8); break;
f44d6fa3e2499e24568e13bf478400381a5493b1vboxsync rcStrict = iemOpHlpCalcRmEffAddr(pIemCpu, bRm, &GCPtrEff);
f44d6fa3e2499e24568e13bf478400381a5493b1vboxsync /* Perform the operation - this should be CImpl. */
f44d6fa3e2499e24568e13bf478400381a5493b1vboxsync rcStrict = iemMemStackPopU16Ex(pIemCpu, &u16Value, &TmpRsp);
f44d6fa3e2499e24568e13bf478400381a5493b1vboxsync rcStrict = iemMemStoreDataU16(pIemCpu, pIemCpu->iEffSeg, GCPtrEff, u16Value);
f44d6fa3e2499e24568e13bf478400381a5493b1vboxsync rcStrict = iemMemStackPopU32Ex(pIemCpu, &u32Value, &TmpRsp);
f44d6fa3e2499e24568e13bf478400381a5493b1vboxsync rcStrict = iemMemStoreDataU32(pIemCpu, pIemCpu->iEffSeg, GCPtrEff, u32Value);
f44d6fa3e2499e24568e13bf478400381a5493b1vboxsync rcStrict = iemMemStackPopU64Ex(pIemCpu, &u64Value, &TmpRsp);
f44d6fa3e2499e24568e13bf478400381a5493b1vboxsync rcStrict = iemMemStoreDataU16(pIemCpu, pIemCpu->iEffSeg, GCPtrEff, u64Value);
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync/** Opcode 0x8f. */
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync if ((bRm & X86_MODRM_REG_MASK) != (0 << X86_MODRM_REG_SHIFT)) /* only pop Ev in this group. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Common 'xchg reg,rAX' helper.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_DEF_1(iemOpCommonXchgGRegRax, uint8_t, iReg)
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x90. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonXchgGRegRax, X86_GREG_xAX);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x91. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonXchgGRegRax, X86_GREG_xCX);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x92. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonXchgGRegRax, X86_GREG_xDX);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x93. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonXchgGRegRax, X86_GREG_xBX);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x94. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonXchgGRegRax, X86_GREG_xSP);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x95. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonXchgGRegRax, X86_GREG_xBP);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x96. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonXchgGRegRax, X86_GREG_xSI);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x97. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonXchgGRegRax, X86_GREG_xDI);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x98. */
450cd10a4138f0ef40c949455cee0487f53ce26avboxsync IEM_MC_OR_GREG_U16(X86_GREG_xAX, UINT16_C(0xff00));
450cd10a4138f0ef40c949455cee0487f53ce26avboxsync IEM_MC_AND_GREG_U16(X86_GREG_xAX, UINT16_C(0x00ff));
450cd10a4138f0ef40c949455cee0487f53ce26avboxsync IEM_MC_OR_GREG_U32(X86_GREG_xAX, UINT32_C(0xffff0000));
450cd10a4138f0ef40c949455cee0487f53ce26avboxsync IEM_MC_AND_GREG_U32(X86_GREG_xAX, UINT32_C(0x0000ffff));
450cd10a4138f0ef40c949455cee0487f53ce26avboxsync IEM_MC_OR_GREG_U64(X86_GREG_xAX, UINT64_C(0xffffffff00000000));
450cd10a4138f0ef40c949455cee0487f53ce26avboxsync IEM_MC_AND_GREG_U64(X86_GREG_xAX, UINT64_C(0x00000000ffffffff));
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x99. */
ea4433aedd4105e6599e57e0c5f6cb32a68e963cvboxsync IEM_MC_STORE_GREG_U16_CONST(X86_GREG_xDX, UINT16_C(0xffff));
ea4433aedd4105e6599e57e0c5f6cb32a68e963cvboxsync IEM_MC_STORE_GREG_U32_CONST(X86_GREG_xDX, UINT32_C(0xffffffff));
ea4433aedd4105e6599e57e0c5f6cb32a68e963cvboxsync IEM_MC_STORE_GREG_U64_CONST(X86_GREG_xDX, UINT64_C(0xffffffffffffffff));
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x9a. */
7b8020f3bcdad4806ec3c7728d9f688d37fcfdc8vboxsync /* Decode the far pointer address and pass it on to the far call C implementation. */
7b8020f3bcdad4806ec3c7728d9f688d37fcfdc8vboxsync return IEM_MC_DEFER_TO_CIMPL_3(iemCImpl_callf, uSel, offSeg, pIemCpu->enmEffOpSize);
d4a8f6749f70bad88edc04de808643d372faa35avboxsync/** Opcode 0x9b. (aka fwait) */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x9c. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_pushf, pIemCpu->enmEffOpSize);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x9d. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_popf, pIemCpu->enmEffOpSize);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x9e. */
24986763e9e9e6633a4a54479be945d577fdfd34vboxsync && !IEM_IS_AMD_CPUID_FEATURE_PRESENT_ECX(X86_CPUID_EXT_FEATURE_ECX_LAHF_SAHF))
a503c3ae609c4935aacdecebd3eefcf8e84d306dvboxsync IEM_MC_FETCH_GREG_U8_ZX_U32(u32Flags, X86_GREG_xSP/*=AH*/);
8b148a9b18f1df43970276614ab624e85d42f156vboxsync IEM_MC_AND_LOCAL_U32(u32Flags, X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF | X86_EFL_CF);
a503c3ae609c4935aacdecebd3eefcf8e84d306dvboxsync IEM_MC_AND_LOCAL_U32(EFlags, UINT32_C(0xffffff00));
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x9f. */
24986763e9e9e6633a4a54479be945d577fdfd34vboxsync && !IEM_IS_AMD_CPUID_FEATURE_PRESENT_ECX(X86_CPUID_EXT_FEATURE_ECX_LAHF_SAHF))
a503c3ae609c4935aacdecebd3eefcf8e84d306dvboxsync IEM_MC_STORE_GREG_U8(X86_GREG_xSP/*=AH*/, u8Flags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Macro used by iemOp_mov_Al_Ob, iemOp_mov_rAX_Ov, iemOp_mov_Ob_AL and
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * iemOp_mov_Ov_rAX to fetch the moffsXX bit of the opcode and fend of lock
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * prefixes. Will return on failures.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * @param a_GCPtrMemOff The variable to store the offset in.
37fd636275891bcf75bd60c624d8fbf3f262c435vboxsync IEM_OPCODE_GET_NEXT_U16_ZX_U64(&(a_GCPtrMemOff)); \
37fd636275891bcf75bd60c624d8fbf3f262c435vboxsync IEM_OPCODE_GET_NEXT_U32_ZX_U64(&(a_GCPtrMemOff)); \
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync } while (0)
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xa0. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Get the offset and fend of lock prefixes.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Fetch AL.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_MEM_U8(u8Tmp, pIemCpu->iEffSeg, GCPtrMemOff);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xa1. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Get the offset and fend of lock prefixes.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Fetch rAX.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_MEM_U16(u16Tmp, pIemCpu->iEffSeg, GCPtrMemOff);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_MEM_U32(u32Tmp, pIemCpu->iEffSeg, GCPtrMemOff);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_MEM_U64(u64Tmp, pIemCpu->iEffSeg, GCPtrMemOff);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xa2. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Get the offset and fend of lock prefixes.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Store AL.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_MEM_U8(pIemCpu->iEffSeg, GCPtrMemOff, u8Tmp);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xa3. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Get the offset and fend of lock prefixes.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Store rAX.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_MEM_U16(pIemCpu->iEffSeg, GCPtrMemOff, u16Tmp);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_MEM_U32(pIemCpu->iEffSeg, GCPtrMemOff, u32Tmp);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_MEM_U64(pIemCpu->iEffSeg, GCPtrMemOff, u64Tmp);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Macro used by iemOp_movsb_Xb_Yb and iemOp_movswd_Xv_Yv */
1eab329ce9690ad59fd3ecbd826c94baf6d7f9fevboxsync IEM_MC_FETCH_GREG_U##AddrBits##_ZX_U64(uAddr, X86_GREG_xSI); \
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_MEM_U##ValBits(uValue, pIemCpu->iEffSeg, uAddr); \
1eab329ce9690ad59fd3ecbd826c94baf6d7f9fevboxsync IEM_MC_FETCH_GREG_U##AddrBits##_ZX_U64(uAddr, X86_GREG_xDI); \
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_MEM_U##ValBits(X86_SREG_ES, uAddr, uValue); \
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_SUB_GREG_U##AddrBits(X86_GREG_xDI, ValBits / 8); \
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_SUB_GREG_U##AddrBits(X86_GREG_xSI, ValBits / 8); \
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_ADD_GREG_U##AddrBits(X86_GREG_xDI, ValBits / 8); \
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_ADD_GREG_U##AddrBits(X86_GREG_xSI, ValBits / 8); \
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xa4. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync * Use the C implementation if a repeat prefix is encountered.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if (pIemCpu->fPrefixes & (IEM_OP_PRF_REPNZ | IEM_OP_PRF_REPZ))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_16BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_rep_movs_op8_addr16, pIemCpu->iEffSeg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_rep_movs_op8_addr32, pIemCpu->iEffSeg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_rep_movs_op8_addr64, pIemCpu->iEffSeg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Sharing case implementation with movs[wdq] below.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xa5. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync * Use the C implementation if a repeat prefix is encountered.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if (pIemCpu->fPrefixes & (IEM_OP_PRF_REPNZ | IEM_OP_PRF_REPZ))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_16BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_rep_movs_op16_addr16, pIemCpu->iEffSeg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_rep_movs_op16_addr32, pIemCpu->iEffSeg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_rep_movs_op16_addr64, pIemCpu->iEffSeg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_16BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_rep_movs_op32_addr16, pIemCpu->iEffSeg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_rep_movs_op32_addr32, pIemCpu->iEffSeg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_rep_movs_op32_addr64, pIemCpu->iEffSeg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_16BIT: AssertFailedReturn(VERR_INTERNAL_ERROR_3);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_rep_movs_op64_addr32, pIemCpu->iEffSeg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_rep_movs_op64_addr64, pIemCpu->iEffSeg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Annoying double switch here.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Using ugly macro for implementing the cases, sharing it with movsb.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_16BIT: AssertFailedReturn(VERR_INTERNAL_ERROR_4); /* cannot be encoded */ break;
b1e4667c5a9588bd509d569ce252127891b44923vboxsync/** Macro used by iemOp_cmpsb_Xb_Yb and iemOp_cmpswd_Xv_Yv */
1eab329ce9690ad59fd3ecbd826c94baf6d7f9fevboxsync IEM_MC_FETCH_GREG_U##AddrBits##_ZX_U64(uAddr, X86_GREG_xSI); \
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_FETCH_MEM_U##ValBits(uValue1, pIemCpu->iEffSeg, uAddr); \
1eab329ce9690ad59fd3ecbd826c94baf6d7f9fevboxsync IEM_MC_FETCH_GREG_U##AddrBits##_ZX_U64(uAddr, X86_GREG_xDI); \
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_FETCH_MEM_U##ValBits(uValue2, X86_SREG_ES, uAddr); \
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_cmp_u##ValBits, puValue1, uValue2, pEFlags); \
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_SUB_GREG_U##AddrBits(X86_GREG_xDI, ValBits / 8); \
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_SUB_GREG_U##AddrBits(X86_GREG_xSI, ValBits / 8); \
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_ADD_GREG_U##AddrBits(X86_GREG_xDI, ValBits / 8); \
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_ADD_GREG_U##AddrBits(X86_GREG_xSI, ValBits / 8); \
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xa6. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync * Use the C implementation if a repeat prefix is encountered.
b1e4667c5a9588bd509d569ce252127891b44923vboxsync case IEMMODE_16BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_repe_cmps_op8_addr16, pIemCpu->iEffSeg);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_repe_cmps_op8_addr32, pIemCpu->iEffSeg);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_repe_cmps_op8_addr64, pIemCpu->iEffSeg);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync case IEMMODE_16BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_repne_cmps_op8_addr16, pIemCpu->iEffSeg);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_repne_cmps_op8_addr32, pIemCpu->iEffSeg);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_repne_cmps_op8_addr64, pIemCpu->iEffSeg);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync * Sharing case implementation with cmps[wdq] below.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xa7. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync * Use the C implementation if a repeat prefix is encountered.
b1e4667c5a9588bd509d569ce252127891b44923vboxsync case IEMMODE_16BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_repe_cmps_op16_addr16, pIemCpu->iEffSeg);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_repe_cmps_op16_addr32, pIemCpu->iEffSeg);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_repe_cmps_op16_addr64, pIemCpu->iEffSeg);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync case IEMMODE_16BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_repe_cmps_op32_addr16, pIemCpu->iEffSeg);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_repe_cmps_op32_addr32, pIemCpu->iEffSeg);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_repe_cmps_op32_addr64, pIemCpu->iEffSeg);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync case IEMMODE_16BIT: AssertFailedReturn(VERR_INTERNAL_ERROR_3);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_repe_cmps_op64_addr32, pIemCpu->iEffSeg);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_repe_cmps_op64_addr64, pIemCpu->iEffSeg);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync case IEMMODE_16BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_repne_cmps_op16_addr16, pIemCpu->iEffSeg);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_repne_cmps_op16_addr32, pIemCpu->iEffSeg);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_repne_cmps_op16_addr64, pIemCpu->iEffSeg);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync case IEMMODE_16BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_repne_cmps_op32_addr16, pIemCpu->iEffSeg);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_repne_cmps_op32_addr32, pIemCpu->iEffSeg);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_repne_cmps_op32_addr64, pIemCpu->iEffSeg);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync case IEMMODE_16BIT: AssertFailedReturn(VERR_INTERNAL_ERROR_3);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_repne_cmps_op64_addr32, pIemCpu->iEffSeg);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_repne_cmps_op64_addr64, pIemCpu->iEffSeg);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync * Annoying double switch here.
b1e4667c5a9588bd509d569ce252127891b44923vboxsync * Using ugly macro for implementing the cases, sharing it with cmpsb.
b1e4667c5a9588bd509d569ce252127891b44923vboxsync case IEMMODE_16BIT: AssertFailedReturn(VERR_INTERNAL_ERROR_4); /* cannot be encoded */ break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xa8. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_AL_Ib, &g_iemAImpl_test);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xa9. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rAX_Iz, &g_iemAImpl_test);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Macro used by iemOp_stosb_Yb_AL and iemOp_stoswd_Yv_eAX */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U##ValBits(uValue, X86_GREG_xAX); \
1eab329ce9690ad59fd3ecbd826c94baf6d7f9fevboxsync IEM_MC_FETCH_GREG_U##AddrBits##_ZX_U64(uAddr, X86_GREG_xDI); \
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_MEM_U##ValBits(X86_SREG_ES, uAddr, uValue); \
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_SUB_GREG_U##AddrBits(X86_GREG_xDI, ValBits / 8); \
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_ADD_GREG_U##AddrBits(X86_GREG_xDI, ValBits / 8); \
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xaa. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync * Use the C implementation if a repeat prefix is encountered.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if (pIemCpu->fPrefixes & (IEM_OP_PRF_REPNZ | IEM_OP_PRF_REPZ))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_16BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_stos_al_m16);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_stos_al_m32);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_stos_al_m64);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Sharing case implementation with stos[wdq] below.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xab. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync * Use the C implementation if a repeat prefix is encountered.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if (pIemCpu->fPrefixes & (IEM_OP_PRF_REPNZ | IEM_OP_PRF_REPZ))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_16BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_stos_ax_m16);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_stos_ax_m32);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_stos_ax_m64);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_16BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_stos_eax_m16);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_stos_eax_m32);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_stos_eax_m64);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_16BIT: AssertFailedReturn(VERR_INTERNAL_ERROR_3);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_stos_rax_m32);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_stos_rax_m64);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Annoying double switch here.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Using ugly macro for implementing the cases, sharing it with stosb.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_16BIT: AssertFailedReturn(VERR_INTERNAL_ERROR_4); /* cannot be encoded */ break;
e41f0459369a6d814aa36bf4def225482fc56026vboxsync/** Macro used by iemOp_lodsb_AL_Xb and iemOp_lodswd_eAX_Xv */
1eab329ce9690ad59fd3ecbd826c94baf6d7f9fevboxsync IEM_MC_FETCH_GREG_U##AddrBits##_ZX_U64(uAddr, X86_GREG_xSI); \
e41f0459369a6d814aa36bf4def225482fc56026vboxsync IEM_MC_FETCH_MEM_U##ValBits(uValue, pIemCpu->iEffSeg, uAddr); \
e41f0459369a6d814aa36bf4def225482fc56026vboxsync IEM_MC_STORE_GREG_U##ValBits(X86_GREG_xAX, uValue); \
e41f0459369a6d814aa36bf4def225482fc56026vboxsync IEM_MC_SUB_GREG_U##AddrBits(X86_GREG_xSI, ValBits / 8); \
e41f0459369a6d814aa36bf4def225482fc56026vboxsync IEM_MC_ADD_GREG_U##AddrBits(X86_GREG_xSI, ValBits / 8); \
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xac. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync * Use the C implementation if a repeat prefix is encountered.
e41f0459369a6d814aa36bf4def225482fc56026vboxsync if (pIemCpu->fPrefixes & (IEM_OP_PRF_REPNZ | IEM_OP_PRF_REPZ))
e41f0459369a6d814aa36bf4def225482fc56026vboxsync case IEMMODE_16BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_lods_al_m16, pIemCpu->iEffSeg);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_lods_al_m32, pIemCpu->iEffSeg);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_lods_al_m64, pIemCpu->iEffSeg);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync * Sharing case implementation with stos[wdq] below.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xad. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync * Use the C implementation if a repeat prefix is encountered.
e41f0459369a6d814aa36bf4def225482fc56026vboxsync if (pIemCpu->fPrefixes & (IEM_OP_PRF_REPNZ | IEM_OP_PRF_REPZ))
e41f0459369a6d814aa36bf4def225482fc56026vboxsync case IEMMODE_16BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_lods_ax_m16, pIemCpu->iEffSeg);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_lods_ax_m32, pIemCpu->iEffSeg);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_lods_ax_m64, pIemCpu->iEffSeg);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync case IEMMODE_16BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_lods_eax_m16, pIemCpu->iEffSeg);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_lods_eax_m32, pIemCpu->iEffSeg);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_lods_eax_m64, pIemCpu->iEffSeg);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync case IEMMODE_16BIT: AssertFailedReturn(VERR_INTERNAL_ERROR_3);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_lods_rax_m32, pIemCpu->iEffSeg);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_lods_rax_m64, pIemCpu->iEffSeg);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync * Annoying double switch here.
e41f0459369a6d814aa36bf4def225482fc56026vboxsync * Using ugly macro for implementing the cases, sharing it with lodsb.
e41f0459369a6d814aa36bf4def225482fc56026vboxsync case IEMMODE_16BIT: AssertFailedReturn(VERR_INTERNAL_ERROR_4); /* cannot be encoded */ break;
b1e4667c5a9588bd509d569ce252127891b44923vboxsync/** Macro used by iemOp_scasb_AL_Xb and iemOp_scaswd_eAX_Xv */
1eab329ce9690ad59fd3ecbd826c94baf6d7f9fevboxsync IEM_MC_FETCH_GREG_U##AddrBits##_ZX_U64(uAddr, X86_GREG_xDI); \
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_FETCH_MEM_U##ValBits(uValue, X86_SREG_ES, uAddr); \
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_cmp_u##ValBits, puRax, uValue, pEFlags); \
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_SUB_GREG_U##AddrBits(X86_GREG_xDI, ValBits / 8); \
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_ADD_GREG_U##AddrBits(X86_GREG_xDI, ValBits / 8); \
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xae. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync * Use the C implementation if a repeat prefix is encountered.
b1e4667c5a9588bd509d569ce252127891b44923vboxsync case IEMMODE_16BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_repe_scas_al_m16);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_repe_scas_al_m32);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_repe_scas_al_m64);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync case IEMMODE_16BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_repne_scas_al_m16);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_repne_scas_al_m32);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_repne_scas_al_m64);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync * Sharing case implementation with stos[wdq] below.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xaf. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync * Use the C implementation if a repeat prefix is encountered.
b1e4667c5a9588bd509d569ce252127891b44923vboxsync case IEMMODE_16BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_repe_scas_ax_m16);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_repe_scas_ax_m32);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_repe_scas_ax_m64);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync case IEMMODE_16BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_repe_scas_eax_m16);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_repe_scas_eax_m32);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_repe_scas_eax_m64);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync case IEMMODE_16BIT: AssertFailedReturn(VERR_INTERNAL_ERROR_3); /** @todo It's this wrong, we can do 16-bit addressing in 64-bit mode, but not 32-bit. right? */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_repe_scas_rax_m32);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_repe_scas_rax_m64);
4edc278439db2c83a5a59a104ec85e379d4c07dfvboxsync case IEMMODE_16BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_repne_scas_ax_m16);
4edc278439db2c83a5a59a104ec85e379d4c07dfvboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_repne_scas_ax_m32);
4edc278439db2c83a5a59a104ec85e379d4c07dfvboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_repne_scas_ax_m64);
4edc278439db2c83a5a59a104ec85e379d4c07dfvboxsync case IEMMODE_16BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_repne_scas_eax_m16);
4edc278439db2c83a5a59a104ec85e379d4c07dfvboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_repne_scas_eax_m32);
4edc278439db2c83a5a59a104ec85e379d4c07dfvboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_repne_scas_eax_m64);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync case IEMMODE_16BIT: AssertFailedReturn(VERR_INTERNAL_ERROR_3);
4edc278439db2c83a5a59a104ec85e379d4c07dfvboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_repne_scas_rax_m32);
4edc278439db2c83a5a59a104ec85e379d4c07dfvboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_repne_scas_rax_m64);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync * Annoying double switch here.
b1e4667c5a9588bd509d569ce252127891b44923vboxsync * Using ugly macro for implementing the cases, sharing it with scasb.
b1e4667c5a9588bd509d569ce252127891b44923vboxsync case IEMMODE_16BIT: AssertFailedReturn(VERR_INTERNAL_ERROR_4); /* cannot be encoded */ break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Common 'mov r8, imm8' helper.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xb0. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonMov_r8_Ib, X86_GREG_xAX);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xb1. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonMov_r8_Ib, X86_GREG_xCX);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xb2. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonMov_r8_Ib, X86_GREG_xDX);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xb3. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonMov_r8_Ib, X86_GREG_xBX);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xb4. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonMov_r8_Ib, X86_GREG_xSP);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xb5. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonMov_r8_Ib, X86_GREG_xBP);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xb6. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonMov_r8_Ib, X86_GREG_xSI);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xb7. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonMov_r8_Ib, X86_GREG_xDI);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Common 'mov regX,immX' helper.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_LOCAL_CONST(uint16_t, u16Value,/*=*/ u16Imm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_LOCAL_CONST(uint32_t, u32Value,/*=*/ u32Imm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_LOCAL_CONST(uint64_t, u64Value,/*=*/ u64Imm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xb8. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonMov_Rv_Iv, X86_GREG_xAX);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xb9. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonMov_Rv_Iv, X86_GREG_xCX);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xba. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonMov_Rv_Iv, X86_GREG_xDX);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xbb. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonMov_Rv_Iv, X86_GREG_xBX);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xbc. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonMov_Rv_Iv, X86_GREG_xSP);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xbd. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonMov_Rv_Iv, X86_GREG_xBP);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xbe. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonMov_Rv_Iv, X86_GREG_xSI);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xbf. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonMov_Rv_Iv, X86_GREG_xDI);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xc0. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 0: pImpl = &g_iemAImpl_rol; IEMOP_MNEMONIC("rol Eb,Ib"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 1: pImpl = &g_iemAImpl_ror; IEMOP_MNEMONIC("ror Eb,Ib"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 2: pImpl = &g_iemAImpl_rcl; IEMOP_MNEMONIC("rcl Eb,Ib"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 3: pImpl = &g_iemAImpl_rcr; IEMOP_MNEMONIC("rcr Eb,Ib"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 4: pImpl = &g_iemAImpl_shl; IEMOP_MNEMONIC("shl Eb,Ib"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 5: pImpl = &g_iemAImpl_shr; IEMOP_MNEMONIC("shr Eb,Ib"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 7: pImpl = &g_iemAImpl_sar; IEMOP_MNEMONIC("sar Eb,Ib"); break;
c32de3017eee1c2fa8eb76c3bae4c178571fac42vboxsync IEM_NOT_REACHED_DEFAULT_CASE_RET(); /* gcc maybe stupid */
b64efece437bfca8872b81be9d0568ba90389d91vboxsync IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_OF | X86_EFL_AF);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* register */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U8(pu8Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU8, pu8Dst, cShiftArg, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* memory */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_MAP(pu8Dst, IEM_ACCESS_DATA_RW, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU8, pu8Dst, cShiftArg, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pu8Dst, IEM_ACCESS_DATA_RW);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xc1. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 0: pImpl = &g_iemAImpl_rol; IEMOP_MNEMONIC("rol Ev,Ib"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 1: pImpl = &g_iemAImpl_ror; IEMOP_MNEMONIC("ror Ev,Ib"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 2: pImpl = &g_iemAImpl_rcl; IEMOP_MNEMONIC("rcl Ev,Ib"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 3: pImpl = &g_iemAImpl_rcr; IEMOP_MNEMONIC("rcr Ev,Ib"); break;
064e87232010cd1a6a7e554428a5ba8053e96612vboxsync case 4: pImpl = &g_iemAImpl_shl; IEMOP_MNEMONIC("shl Ev,Ib"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 5: pImpl = &g_iemAImpl_shr; IEMOP_MNEMONIC("shr Ev,Ib"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 7: pImpl = &g_iemAImpl_sar; IEMOP_MNEMONIC("sar Ev,Ib"); break;
c32de3017eee1c2fa8eb76c3bae4c178571fac42vboxsync IEM_NOT_REACHED_DEFAULT_CASE_RET(); /* gcc maybe stupid */
b64efece437bfca8872b81be9d0568ba90389d91vboxsync IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_OF | X86_EFL_AF);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* register */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U16(pu16Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU16, pu16Dst, cShiftArg, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U32(pu32Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU32, pu32Dst, cShiftArg, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U64(pu64Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU64, pu64Dst, cShiftArg, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* memory */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_MAP(pu16Dst, IEM_ACCESS_DATA_RW, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU16, pu16Dst, cShiftArg, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pu16Dst, IEM_ACCESS_DATA_RW);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_MAP(pu32Dst, IEM_ACCESS_DATA_RW, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU32, pu32Dst, cShiftArg, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pu32Dst, IEM_ACCESS_DATA_RW);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_MAP(pu64Dst, IEM_ACCESS_DATA_RW, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU64, pu64Dst, cShiftArg, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pu64Dst, IEM_ACCESS_DATA_RW);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xc2. */
6e9b663a1ac9b2adc21436da50bf52d56c8950b7vboxsync return IEM_MC_DEFER_TO_CIMPL_2(iemCImpl_retn, pIemCpu->enmEffOpSize, u16Imm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xc3. */
6e9b663a1ac9b2adc21436da50bf52d56c8950b7vboxsync return IEM_MC_DEFER_TO_CIMPL_2(iemCImpl_retn, pIemCpu->enmEffOpSize, 0);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xc4. */
e41f0459369a6d814aa36bf4def225482fc56026vboxsync return FNIEMOP_CALL_1(iemOpCommonLoadSRegAndGreg, X86_SREG_ES);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xc5. */
e41f0459369a6d814aa36bf4def225482fc56026vboxsync return FNIEMOP_CALL_1(iemOpCommonLoadSRegAndGreg, X86_SREG_DS);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xc6. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_REG_MASK) != (0 << X86_MODRM_REG_SHIFT)) /* only mov Eb,Ib in this group. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* register access */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U8((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, u8Imm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* memory access. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_MEM_U8(pIemCpu->iEffSeg, GCPtrEffDst, u8Imm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xc7. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_REG_MASK) != (0 << X86_MODRM_REG_SHIFT)) /* only mov Eb,Ib in this group. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* register access */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U16((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, u16Imm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U32((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, u32Imm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U64((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, u64Imm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* memory access. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_MEM_U16(pIemCpu->iEffSeg, GCPtrEffDst, u16Imm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_MEM_U32(pIemCpu->iEffSeg, GCPtrEffDst, u32Imm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_MEM_U64(pIemCpu->iEffSeg, GCPtrEffDst, u64Imm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xc8. */
a16f9305ee0f4dd7723fc312b091ac7705dba237vboxsync uint16_t cbFrame; IEM_OPCODE_GET_NEXT_U16(&cbFrame);
a16f9305ee0f4dd7723fc312b091ac7705dba237vboxsync uint8_t u8NestingLevel; IEM_OPCODE_GET_NEXT_U8(&u8NestingLevel);
a16f9305ee0f4dd7723fc312b091ac7705dba237vboxsync return IEM_MC_DEFER_TO_CIMPL_3(iemCImpl_enter, pIemCpu->enmEffOpSize, cbFrame, u8NestingLevel);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xc9. */
b64efece437bfca8872b81be9d0568ba90389d91vboxsync return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_leave, pIemCpu->enmEffOpSize);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xca. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return IEM_MC_DEFER_TO_CIMPL_2(iemCImpl_retf, pIemCpu->enmEffOpSize, u16Imm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xcb. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return IEM_MC_DEFER_TO_CIMPL_2(iemCImpl_retf, pIemCpu->enmEffOpSize, 0);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xcc. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return IEM_MC_DEFER_TO_CIMPL_2(iemCImpl_int, X86_XCPT_BP, true /*fIsBpInstr*/);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xcd. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return IEM_MC_DEFER_TO_CIMPL_2(iemCImpl_int, u8Int, false /*fIsBpInstr*/);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xce. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_ARG_CONST(uint8_t, u8Int, /*=*/ X86_XCPT_OF, 0);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_ARG_CONST(bool, fIsBpInstr, /*=*/ false, 1);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_CIMPL_2(iemCImpl_int, u8Int, fIsBpInstr);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xcf. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_iret, pIemCpu->enmEffOpSize);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xd0. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 0: pImpl = &g_iemAImpl_rol; IEMOP_MNEMONIC("rol Eb,1"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 1: pImpl = &g_iemAImpl_ror; IEMOP_MNEMONIC("ror Eb,1"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 2: pImpl = &g_iemAImpl_rcl; IEMOP_MNEMONIC("rcl Eb,1"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 3: pImpl = &g_iemAImpl_rcr; IEMOP_MNEMONIC("rcr Eb,1"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 4: pImpl = &g_iemAImpl_shl; IEMOP_MNEMONIC("shl Eb,1"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 5: pImpl = &g_iemAImpl_shr; IEMOP_MNEMONIC("shr Eb,1"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 7: pImpl = &g_iemAImpl_sar; IEMOP_MNEMONIC("sar Eb,1"); break;
c32de3017eee1c2fa8eb76c3bae4c178571fac42vboxsync IEM_NOT_REACHED_DEFAULT_CASE_RET(); /* gcc maybe, well... */
b64efece437bfca8872b81be9d0568ba90389d91vboxsync IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_OF | X86_EFL_AF);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* register */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U8(pu8Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU8, pu8Dst, cShiftArg, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* memory */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_MAP(pu8Dst, IEM_ACCESS_DATA_RW, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU8, pu8Dst, cShiftArg, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pu8Dst, IEM_ACCESS_DATA_RW);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xd1. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 0: pImpl = &g_iemAImpl_rol; IEMOP_MNEMONIC("rol Ev,1"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 1: pImpl = &g_iemAImpl_ror; IEMOP_MNEMONIC("ror Ev,1"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 2: pImpl = &g_iemAImpl_rcl; IEMOP_MNEMONIC("rcl Ev,1"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 3: pImpl = &g_iemAImpl_rcr; IEMOP_MNEMONIC("rcr Ev,1"); break;
064e87232010cd1a6a7e554428a5ba8053e96612vboxsync case 4: pImpl = &g_iemAImpl_shl; IEMOP_MNEMONIC("shl Ev,1"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 5: pImpl = &g_iemAImpl_shr; IEMOP_MNEMONIC("shr Ev,1"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 7: pImpl = &g_iemAImpl_sar; IEMOP_MNEMONIC("sar Ev,1"); break;
c32de3017eee1c2fa8eb76c3bae4c178571fac42vboxsync IEM_NOT_REACHED_DEFAULT_CASE_RET(); /* gcc maybe, well... */
b64efece437bfca8872b81be9d0568ba90389d91vboxsync IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_OF | X86_EFL_AF);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* register */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U16(pu16Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU16, pu16Dst, cShiftArg, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U32(pu32Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU32, pu32Dst, cShiftArg, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U64(pu64Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU64, pu64Dst, cShiftArg, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* memory */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_MAP(pu16Dst, IEM_ACCESS_DATA_RW, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU16, pu16Dst, cShiftArg, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pu16Dst, IEM_ACCESS_DATA_RW);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_MAP(pu32Dst, IEM_ACCESS_DATA_RW, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU32, pu32Dst, cShiftArg, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pu32Dst, IEM_ACCESS_DATA_RW);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_MAP(pu64Dst, IEM_ACCESS_DATA_RW, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU64, pu64Dst, cShiftArg, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pu64Dst, IEM_ACCESS_DATA_RW);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xd2. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 0: pImpl = &g_iemAImpl_rol; IEMOP_MNEMONIC("rol Eb,CL"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 1: pImpl = &g_iemAImpl_ror; IEMOP_MNEMONIC("ror Eb,CL"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 2: pImpl = &g_iemAImpl_rcl; IEMOP_MNEMONIC("rcl Eb,CL"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 3: pImpl = &g_iemAImpl_rcr; IEMOP_MNEMONIC("rcr Eb,CL"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 4: pImpl = &g_iemAImpl_shl; IEMOP_MNEMONIC("shl Eb,CL"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 5: pImpl = &g_iemAImpl_shr; IEMOP_MNEMONIC("shr Eb,CL"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 7: pImpl = &g_iemAImpl_sar; IEMOP_MNEMONIC("sar Eb,CL"); break;
c32de3017eee1c2fa8eb76c3bae4c178571fac42vboxsync IEM_NOT_REACHED_DEFAULT_CASE_RET(); /* gcc, grr. */
b64efece437bfca8872b81be9d0568ba90389d91vboxsync IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_OF | X86_EFL_AF);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* register */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U8(pu8Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU8, pu8Dst, cShiftArg, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* memory */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_MAP(pu8Dst, IEM_ACCESS_DATA_RW, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU8, pu8Dst, cShiftArg, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pu8Dst, IEM_ACCESS_DATA_RW);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xd3. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 0: pImpl = &g_iemAImpl_rol; IEMOP_MNEMONIC("rol Ev,CL"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 1: pImpl = &g_iemAImpl_ror; IEMOP_MNEMONIC("ror Ev,CL"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 2: pImpl = &g_iemAImpl_rcl; IEMOP_MNEMONIC("rcl Ev,CL"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 3: pImpl = &g_iemAImpl_rcr; IEMOP_MNEMONIC("rcr Ev,CL"); break;
064e87232010cd1a6a7e554428a5ba8053e96612vboxsync case 4: pImpl = &g_iemAImpl_shl; IEMOP_MNEMONIC("shl Ev,CL"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 5: pImpl = &g_iemAImpl_shr; IEMOP_MNEMONIC("shr Ev,CL"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 7: pImpl = &g_iemAImpl_sar; IEMOP_MNEMONIC("sar Ev,CL"); break;
cffe630ad33a6b15d6b533c0fa642723e8c90908vboxsync IEM_NOT_REACHED_DEFAULT_CASE_RET(); /* gcc maybe stupid */
b64efece437bfca8872b81be9d0568ba90389d91vboxsync IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_OF | X86_EFL_AF);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* register */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U16(pu16Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU16, pu16Dst, cShiftArg, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U32(pu32Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU32, pu32Dst, cShiftArg, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U64(pu64Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU64, pu64Dst, cShiftArg, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* memory */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_MAP(pu16Dst, IEM_ACCESS_DATA_RW, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU16, pu16Dst, cShiftArg, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pu16Dst, IEM_ACCESS_DATA_RW);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_MAP(pu32Dst, IEM_ACCESS_DATA_RW, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU32, pu32Dst, cShiftArg, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pu32Dst, IEM_ACCESS_DATA_RW);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_MAP(pu64Dst, IEM_ACCESS_DATA_RW, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU64, pu64Dst, cShiftArg, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pu64Dst, IEM_ACCESS_DATA_RW);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xd4. */
4dcdc5639c686efea425976e25a274602450c6c4vboxsync return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_aam, bImm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xd5. */
e28cf5340505fcf342ca7a8d86f5dfec2d152c40vboxsync return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_aad, bImm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xd7. */
26dcae93046505a1d6a46ae2974f5c4e7aebf37fvboxsync IEM_MC_FETCH_GREG_U8_ZX_U16(u16Addr, X86_GREG_xAX);
26dcae93046505a1d6a46ae2974f5c4e7aebf37fvboxsync IEM_MC_ADD_GREG_U16_TO_LOCAL(u16Addr, X86_GREG_xBX);
c2f73fbf271131906a68f2583f744fe791dd0f11vboxsync IEM_MC_FETCH_MEM16_U8(u8Tmp, pIemCpu->iEffSeg, u16Addr);
26dcae93046505a1d6a46ae2974f5c4e7aebf37fvboxsync IEM_MC_FETCH_GREG_U8_ZX_U32(u32Addr, X86_GREG_xAX);
26dcae93046505a1d6a46ae2974f5c4e7aebf37fvboxsync IEM_MC_ADD_GREG_U32_TO_LOCAL(u32Addr, X86_GREG_xBX);
c2f73fbf271131906a68f2583f744fe791dd0f11vboxsync IEM_MC_FETCH_MEM32_U8(u8Tmp, pIemCpu->iEffSeg, u32Addr);
26dcae93046505a1d6a46ae2974f5c4e7aebf37fvboxsync IEM_MC_FETCH_GREG_U8_ZX_U64(u64Addr, X86_GREG_xAX);
26dcae93046505a1d6a46ae2974f5c4e7aebf37fvboxsync IEM_MC_ADD_GREG_U64_TO_LOCAL(u64Addr, X86_GREG_xBX);
26dcae93046505a1d6a46ae2974f5c4e7aebf37fvboxsync IEM_MC_FETCH_MEM_U8(u8Tmp, pIemCpu->iEffSeg, u64Addr);
ce1318f291ab810c19aa03ce38d6a87679ba3af7vboxsync * Common worker for FPU instructions working on ST0 and STn, and storing the
ce1318f291ab810c19aa03ce38d6a87679ba3af7vboxsync * result in ST0.
ce1318f291ab810c19aa03ce38d6a87679ba3af7vboxsync * @param pfnAImpl Pointer to the instruction implementation (assembly).
ce1318f291ab810c19aa03ce38d6a87679ba3af7vboxsyncFNIEMOP_DEF_2(iemOpHlpFpu_st0_stN, uint8_t, bRm, PFNIEMAIMPLFPUR80, pfnAImpl)
ce1318f291ab810c19aa03ce38d6a87679ba3af7vboxsync IEM_MC_ARG_LOCAL_REF(PIEMFPURESULT, pFpuRes, FpuRes, 0);
ce1318f291ab810c19aa03ce38d6a87679ba3af7vboxsync IEM_MC_IF_TWO_FPUREGS_NOT_EMPTY_REF_R80(pr80Value1, 0, pr80Value2, bRm & X86_MODRM_RM_MASK)
ce1318f291ab810c19aa03ce38d6a87679ba3af7vboxsync IEM_MC_CALL_FPU_AIMPL_3(pfnAImpl, pFpuRes, pr80Value1, pr80Value2);
5ca366bb4004d8335376abb1718d1cb9beedf4efvboxsync * Common worker for FPU instructions working on ST0 and STn, and only affecting
5ca366bb4004d8335376abb1718d1cb9beedf4efvboxsync * @param pfnAImpl Pointer to the instruction implementation (assembly).
5ca366bb4004d8335376abb1718d1cb9beedf4efvboxsyncFNIEMOP_DEF_2(iemOpHlpFpuNoStore_st0_stN, uint8_t, bRm, PFNIEMAIMPLFPUR80FSW, pfnAImpl)
44e92d62784be5a0b1410eb28c248a4603bbed40vboxsync IEM_MC_ARG_LOCAL_REF(uint16_t *, pu16Fsw, u16Fsw, 0);
5ca366bb4004d8335376abb1718d1cb9beedf4efvboxsync IEM_MC_IF_TWO_FPUREGS_NOT_EMPTY_REF_R80(pr80Value1, 0, pr80Value2, bRm & X86_MODRM_RM_MASK)
44e92d62784be5a0b1410eb28c248a4603bbed40vboxsync IEM_MC_CALL_FPU_AIMPL_3(pfnAImpl, pu16Fsw, pr80Value1, pr80Value2);
5ca366bb4004d8335376abb1718d1cb9beedf4efvboxsync * Common worker for FPU instructions working on ST0 and STn, only affecting
5ca366bb4004d8335376abb1718d1cb9beedf4efvboxsync * flags, and popping when done.
5ca366bb4004d8335376abb1718d1cb9beedf4efvboxsync * @param pfnAImpl Pointer to the instruction implementation (assembly).
5ca366bb4004d8335376abb1718d1cb9beedf4efvboxsyncFNIEMOP_DEF_2(iemOpHlpFpuNoStore_st0_stN_pop, uint8_t, bRm, PFNIEMAIMPLFPUR80FSW, pfnAImpl)
44e92d62784be5a0b1410eb28c248a4603bbed40vboxsync IEM_MC_ARG_LOCAL_REF(uint16_t *, pu16Fsw, u16Fsw, 0);
5ca366bb4004d8335376abb1718d1cb9beedf4efvboxsync IEM_MC_IF_TWO_FPUREGS_NOT_EMPTY_REF_R80(pr80Value1, 0, pr80Value2, bRm & X86_MODRM_RM_MASK)
44e92d62784be5a0b1410eb28c248a4603bbed40vboxsync IEM_MC_CALL_FPU_AIMPL_3(pfnAImpl, pu16Fsw, pr80Value1, pr80Value2);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xd8 11/0. */
ce1318f291ab810c19aa03ce38d6a87679ba3af7vboxsync return FNIEMOP_CALL_2(iemOpHlpFpu_st0_stN, bRm, iemAImpl_fadd_r80_by_r80);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xd8 11/1. */
ce1318f291ab810c19aa03ce38d6a87679ba3af7vboxsync return FNIEMOP_CALL_2(iemOpHlpFpu_st0_stN, bRm, iemAImpl_fmul_r80_by_r80);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xd8 11/2. */
5ca366bb4004d8335376abb1718d1cb9beedf4efvboxsync return FNIEMOP_CALL_2(iemOpHlpFpuNoStore_st0_stN, bRm, iemAImpl_fcom_r80_by_r80);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xd8 11/3. */
5ca366bb4004d8335376abb1718d1cb9beedf4efvboxsync return FNIEMOP_CALL_2(iemOpHlpFpuNoStore_st0_stN_pop, bRm, iemAImpl_fcom_r80_by_r80);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xd8 11/4. */
ce1318f291ab810c19aa03ce38d6a87679ba3af7vboxsync return FNIEMOP_CALL_2(iemOpHlpFpu_st0_stN, bRm, iemAImpl_fsub_r80_by_r80);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xd8 11/5. */
ce1318f291ab810c19aa03ce38d6a87679ba3af7vboxsync return FNIEMOP_CALL_2(iemOpHlpFpu_st0_stN, bRm, iemAImpl_fsubr_r80_by_r80);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xd8 11/6. */
ce1318f291ab810c19aa03ce38d6a87679ba3af7vboxsync return FNIEMOP_CALL_2(iemOpHlpFpu_st0_stN, bRm, iemAImpl_fdiv_r80_by_r80);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xd8 11/7. */
ce1318f291ab810c19aa03ce38d6a87679ba3af7vboxsync return FNIEMOP_CALL_2(iemOpHlpFpu_st0_stN, bRm, iemAImpl_fdivr_r80_by_r80);
5ca366bb4004d8335376abb1718d1cb9beedf4efvboxsync * Common worker for FPU instructions working on ST0 and an m32r, and storing
5ca366bb4004d8335376abb1718d1cb9beedf4efvboxsync * the result in ST0.
5ca366bb4004d8335376abb1718d1cb9beedf4efvboxsync * @param pfnAImpl Pointer to the instruction implementation (assembly).
5ca366bb4004d8335376abb1718d1cb9beedf4efvboxsyncFNIEMOP_DEF_2(iemOpHlpFpu_st0_m32r, uint8_t, bRm, PFNIEMAIMPLFPUR32, pfnAImpl)
5ca366bb4004d8335376abb1718d1cb9beedf4efvboxsync IEM_MC_ARG_LOCAL_REF(PIEMFPURESULT, pFpuRes, FpuRes, 0);
5ca366bb4004d8335376abb1718d1cb9beedf4efvboxsync IEM_MC_ARG_LOCAL_REF(PCRTFLOAT32U, pr32Val2, r32Val2, 2);
5ca366bb4004d8335376abb1718d1cb9beedf4efvboxsync IEM_MC_FETCH_MEM_R32(r32Val2, pIemCpu->iEffSeg, GCPtrEffSrc);
5ca366bb4004d8335376abb1718d1cb9beedf4efvboxsync IEM_MC_CALL_FPU_AIMPL_3(pfnAImpl, pFpuRes, pr80Value1, pr32Val2);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xd8 !11/0. */
5ca366bb4004d8335376abb1718d1cb9beedf4efvboxsync return FNIEMOP_CALL_2(iemOpHlpFpu_st0_m32r, bRm, iemAImpl_fadd_r80_by_r32);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xd8 !11/1. */
5ca366bb4004d8335376abb1718d1cb9beedf4efvboxsync return FNIEMOP_CALL_2(iemOpHlpFpu_st0_m32r, bRm, iemAImpl_fmul_r80_by_r32);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xd8 !11/2. */
44e92d62784be5a0b1410eb28c248a4603bbed40vboxsync IEM_MC_ARG_LOCAL_REF(uint16_t *, pu16Fsw, u16Fsw, 0);
5ca366bb4004d8335376abb1718d1cb9beedf4efvboxsync IEM_MC_ARG_LOCAL_REF(PCRTFLOAT32U, pr32Val2, r32Val2, 2);
5ca366bb4004d8335376abb1718d1cb9beedf4efvboxsync IEM_MC_FETCH_MEM_R32(r32Val2, pIemCpu->iEffSeg, GCPtrEffSrc);
44e92d62784be5a0b1410eb28c248a4603bbed40vboxsync IEM_MC_CALL_FPU_AIMPL_3(iemAImpl_fcom_r80_by_r32, pu16Fsw, pr80Value1, pr32Val2);
44e92d62784be5a0b1410eb28c248a4603bbed40vboxsync IEM_MC_UPDATE_FSW_WITH_MEM_OP(u16Fsw, pIemCpu->iEffSeg, GCPtrEffSrc);
5ca366bb4004d8335376abb1718d1cb9beedf4efvboxsync IEM_MC_FPU_STACK_UNDERFLOW_MEM_OP(UINT8_MAX, pIemCpu->iEffSeg, GCPtrEffSrc);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xd8 !11/3. */
44e92d62784be5a0b1410eb28c248a4603bbed40vboxsync IEM_MC_ARG_LOCAL_REF(uint16_t *, pu16Fsw, u16Fsw, 0);
5ca366bb4004d8335376abb1718d1cb9beedf4efvboxsync IEM_MC_ARG_LOCAL_REF(PCRTFLOAT32U, pr32Val2, r32Val2, 2);
5ca366bb4004d8335376abb1718d1cb9beedf4efvboxsync IEM_MC_FETCH_MEM_R32(r32Val2, pIemCpu->iEffSeg, GCPtrEffSrc);
44e92d62784be5a0b1410eb28c248a4603bbed40vboxsync IEM_MC_CALL_FPU_AIMPL_3(iemAImpl_fcom_r80_by_r32, pu16Fsw, pr80Value1, pr32Val2);
44e92d62784be5a0b1410eb28c248a4603bbed40vboxsync IEM_MC_UPDATE_FSW_WITH_MEM_OP_THEN_POP(u16Fsw, pIemCpu->iEffSeg, GCPtrEffSrc);
5ca366bb4004d8335376abb1718d1cb9beedf4efvboxsync IEM_MC_FPU_STACK_UNDERFLOW_MEM_OP_THEN_POP(UINT8_MAX, pIemCpu->iEffSeg, GCPtrEffSrc);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xd8 !11/4. */
5ca366bb4004d8335376abb1718d1cb9beedf4efvboxsync return FNIEMOP_CALL_2(iemOpHlpFpu_st0_m32r, bRm, iemAImpl_fsub_r80_by_r32);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xd8 !11/5. */
5ca366bb4004d8335376abb1718d1cb9beedf4efvboxsync return FNIEMOP_CALL_2(iemOpHlpFpu_st0_m32r, bRm, iemAImpl_fsubr_r80_by_r32);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xd8 !11/6. */
5ca366bb4004d8335376abb1718d1cb9beedf4efvboxsync return FNIEMOP_CALL_2(iemOpHlpFpu_st0_m32r, bRm, iemAImpl_fdiv_r80_by_r32);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xd8 !11/7. */
5ca366bb4004d8335376abb1718d1cb9beedf4efvboxsync return FNIEMOP_CALL_2(iemOpHlpFpu_st0_m32r, bRm, iemAImpl_fdivr_r80_by_r32);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xd8. */
06ac458ac1e4617fad41757c1319f8f64cf32b89vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync case 0: return FNIEMOP_CALL_1(iemOp_fadd_stN, bRm);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync case 1: return FNIEMOP_CALL_1(iemOp_fmul_stN, bRm);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync case 2: return FNIEMOP_CALL_1(iemOp_fcom_stN, bRm);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync case 3: return FNIEMOP_CALL_1(iemOp_fcomp_stN, bRm);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync case 4: return FNIEMOP_CALL_1(iemOp_fsub_stN, bRm);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync case 5: return FNIEMOP_CALL_1(iemOp_fsubr_stN, bRm);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync case 6: return FNIEMOP_CALL_1(iemOp_fdiv_stN, bRm);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync case 7: return FNIEMOP_CALL_1(iemOp_fdivr_stN, bRm);
06ac458ac1e4617fad41757c1319f8f64cf32b89vboxsync switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync case 0: return FNIEMOP_CALL_1(iemOp_fadd_m32r, bRm);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync case 1: return FNIEMOP_CALL_1(iemOp_fmul_m32r, bRm);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync case 2: return FNIEMOP_CALL_1(iemOp_fcom_m32r, bRm);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync case 3: return FNIEMOP_CALL_1(iemOp_fcomp_m32r, bRm);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync case 4: return FNIEMOP_CALL_1(iemOp_fsub_m32r, bRm);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync case 5: return FNIEMOP_CALL_1(iemOp_fsubr_m32r, bRm);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync case 6: return FNIEMOP_CALL_1(iemOp_fdiv_m32r, bRm);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync case 7: return FNIEMOP_CALL_1(iemOp_fdivr_m32r, bRm);
58b7ab82f43487a8a838dbeb96387c0d27b527f1vboxsync/** Opcode 0xd9 /0 mem32real
58b7ab82f43487a8a838dbeb96387c0d27b527f1vboxsync * @sa iemOp_fld_m64r */
480a9e8ececc471eae87a2f2ced4f1d33e160614vboxsync IEM_MC_ARG_LOCAL_REF(PIEMFPURESULT, pFpuRes, FpuRes, 0);
5ca366bb4004d8335376abb1718d1cb9beedf4efvboxsync IEM_MC_ARG_LOCAL_REF(PCRTFLOAT32U, pr32Val, r32Val, 1);
480a9e8ececc471eae87a2f2ced4f1d33e160614vboxsync IEM_MC_FETCH_MEM_R32(r32Val, pIemCpu->iEffSeg, GCPtrEffSrc);
5ca366bb4004d8335376abb1718d1cb9beedf4efvboxsync IEM_MC_CALL_FPU_AIMPL_2(iemAImpl_fld_r32_to_r80, pFpuRes, pr32Val);
5ca366bb4004d8335376abb1718d1cb9beedf4efvboxsync IEM_MC_PUSH_FPU_RESULT_MEM_OP(FpuRes, pIemCpu->iEffSeg, GCPtrEffSrc);
5ca366bb4004d8335376abb1718d1cb9beedf4efvboxsync IEM_MC_FPU_STACK_PUSH_OVERFLOW_MEM_OP(pIemCpu->iEffSeg, GCPtrEffSrc);
c3a0242d1bc97bc1bef926c4db3678cc51c84793vboxsync/** Opcode 0xd9 !11/2 mem32real */
44e92d62784be5a0b1410eb28c248a4603bbed40vboxsync IEM_MC_ARG_LOCAL_REF(uint16_t *, pu16Fsw, u16Fsw, 0);
b5df0afad3afdbe8424359a4a97733c0f8c2b5c4vboxsync IEM_MC_MEM_MAP(pr32Dst, IEM_ACCESS_DATA_W, pIemCpu->iEffSeg, GCPtrEffDst, 1 /*arg*/);
44e92d62784be5a0b1410eb28c248a4603bbed40vboxsync IEM_MC_CALL_FPU_AIMPL_3(iemAImpl_fst_r80_to_r32, pu16Fsw, pr32Dst, pr80Value);
d280ee7a17fc630c6a421724d49e1cd28edcac10vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP_FOR_FPU_STORE(pr32Dst, IEM_ACCESS_DATA_W, u16Fsw);
44e92d62784be5a0b1410eb28c248a4603bbed40vboxsync IEM_MC_UPDATE_FSW_WITH_MEM_OP(u16Fsw, pIemCpu->iEffSeg, GCPtrEffDst);
d280ee7a17fc630c6a421724d49e1cd28edcac10vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pr32Dst, IEM_ACCESS_DATA_W);
b5df0afad3afdbe8424359a4a97733c0f8c2b5c4vboxsync IEM_MC_FPU_STACK_UNDERFLOW_MEM_OP(UINT8_MAX, pIemCpu->iEffSeg, GCPtrEffDst);
c3a0242d1bc97bc1bef926c4db3678cc51c84793vboxsync/** Opcode 0xd9 !11/3 */
44e92d62784be5a0b1410eb28c248a4603bbed40vboxsync IEM_MC_ARG_LOCAL_REF(uint16_t *, pu16Fsw, u16Fsw, 0);
b5df0afad3afdbe8424359a4a97733c0f8c2b5c4vboxsync IEM_MC_MEM_MAP(pr32Dst, IEM_ACCESS_DATA_W, pIemCpu->iEffSeg, GCPtrEffDst, 1 /*arg*/);
44e92d62784be5a0b1410eb28c248a4603bbed40vboxsync IEM_MC_CALL_FPU_AIMPL_3(iemAImpl_fst_r80_to_r32, pu16Fsw, pr32Dst, pr80Value);
d280ee7a17fc630c6a421724d49e1cd28edcac10vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP_FOR_FPU_STORE(pr32Dst, IEM_ACCESS_DATA_W, u16Fsw);
44e92d62784be5a0b1410eb28c248a4603bbed40vboxsync IEM_MC_UPDATE_FSW_WITH_MEM_OP_THEN_POP(u16Fsw, pIemCpu->iEffSeg, GCPtrEffDst);
d280ee7a17fc630c6a421724d49e1cd28edcac10vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pr32Dst, IEM_ACCESS_DATA_W);
b5df0afad3afdbe8424359a4a97733c0f8c2b5c4vboxsync IEM_MC_FPU_STACK_UNDERFLOW_MEM_OP_THEN_POP(UINT8_MAX, pIemCpu->iEffSeg, GCPtrEffDst);
c3a0242d1bc97bc1bef926c4db3678cc51c84793vboxsync/** Opcode 0xd9 !11/4 */
d69e81b7f3f8bdca04768899bf8f87701e0a5c39vboxsync IEM_MC_ARG_CONST(IEMMODE, enmEffOpSize, /*=*/ pIemCpu->enmEffOpSize, 0);
d69e81b7f3f8bdca04768899bf8f87701e0a5c39vboxsync IEM_MC_ARG_CONST(uint8_t, iEffSeg, /*=*/ pIemCpu->iEffSeg, 1);
d69e81b7f3f8bdca04768899bf8f87701e0a5c39vboxsync IEM_MC_CALL_CIMPL_3(iemCImpl_fldenv, enmEffOpSize, iEffSeg, GCPtrEffSrc);
c3a0242d1bc97bc1bef926c4db3678cc51c84793vboxsync/** Opcode 0xd9 !11/5 */
d69e81b7f3f8bdca04768899bf8f87701e0a5c39vboxsync IEM_MC_FETCH_MEM_U16(u16Fsw, pIemCpu->iEffSeg, GCPtrEffSrc);
c3a0242d1bc97bc1bef926c4db3678cc51c84793vboxsync/** Opcode 0xd9 !11/6 */
d69e81b7f3f8bdca04768899bf8f87701e0a5c39vboxsync IEM_MC_ARG_CONST(IEMMODE, enmEffOpSize, /*=*/ pIemCpu->enmEffOpSize, 0);
d69e81b7f3f8bdca04768899bf8f87701e0a5c39vboxsync IEM_MC_ARG_CONST(uint8_t, iEffSeg, /*=*/ pIemCpu->iEffSeg, 1);
d69e81b7f3f8bdca04768899bf8f87701e0a5c39vboxsync IEM_MC_CALL_CIMPL_3(iemCImpl_fnstenv, enmEffOpSize, iEffSeg, GCPtrEffDst);
c3a0242d1bc97bc1bef926c4db3678cc51c84793vboxsync/** Opcode 0xd9 !11/7 */
d69e81b7f3f8bdca04768899bf8f87701e0a5c39vboxsync IEM_MC_STORE_MEM_U16(pIemCpu->iEffSeg, GCPtrEffDst, u16Fcw);
d69e81b7f3f8bdca04768899bf8f87701e0a5c39vboxsync IEM_MC_ADVANCE_RIP(); /* C0-C3 are documented as undefined, we leave them unmodified. */
c3a0242d1bc97bc1bef926c4db3678cc51c84793vboxsync/** Opcode 0xd9 0xc9, 0xd9 0xd8-0xdf, ++?. */
14089fa53a366de0c6868d9270292d0b84f8c6a5vboxsync /** @todo Testcase: looks like FNOP leaves FOP alone but updates FPUIP. Could be
14089fa53a366de0c6868d9270292d0b84f8c6a5vboxsync * intel optimizations. Investigate. */
14089fa53a366de0c6868d9270292d0b84f8c6a5vboxsync IEM_MC_ADVANCE_RIP(); /* C0-C3 are documented as undefined, we leave them unmodified. */
c3a0242d1bc97bc1bef926c4db3678cc51c84793vboxsync/** Opcode 0xd9 11/0 stN */
14089fa53a366de0c6868d9270292d0b84f8c6a5vboxsync /** @todo Testcase: Check if this raises \#MF? Intel mentioned it not. AMD
14089fa53a366de0c6868d9270292d0b84f8c6a5vboxsync * indicates that it does. */
14089fa53a366de0c6868d9270292d0b84f8c6a5vboxsync IEM_MC_IF_FPUREG_NOT_EMPTY_REF_R80(pr80Value, bRm & X86_MODRM_RM_MASK)
14089fa53a366de0c6868d9270292d0b84f8c6a5vboxsync IEM_MC_SET_FPU_RESULT(FpuRes, 0 /*FSW*/, pr80Value);
c3a0242d1bc97bc1bef926c4db3678cc51c84793vboxsync/** Opcode 0xd9 11/3 stN */
db55d6ced7db5b116a7662b1eb7d37130a9fe8c4vboxsync /** @todo Testcase: Check if this raises \#MF? Intel mentioned it not. AMD
db55d6ced7db5b116a7662b1eb7d37130a9fe8c4vboxsync * indicates that it does. */
db55d6ced7db5b116a7662b1eb7d37130a9fe8c4vboxsync IEM_MC_ARG_CONST(uint8_t, iStReg, /*=*/ bRm & X86_MODRM_RM_MASK, 0);
db55d6ced7db5b116a7662b1eb7d37130a9fe8c4vboxsync IEM_MC_IF_TWO_FPUREGS_NOT_EMPTY_REF_R80(pr80Value1, 0, pr80Value2, bRm & X86_MODRM_RM_MASK)
db55d6ced7db5b116a7662b1eb7d37130a9fe8c4vboxsync IEM_MC_SET_FPU_RESULT(FpuRes, X86_FSW_C1, pr80Value2);
db55d6ced7db5b116a7662b1eb7d37130a9fe8c4vboxsync IEM_MC_STORE_FPUREG_R80_SRC_REF(bRm & X86_MODRM_RM_MASK, pr80Value1);
db55d6ced7db5b116a7662b1eb7d37130a9fe8c4vboxsync IEM_MC_CALL_CIMPL_1(iemCImpl_fxch_underflow, iStReg);
c3a0242d1bc97bc1bef926c4db3678cc51c84793vboxsync/** Opcode 0xd9 11/4, 0xdd 11/2. */
7962cf168afeef286d876738dae7131c2c79ece8vboxsync /* fstp st0, st0 is frequendly used as an official 'ffreep st0' sequence. */
7962cf168afeef286d876738dae7131c2c79ece8vboxsync IEM_MC_SET_FPU_RESULT(FpuRes, 0 /*FSW*/, pr80Value);
44e92d62784be5a0b1410eb28c248a4603bbed40vboxsync * Common worker for FPU instructions working on ST0 and replaces it with the
44e92d62784be5a0b1410eb28c248a4603bbed40vboxsync * result, i.e. unary operators.
44e92d62784be5a0b1410eb28c248a4603bbed40vboxsync * @param pfnAImpl Pointer to the instruction implementation (assembly).
44e92d62784be5a0b1410eb28c248a4603bbed40vboxsyncFNIEMOP_DEF_1(iemOpHlpFpu_st0, PFNIEMAIMPLFPUR80UNARY, pfnAImpl)
44e92d62784be5a0b1410eb28c248a4603bbed40vboxsync IEM_MC_ARG_LOCAL_REF(PIEMFPURESULT, pFpuRes, FpuRes, 0);
44e92d62784be5a0b1410eb28c248a4603bbed40vboxsync IEM_MC_CALL_FPU_AIMPL_2(pfnAImpl, pFpuRes, pr80Value);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xd9 0xe0. */
44e92d62784be5a0b1410eb28c248a4603bbed40vboxsync return FNIEMOP_CALL_1(iemOpHlpFpu_st0, iemAImpl_fchs_r80);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xd9 0xe1. */
44e92d62784be5a0b1410eb28c248a4603bbed40vboxsync return FNIEMOP_CALL_1(iemOpHlpFpu_st0, iemAImpl_fabs_r80);
44e92d62784be5a0b1410eb28c248a4603bbed40vboxsync * Common worker for FPU instructions working on ST0 and only returns FSW.
44e92d62784be5a0b1410eb28c248a4603bbed40vboxsync * @param pfnAImpl Pointer to the instruction implementation (assembly).
44e92d62784be5a0b1410eb28c248a4603bbed40vboxsyncFNIEMOP_DEF_1(iemOpHlpFpuNoStore_st0, PFNIEMAIMPLFPUR80UNARYFSW, pfnAImpl)
44e92d62784be5a0b1410eb28c248a4603bbed40vboxsync IEM_MC_ARG_LOCAL_REF(uint16_t *, pu16Fsw, u16Fsw, 0);
44e92d62784be5a0b1410eb28c248a4603bbed40vboxsync IEM_MC_CALL_FPU_AIMPL_2(pfnAImpl, pu16Fsw, pr80Value);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xd9 0xe4. */
44e92d62784be5a0b1410eb28c248a4603bbed40vboxsync return FNIEMOP_CALL_1(iemOpHlpFpuNoStore_st0, iemAImpl_ftst_r80);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xd9 0xe5. */
44e92d62784be5a0b1410eb28c248a4603bbed40vboxsync return FNIEMOP_CALL_1(iemOpHlpFpuNoStore_st0, iemAImpl_fxam_r80);
44e92d62784be5a0b1410eb28c248a4603bbed40vboxsync * Common worker for FPU instructions pushing a constant onto the FPU stack.
44e92d62784be5a0b1410eb28c248a4603bbed40vboxsync * @param pfnAImpl Pointer to the instruction implementation (assembly).
44e92d62784be5a0b1410eb28c248a4603bbed40vboxsyncFNIEMOP_DEF_1(iemOpHlpFpuPushConstant, PFNIEMAIMPLFPUR80LDCONST, pfnAImpl)
44e92d62784be5a0b1410eb28c248a4603bbed40vboxsync IEM_MC_ARG_LOCAL_REF(PIEMFPURESULT, pFpuRes, FpuRes, 0);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xd9 0xe8. */
44e92d62784be5a0b1410eb28c248a4603bbed40vboxsync return FNIEMOP_CALL_1(iemOpHlpFpuPushConstant, iemAImpl_fld1);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xd9 0xe9. */
44e92d62784be5a0b1410eb28c248a4603bbed40vboxsync return FNIEMOP_CALL_1(iemOpHlpFpuPushConstant, iemAImpl_fldl2t);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xd9 0xea. */
44e92d62784be5a0b1410eb28c248a4603bbed40vboxsync return FNIEMOP_CALL_1(iemOpHlpFpuPushConstant, iemAImpl_fldl2e);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xd9 0xeb. */
44e92d62784be5a0b1410eb28c248a4603bbed40vboxsync return FNIEMOP_CALL_1(iemOpHlpFpuPushConstant, iemAImpl_fldpi);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xd9 0xec. */
44e92d62784be5a0b1410eb28c248a4603bbed40vboxsync return FNIEMOP_CALL_1(iemOpHlpFpuPushConstant, iemAImpl_fldlg2);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xd9 0xed. */
44e92d62784be5a0b1410eb28c248a4603bbed40vboxsync return FNIEMOP_CALL_1(iemOpHlpFpuPushConstant, iemAImpl_fldln2);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xd9 0xee. */
44e92d62784be5a0b1410eb28c248a4603bbed40vboxsync return FNIEMOP_CALL_1(iemOpHlpFpuPushConstant, iemAImpl_fldz);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xd9 0xf0. */
1bdc710f98c4004b2b449c82cf550224b5372f70vboxsync return FNIEMOP_CALL_1(iemOpHlpFpu_st0, iemAImpl_f2xm1_r80);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xd9 0xf1. */
5edee73a379880aec95a2a5eb24d61bc9ecab5a6vboxsync return FNIEMOP_CALL_1(iemOpHlpFpu_st0, iemAImpl_fyl2x_r80);
14db9e3f0003e1e290ba2c50a3bf2bcf89750a4dvboxsync * Common worker for FPU instructions working on ST0 and having two outputs, one
14db9e3f0003e1e290ba2c50a3bf2bcf89750a4dvboxsync * replacing ST0 and one pushed onto the stack.
14db9e3f0003e1e290ba2c50a3bf2bcf89750a4dvboxsync * @param pfnAImpl Pointer to the instruction implementation (assembly).
14db9e3f0003e1e290ba2c50a3bf2bcf89750a4dvboxsyncFNIEMOP_DEF_1(iemOpHlpFpuReplace_st0_push, PFNIEMAIMPLFPUR80UNARYTWO, pfnAImpl)
1bdc710f98c4004b2b449c82cf550224b5372f70vboxsync IEM_MC_ARG_LOCAL_REF(PIEMFPURESULTTWO, pFpuResTwo, FpuResTwo, 0);
14db9e3f0003e1e290ba2c50a3bf2bcf89750a4dvboxsync IEM_MC_CALL_FPU_AIMPL_2(pfnAImpl, pFpuResTwo, pr80Value);
14db9e3f0003e1e290ba2c50a3bf2bcf89750a4dvboxsync/** Opcode 0xd9 0xf2. */
14db9e3f0003e1e290ba2c50a3bf2bcf89750a4dvboxsync return FNIEMOP_CALL_1(iemOpHlpFpuReplace_st0_push, iemAImpl_fptan_r80_r80);
14db9e3f0003e1e290ba2c50a3bf2bcf89750a4dvboxsync * Common worker for FPU instructions working on STn and ST0, storing the result
14db9e3f0003e1e290ba2c50a3bf2bcf89750a4dvboxsync * in STn, and popping the stack unless IE, DE or ZE was raised.
14db9e3f0003e1e290ba2c50a3bf2bcf89750a4dvboxsync * @param pfnAImpl Pointer to the instruction implementation (assembly).
14db9e3f0003e1e290ba2c50a3bf2bcf89750a4dvboxsyncFNIEMOP_DEF_2(iemOpHlpFpu_stN_st0_pop, uint8_t, bRm, PFNIEMAIMPLFPUR80, pfnAImpl)
14db9e3f0003e1e290ba2c50a3bf2bcf89750a4dvboxsync IEM_MC_ARG_LOCAL_REF(PIEMFPURESULT, pFpuRes, FpuRes, 0);
14db9e3f0003e1e290ba2c50a3bf2bcf89750a4dvboxsync IEM_MC_IF_TWO_FPUREGS_NOT_EMPTY_REF_R80(pr80Value1, bRm & X86_MODRM_RM_MASK, pr80Value2, 0)
14db9e3f0003e1e290ba2c50a3bf2bcf89750a4dvboxsync IEM_MC_CALL_FPU_AIMPL_3(pfnAImpl, pFpuRes, pr80Value1, pr80Value2);
14db9e3f0003e1e290ba2c50a3bf2bcf89750a4dvboxsync IEM_MC_STORE_FPU_RESULT_THEN_POP(FpuRes, bRm & X86_MODRM_RM_MASK);
14db9e3f0003e1e290ba2c50a3bf2bcf89750a4dvboxsync IEM_MC_FPU_STACK_UNDERFLOW_THEN_POP(bRm & X86_MODRM_RM_MASK);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xd9 0xf3. */
14db9e3f0003e1e290ba2c50a3bf2bcf89750a4dvboxsync return FNIEMOP_CALL_2(iemOpHlpFpu_stN_st0_pop, 1, iemAImpl_fpatan_r80_by_r80);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xd9 0xf4. */
14db9e3f0003e1e290ba2c50a3bf2bcf89750a4dvboxsync return FNIEMOP_CALL_1(iemOpHlpFpuReplace_st0_push, iemAImpl_fxtract_r80_r80);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xd9 0xf5. */
14db9e3f0003e1e290ba2c50a3bf2bcf89750a4dvboxsync return FNIEMOP_CALL_2(iemOpHlpFpu_st0_stN, 1, iemAImpl_fprem1_r80_by_r80);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xd9 0xf6. */
12709910a6c0ee9053dbe6c13820752a0e30acc0vboxsync /* Note! C0, C2 and C3 are documented as undefined, we clear them. */
12709910a6c0ee9053dbe6c13820752a0e30acc0vboxsync /** @todo Testcase: Check whether FOP, FPUIP and FPUCS are affected by
12709910a6c0ee9053dbe6c13820752a0e30acc0vboxsync * FINCSTP and FDECSTP. */
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xd9 0xf7. */
12709910a6c0ee9053dbe6c13820752a0e30acc0vboxsync /* Note! C0, C2 and C3 are documented as undefined, we clear them. */
12709910a6c0ee9053dbe6c13820752a0e30acc0vboxsync /** @todo Testcase: Check whether FOP, FPUIP and FPUCS are affected by
12709910a6c0ee9053dbe6c13820752a0e30acc0vboxsync * FINCSTP and FDECSTP. */
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xd9 0xf8. */
14db9e3f0003e1e290ba2c50a3bf2bcf89750a4dvboxsync return FNIEMOP_CALL_2(iemOpHlpFpu_st0_stN, 1, iemAImpl_fprem_r80_by_r80);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xd9 0xf9. */
14db9e3f0003e1e290ba2c50a3bf2bcf89750a4dvboxsync return FNIEMOP_CALL_2(iemOpHlpFpu_stN_st0_pop, 1, iemAImpl_fyl2xp1_r80_by_r80);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xd9 0xfa. */
14db9e3f0003e1e290ba2c50a3bf2bcf89750a4dvboxsync return FNIEMOP_CALL_1(iemOpHlpFpu_st0, iemAImpl_fsqrt_r80);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xd9 0xfb. */
14db9e3f0003e1e290ba2c50a3bf2bcf89750a4dvboxsync return FNIEMOP_CALL_1(iemOpHlpFpuReplace_st0_push, iemAImpl_fsincos_r80_r80);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xd9 0xfc. */
14db9e3f0003e1e290ba2c50a3bf2bcf89750a4dvboxsync return FNIEMOP_CALL_1(iemOpHlpFpu_st0, iemAImpl_frndint_r80);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xd9 0xfd. */
14db9e3f0003e1e290ba2c50a3bf2bcf89750a4dvboxsync return FNIEMOP_CALL_2(iemOpHlpFpu_st0_stN, 1, iemAImpl_fscale_r80_by_r80);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xd9 0xfe. */
14db9e3f0003e1e290ba2c50a3bf2bcf89750a4dvboxsync return FNIEMOP_CALL_1(iemOpHlpFpu_st0, iemAImpl_fsin_r80);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xd9 0xff. */
14db9e3f0003e1e290ba2c50a3bf2bcf89750a4dvboxsync return FNIEMOP_CALL_1(iemOpHlpFpu_st0, iemAImpl_fcos_r80);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Used by iemOp_EscF1. */
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xd9. */
60468377ea17fdce430870d87a375af4019293bcvboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
60468377ea17fdce430870d87a375af4019293bcvboxsync switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync case 1: return FNIEMOP_CALL_1(iemOp_fxch_stN, bRm);
c3a0242d1bc97bc1bef926c4db3678cc51c84793vboxsync case 3: return FNIEMOP_CALL_1(iemOp_fstp_stN, bRm); /* Reserved. Intel behavior seems to be FSTP ST(i) though. */
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync return FNIEMOP_CALL(g_apfnEscF1_E0toFF[(bRm & (X86_MODRM_REG_MASK |X86_MODRM_RM_MASK)) - 0xe0]);
60468377ea17fdce430870d87a375af4019293bcvboxsync switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
60468377ea17fdce430870d87a375af4019293bcvboxsync case 0: return FNIEMOP_CALL_1(iemOp_fld_m32r, bRm);
60468377ea17fdce430870d87a375af4019293bcvboxsync case 2: return FNIEMOP_CALL_1(iemOp_fst_m32r, bRm);
60468377ea17fdce430870d87a375af4019293bcvboxsync case 3: return FNIEMOP_CALL_1(iemOp_fstp_m32r, bRm);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xda 11/0. */
563a5c83151f7468bf1ba61b6a2176a44ffc2d17vboxsync IEM_MC_IF_TWO_FPUREGS_NOT_EMPTY_REF_R80_FIRST(pr80ValueN, bRm & X86_MODRM_RM_MASK, 0)
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xda 11/1. */
563a5c83151f7468bf1ba61b6a2176a44ffc2d17vboxsync IEM_MC_IF_TWO_FPUREGS_NOT_EMPTY_REF_R80_FIRST(pr80ValueN, bRm & X86_MODRM_RM_MASK, 0)
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xda 11/2. */
563a5c83151f7468bf1ba61b6a2176a44ffc2d17vboxsync IEM_MC_IF_TWO_FPUREGS_NOT_EMPTY_REF_R80_FIRST(pr80ValueN, bRm & X86_MODRM_RM_MASK, 0)
563a5c83151f7468bf1ba61b6a2176a44ffc2d17vboxsync IEM_MC_IF_EFL_ANY_BITS_SET(X86_EFL_CF | X86_EFL_ZF)
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xda 11/3. */
563a5c83151f7468bf1ba61b6a2176a44ffc2d17vboxsync IEM_MC_IF_TWO_FPUREGS_NOT_EMPTY_REF_R80_FIRST(pr80ValueN, bRm & X86_MODRM_RM_MASK, 0)
9b94aa72f427a17f12197fe27073265341da7f52vboxsync * Common worker for FPU instructions working on ST0 and STn, only affecting
9b94aa72f427a17f12197fe27073265341da7f52vboxsync * flags, and popping twice when done.
9b94aa72f427a17f12197fe27073265341da7f52vboxsync * @param pfnAImpl Pointer to the instruction implementation (assembly).
9b94aa72f427a17f12197fe27073265341da7f52vboxsyncFNIEMOP_DEF_1(iemOpHlpFpuNoStore_st0_stN_pop_pop, PFNIEMAIMPLFPUR80FSW, pfnAImpl)
7a38fa5bae2ea027a2fcc3f05ac15f91a2716ddbvboxsync IEM_MC_ARG_LOCAL_REF(uint16_t *, pu16Fsw, u16Fsw, 0);
7a38fa5bae2ea027a2fcc3f05ac15f91a2716ddbvboxsync IEM_MC_IF_TWO_FPUREGS_NOT_EMPTY_REF_R80(pr80Value1, 0, pr80Value2, 1)
9b94aa72f427a17f12197fe27073265341da7f52vboxsync IEM_MC_CALL_FPU_AIMPL_3(pfnAImpl, pu16Fsw, pr80Value1, pr80Value2);
9b94aa72f427a17f12197fe27073265341da7f52vboxsync/** Opcode 0xda 0xe9. */
9b94aa72f427a17f12197fe27073265341da7f52vboxsync return FNIEMOP_CALL_1(iemOpHlpFpuNoStore_st0_stN_pop_pop, iemAImpl_fucom_r80_by_r80);
7a38fa5bae2ea027a2fcc3f05ac15f91a2716ddbvboxsync * Common worker for FPU instructions working on ST0 and an m32i, and storing
7a38fa5bae2ea027a2fcc3f05ac15f91a2716ddbvboxsync * the result in ST0.
7a38fa5bae2ea027a2fcc3f05ac15f91a2716ddbvboxsync * @param pfnAImpl Pointer to the instruction implementation (assembly).
7a38fa5bae2ea027a2fcc3f05ac15f91a2716ddbvboxsyncFNIEMOP_DEF_2(iemOpHlpFpu_st0_m32i, uint8_t, bRm, PFNIEMAIMPLFPUI32, pfnAImpl)
7a38fa5bae2ea027a2fcc3f05ac15f91a2716ddbvboxsync IEM_MC_ARG_LOCAL_REF(PIEMFPURESULT, pFpuRes, FpuRes, 0);
7a38fa5bae2ea027a2fcc3f05ac15f91a2716ddbvboxsync IEM_MC_ARG_LOCAL_REF(int32_t const *, pi32Val2, i32Val2, 2);
7a38fa5bae2ea027a2fcc3f05ac15f91a2716ddbvboxsync IEM_MC_FETCH_MEM_I32(i32Val2, pIemCpu->iEffSeg, GCPtrEffSrc);
7a38fa5bae2ea027a2fcc3f05ac15f91a2716ddbvboxsync IEM_MC_CALL_FPU_AIMPL_3(pfnAImpl, pFpuRes, pr80Value1, pi32Val2);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xda !11/0. */
7a38fa5bae2ea027a2fcc3f05ac15f91a2716ddbvboxsync return FNIEMOP_CALL_2(iemOpHlpFpu_st0_m32i, bRm, iemAImpl_fiadd_r80_by_i32);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xda !11/1. */
7a38fa5bae2ea027a2fcc3f05ac15f91a2716ddbvboxsync return FNIEMOP_CALL_2(iemOpHlpFpu_st0_m32i, bRm, iemAImpl_fimul_r80_by_i32);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xda !11/2. */
7a38fa5bae2ea027a2fcc3f05ac15f91a2716ddbvboxsync IEM_MC_ARG_LOCAL_REF(uint16_t *, pu16Fsw, u16Fsw, 0);
7a38fa5bae2ea027a2fcc3f05ac15f91a2716ddbvboxsync IEM_MC_ARG_LOCAL_REF(int32_t const *, pi32Val2, i32Val2, 2);
7a38fa5bae2ea027a2fcc3f05ac15f91a2716ddbvboxsync IEM_MC_FETCH_MEM_I32(i32Val2, pIemCpu->iEffSeg, GCPtrEffSrc);
7a38fa5bae2ea027a2fcc3f05ac15f91a2716ddbvboxsync IEM_MC_CALL_FPU_AIMPL_3(iemAImpl_ficom_r80_by_i32, pu16Fsw, pr80Value1, pi32Val2);
7a38fa5bae2ea027a2fcc3f05ac15f91a2716ddbvboxsync IEM_MC_UPDATE_FSW_WITH_MEM_OP(u16Fsw, pIemCpu->iEffSeg, GCPtrEffSrc);
7a38fa5bae2ea027a2fcc3f05ac15f91a2716ddbvboxsync IEM_MC_FPU_STACK_UNDERFLOW_MEM_OP(UINT8_MAX, pIemCpu->iEffSeg, GCPtrEffSrc);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xda !11/3. */
7a38fa5bae2ea027a2fcc3f05ac15f91a2716ddbvboxsync IEM_MC_ARG_LOCAL_REF(uint16_t *, pu16Fsw, u16Fsw, 0);
7a38fa5bae2ea027a2fcc3f05ac15f91a2716ddbvboxsync IEM_MC_ARG_LOCAL_REF(int32_t const *, pi32Val2, i32Val2, 2);
7a38fa5bae2ea027a2fcc3f05ac15f91a2716ddbvboxsync IEM_MC_FETCH_MEM_I32(i32Val2, pIemCpu->iEffSeg, GCPtrEffSrc);
7a38fa5bae2ea027a2fcc3f05ac15f91a2716ddbvboxsync IEM_MC_CALL_FPU_AIMPL_3(iemAImpl_ficom_r80_by_i32, pu16Fsw, pr80Value1, pi32Val2);
7a38fa5bae2ea027a2fcc3f05ac15f91a2716ddbvboxsync IEM_MC_UPDATE_FSW_WITH_MEM_OP_THEN_POP(u16Fsw, pIemCpu->iEffSeg, GCPtrEffSrc);
7a38fa5bae2ea027a2fcc3f05ac15f91a2716ddbvboxsync IEM_MC_FPU_STACK_UNDERFLOW_MEM_OP_THEN_POP(UINT8_MAX, pIemCpu->iEffSeg, GCPtrEffSrc);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xda !11/4. */
7a38fa5bae2ea027a2fcc3f05ac15f91a2716ddbvboxsync return FNIEMOP_CALL_2(iemOpHlpFpu_st0_m32i, bRm, iemAImpl_fisub_r80_by_i32);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xda !11/5. */
7a38fa5bae2ea027a2fcc3f05ac15f91a2716ddbvboxsync return FNIEMOP_CALL_2(iemOpHlpFpu_st0_m32i, bRm, iemAImpl_fisubr_r80_by_i32);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xda !11/6. */
7a38fa5bae2ea027a2fcc3f05ac15f91a2716ddbvboxsync return FNIEMOP_CALL_2(iemOpHlpFpu_st0_m32i, bRm, iemAImpl_fidiv_r80_by_i32);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xda !11/7. */
7a38fa5bae2ea027a2fcc3f05ac15f91a2716ddbvboxsync return FNIEMOP_CALL_2(iemOpHlpFpu_st0_m32i, bRm, iemAImpl_fidivr_r80_by_i32);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xda. */
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync case 0: return FNIEMOP_CALL_1(iemOp_fcmovb_stN, bRm);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync case 1: return FNIEMOP_CALL_1(iemOp_fcmove_stN, bRm);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync case 2: return FNIEMOP_CALL_1(iemOp_fcmovbe_stN, bRm);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync case 3: return FNIEMOP_CALL_1(iemOp_fcmovu_stN, bRm);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync case 0: return FNIEMOP_CALL_1(iemOp_fiadd_m32i, bRm);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync case 1: return FNIEMOP_CALL_1(iemOp_fimul_m32i, bRm);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync case 2: return FNIEMOP_CALL_1(iemOp_ficom_m32i, bRm);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync case 3: return FNIEMOP_CALL_1(iemOp_ficomp_m32i, bRm);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync case 4: return FNIEMOP_CALL_1(iemOp_fisub_m32i, bRm);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync case 5: return FNIEMOP_CALL_1(iemOp_fisubr_m32i, bRm);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync case 6: return FNIEMOP_CALL_1(iemOp_fidiv_m32i, bRm);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync case 7: return FNIEMOP_CALL_1(iemOp_fidivr_m32i, bRm);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xdb !11/0. */
d280ee7a17fc630c6a421724d49e1cd28edcac10vboxsync IEM_MC_ARG_LOCAL_REF(PIEMFPURESULT, pFpuRes, FpuRes, 0);
d280ee7a17fc630c6a421724d49e1cd28edcac10vboxsync IEM_MC_ARG_LOCAL_REF(int32_t const *, pi32Val, i32Val, 1);
d280ee7a17fc630c6a421724d49e1cd28edcac10vboxsync IEM_MC_FETCH_MEM_I32(i32Val, pIemCpu->iEffSeg, GCPtrEffSrc);
d280ee7a17fc630c6a421724d49e1cd28edcac10vboxsync IEM_MC_CALL_FPU_AIMPL_2(iemAImpl_fild_i32_to_r80, pFpuRes, pi32Val);
d280ee7a17fc630c6a421724d49e1cd28edcac10vboxsync IEM_MC_PUSH_FPU_RESULT_MEM_OP(FpuRes, pIemCpu->iEffSeg, GCPtrEffSrc);
d280ee7a17fc630c6a421724d49e1cd28edcac10vboxsync IEM_MC_FPU_STACK_PUSH_OVERFLOW_MEM_OP(pIemCpu->iEffSeg, GCPtrEffSrc);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xdb !11/1. */
d280ee7a17fc630c6a421724d49e1cd28edcac10vboxsync IEM_MC_ARG_LOCAL_REF(uint16_t *, pu16Fsw, u16Fsw, 0);
d280ee7a17fc630c6a421724d49e1cd28edcac10vboxsync IEM_MC_MEM_MAP(pi32Dst, IEM_ACCESS_DATA_W, pIemCpu->iEffSeg, GCPtrEffDst, 1 /*arg*/);
d280ee7a17fc630c6a421724d49e1cd28edcac10vboxsync IEM_MC_CALL_FPU_AIMPL_3(iemAImpl_fistt_r80_to_i32, pu16Fsw, pi32Dst, pr80Value);
d280ee7a17fc630c6a421724d49e1cd28edcac10vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP_FOR_FPU_STORE(pi32Dst, IEM_ACCESS_DATA_W, u16Fsw);
d280ee7a17fc630c6a421724d49e1cd28edcac10vboxsync IEM_MC_UPDATE_FSW_WITH_MEM_OP_THEN_POP(u16Fsw, pIemCpu->iEffSeg, GCPtrEffDst);
d280ee7a17fc630c6a421724d49e1cd28edcac10vboxsync IEM_MC_STORE_MEM_I32_CONST_BY_REF(pi32Dst, INT32_MIN /* (integer indefinite) */);
d280ee7a17fc630c6a421724d49e1cd28edcac10vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pi32Dst, IEM_ACCESS_DATA_W);
d280ee7a17fc630c6a421724d49e1cd28edcac10vboxsync IEM_MC_FPU_STACK_UNDERFLOW_MEM_OP_THEN_POP(UINT8_MAX, pIemCpu->iEffSeg, GCPtrEffDst);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xdb !11/2. */
d280ee7a17fc630c6a421724d49e1cd28edcac10vboxsync IEM_MC_ARG_LOCAL_REF(uint16_t *, pu16Fsw, u16Fsw, 0);
d280ee7a17fc630c6a421724d49e1cd28edcac10vboxsync IEM_MC_MEM_MAP(pi32Dst, IEM_ACCESS_DATA_W, pIemCpu->iEffSeg, GCPtrEffDst, 1 /*arg*/);
d280ee7a17fc630c6a421724d49e1cd28edcac10vboxsync IEM_MC_CALL_FPU_AIMPL_3(iemAImpl_fist_r80_to_i32, pu16Fsw, pi32Dst, pr80Value);
d280ee7a17fc630c6a421724d49e1cd28edcac10vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP_FOR_FPU_STORE(pi32Dst, IEM_ACCESS_DATA_W, u16Fsw);
d280ee7a17fc630c6a421724d49e1cd28edcac10vboxsync IEM_MC_UPDATE_FSW_WITH_MEM_OP(u16Fsw, pIemCpu->iEffSeg, GCPtrEffDst);
d280ee7a17fc630c6a421724d49e1cd28edcac10vboxsync IEM_MC_STORE_MEM_I32_CONST_BY_REF(pi32Dst, INT32_MIN /* (integer indefinite) */);
d280ee7a17fc630c6a421724d49e1cd28edcac10vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pi32Dst, IEM_ACCESS_DATA_W);
d280ee7a17fc630c6a421724d49e1cd28edcac10vboxsync IEM_MC_FPU_STACK_UNDERFLOW_MEM_OP(UINT8_MAX, pIemCpu->iEffSeg, GCPtrEffDst);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xdb !11/3. */
44e92d62784be5a0b1410eb28c248a4603bbed40vboxsync IEM_MC_ARG_LOCAL_REF(uint16_t *, pu16Fsw, u16Fsw, 0);
5ca366bb4004d8335376abb1718d1cb9beedf4efvboxsync IEM_MC_MEM_MAP(pi32Dst, IEM_ACCESS_DATA_W, pIemCpu->iEffSeg, GCPtrEffDst, 1 /*arg*/);
d280ee7a17fc630c6a421724d49e1cd28edcac10vboxsync IEM_MC_CALL_FPU_AIMPL_3(iemAImpl_fist_r80_to_i32, pu16Fsw, pi32Dst, pr80Value);
d280ee7a17fc630c6a421724d49e1cd28edcac10vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP_FOR_FPU_STORE(pi32Dst, IEM_ACCESS_DATA_W, u16Fsw);
44e92d62784be5a0b1410eb28c248a4603bbed40vboxsync IEM_MC_UPDATE_FSW_WITH_MEM_OP_THEN_POP(u16Fsw, pIemCpu->iEffSeg, GCPtrEffDst);
d280ee7a17fc630c6a421724d49e1cd28edcac10vboxsync IEM_MC_STORE_MEM_I32_CONST_BY_REF(pi32Dst, INT32_MIN /* (integer indefinite) */);
d280ee7a17fc630c6a421724d49e1cd28edcac10vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pi32Dst, IEM_ACCESS_DATA_W);
5ca366bb4004d8335376abb1718d1cb9beedf4efvboxsync IEM_MC_FPU_STACK_UNDERFLOW_MEM_OP_THEN_POP(UINT8_MAX, pIemCpu->iEffSeg, GCPtrEffDst);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xdb !11/5. */
7e0800bfa4bab140ca8d74f5764720fd136522afvboxsync IEM_MC_ARG_LOCAL_REF(PIEMFPURESULT, pFpuRes, FpuRes, 0);
7e0800bfa4bab140ca8d74f5764720fd136522afvboxsync IEM_MC_ARG_LOCAL_REF(PCRTFLOAT80U, pr80Val, r80Val, 1);
7e0800bfa4bab140ca8d74f5764720fd136522afvboxsync IEM_MC_FETCH_MEM_R80(r80Val, pIemCpu->iEffSeg, GCPtrEffSrc);
7e0800bfa4bab140ca8d74f5764720fd136522afvboxsync IEM_MC_CALL_FPU_AIMPL_2(iemAImpl_fld_r80_from_r80, pFpuRes, pr80Val);
7e0800bfa4bab140ca8d74f5764720fd136522afvboxsync IEM_MC_PUSH_FPU_RESULT_MEM_OP(FpuRes, pIemCpu->iEffSeg, GCPtrEffSrc);
7e0800bfa4bab140ca8d74f5764720fd136522afvboxsync IEM_MC_FPU_STACK_PUSH_OVERFLOW_MEM_OP(pIemCpu->iEffSeg, GCPtrEffSrc);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xdb !11/7. */
7e0800bfa4bab140ca8d74f5764720fd136522afvboxsync IEM_MC_ARG_LOCAL_REF(uint16_t *, pu16Fsw, u16Fsw, 0);
7e0800bfa4bab140ca8d74f5764720fd136522afvboxsync IEM_MC_MEM_MAP(pr80Dst, IEM_ACCESS_DATA_W, pIemCpu->iEffSeg, GCPtrEffDst, 1 /*arg*/);
7e0800bfa4bab140ca8d74f5764720fd136522afvboxsync IEM_MC_CALL_FPU_AIMPL_3(iemAImpl_fst_r80_to_r80, pu16Fsw, pr80Dst, pr80Value);
7e0800bfa4bab140ca8d74f5764720fd136522afvboxsync IEM_MC_MEM_COMMIT_AND_UNMAP_FOR_FPU_STORE(pr80Dst, IEM_ACCESS_DATA_W, u16Fsw);
7e0800bfa4bab140ca8d74f5764720fd136522afvboxsync IEM_MC_UPDATE_FSW_WITH_MEM_OP_THEN_POP(u16Fsw, pIemCpu->iEffSeg, GCPtrEffDst);
7e0800bfa4bab140ca8d74f5764720fd136522afvboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pr80Dst, IEM_ACCESS_DATA_W);
7e0800bfa4bab140ca8d74f5764720fd136522afvboxsync IEM_MC_FPU_STACK_UNDERFLOW_MEM_OP_THEN_POP(UINT8_MAX, pIemCpu->iEffSeg, GCPtrEffDst);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xdb 11/0. */
563a5c83151f7468bf1ba61b6a2176a44ffc2d17vboxsync IEM_MC_IF_TWO_FPUREGS_NOT_EMPTY_REF_R80_FIRST(pr80ValueN, bRm & X86_MODRM_RM_MASK, 0)
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xdb 11/1. */
563a5c83151f7468bf1ba61b6a2176a44ffc2d17vboxsync IEM_MC_IF_TWO_FPUREGS_NOT_EMPTY_REF_R80_FIRST(pr80ValueN, bRm & X86_MODRM_RM_MASK, 0)
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xdb 11/2. */
563a5c83151f7468bf1ba61b6a2176a44ffc2d17vboxsync IEM_MC_IF_TWO_FPUREGS_NOT_EMPTY_REF_R80_FIRST(pr80ValueN, bRm & X86_MODRM_RM_MASK, 0)
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xdb 11/3. */
563a5c83151f7468bf1ba61b6a2176a44ffc2d17vboxsync IEM_MC_IF_TWO_FPUREGS_NOT_EMPTY_REF_R80_FIRST(pr80ValueN, bRm & X86_MODRM_RM_MASK, 0)
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xdb 0xe0. */
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xdb 0xe1. */
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xdb 0xe2. */
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xdb 0xe3. */
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_finit, false /*fCheckXcpts*/);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xdb 0xe4. */
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync IEMOP_MNEMONIC("fnsetpm (80287/ign)"); /* set protected mode on fpu. */
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xdb 0xe5. */
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync IEMOP_MNEMONIC("frstpm (80287XL/ign)"); /* reset pm, back to real mode. */
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync#if 0 /* #UDs on newer CPUs */
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xdb 11/5. */
8ae783bf7da7b2f0abb7b8d243b79aaafa35aa73vboxsync return IEM_MC_DEFER_TO_CIMPL_3(iemCImpl_fcomi_fucomi, bRm & X86_MODRM_RM_MASK, iemAImpl_fucomi_r80_by_r80, false /*fPop*/);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xdb 11/6. */
8ae783bf7da7b2f0abb7b8d243b79aaafa35aa73vboxsync return IEM_MC_DEFER_TO_CIMPL_3(iemCImpl_fcomi_fucomi, bRm & X86_MODRM_RM_MASK, iemAImpl_fcomi_r80_by_r80, false /*fPop*/);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xdb. */
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
04da102834f5018a410bab9ce590c319dfa41824vboxsync case 5: return FNIEMOP_CALL_1(iemOp_fucomi_stN, bRm);
04da102834f5018a410bab9ce590c319dfa41824vboxsync case 6: return FNIEMOP_CALL_1(iemOp_fcomi_stN, bRm);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync case 0: return FNIEMOP_CALL_1(iemOp_fild_m32i, bRm);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync case 1: return FNIEMOP_CALL_1(iemOp_fisttp_m32i,bRm);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync case 2: return FNIEMOP_CALL_1(iemOp_fist_m32i, bRm);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync case 3: return FNIEMOP_CALL_1(iemOp_fistp_m32i, bRm);
d280ee7a17fc630c6a421724d49e1cd28edcac10vboxsync case 5: return FNIEMOP_CALL_1(iemOp_fld_m80r, bRm);
d280ee7a17fc630c6a421724d49e1cd28edcac10vboxsync case 7: return FNIEMOP_CALL_1(iemOp_fstp_m80r, bRm);
9ea3cc17cb4036e70709045b4216c2016cb9d34fvboxsync * Common worker for FPU instructions working on STn and ST0, and storing the
9ea3cc17cb4036e70709045b4216c2016cb9d34fvboxsync * result in STn unless IE, DE or ZE was raised.
9ea3cc17cb4036e70709045b4216c2016cb9d34fvboxsync * @param pfnAImpl Pointer to the instruction implementation (assembly).
9ea3cc17cb4036e70709045b4216c2016cb9d34fvboxsyncFNIEMOP_DEF_2(iemOpHlpFpu_stN_st0, uint8_t, bRm, PFNIEMAIMPLFPUR80, pfnAImpl)
9ea3cc17cb4036e70709045b4216c2016cb9d34fvboxsync IEM_MC_ARG_LOCAL_REF(PIEMFPURESULT, pFpuRes, FpuRes, 0);
9ea3cc17cb4036e70709045b4216c2016cb9d34fvboxsync IEM_MC_IF_TWO_FPUREGS_NOT_EMPTY_REF_R80(pr80Value1, bRm & X86_MODRM_RM_MASK, pr80Value2, 0)
9ea3cc17cb4036e70709045b4216c2016cb9d34fvboxsync IEM_MC_CALL_FPU_AIMPL_3(pfnAImpl, pFpuRes, pr80Value1, pr80Value2);
9ea3cc17cb4036e70709045b4216c2016cb9d34fvboxsync IEM_MC_STORE_FPU_RESULT(FpuRes, bRm & X86_MODRM_RM_MASK);
9ea3cc17cb4036e70709045b4216c2016cb9d34fvboxsync IEM_MC_FPU_STACK_UNDERFLOW(bRm & X86_MODRM_RM_MASK);
04da102834f5018a410bab9ce590c319dfa41824vboxsync/** Opcode 0xdc 11/0. */
9ea3cc17cb4036e70709045b4216c2016cb9d34fvboxsync return FNIEMOP_CALL_2(iemOpHlpFpu_stN_st0, bRm, iemAImpl_fadd_r80_by_r80);
04da102834f5018a410bab9ce590c319dfa41824vboxsync/** Opcode 0xdc 11/1. */
9ea3cc17cb4036e70709045b4216c2016cb9d34fvboxsync return FNIEMOP_CALL_2(iemOpHlpFpu_stN_st0, bRm, iemAImpl_fmul_r80_by_r80);
04da102834f5018a410bab9ce590c319dfa41824vboxsync/** Opcode 0xdc 11/4. */
9ea3cc17cb4036e70709045b4216c2016cb9d34fvboxsync return FNIEMOP_CALL_2(iemOpHlpFpu_stN_st0, bRm, iemAImpl_fsubr_r80_by_r80);
04da102834f5018a410bab9ce590c319dfa41824vboxsync/** Opcode 0xdc 11/5. */
9ea3cc17cb4036e70709045b4216c2016cb9d34fvboxsync return FNIEMOP_CALL_2(iemOpHlpFpu_stN_st0, bRm, iemAImpl_fsub_r80_by_r80);
04da102834f5018a410bab9ce590c319dfa41824vboxsync/** Opcode 0xdc 11/6. */
9ea3cc17cb4036e70709045b4216c2016cb9d34fvboxsync return FNIEMOP_CALL_2(iemOpHlpFpu_stN_st0, bRm, iemAImpl_fdivr_r80_by_r80);
04da102834f5018a410bab9ce590c319dfa41824vboxsync/** Opcode 0xdc 11/7. */
9ea3cc17cb4036e70709045b4216c2016cb9d34fvboxsync return FNIEMOP_CALL_2(iemOpHlpFpu_stN_st0, bRm, iemAImpl_fdiv_r80_by_r80);
53e42b967136278d8a79d9b0eec8c0ff70c390aavboxsync * Common worker for FPU instructions working on ST0 and a 64-bit floating point
53e42b967136278d8a79d9b0eec8c0ff70c390aavboxsync * memory operand, and storing the result in ST0.
ce1318f291ab810c19aa03ce38d6a87679ba3af7vboxsync * @param pfnAImpl Pointer to the instruction implementation (assembly).
53e42b967136278d8a79d9b0eec8c0ff70c390aavboxsyncFNIEMOP_DEF_2(iemOpHlpFpu_ST0_m64r, uint8_t, bRm, PFNIEMAIMPLFPUR64, pfnImpl)
b3eb676cebf5407921b8f535095ca7655edb9db3vboxsync IEM_MC_ARG_LOCAL_REF(PIEMFPURESULT, pFpuRes, FpuRes, 0);
b3eb676cebf5407921b8f535095ca7655edb9db3vboxsync IEM_MC_ARG_LOCAL_REF(PRTFLOAT64U, pr64Factor2, r64Factor2, 2);
b3eb676cebf5407921b8f535095ca7655edb9db3vboxsync IEM_MC_FETCH_MEM_R64(r64Factor2, pIemCpu->iEffSeg, GCPtrEffSrc);
53e42b967136278d8a79d9b0eec8c0ff70c390aavboxsync IEM_MC_CALL_FPU_AIMPL_3(pfnImpl, pFpuRes, pr80Factor1, pr64Factor2);
b3eb676cebf5407921b8f535095ca7655edb9db3vboxsync IEM_MC_STORE_FPU_RESULT_MEM_OP(FpuRes, 0, pIemCpu->iEffSeg, GCPtrEffSrc);
b3eb676cebf5407921b8f535095ca7655edb9db3vboxsync IEM_MC_FPU_STACK_UNDERFLOW_MEM_OP(0, pIemCpu->iEffSeg, GCPtrEffSrc);
53e42b967136278d8a79d9b0eec8c0ff70c390aavboxsync/** Opcode 0xdc !11/0. */
53e42b967136278d8a79d9b0eec8c0ff70c390aavboxsync return FNIEMOP_CALL_2(iemOpHlpFpu_ST0_m64r, bRm, iemAImpl_fadd_r80_by_r64);
53e42b967136278d8a79d9b0eec8c0ff70c390aavboxsync/** Opcode 0xdc !11/1. */
53e42b967136278d8a79d9b0eec8c0ff70c390aavboxsync return FNIEMOP_CALL_2(iemOpHlpFpu_ST0_m64r, bRm, iemAImpl_fmul_r80_by_r64);
04da102834f5018a410bab9ce590c319dfa41824vboxsync/** Opcode 0xdc !11/2. */
9ea3cc17cb4036e70709045b4216c2016cb9d34fvboxsync IEM_MC_ARG_LOCAL_REF(uint16_t *, pu16Fsw, u16Fsw, 0);
9ea3cc17cb4036e70709045b4216c2016cb9d34fvboxsync IEM_MC_ARG_LOCAL_REF(PCRTFLOAT64U, pr64Val2, r64Val2, 2);
9ea3cc17cb4036e70709045b4216c2016cb9d34fvboxsync IEM_MC_FETCH_MEM_R64(r64Val2, pIemCpu->iEffSeg, GCPtrEffSrc);
9ea3cc17cb4036e70709045b4216c2016cb9d34fvboxsync IEM_MC_CALL_FPU_AIMPL_3(iemAImpl_fcom_r80_by_r64, pu16Fsw, pr80Value1, pr64Val2);
9ea3cc17cb4036e70709045b4216c2016cb9d34fvboxsync IEM_MC_UPDATE_FSW_WITH_MEM_OP(u16Fsw, pIemCpu->iEffSeg, GCPtrEffSrc);
9ea3cc17cb4036e70709045b4216c2016cb9d34fvboxsync IEM_MC_FPU_STACK_UNDERFLOW_MEM_OP(UINT8_MAX, pIemCpu->iEffSeg, GCPtrEffSrc);
04da102834f5018a410bab9ce590c319dfa41824vboxsync/** Opcode 0xdc !11/3. */
9ea3cc17cb4036e70709045b4216c2016cb9d34fvboxsync IEM_MC_ARG_LOCAL_REF(uint16_t *, pu16Fsw, u16Fsw, 0);
9ea3cc17cb4036e70709045b4216c2016cb9d34fvboxsync IEM_MC_ARG_LOCAL_REF(PCRTFLOAT64U, pr64Val2, r64Val2, 2);
9ea3cc17cb4036e70709045b4216c2016cb9d34fvboxsync IEM_MC_FETCH_MEM_R64(r64Val2, pIemCpu->iEffSeg, GCPtrEffSrc);
9ea3cc17cb4036e70709045b4216c2016cb9d34fvboxsync IEM_MC_CALL_FPU_AIMPL_3(iemAImpl_fcom_r80_by_r64, pu16Fsw, pr80Value1, pr64Val2);
9ea3cc17cb4036e70709045b4216c2016cb9d34fvboxsync IEM_MC_UPDATE_FSW_WITH_MEM_OP_THEN_POP(u16Fsw, pIemCpu->iEffSeg, GCPtrEffSrc);
9ea3cc17cb4036e70709045b4216c2016cb9d34fvboxsync IEM_MC_FPU_STACK_UNDERFLOW_MEM_OP_THEN_POP(UINT8_MAX, pIemCpu->iEffSeg, GCPtrEffSrc);
04da102834f5018a410bab9ce590c319dfa41824vboxsync/** Opcode 0xdc !11/4. */
53e42b967136278d8a79d9b0eec8c0ff70c390aavboxsync return FNIEMOP_CALL_2(iemOpHlpFpu_ST0_m64r, bRm, iemAImpl_fsub_r80_by_r64);
04da102834f5018a410bab9ce590c319dfa41824vboxsync/** Opcode 0xdc !11/5. */
53e42b967136278d8a79d9b0eec8c0ff70c390aavboxsync return FNIEMOP_CALL_2(iemOpHlpFpu_ST0_m64r, bRm, iemAImpl_fsubr_r80_by_r64);
04da102834f5018a410bab9ce590c319dfa41824vboxsync/** Opcode 0xdc !11/6. */
53e42b967136278d8a79d9b0eec8c0ff70c390aavboxsync return FNIEMOP_CALL_2(iemOpHlpFpu_ST0_m64r, bRm, iemAImpl_fdiv_r80_by_r64);
04da102834f5018a410bab9ce590c319dfa41824vboxsync/** Opcode 0xdc !11/7. */
53e42b967136278d8a79d9b0eec8c0ff70c390aavboxsync return FNIEMOP_CALL_2(iemOpHlpFpu_ST0_m64r, bRm, iemAImpl_fdivr_r80_by_r64);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xdc. */
04da102834f5018a410bab9ce590c319dfa41824vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
04da102834f5018a410bab9ce590c319dfa41824vboxsync switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
04da102834f5018a410bab9ce590c319dfa41824vboxsync case 0: return FNIEMOP_CALL_1(iemOp_fadd_stN_st0, bRm);
04da102834f5018a410bab9ce590c319dfa41824vboxsync case 1: return FNIEMOP_CALL_1(iemOp_fmul_stN_st0, bRm);
c3a0242d1bc97bc1bef926c4db3678cc51c84793vboxsync case 2: return FNIEMOP_CALL_1(iemOp_fcom_stN, bRm); /* Marked reserved, intel behavior is that of FCOM ST(i). */
c3a0242d1bc97bc1bef926c4db3678cc51c84793vboxsync case 3: return FNIEMOP_CALL_1(iemOp_fcomp_stN, bRm); /* Marked reserved, intel behavior is that of FCOMP ST(i). */
04da102834f5018a410bab9ce590c319dfa41824vboxsync case 4: return FNIEMOP_CALL_1(iemOp_fsubr_stN_st0, bRm);
04da102834f5018a410bab9ce590c319dfa41824vboxsync case 5: return FNIEMOP_CALL_1(iemOp_fsub_stN_st0, bRm);
04da102834f5018a410bab9ce590c319dfa41824vboxsync case 6: return FNIEMOP_CALL_1(iemOp_fdivr_stN_st0, bRm);
04da102834f5018a410bab9ce590c319dfa41824vboxsync case 7: return FNIEMOP_CALL_1(iemOp_fdiv_stN_st0, bRm);
04da102834f5018a410bab9ce590c319dfa41824vboxsync switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
04da102834f5018a410bab9ce590c319dfa41824vboxsync case 0: return FNIEMOP_CALL_1(iemOp_fadd_m64r, bRm);
04da102834f5018a410bab9ce590c319dfa41824vboxsync case 1: return FNIEMOP_CALL_1(iemOp_fmul_m64r, bRm);
04da102834f5018a410bab9ce590c319dfa41824vboxsync case 2: return FNIEMOP_CALL_1(iemOp_fcom_m64r, bRm);
04da102834f5018a410bab9ce590c319dfa41824vboxsync case 3: return FNIEMOP_CALL_1(iemOp_fcomp_m64r, bRm);
04da102834f5018a410bab9ce590c319dfa41824vboxsync case 4: return FNIEMOP_CALL_1(iemOp_fsub_m64r, bRm);
04da102834f5018a410bab9ce590c319dfa41824vboxsync case 5: return FNIEMOP_CALL_1(iemOp_fsubr_m64r, bRm);
04da102834f5018a410bab9ce590c319dfa41824vboxsync case 6: return FNIEMOP_CALL_1(iemOp_fdiv_m64r, bRm);
04da102834f5018a410bab9ce590c319dfa41824vboxsync case 7: return FNIEMOP_CALL_1(iemOp_fdivr_m64r, bRm);
58b7ab82f43487a8a838dbeb96387c0d27b527f1vboxsync/** Opcode 0xdd !11/0.
58b7ab82f43487a8a838dbeb96387c0d27b527f1vboxsync * @sa iemOp_fld_m32r */
58b7ab82f43487a8a838dbeb96387c0d27b527f1vboxsync IEM_MC_ARG_LOCAL_REF(PIEMFPURESULT, pFpuRes, FpuRes, 0);
5ca366bb4004d8335376abb1718d1cb9beedf4efvboxsync IEM_MC_ARG_LOCAL_REF(PCRTFLOAT64U, pr64Val, r64Val, 1);
58b7ab82f43487a8a838dbeb96387c0d27b527f1vboxsync IEM_MC_FETCH_MEM_R64(r64Val, pIemCpu->iEffSeg, GCPtrEffSrc);
5ca366bb4004d8335376abb1718d1cb9beedf4efvboxsync IEM_MC_CALL_FPU_AIMPL_2(iemAImpl_fld_r64_to_r80, pFpuRes, pr64Val);
5ca366bb4004d8335376abb1718d1cb9beedf4efvboxsync IEM_MC_PUSH_FPU_RESULT_MEM_OP(FpuRes, pIemCpu->iEffSeg, GCPtrEffSrc);
5ca366bb4004d8335376abb1718d1cb9beedf4efvboxsync IEM_MC_FPU_STACK_PUSH_OVERFLOW_MEM_OP(pIemCpu->iEffSeg, GCPtrEffSrc);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xdd !11/0. */
d280ee7a17fc630c6a421724d49e1cd28edcac10vboxsync IEM_MC_ARG_LOCAL_REF(uint16_t *, pu16Fsw, u16Fsw, 0);
d280ee7a17fc630c6a421724d49e1cd28edcac10vboxsync IEM_MC_MEM_MAP(pi64Dst, IEM_ACCESS_DATA_W, pIemCpu->iEffSeg, GCPtrEffDst, 1 /*arg*/);
d280ee7a17fc630c6a421724d49e1cd28edcac10vboxsync IEM_MC_CALL_FPU_AIMPL_3(iemAImpl_fistt_r80_to_i64, pu16Fsw, pi64Dst, pr80Value);
d280ee7a17fc630c6a421724d49e1cd28edcac10vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP_FOR_FPU_STORE(pi64Dst, IEM_ACCESS_DATA_W, u16Fsw);
d280ee7a17fc630c6a421724d49e1cd28edcac10vboxsync IEM_MC_UPDATE_FSW_WITH_MEM_OP_THEN_POP(u16Fsw, pIemCpu->iEffSeg, GCPtrEffDst);
d280ee7a17fc630c6a421724d49e1cd28edcac10vboxsync IEM_MC_STORE_MEM_I64_CONST_BY_REF(pi64Dst, INT64_MIN /* (integer indefinite) */);
d280ee7a17fc630c6a421724d49e1cd28edcac10vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pi64Dst, IEM_ACCESS_DATA_W);
d280ee7a17fc630c6a421724d49e1cd28edcac10vboxsync IEM_MC_FPU_STACK_UNDERFLOW_MEM_OP_THEN_POP(UINT8_MAX, pIemCpu->iEffSeg, GCPtrEffDst);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xdd !11/0. */
44e92d62784be5a0b1410eb28c248a4603bbed40vboxsync IEM_MC_ARG_LOCAL_REF(uint16_t *, pu16Fsw, u16Fsw, 0);
b5df0afad3afdbe8424359a4a97733c0f8c2b5c4vboxsync IEM_MC_MEM_MAP(pr64Dst, IEM_ACCESS_DATA_W, pIemCpu->iEffSeg, GCPtrEffDst, 1 /*arg*/);
44e92d62784be5a0b1410eb28c248a4603bbed40vboxsync IEM_MC_CALL_FPU_AIMPL_3(iemAImpl_fst_r80_to_r64, pu16Fsw, pr64Dst, pr80Value);
d280ee7a17fc630c6a421724d49e1cd28edcac10vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP_FOR_FPU_STORE(pr64Dst, IEM_ACCESS_DATA_W, u16Fsw);
44e92d62784be5a0b1410eb28c248a4603bbed40vboxsync IEM_MC_UPDATE_FSW_WITH_MEM_OP(u16Fsw, pIemCpu->iEffSeg, GCPtrEffDst);
d280ee7a17fc630c6a421724d49e1cd28edcac10vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pr64Dst, IEM_ACCESS_DATA_W);
b5df0afad3afdbe8424359a4a97733c0f8c2b5c4vboxsync IEM_MC_FPU_STACK_UNDERFLOW_MEM_OP(UINT8_MAX, pIemCpu->iEffSeg, GCPtrEffDst);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xdd !11/0. */
44e92d62784be5a0b1410eb28c248a4603bbed40vboxsync IEM_MC_ARG_LOCAL_REF(uint16_t *, pu16Fsw, u16Fsw, 0);
b5df0afad3afdbe8424359a4a97733c0f8c2b5c4vboxsync IEM_MC_MEM_MAP(pr64Dst, IEM_ACCESS_DATA_W, pIemCpu->iEffSeg, GCPtrEffDst, 1 /*arg*/);
44e92d62784be5a0b1410eb28c248a4603bbed40vboxsync IEM_MC_CALL_FPU_AIMPL_3(iemAImpl_fst_r80_to_r64, pu16Fsw, pr64Dst, pr80Value);
d280ee7a17fc630c6a421724d49e1cd28edcac10vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP_FOR_FPU_STORE(pr64Dst, IEM_ACCESS_DATA_W, u16Fsw);
44e92d62784be5a0b1410eb28c248a4603bbed40vboxsync IEM_MC_UPDATE_FSW_WITH_MEM_OP_THEN_POP(u16Fsw, pIemCpu->iEffSeg, GCPtrEffDst);
d280ee7a17fc630c6a421724d49e1cd28edcac10vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pr64Dst, IEM_ACCESS_DATA_W);
b5df0afad3afdbe8424359a4a97733c0f8c2b5c4vboxsync IEM_MC_FPU_STACK_UNDERFLOW_MEM_OP_THEN_POP(UINT8_MAX, pIemCpu->iEffSeg, GCPtrEffDst);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xdd !11/0. */
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xdd !11/0. */
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xdd !11/0. */
12709910a6c0ee9053dbe6c13820752a0e30acc0vboxsync IEM_MC_STORE_MEM_U16(pIemCpu->iEffSeg, GCPtrEffDst, u16Tmp);
f74327eabb87ebb53205b7f1c0ae2258f13989ffvboxsync/** @todo Debug / drop a hint to the verifier that things may differ
f74327eabb87ebb53205b7f1c0ae2258f13989ffvboxsync * from REM. Seen 0x4020 (iem) vs 0x4000 (rem) at 0008:801c6b88 booting
f74327eabb87ebb53205b7f1c0ae2258f13989ffvboxsync * NT4SP1. (X86_FSW_PE) */
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xdd 11/0. */
12709910a6c0ee9053dbe6c13820752a0e30acc0vboxsync /* Note! C0, C1, C2 and C3 are documented as undefined, we leave the
12709910a6c0ee9053dbe6c13820752a0e30acc0vboxsync unmodified. */
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xdd 11/1. */
9b94aa72f427a17f12197fe27073265341da7f52vboxsync IEM_MC_SET_FPU_RESULT(FpuRes, 0 /*FSW*/, pr80Value);
9b94aa72f427a17f12197fe27073265341da7f52vboxsync IEM_MC_STORE_FPU_RESULT(FpuRes, bRm & X86_MODRM_RM_MASK);
9b94aa72f427a17f12197fe27073265341da7f52vboxsync IEM_MC_FPU_STACK_UNDERFLOW(bRm & X86_MODRM_RM_MASK);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xdd 11/3. */
9b94aa72f427a17f12197fe27073265341da7f52vboxsync return FNIEMOP_CALL_2(iemOpHlpFpuNoStore_st0_stN, bRm, iemAImpl_fucom_r80_by_r80);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xdd 11/4. */
9b94aa72f427a17f12197fe27073265341da7f52vboxsync return FNIEMOP_CALL_2(iemOpHlpFpuNoStore_st0_stN_pop, bRm, iemAImpl_fucom_r80_by_r80);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync/** Opcode 0xdd. */
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
c3a0242d1bc97bc1bef926c4db3678cc51c84793vboxsync case 0: return FNIEMOP_CALL_1(iemOp_ffree_stN, bRm);
fa6b73f3e642b12f88ea56488b7059f9910d5e3bvboxsync case 1: return FNIEMOP_CALL_1(iemOp_fxch_stN, bRm); /* Reserved, intel behavior is that of XCHG ST(i). */
c3a0242d1bc97bc1bef926c4db3678cc51c84793vboxsync case 3: return FNIEMOP_CALL_1(iemOp_fstp_stN, bRm);
c3a0242d1bc97bc1bef926c4db3678cc51c84793vboxsync case 4: return FNIEMOP_CALL_1(iemOp_fucom_stN_st0,bRm);
c3a0242d1bc97bc1bef926c4db3678cc51c84793vboxsync case 5: return FNIEMOP_CALL_1(iemOp_fucomp_stN, bRm);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync case 0: return FNIEMOP_CALL_1(iemOp_fld_m64r, bRm);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync case 1: return FNIEMOP_CALL_1(iemOp_fisttp_m64i, bRm);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync case 2: return FNIEMOP_CALL_1(iemOp_fst_m64r, bRm);
06194245f8ac73bd13b903e4870fb667bb003ee9vboxsync case 3: return FNIEMOP_CALL_1(iemOp_fstp_m64r, bRm);
c3a0242d1bc97bc1bef926c4db3678cc51c84793vboxsync/** Opcode 0xde 11/0. */
ce1318f291ab810c19aa03ce38d6a87679ba3af7vboxsync return FNIEMOP_CALL_2(iemOpHlpFpu_stN_st0_pop, bRm, iemAImpl_fadd_r80_by_r80);
c3a0242d1bc97bc1bef926c4db3678cc51c84793vboxsync/** Opcode 0xde 11/0. */
ce1318f291ab810c19aa03ce38d6a87679ba3af7vboxsync return FNIEMOP_CALL_2(iemOpHlpFpu_stN_st0_pop, bRm, iemAImpl_fmul_r80_by_r80);
d4a8f6749f70bad88edc04de808643d372faa35avboxsync/** Opcode 0xde 0xd9. */
9b94aa72f427a17f12197fe27073265341da7f52vboxsync return FNIEMOP_CALL_1(iemOpHlpFpuNoStore_st0_stN_pop_pop, iemAImpl_fcom_r80_by_r80);
c3a0242d1bc97bc1bef926c4db3678cc51c84793vboxsync/** Opcode 0xde 11/4. */
ce1318f291ab810c19aa03ce38d6a87679ba3af7vboxsync return FNIEMOP_CALL_2(iemOpHlpFpu_stN_st0_pop, bRm, iemAImpl_fsubr_r80_by_r80);
c3a0242d1bc97bc1bef926c4db3678cc51c84793vboxsync/** Opcode 0xde 11/5. */
ce1318f291ab810c19aa03ce38d6a87679ba3af7vboxsync return FNIEMOP_CALL_2(iemOpHlpFpu_stN_st0_pop, bRm, iemAImpl_fsub_r80_by_r80);
c3a0242d1bc97bc1bef926c4db3678cc51c84793vboxsync/** Opcode 0xde 11/6. */
ce1318f291ab810c19aa03ce38d6a87679ba3af7vboxsync return FNIEMOP_CALL_2(iemOpHlpFpu_stN_st0_pop, bRm, iemAImpl_fdivr_r80_by_r80);
c3a0242d1bc97bc1bef926c4db3678cc51c84793vboxsync/** Opcode 0xde 11/7. */
ce1318f291ab810c19aa03ce38d6a87679ba3af7vboxsync return FNIEMOP_CALL_2(iemOpHlpFpu_stN_st0_pop, bRm, iemAImpl_fdiv_r80_by_r80);
9f2a126861374bb11fb9e70265f8a4b6260ccb77vboxsync * Common worker for FPU instructions working on ST0 and an m16i, and storing
9f2a126861374bb11fb9e70265f8a4b6260ccb77vboxsync * the result in ST0.
9f2a126861374bb11fb9e70265f8a4b6260ccb77vboxsync * @param pfnAImpl Pointer to the instruction implementation (assembly).
9f2a126861374bb11fb9e70265f8a4b6260ccb77vboxsyncFNIEMOP_DEF_2(iemOpHlpFpu_st0_m16i, uint8_t, bRm, PFNIEMAIMPLFPUI16, pfnAImpl)
9f2a126861374bb11fb9e70265f8a4b6260ccb77vboxsync IEM_MC_ARG_LOCAL_REF(PIEMFPURESULT, pFpuRes, FpuRes, 0);
9f2a126861374bb11fb9e70265f8a4b6260ccb77vboxsync IEM_MC_ARG_LOCAL_REF(int16_t const *, pi16Val2, i16Val2, 2);
9f2a126861374bb11fb9e70265f8a4b6260ccb77vboxsync IEM_MC_FETCH_MEM_I16(i16Val2, pIemCpu->iEffSeg, GCPtrEffSrc);
9f2a126861374bb11fb9e70265f8a4b6260ccb77vboxsync IEM_MC_CALL_FPU_AIMPL_3(pfnAImpl, pFpuRes, pr80Value1, pi16Val2);
c3a0242d1bc97bc1bef926c4db3678cc51c84793vboxsync/** Opcode 0xde !11/0. */
9f2a126861374bb11fb9e70265f8a4b6260ccb77vboxsync return FNIEMOP_CALL_2(iemOpHlpFpu_st0_m16i, bRm, iemAImpl_fiadd_r80_by_i16);
c3a0242d1bc97bc1bef926c4db3678cc51c84793vboxsync/** Opcode 0xde !11/1. */
9f2a126861374bb11fb9e70265f8a4b6260ccb77vboxsync return FNIEMOP_CALL_2(iemOpHlpFpu_st0_m16i, bRm, iemAImpl_fimul_r80_by_i16);
c3a0242d1bc97bc1bef926c4db3678cc51c84793vboxsync/** Opcode 0xde !11/2. */
9f2a126861374bb11fb9e70265f8a4b6260ccb77vboxsync IEM_MC_ARG_LOCAL_REF(uint16_t *, pu16Fsw, u16Fsw, 0);
9f2a126861374bb11fb9e70265f8a4b6260ccb77vboxsync IEM_MC_ARG_LOCAL_REF(int16_t const *, pi16Val2, i16Val2, 2);
9f2a126861374bb11fb9e70265f8a4b6260ccb77vboxsync IEM_MC_FETCH_MEM_I16(i16Val2, pIemCpu->iEffSeg, GCPtrEffSrc);
9f2a126861374bb11fb9e70265f8a4b6260ccb77vboxsync IEM_MC_CALL_FPU_AIMPL_3(iemAImpl_ficom_r80_by_i16, pu16Fsw, pr80Value1, pi16Val2);
9f2a126861374bb11fb9e70265f8a4b6260ccb77vboxsync IEM_MC_UPDATE_FSW_WITH_MEM_OP(u16Fsw, pIemCpu->iEffSeg, GCPtrEffSrc);
9f2a126861374bb11fb9e70265f8a4b6260ccb77vboxsync IEM_MC_FPU_STACK_UNDERFLOW_MEM_OP(UINT8_MAX, pIemCpu->iEffSeg, GCPtrEffSrc);
c3a0242d1bc97bc1bef926c4db3678cc51c84793vboxsync/** Opcode 0xde !11/3. */
9f2a126861374bb11fb9e70265f8a4b6260ccb77vboxsync IEM_MC_ARG_LOCAL_REF(uint16_t *, pu16Fsw, u16Fsw, 0);
9f2a126861374bb11fb9e70265f8a4b6260ccb77vboxsync IEM_MC_ARG_LOCAL_REF(int16_t const *, pi16Val2, i16Val2, 2);
9f2a126861374bb11fb9e70265f8a4b6260ccb77vboxsync IEM_MC_FETCH_MEM_I16(i16Val2, pIemCpu->iEffSeg, GCPtrEffSrc);
9f2a126861374bb11fb9e70265f8a4b6260ccb77vboxsync IEM_MC_CALL_FPU_AIMPL_3(iemAImpl_ficom_r80_by_i16, pu16Fsw, pr80Value1, pi16Val2);
9f2a126861374bb11fb9e70265f8a4b6260ccb77vboxsync IEM_MC_UPDATE_FSW_WITH_MEM_OP_THEN_POP(u16Fsw, pIemCpu->iEffSeg, GCPtrEffSrc);
9f2a126861374bb11fb9e70265f8a4b6260ccb77vboxsync IEM_MC_FPU_STACK_UNDERFLOW_MEM_OP_THEN_POP(UINT8_MAX, pIemCpu->iEffSeg, GCPtrEffSrc);
c3a0242d1bc97bc1bef926c4db3678cc51c84793vboxsync/** Opcode 0xde !11/4. */
9f2a126861374bb11fb9e70265f8a4b6260ccb77vboxsync return FNIEMOP_CALL_2(iemOpHlpFpu_st0_m16i, bRm, iemAImpl_fisub_r80_by_i16);
c3a0242d1bc97bc1bef926c4db3678cc51c84793vboxsync/** Opcode 0xde !11/5. */
9f2a126861374bb11fb9e70265f8a4b6260ccb77vboxsync return FNIEMOP_CALL_2(iemOpHlpFpu_st0_m16i, bRm, iemAImpl_fisubr_r80_by_i16);
c3a0242d1bc97bc1bef926c4db3678cc51c84793vboxsync/** Opcode 0xde !11/6. */
9f2a126861374bb11fb9e70265f8a4b6260ccb77vboxsync return FNIEMOP_CALL_2(iemOpHlpFpu_st0_m16i, bRm, iemAImpl_fidiv_r80_by_i16);
c3a0242d1bc97bc1bef926c4db3678cc51c84793vboxsync/** Opcode 0xde !11/7. */
9f2a126861374bb11fb9e70265f8a4b6260ccb77vboxsync return FNIEMOP_CALL_2(iemOpHlpFpu_st0_m16i, bRm, iemAImpl_fidivr_r80_by_i16);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xde. */
d4a8f6749f70bad88edc04de808643d372faa35avboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
c3a0242d1bc97bc1bef926c4db3678cc51c84793vboxsync switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
c3a0242d1bc97bc1bef926c4db3678cc51c84793vboxsync case 0: return FNIEMOP_CALL_1(iemOp_faddp_stN_st0, bRm);
c3a0242d1bc97bc1bef926c4db3678cc51c84793vboxsync case 1: return FNIEMOP_CALL_1(iemOp_fmulp_stN_st0, bRm);
5d13786cdbbfe98a4ba8476845c80d1396d62272vboxsync case 2: return FNIEMOP_CALL_1(iemOp_fcomp_stN, bRm);
c3a0242d1bc97bc1bef926c4db3678cc51c84793vboxsync case 4: return FNIEMOP_CALL_1(iemOp_fsubrp_stN_st0, bRm);
c3a0242d1bc97bc1bef926c4db3678cc51c84793vboxsync case 5: return FNIEMOP_CALL_1(iemOp_fsubp_stN_st0, bRm);
c3a0242d1bc97bc1bef926c4db3678cc51c84793vboxsync case 6: return FNIEMOP_CALL_1(iemOp_fdivrp_stN_st0, bRm);
c3a0242d1bc97bc1bef926c4db3678cc51c84793vboxsync case 7: return FNIEMOP_CALL_1(iemOp_fdivp_stN_st0, bRm);
d4a8f6749f70bad88edc04de808643d372faa35avboxsync switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
c3a0242d1bc97bc1bef926c4db3678cc51c84793vboxsync case 0: return FNIEMOP_CALL_1(iemOp_fiadd_m16i, bRm);
c3a0242d1bc97bc1bef926c4db3678cc51c84793vboxsync case 1: return FNIEMOP_CALL_1(iemOp_fimul_m16i, bRm);
c3a0242d1bc97bc1bef926c4db3678cc51c84793vboxsync case 2: return FNIEMOP_CALL_1(iemOp_ficom_m16i, bRm);
c3a0242d1bc97bc1bef926c4db3678cc51c84793vboxsync case 3: return FNIEMOP_CALL_1(iemOp_ficomp_m16i, bRm);
c3a0242d1bc97bc1bef926c4db3678cc51c84793vboxsync case 4: return FNIEMOP_CALL_1(iemOp_fisub_m16i, bRm);
c3a0242d1bc97bc1bef926c4db3678cc51c84793vboxsync case 5: return FNIEMOP_CALL_1(iemOp_fisubr_m16i, bRm);
c3a0242d1bc97bc1bef926c4db3678cc51c84793vboxsync case 6: return FNIEMOP_CALL_1(iemOp_fidiv_m16i, bRm);
c3a0242d1bc97bc1bef926c4db3678cc51c84793vboxsync case 7: return FNIEMOP_CALL_1(iemOp_fidivr_m16i, bRm);
12709910a6c0ee9053dbe6c13820752a0e30acc0vboxsync/** Opcode 0xdf 11/0.
12709910a6c0ee9053dbe6c13820752a0e30acc0vboxsync * Undocument instruction, assumed to work like ffree + fincstp. */
d4a8f6749f70bad88edc04de808643d372faa35avboxsync/** Opcode 0xdf 0xe0. */
c3a0242d1bc97bc1bef926c4db3678cc51c84793vboxsync/** Opcode 0xdf 11/5. */
8ae783bf7da7b2f0abb7b8d243b79aaafa35aa73vboxsync return IEM_MC_DEFER_TO_CIMPL_3(iemCImpl_fcomi_fucomi, bRm & X86_MODRM_RM_MASK, iemAImpl_fcomi_r80_by_r80, true /*fPop*/);
c3a0242d1bc97bc1bef926c4db3678cc51c84793vboxsync/** Opcode 0xdf 11/6. */
8ae783bf7da7b2f0abb7b8d243b79aaafa35aa73vboxsync return IEM_MC_DEFER_TO_CIMPL_3(iemCImpl_fcomi_fucomi, bRm & X86_MODRM_RM_MASK, iemAImpl_fcomi_r80_by_r80, true /*fPop*/);
c3a0242d1bc97bc1bef926c4db3678cc51c84793vboxsync/** Opcode 0xdf !11/0. */
c3a0242d1bc97bc1bef926c4db3678cc51c84793vboxsync/** Opcode 0xdf !11/1. */
d280ee7a17fc630c6a421724d49e1cd28edcac10vboxsync IEM_MC_ARG_LOCAL_REF(uint16_t *, pu16Fsw, u16Fsw, 0);
d280ee7a17fc630c6a421724d49e1cd28edcac10vboxsync IEM_MC_MEM_MAP(pi16Dst, IEM_ACCESS_DATA_W, pIemCpu->iEffSeg, GCPtrEffDst, 1 /*arg*/);
d280ee7a17fc630c6a421724d49e1cd28edcac10vboxsync IEM_MC_CALL_FPU_AIMPL_3(iemAImpl_fistt_r80_to_i16, pu16Fsw, pi16Dst, pr80Value);
d280ee7a17fc630c6a421724d49e1cd28edcac10vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP_FOR_FPU_STORE(pi16Dst, IEM_ACCESS_DATA_W, u16Fsw);
d280ee7a17fc630c6a421724d49e1cd28edcac10vboxsync IEM_MC_UPDATE_FSW_WITH_MEM_OP_THEN_POP(u16Fsw, pIemCpu->iEffSeg, GCPtrEffDst);
d280ee7a17fc630c6a421724d49e1cd28edcac10vboxsync IEM_MC_STORE_MEM_I16_CONST_BY_REF(pi16Dst, INT16_MIN /* (integer indefinite) */);
d280ee7a17fc630c6a421724d49e1cd28edcac10vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pi16Dst, IEM_ACCESS_DATA_W);
d280ee7a17fc630c6a421724d49e1cd28edcac10vboxsync IEM_MC_FPU_STACK_UNDERFLOW_MEM_OP_THEN_POP(UINT8_MAX, pIemCpu->iEffSeg, GCPtrEffDst);
c3a0242d1bc97bc1bef926c4db3678cc51c84793vboxsync/** Opcode 0xdf !11/2. */
d280ee7a17fc630c6a421724d49e1cd28edcac10vboxsync IEM_MC_ARG_LOCAL_REF(uint16_t *, pu16Fsw, u16Fsw, 0);
d280ee7a17fc630c6a421724d49e1cd28edcac10vboxsync IEM_MC_MEM_MAP(pi16Dst, IEM_ACCESS_DATA_W, pIemCpu->iEffSeg, GCPtrEffDst, 1 /*arg*/);
d280ee7a17fc630c6a421724d49e1cd28edcac10vboxsync IEM_MC_CALL_FPU_AIMPL_3(iemAImpl_fist_r80_to_i16, pu16Fsw, pi16Dst, pr80Value);
d280ee7a17fc630c6a421724d49e1cd28edcac10vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP_FOR_FPU_STORE(pi16Dst, IEM_ACCESS_DATA_W, u16Fsw);
d280ee7a17fc630c6a421724d49e1cd28edcac10vboxsync IEM_MC_UPDATE_FSW_WITH_MEM_OP(u16Fsw, pIemCpu->iEffSeg, GCPtrEffDst);
d280ee7a17fc630c6a421724d49e1cd28edcac10vboxsync IEM_MC_STORE_MEM_I16_CONST_BY_REF(pi16Dst, INT16_MIN /* (integer indefinite) */);
d280ee7a17fc630c6a421724d49e1cd28edcac10vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pi16Dst, IEM_ACCESS_DATA_W);
d280ee7a17fc630c6a421724d49e1cd28edcac10vboxsync IEM_MC_FPU_STACK_UNDERFLOW_MEM_OP(UINT8_MAX, pIemCpu->iEffSeg, GCPtrEffDst);
c3a0242d1bc97bc1bef926c4db3678cc51c84793vboxsync/** Opcode 0xdf !11/3. */
d280ee7a17fc630c6a421724d49e1cd28edcac10vboxsync IEM_MC_ARG_LOCAL_REF(uint16_t *, pu16Fsw, u16Fsw, 0);
d280ee7a17fc630c6a421724d49e1cd28edcac10vboxsync IEM_MC_MEM_MAP(pi16Dst, IEM_ACCESS_DATA_W, pIemCpu->iEffSeg, GCPtrEffDst, 1 /*arg*/);
d280ee7a17fc630c6a421724d49e1cd28edcac10vboxsync IEM_MC_CALL_FPU_AIMPL_3(iemAImpl_fist_r80_to_i16, pu16Fsw, pi16Dst, pr80Value);
d280ee7a17fc630c6a421724d49e1cd28edcac10vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP_FOR_FPU_STORE(pi16Dst, IEM_ACCESS_DATA_W, u16Fsw);
d280ee7a17fc630c6a421724d49e1cd28edcac10vboxsync IEM_MC_UPDATE_FSW_WITH_MEM_OP_THEN_POP(u16Fsw, pIemCpu->iEffSeg, GCPtrEffDst);
d280ee7a17fc630c6a421724d49e1cd28edcac10vboxsync IEM_MC_STORE_MEM_I16_CONST_BY_REF(pi16Dst, INT16_MIN /* (integer indefinite) */);
d280ee7a17fc630c6a421724d49e1cd28edcac10vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pi16Dst, IEM_ACCESS_DATA_W);
d280ee7a17fc630c6a421724d49e1cd28edcac10vboxsync IEM_MC_FPU_STACK_UNDERFLOW_MEM_OP_THEN_POP(UINT8_MAX, pIemCpu->iEffSeg, GCPtrEffDst);
c3a0242d1bc97bc1bef926c4db3678cc51c84793vboxsync/** Opcode 0xdf !11/4. */
c3a0242d1bc97bc1bef926c4db3678cc51c84793vboxsync/** Opcode 0xdf !11/5. */
c3a0242d1bc97bc1bef926c4db3678cc51c84793vboxsync/** Opcode 0xdf !11/6. */
c3a0242d1bc97bc1bef926c4db3678cc51c84793vboxsync/** Opcode 0xdf !11/7. */
d280ee7a17fc630c6a421724d49e1cd28edcac10vboxsync IEM_MC_ARG_LOCAL_REF(uint16_t *, pu16Fsw, u16Fsw, 0);
d280ee7a17fc630c6a421724d49e1cd28edcac10vboxsync IEM_MC_MEM_MAP(pi64Dst, IEM_ACCESS_DATA_W, pIemCpu->iEffSeg, GCPtrEffDst, 1 /*arg*/);
d280ee7a17fc630c6a421724d49e1cd28edcac10vboxsync IEM_MC_CALL_FPU_AIMPL_3(iemAImpl_fist_r80_to_i64, pu16Fsw, pi64Dst, pr80Value);
d280ee7a17fc630c6a421724d49e1cd28edcac10vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP_FOR_FPU_STORE(pi64Dst, IEM_ACCESS_DATA_W, u16Fsw);
d280ee7a17fc630c6a421724d49e1cd28edcac10vboxsync IEM_MC_UPDATE_FSW_WITH_MEM_OP_THEN_POP(u16Fsw, pIemCpu->iEffSeg, GCPtrEffDst);
d280ee7a17fc630c6a421724d49e1cd28edcac10vboxsync IEM_MC_STORE_MEM_I64_CONST_BY_REF(pi64Dst, INT64_MIN /* (integer indefinite) */);
d280ee7a17fc630c6a421724d49e1cd28edcac10vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pi64Dst, IEM_ACCESS_DATA_W);
d280ee7a17fc630c6a421724d49e1cd28edcac10vboxsync IEM_MC_FPU_STACK_UNDERFLOW_MEM_OP_THEN_POP(UINT8_MAX, pIemCpu->iEffSeg, GCPtrEffDst);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xdf. */
d4a8f6749f70bad88edc04de808643d372faa35avboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
c3a0242d1bc97bc1bef926c4db3678cc51c84793vboxsync switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
c3a0242d1bc97bc1bef926c4db3678cc51c84793vboxsync case 0: return FNIEMOP_CALL_1(iemOp_ffreep_stN, bRm); /* ffree + pop afterwards, since forever according to AMD. */
6e561e438c22d6525356608a7962efda30ba5740vboxsync case 1: return FNIEMOP_CALL_1(iemOp_fxch_stN, bRm); /* Reserved, behaves like FXCH ST(i) on intel. */
6e561e438c22d6525356608a7962efda30ba5740vboxsync case 2: return FNIEMOP_CALL_1(iemOp_fstp_stN, bRm); /* Reserved, behaves like FSTP ST(i) on intel. */
6e561e438c22d6525356608a7962efda30ba5740vboxsync case 3: return FNIEMOP_CALL_1(iemOp_fstp_stN, bRm); /* Reserved, behaves like FSTP ST(i) on intel. */
c3a0242d1bc97bc1bef926c4db3678cc51c84793vboxsync case 5: return FNIEMOP_CALL_1(iemOp_fucomip_st0_stN, bRm);
c3a0242d1bc97bc1bef926c4db3678cc51c84793vboxsync case 6: return FNIEMOP_CALL_1(iemOp_fcomip_st0_stN, bRm);
c3a0242d1bc97bc1bef926c4db3678cc51c84793vboxsync switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
c3a0242d1bc97bc1bef926c4db3678cc51c84793vboxsync case 0: return FNIEMOP_CALL_1(iemOp_fild_m16i, bRm);
c3a0242d1bc97bc1bef926c4db3678cc51c84793vboxsync case 1: return FNIEMOP_CALL_1(iemOp_fisttp_m16i, bRm);
c3a0242d1bc97bc1bef926c4db3678cc51c84793vboxsync case 2: return FNIEMOP_CALL_1(iemOp_fist_m16i, bRm);
c3a0242d1bc97bc1bef926c4db3678cc51c84793vboxsync case 3: return FNIEMOP_CALL_1(iemOp_fistp_m16i, bRm);
c3a0242d1bc97bc1bef926c4db3678cc51c84793vboxsync case 4: return FNIEMOP_CALL_1(iemOp_fbld_m80d, bRm);
c3a0242d1bc97bc1bef926c4db3678cc51c84793vboxsync case 5: return FNIEMOP_CALL_1(iemOp_fild_m64i, bRm);
c3a0242d1bc97bc1bef926c4db3678cc51c84793vboxsync case 6: return FNIEMOP_CALL_1(iemOp_fbstp_m80d, bRm);
c3a0242d1bc97bc1bef926c4db3678cc51c84793vboxsync case 7: return FNIEMOP_CALL_1(iemOp_fistp_m64i, bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xe0. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_IF_CX_IS_NZ_AND_EFL_BIT_NOT_SET(X86_EFL_ZF) {
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_IF_ECX_IS_NZ_AND_EFL_BIT_NOT_SET(X86_EFL_ZF) {
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_IF_RCX_IS_NZ_AND_EFL_BIT_NOT_SET(X86_EFL_ZF) {
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xe1. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xe2. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /** @todo Check out the #GP case if EIP < CS.Base or EIP > CS.Limit when
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * using the 32-bit operand size override. How can that be restarted? See
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * weird pseudo code in intel manual. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xe3. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xe4 */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return IEM_MC_DEFER_TO_CIMPL_2(iemCImpl_in, u8Imm, 1);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xe5 */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return IEM_MC_DEFER_TO_CIMPL_2(iemCImpl_in, u8Imm, pIemCpu->enmEffOpSize == IEMMODE_16BIT ? 2 : 4);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xe6 */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return IEM_MC_DEFER_TO_CIMPL_2(iemCImpl_out, u8Imm, 1);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xe7 */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return IEM_MC_DEFER_TO_CIMPL_2(iemCImpl_out, u8Imm, pIemCpu->enmEffOpSize == IEMMODE_16BIT ? 2 : 4);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xe8. */
37fd636275891bcf75bd60c624d8fbf3f262c435vboxsync return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_call_rel_16, (int16_t)u16Imm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_call_rel_32, (int32_t)u32Imm);
ea4433aedd4105e6599e57e0c5f6cb32a68e963cvboxsync uint64_t u64Imm; IEM_OPCODE_GET_NEXT_S32_SX_U64(&u64Imm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_call_rel_64, u64Imm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xe9. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xea. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* Decode the far pointer address and pass it on to the far call C implementation. */
a13bd47f22085c82960265c150f10f2195369630vboxsync return IEM_MC_DEFER_TO_CIMPL_3(iemCImpl_FarJmp, uSel, offSeg, pIemCpu->enmEffOpSize);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xeb. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xec */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_in_eAX_DX, 1);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xed */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_in_eAX_DX, pIemCpu->enmEffOpSize == IEMMODE_16BIT ? 2 : 4);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xee */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_out_DX_eAX, 1);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xef */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_out_DX_eAX, pIemCpu->enmEffOpSize == IEMMODE_16BIT ? 2 : 4);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xf0. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xf2. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* This overrides any previous REPE prefix. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xf3. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* This overrides any previous REPNE prefix. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xf4. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xf5. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * @param bRm The RM byte.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * @param pImpl The instruction implementation.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_DEF_2(iemOpCommonUnaryEb, uint8_t, bRm, PCIEMOPUNARYSIZES, pImpl)
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* register access */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U8(pu8Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_2(pImpl->pfnNormalU8, pu8Dst, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* memory access. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_MAP(pu8Dst, IEM_ACCESS_DATA_RW, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_2(pImpl->pfnNormalU8, pu8Dst, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_2(pImpl->pfnLockedU8, pu8Dst, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pu8Dst, IEM_ACCESS_DATA_RW);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * @param bRm The RM byte.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * @param pImpl The instruction implementation.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_DEF_2(iemOpCommonUnaryEv, uint8_t, bRm, PCIEMOPUNARYSIZES, pImpl)
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* Registers are handled by a common worker. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_2(iemOpCommonUnaryGReg, pImpl, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* Memory we do here. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_MAP(pu16Dst, IEM_ACCESS_DATA_RW, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_2(pImpl->pfnNormalU16, pu16Dst, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_2(pImpl->pfnLockedU16, pu16Dst, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pu16Dst, IEM_ACCESS_DATA_RW);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_MAP(pu32Dst, IEM_ACCESS_DATA_RW, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_2(pImpl->pfnNormalU32, pu32Dst, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_2(pImpl->pfnLockedU32, pu32Dst, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pu32Dst, IEM_ACCESS_DATA_RW);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_MAP(pu64Dst, IEM_ACCESS_DATA_RW, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_2(pImpl->pfnNormalU64, pu64Dst, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_2(pImpl->pfnLockedU64, pu64Dst, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pu64Dst, IEM_ACCESS_DATA_RW);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xf6 /0. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* register access */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U8(pu8Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_test_u8, pu8Dst, u8Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* memory access. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_MAP(pu8Dst, IEM_ACCESS_DATA_R, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_test_u8, pu8Dst, u8Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pu8Dst, IEM_ACCESS_DATA_R);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xf7 /0. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* register access */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U16(pu16Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_test_u16, pu16Dst, u16Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U32(pu32Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_test_u32, pu32Dst, u32Src, pEFlags);
ea4433aedd4105e6599e57e0c5f6cb32a68e963cvboxsync uint64_t u64Imm; IEM_OPCODE_GET_NEXT_S32_SX_U64(&u64Imm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U64(pu64Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_test_u64, pu64Dst, u64Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* memory access. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_MAP(pu16Dst, IEM_ACCESS_DATA_R, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_test_u16, pu16Dst, u16Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pu16Dst, IEM_ACCESS_DATA_R);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_MAP(pu32Dst, IEM_ACCESS_DATA_R, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_test_u32, pu32Dst, u32Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pu32Dst, IEM_ACCESS_DATA_R);
ea4433aedd4105e6599e57e0c5f6cb32a68e963cvboxsync uint64_t u64Imm; IEM_OPCODE_GET_NEXT_S32_SX_U64(&u64Imm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_MAP(pu64Dst, IEM_ACCESS_DATA_R, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_test_u64, pu64Dst, u64Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pu64Dst, IEM_ACCESS_DATA_R);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xf6 /4, /5, /6 and /7. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_DEF_2(iemOpCommonGrp3MulDivEb, uint8_t, bRm, PFNIEMAIMPLMULDIVU8, pfnU8)
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* register access */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U8(u8Value, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pfnU8, pu16AX, u8Value, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* memory access. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_MEM_U8(u8Value, pIemCpu->iEffSeg, GCPtrEffDst);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pfnU8, pu16AX, u8Value, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xf7 /4, /5, /6 and /7. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_DEF_2(iemOpCommonGrp3MulDivEv, uint8_t, bRm, PCIEMOPMULDIVSIZES, pImpl)
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
b64efece437bfca8872b81be9d0568ba90389d91vboxsync IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* register access */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U16(u16Value, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_AIMPL_4(rc, pImpl->pfnU16, pu16AX, pu16DX, u16Value, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U32(u32Value, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_AIMPL_4(rc, pImpl->pfnU32, pu32AX, pu32DX, u32Value, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U64(u64Value, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_AIMPL_4(rc, pImpl->pfnU64, pu64AX, pu64DX, u64Value, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* memory access. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_MEM_U16(u16Value, pIemCpu->iEffSeg, GCPtrEffDst);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_AIMPL_4(rc, pImpl->pfnU16, pu16AX, pu16DX, u16Value, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_MEM_U32(u32Value, pIemCpu->iEffSeg, GCPtrEffDst);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_AIMPL_4(rc, pImpl->pfnU32, pu32AX, pu32DX, u32Value, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_MEM_U64(u64Value, pIemCpu->iEffSeg, GCPtrEffDst);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_AIMPL_4(rc, pImpl->pfnU64, pu64AX, pu64DX, u64Value, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xf6. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_2(iemOpCommonUnaryEb, bRm, &g_iemAImpl_not);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_2(iemOpCommonUnaryEb, bRm, &g_iemAImpl_neg);
b64efece437bfca8872b81be9d0568ba90389d91vboxsync IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF);
ea4433aedd4105e6599e57e0c5f6cb32a68e963cvboxsync return FNIEMOP_CALL_2(iemOpCommonGrp3MulDivEb, bRm, iemAImpl_mul_u8);
b64efece437bfca8872b81be9d0568ba90389d91vboxsync IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF);
ea4433aedd4105e6599e57e0c5f6cb32a68e963cvboxsync return FNIEMOP_CALL_2(iemOpCommonGrp3MulDivEb, bRm, iemAImpl_imul_u8);
b64efece437bfca8872b81be9d0568ba90389d91vboxsync IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF | X86_EFL_OF | X86_EFL_CF);
ea4433aedd4105e6599e57e0c5f6cb32a68e963cvboxsync return FNIEMOP_CALL_2(iemOpCommonGrp3MulDivEb, bRm, iemAImpl_div_u8);
b64efece437bfca8872b81be9d0568ba90389d91vboxsync IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF | X86_EFL_OF | X86_EFL_CF);
ea4433aedd4105e6599e57e0c5f6cb32a68e963cvboxsync return FNIEMOP_CALL_2(iemOpCommonGrp3MulDivEb, bRm, iemAImpl_idiv_u8);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xf7. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_2(iemOpCommonUnaryEv, bRm, &g_iemAImpl_not);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_2(iemOpCommonUnaryEv, bRm, &g_iemAImpl_neg);
b64efece437bfca8872b81be9d0568ba90389d91vboxsync IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_2(iemOpCommonGrp3MulDivEv, bRm, &g_iemAImpl_mul);
b64efece437bfca8872b81be9d0568ba90389d91vboxsync IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_2(iemOpCommonGrp3MulDivEv, bRm, &g_iemAImpl_imul);
b64efece437bfca8872b81be9d0568ba90389d91vboxsync IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF | X86_EFL_OF | X86_EFL_CF);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_2(iemOpCommonGrp3MulDivEv, bRm, &g_iemAImpl_div);
b64efece437bfca8872b81be9d0568ba90389d91vboxsync IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF | X86_EFL_OF | X86_EFL_CF);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_2(iemOpCommonGrp3MulDivEv, bRm, &g_iemAImpl_idiv);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xf8. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xf9. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xfa. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xfc. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xfd. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xfe. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_2(iemOpCommonUnaryEb, bRm, &g_iemAImpl_inc);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_2(iemOpCommonUnaryEb, bRm, &g_iemAImpl_dec);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Opcode 0xff /2.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * @param bRm The RM byte.
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo Too early? */
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync /* The new RIP is taken from a register. */
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync IEM_MC_FETCH_GREG_U16(u16Target, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync IEM_MC_FETCH_GREG_U32(u32Target, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync IEM_MC_FETCH_GREG_U64(u64Target, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync /* The new RIP is taken from a register. */
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync IEM_MC_FETCH_MEM_U16(u16Target, pIemCpu->iEffSeg, GCPtrEffSrc);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync IEM_MC_FETCH_MEM_U32(u32Target, pIemCpu->iEffSeg, GCPtrEffSrc);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync IEM_MC_FETCH_MEM_U64(u64Target, pIemCpu->iEffSeg, GCPtrEffSrc);
a5c06635c167bb56b73b3defda0ac2bcd86e940fvboxsynctypedef IEM_CIMPL_DECL_TYPE_3(FNIEMCIMPLFARBRANCH, uint16_t, uSel, uint64_t, offSeg, IEMMODE, enmOpSize);
a5c06635c167bb56b73b3defda0ac2bcd86e940fvboxsyncFNIEMOP_DEF_2(iemOpHlp_Grp5_far_Ep, uint8_t, bRm, FNIEMCIMPLFARBRANCH *, pfnCImpl)
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* Registers? How?? */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
7dfd3f41f200bede0714c89735d9cc8d310e3f1cvboxsync return IEMOP_RAISE_INVALID_OPCODE(); /* callf eax is not legal */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* Far pointer loaded from memory. */
a13bd47f22085c82960265c150f10f2195369630vboxsync IEM_MC_ARG_CONST(IEMMODE, enmEffOpSize, IEMMODE_16BIT, 2);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_MEM_U16(offSeg, pIemCpu->iEffSeg, GCPtrEffSrc);
c2f73fbf271131906a68f2583f744fe791dd0f11vboxsync IEM_MC_FETCH_MEM_U16_DISP(u16Sel, pIemCpu->iEffSeg, GCPtrEffSrc, 2);
a5c06635c167bb56b73b3defda0ac2bcd86e940fvboxsync IEM_MC_CALL_CIMPL_3(pfnCImpl, u16Sel, offSeg, enmEffOpSize);
a13bd47f22085c82960265c150f10f2195369630vboxsync IEM_MC_ARG_CONST(IEMMODE, enmEffOpSize, IEMMODE_32BIT, 2);
a13bd47f22085c82960265c150f10f2195369630vboxsync IEM_MC_FETCH_MEM_U32(offSeg, pIemCpu->iEffSeg, GCPtrEffSrc);
c2f73fbf271131906a68f2583f744fe791dd0f11vboxsync IEM_MC_FETCH_MEM_U16_DISP(u16Sel, pIemCpu->iEffSeg, GCPtrEffSrc, 4);
a5c06635c167bb56b73b3defda0ac2bcd86e940fvboxsync IEM_MC_CALL_CIMPL_3(pfnCImpl, u16Sel, offSeg, enmEffOpSize);
a13bd47f22085c82960265c150f10f2195369630vboxsync IEM_MC_ARG_CONST(IEMMODE, enmEffOpSize, IEMMODE_16BIT, 2);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_MEM_U64(offSeg, pIemCpu->iEffSeg, GCPtrEffSrc);
c2f73fbf271131906a68f2583f744fe791dd0f11vboxsync IEM_MC_FETCH_MEM_U16_DISP(u16Sel, pIemCpu->iEffSeg, GCPtrEffSrc, 8);
a5c06635c167bb56b73b3defda0ac2bcd86e940fvboxsync IEM_MC_CALL_CIMPL_3(pfnCImpl, u16Sel, offSeg, enmEffOpSize);
a5c06635c167bb56b73b3defda0ac2bcd86e940fvboxsync * Opcode 0xff /3.
a5c06635c167bb56b73b3defda0ac2bcd86e940fvboxsync * @param bRm The RM byte.
a5c06635c167bb56b73b3defda0ac2bcd86e940fvboxsync return FNIEMOP_CALL_2(iemOpHlp_Grp5_far_Ep, bRm, iemCImpl_callf);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Opcode 0xff /4.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * @param bRm The RM byte.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo Too early? */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* The new RIP is taken from a register. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U16(u16Target, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U32(u32Target, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U64(u64Target, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* The new RIP is taken from a register. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_MEM_U16(u16Target, pIemCpu->iEffSeg, GCPtrEffSrc);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_MEM_U32(u32Target, pIemCpu->iEffSeg, GCPtrEffSrc);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_MEM_U32(u32Target, pIemCpu->iEffSeg, GCPtrEffSrc);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Opcode 0xff /5.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * @param bRm The RM byte.
a5c06635c167bb56b73b3defda0ac2bcd86e940fvboxsync return FNIEMOP_CALL_2(iemOpHlp_Grp5_far_Ep, bRm, iemCImpl_FarJmp);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Opcode 0xff /6.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * @param bRm The RM byte.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo Too early? */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* Registers are handled by a common worker. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonPushGReg, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* Memory we do here. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_MEM_U16(u16Src, pIemCpu->iEffSeg, GCPtrEffSrc);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_MEM_U32(u32Src, pIemCpu->iEffSeg, GCPtrEffSrc);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_MEM_U64(u64Src, pIemCpu->iEffSeg, GCPtrEffSrc);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xff. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_2(iemOpCommonUnaryEv, bRm, &g_iemAImpl_inc);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_2(iemOpCommonUnaryEv, bRm, &g_iemAImpl_dec);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x00 */ iemOp_add_Eb_Gb, iemOp_add_Ev_Gv, iemOp_add_Gb_Eb, iemOp_add_Gv_Ev,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x04 */ iemOp_add_Al_Ib, iemOp_add_eAX_Iz, iemOp_push_ES, iemOp_pop_ES,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x08 */ iemOp_or_Eb_Gb, iemOp_or_Ev_Gv, iemOp_or_Gb_Eb, iemOp_or_Gv_Ev,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x0c */ iemOp_or_Al_Ib, iemOp_or_eAX_Iz, iemOp_push_CS, iemOp_2byteEscape,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x10 */ iemOp_adc_Eb_Gb, iemOp_adc_Ev_Gv, iemOp_adc_Gb_Eb, iemOp_adc_Gv_Ev,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x14 */ iemOp_adc_Al_Ib, iemOp_adc_eAX_Iz, iemOp_push_SS, iemOp_pop_SS,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x18 */ iemOp_sbb_Eb_Gb, iemOp_sbb_Ev_Gv, iemOp_sbb_Gb_Eb, iemOp_sbb_Gv_Ev,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x1c */ iemOp_sbb_Al_Ib, iemOp_sbb_eAX_Iz, iemOp_push_DS, iemOp_pop_DS,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x20 */ iemOp_and_Eb_Gb, iemOp_and_Ev_Gv, iemOp_and_Gb_Eb, iemOp_and_Gv_Ev,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x24 */ iemOp_and_Al_Ib, iemOp_and_eAX_Iz, iemOp_seg_ES, iemOp_daa,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x28 */ iemOp_sub_Eb_Gb, iemOp_sub_Ev_Gv, iemOp_sub_Gb_Eb, iemOp_sub_Gv_Ev,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x2c */ iemOp_sub_Al_Ib, iemOp_sub_eAX_Iz, iemOp_seg_CS, iemOp_das,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x30 */ iemOp_xor_Eb_Gb, iemOp_xor_Ev_Gv, iemOp_xor_Gb_Eb, iemOp_xor_Gv_Ev,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x34 */ iemOp_xor_Al_Ib, iemOp_xor_eAX_Iz, iemOp_seg_SS, iemOp_aaa,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x38 */ iemOp_cmp_Eb_Gb, iemOp_cmp_Ev_Gv, iemOp_cmp_Gb_Eb, iemOp_cmp_Gv_Ev,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x3c */ iemOp_cmp_Al_Ib, iemOp_cmp_eAX_Iz, iemOp_seg_DS, iemOp_aas,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x40 */ iemOp_inc_eAX, iemOp_inc_eCX, iemOp_inc_eDX, iemOp_inc_eBX,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x44 */ iemOp_inc_eSP, iemOp_inc_eBP, iemOp_inc_eSI, iemOp_inc_eDI,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x48 */ iemOp_dec_eAX, iemOp_dec_eCX, iemOp_dec_eDX, iemOp_dec_eBX,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x4c */ iemOp_dec_eSP, iemOp_dec_eBP, iemOp_dec_eSI, iemOp_dec_eDI,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x50 */ iemOp_push_eAX, iemOp_push_eCX, iemOp_push_eDX, iemOp_push_eBX,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x54 */ iemOp_push_eSP, iemOp_push_eBP, iemOp_push_eSI, iemOp_push_eDI,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x58 */ iemOp_pop_eAX, iemOp_pop_eCX, iemOp_pop_eDX, iemOp_pop_eBX,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x5c */ iemOp_pop_eSP, iemOp_pop_eBP, iemOp_pop_eSI, iemOp_pop_eDI,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x60 */ iemOp_pusha, iemOp_popa, iemOp_bound_Gv_Ma, iemOp_arpl_Ew_Gw,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x64 */ iemOp_seg_FS, iemOp_seg_GS, iemOp_op_size, iemOp_addr_size,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x68 */ iemOp_push_Iz, iemOp_imul_Gv_Ev_Iz, iemOp_push_Ib, iemOp_imul_Gv_Ev_Ib,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x6c */ iemOp_insb_Yb_DX, iemOp_inswd_Yv_DX, iemOp_outsb_Yb_DX, iemOp_outswd_Yv_DX,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x70 */ iemOp_jo_Jb, iemOp_jno_Jb, iemOp_jc_Jb, iemOp_jnc_Jb,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x74 */ iemOp_je_Jb, iemOp_jne_Jb, iemOp_jbe_Jb, iemOp_jnbe_Jb,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x78 */ iemOp_js_Jb, iemOp_jns_Jb, iemOp_jp_Jb, iemOp_jnp_Jb,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x7c */ iemOp_jl_Jb, iemOp_jnl_Jb, iemOp_jle_Jb, iemOp_jnle_Jb,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x80 */ iemOp_Grp1_Eb_Ib_80, iemOp_Grp1_Ev_Iz, iemOp_Grp1_Eb_Ib_82, iemOp_Grp1_Ev_Ib,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x84 */ iemOp_test_Eb_Gb, iemOp_test_Ev_Gv, iemOp_xchg_Eb_Gb, iemOp_xchg_Ev_Gv,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x88 */ iemOp_mov_Eb_Gb, iemOp_mov_Ev_Gv, iemOp_mov_Gb_Eb, iemOp_mov_Gv_Ev,
cda57af9589fa1c4aedbee904fc3f3139409c97bvboxsync /* 0x8c */ iemOp_mov_Ev_Sw, iemOp_lea_Gv_M, iemOp_mov_Sw_Ev, iemOp_Grp1A,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x90 */ iemOp_nop, iemOp_xchg_eCX_eAX, iemOp_xchg_eDX_eAX, iemOp_xchg_eBX_eAX,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x94 */ iemOp_xchg_eSP_eAX, iemOp_xchg_eBP_eAX, iemOp_xchg_eSI_eAX, iemOp_xchg_eDI_eAX,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x98 */ iemOp_cbw, iemOp_cwd, iemOp_call_Ap, iemOp_wait,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x9c */ iemOp_pushf_Fv, iemOp_popf_Fv, iemOp_sahf, iemOp_lahf,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0xa0 */ iemOp_mov_Al_Ob, iemOp_mov_rAX_Ov, iemOp_mov_Ob_AL, iemOp_mov_Ov_rAX,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0xa4 */ iemOp_movsb_Xb_Yb, iemOp_movswd_Xv_Yv, iemOp_cmpsb_Xb_Yb, iemOp_cmpswd_Xv_Yv,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0xa8 */ iemOp_test_AL_Ib, iemOp_test_eAX_Iz, iemOp_stosb_Yb_AL, iemOp_stoswd_Yv_eAX,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0xac */ iemOp_lodsb_AL_Xb, iemOp_lodswd_eAX_Xv, iemOp_scasb_AL_Xb, iemOp_scaswd_eAX_Xv,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0xb0 */ iemOp_mov_AL_Ib, iemOp_CL_Ib, iemOp_DL_Ib, iemOp_BL_Ib,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0xb4 */ iemOp_mov_AH_Ib, iemOp_CH_Ib, iemOp_DH_Ib, iemOp_BH_Ib,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0xb8 */ iemOp_eAX_Iv, iemOp_eCX_Iv, iemOp_eDX_Iv, iemOp_eBX_Iv,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0xbc */ iemOp_eSP_Iv, iemOp_eBP_Iv, iemOp_eSI_Iv, iemOp_eDI_Iv,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0xc0 */ iemOp_Grp2_Eb_Ib, iemOp_Grp2_Ev_Ib, iemOp_retn_Iw, iemOp_retn,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0xc4 */ iemOp_les_Gv_Mp, iemOp_lds_Gv_Mp, iemOp_Grp11_Eb_Ib, iemOp_Grp11_Ev_Iz,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0xc8 */ iemOp_enter_Iw_Ib, iemOp_leave, iemOp_retf_Iw, iemOp_retf,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0xcc */ iemOp_int_3, iemOp_int_Ib, iemOp_into, iemOp_iret,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0xd0 */ iemOp_Grp2_Eb_1, iemOp_Grp2_Ev_1, iemOp_Grp2_Eb_CL, iemOp_Grp2_Ev_CL,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0xd4 */ iemOp_aam_Ib, iemOp_aad_Ib, iemOp_Invalid, iemOp_xlat,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0xd8 */ iemOp_EscF0, iemOp_EscF1, iemOp_EscF2, iemOp_EscF3,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0xdc */ iemOp_EscF4, iemOp_EscF5, iemOp_EscF6, iemOp_EscF7,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0xe0 */ iemOp_loopne_Jb, iemOp_loope_Jb, iemOp_loop_Jb, iemOp_jecxz_Jb,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0xe4 */ iemOp_in_AL_Ib, iemOp_in_eAX_Ib, iemOp_out_Ib_AL, iemOp_out_Ib_eAX,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0xe8 */ iemOp_call_Jv, iemOp_jmp_Jv, iemOp_jmp_Ap, iemOp_jmp_Jb,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0xec */ iemOp_in_AL_DX, iemOp_eAX_DX, iemOp_out_DX_AL, iemOp_out_DX_eAX,
ab37cc785e1bcbaaad50b8fb791bfecba6f4b4d5vboxsync /* 0xf0 */ iemOp_lock, iemOp_Invalid, iemOp_repne, iemOp_repe, /** @todo 0xf1 is INT1 / ICEBP. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0xf4 */ iemOp_hlt, iemOp_cmc, iemOp_Grp3_Eb, iemOp_Grp3_Ev,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0xf8 */ iemOp_clc, iemOp_stc, iemOp_cli, iemOp_sti,