IEMAllInstructions.cpp.h revision a2057225ebb25c4bf8b92ca9a13957240816b11f
c97989161fbe75bc14cea477a5443bbf474dd3advboxsync * IEM - Instruction Decoding and Emulation.
c97989161fbe75bc14cea477a5443bbf474dd3advboxsync * Copyright (C) 2011 Oracle Corporation
c94c8bae1cb22e5a796ec69859d930ffea9d9dddvboxsync * This file is part of VirtualBox Open Source Edition (OSE), as
c94c8bae1cb22e5a796ec69859d930ffea9d9dddvboxsync * available from http://www.virtualbox.org. This file is free software;
c94c8bae1cb22e5a796ec69859d930ffea9d9dddvboxsync * you can redistribute it and/or modify it under the terms of the GNU
a16eb14ad7a4b5ef91ddc22d3e8e92d930f736fcvboxsync * General Public License (GPL) as published by the Free Software
a16eb14ad7a4b5ef91ddc22d3e8e92d930f736fcvboxsync * Foundation, in version 2 as it comes in the "COPYING" file of the
a16eb14ad7a4b5ef91ddc22d3e8e92d930f736fcvboxsync * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
a16eb14ad7a4b5ef91ddc22d3e8e92d930f736fcvboxsync * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
a16eb14ad7a4b5ef91ddc22d3e8e92d930f736fcvboxsync * Common worker for instructions like ADD, AND, OR, ++ with a byte
a16eb14ad7a4b5ef91ddc22d3e8e92d930f736fcvboxsync * memory/register as the destination.
a16eb14ad7a4b5ef91ddc22d3e8e92d930f736fcvboxsync * @param pImpl Pointer to the instruction implementation (assembly).
c94c8bae1cb22e5a796ec69859d930ffea9d9dddvboxsyncFNIEMOP_DEF_1(iemOpHlpBinaryOperator_rm_r8, PCIEMOPBINSIZES, pImpl)
c94c8bae1cb22e5a796ec69859d930ffea9d9dddvboxsync * If rm is denoting a register, no more instruction bytes.
c94c8bae1cb22e5a796ec69859d930ffea9d9dddvboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
IEM_MC_FETCH_GREG_U8(u8Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
IEM_MC_END();
uint32_t const fAccess = pImpl->pfnLockedU8 ? IEM_ACCESS_DATA_RW : IEM_ACCESS_DATA_R; /* CMP,TEST */
IEM_MC_FETCH_GREG_U8(u8Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_16BIT:
IEM_MC_FETCH_GREG_U16(u16Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
IEM_MC_END();
case IEMMODE_32BIT:
IEM_MC_FETCH_GREG_U32(u32Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
IEM_MC_END();
case IEMMODE_64BIT:
IEM_MC_FETCH_GREG_U64(u64Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
IEM_MC_END();
uint32_t const fAccess = pImpl->pfnLockedU8 ? IEM_ACCESS_DATA_RW : IEM_ACCESS_DATA_R /* CMP,TEST */;
case IEMMODE_16BIT:
IEM_MC_FETCH_GREG_U16(u16Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
IEM_MC_END();
case IEMMODE_32BIT:
IEM_MC_FETCH_GREG_U32(u32Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
IEM_MC_END();
case IEMMODE_64BIT:
IEM_MC_FETCH_GREG_U64(u64Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
IEM_MC_END();
return VINF_SUCCESS;
IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
IEM_MC_REF_GREG_U8(pu8Dst, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
IEM_MC_END();
IEM_MC_REF_GREG_U8(pu8Dst, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
IEM_MC_END();
return VINF_SUCCESS;
IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
case IEMMODE_16BIT:
IEM_MC_REF_GREG_U16(pu16Dst, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
IEM_MC_END();
case IEMMODE_32BIT:
IEM_MC_REF_GREG_U32(pu32Dst, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
IEM_MC_END();
case IEMMODE_64BIT:
IEM_MC_REF_GREG_U64(pu64Dst, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
IEM_MC_END();
case IEMMODE_16BIT:
IEM_MC_REF_GREG_U16(pu16Dst, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
IEM_MC_END();
case IEMMODE_32BIT:
IEM_MC_REF_GREG_U32(pu32Dst, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
IEM_MC_END();
case IEMMODE_64BIT:
IEM_MC_REF_GREG_U64(pu64Dst, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
IEM_MC_END();
return VINF_SUCCESS;
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_16BIT:
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_32BIT:
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_64BIT:
IEM_MC_END();
return VINF_SUCCESS;
return IEMOP_RAISE_INVALID_OPCODE();
AssertFailed();
return IEMOP_RAISE_INVALID_OPCODE();
AssertFailed();
return IEMOP_RAISE_INVALID_OPCODE();
AssertFailed();
return IEMOP_RAISE_INVALID_OPCODE();
AssertFailed();
return IEMOP_RAISE_INVALID_OPCODE();
IEM_MC_END();
return VINF_SUCCESS;
AssertFailed();
return IEMOP_RAISE_INVALID_OPCODE();
AssertFailed();
return IEMOP_RAISE_INVALID_OPCODE();
IEM_MC_END();
return VINF_SUCCESS;
return IEMOP_RAISE_INVALID_OPCODE();
return IEMOP_RAISE_INVALID_OPCODE();
return IEMOP_RAISE_INVALID_OPCODE();
return IEMOP_RAISE_INVALID_OPCODE();
return IEMOP_RAISE_INVALID_OPCODE();
return IEMOP_RAISE_INVALID_OPCODE();
return IEMOP_RAISE_INVALID_LOCK_PREFIX();
switch (iCrReg)
return IEMOP_RAISE_INVALID_OPCODE();
return IEM_MC_DEFER_TO_CIMPL_2(iemCImpl_mov_Rd_Cd, (X86_MODRM_RM_MASK & bRm) | pIemCpu->uRexB, iCrReg);
return IEMOP_RAISE_INVALID_LOCK_PREFIX();
switch (iCrReg)
return IEMOP_RAISE_INVALID_OPCODE();
return IEM_MC_DEFER_TO_CIMPL_2(iemCImpl_mov_Cd_Rd, iCrReg, (X86_MODRM_RM_MASK & bRm) | pIemCpu->uRexB);
IEM_MC_BEGIN(0, 0);
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
IEM_MC_BEGIN(0, 0);
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
return VINF_SUCCESS;
IEM_MC_BEGIN(0, 0);
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
IEM_MC_BEGIN(0, 0);
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
return VINF_SUCCESS;
IEM_MC_BEGIN(0, 0);
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
IEM_MC_BEGIN(0, 0);
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
return VINF_SUCCESS;
IEM_MC_BEGIN(0, 0);
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
IEM_MC_BEGIN(0, 0);
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
return VINF_SUCCESS;
IEM_MC_BEGIN(0, 0);
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
IEM_MC_BEGIN(0, 0);
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
return VINF_SUCCESS;
IEM_MC_BEGIN(0, 0);
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
IEM_MC_BEGIN(0, 0);
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
return VINF_SUCCESS;
IEM_MC_BEGIN(0, 0);
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
IEM_MC_BEGIN(0, 0);
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
return VINF_SUCCESS;
IEM_MC_BEGIN(0, 0);
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
IEM_MC_BEGIN(0, 0);
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
return VINF_SUCCESS;
IEM_MC_BEGIN(0, 0);
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
IEM_MC_BEGIN(0, 0);
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
return VINF_SUCCESS;
IEM_MC_BEGIN(0, 0);
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
IEM_MC_BEGIN(0, 0);
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
return VINF_SUCCESS;
IEM_MC_BEGIN(0, 0);
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
IEM_MC_BEGIN(0, 0);
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
return VINF_SUCCESS;
IEM_MC_BEGIN(0, 0);
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
IEM_MC_BEGIN(0, 0);
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
return VINF_SUCCESS;
IEM_MC_BEGIN(0, 0);
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
IEM_MC_BEGIN(0, 0);
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
return VINF_SUCCESS;
IEM_MC_BEGIN(0, 0);
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
IEM_MC_BEGIN(0, 0);
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
return VINF_SUCCESS;
IEM_MC_BEGIN(0, 0);
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
IEM_MC_BEGIN(0, 0);
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
return VINF_SUCCESS;
IEM_MC_BEGIN(0, 0);
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
IEM_MC_BEGIN(0, 0);
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
return VINF_SUCCESS;
IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
return IEMOP_RAISE_INVALID_LOCK_PREFIX();
uint8_t const iGReg = ((bRm >> X86_MODRM_REG_SHIFT) & bRm & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg;
case IEMMODE_16BIT:
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_32BIT:
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_64BIT:
IEM_MC_END();
return VINF_SUCCESS;
IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
case IEMMODE_16BIT:
IEM_MC_STORE_GREG_U16(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u16Value);
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_32BIT:
IEM_MC_STORE_GREG_U32(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u32Value);
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_64BIT:
IEM_MC_STORE_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u64Value);
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_16BIT:
IEM_MC_STORE_GREG_U16(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u16Value);
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_32BIT:
IEM_MC_STORE_GREG_U32(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u32Value);
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_64BIT:
IEM_MC_STORE_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u64Value);
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_16BIT:
IEM_MC_END();
case IEMMODE_32BIT:
IEM_MC_END();
case IEMMODE_64BIT:
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_16BIT:
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_32BIT:
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_64BIT:
IEM_MC_END();
return VINF_SUCCESS;
return VINF_SUCCESS;
pIemCpu->fPrefixes |= IEM_OP_PRF_REX | IEM_OP_PRF_REX_R | IEM_OP_PRF_REX_B | IEM_OP_PRF_REX_X | IEM_OP_PRF_SIZE_REX_W;
case IEMMODE_16BIT:
IEM_MC_END();
case IEMMODE_32BIT:
IEM_MC_END();
case IEMMODE_64BIT:
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_16BIT:
IEM_MC_END();
case IEMMODE_32BIT:
IEM_MC_END();
case IEMMODE_64BIT:
IEM_MC_END();
return VINF_SUCCESS;
default: AssertFailed();
case IEMMODE_16BIT:
IEM_MC_BEGIN(0,0);
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_32BIT:
IEM_MC_BEGIN(0,0);
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_64BIT:
IEM_MC_BEGIN(0,0);
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_16BIT:
IEM_MC_STORE_GREG_U16(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u16Tmp);
IEM_MC_END();
IEM_MC_STORE_GREG_U16(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u16Tmp);
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_32BIT:
IEM_MC_STORE_GREG_U32(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u32Tmp);
IEM_MC_END();
IEM_MC_STORE_GREG_U32(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u32Tmp);
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_64BIT:
IEM_MC_STORE_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u64Tmp);
IEM_MC_END();
IEM_MC_STORE_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u64Tmp);
IEM_MC_END();
return VINF_SUCCESS;
IEM_MC_BEGIN(0,0);
case IEMMODE_16BIT:
case IEMMODE_32BIT:
case IEMMODE_64BIT:
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_16BIT:
IEM_MC_STORE_GREG_U16(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u16Tmp);
IEM_MC_END();
IEM_MC_STORE_GREG_U16(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u16Tmp);
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_32BIT:
IEM_MC_STORE_GREG_U32(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u32Tmp);
IEM_MC_END();
IEM_MC_STORE_GREG_U32(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u32Tmp);
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_64BIT:
IEM_MC_STORE_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u64Tmp);
IEM_MC_END();
IEM_MC_STORE_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u64Tmp);
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_16BIT:
case IEMMODE_64BIT:
case IEMMODE_32BIT:
case IEMMODE_16BIT:
case IEMMODE_64BIT:
case IEMMODE_32BIT:
case IEMMODE_16BIT:
case IEMMODE_16BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_rep_outs_op16_addr16, pIemCpu->iEffSeg);
case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_rep_outs_op16_addr32, pIemCpu->iEffSeg);
case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_rep_outs_op16_addr64, pIemCpu->iEffSeg);
case IEMMODE_64BIT:
case IEMMODE_32BIT:
case IEMMODE_16BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_rep_outs_op32_addr16, pIemCpu->iEffSeg);
case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_rep_outs_op32_addr32, pIemCpu->iEffSeg);
case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_rep_outs_op32_addr64, pIemCpu->iEffSeg);
case IEMMODE_16BIT:
case IEMMODE_64BIT:
case IEMMODE_32BIT:
IEM_MC_BEGIN(0, 0);
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
return VINF_SUCCESS;
IEM_MC_BEGIN(0, 0);
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
return VINF_SUCCESS;
IEM_MC_BEGIN(0, 0);
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
return VINF_SUCCESS;
IEM_MC_BEGIN(0, 0);
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
return VINF_SUCCESS;
IEM_MC_BEGIN(0, 0);
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
return VINF_SUCCESS;
IEM_MC_BEGIN(0, 0);
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
return VINF_SUCCESS;
IEM_MC_BEGIN(0, 0);
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
return VINF_SUCCESS;
IEM_MC_BEGIN(0, 0);
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
return VINF_SUCCESS;
IEM_MC_BEGIN(0, 0);
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
return VINF_SUCCESS;
IEM_MC_BEGIN(0, 0);
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
return VINF_SUCCESS;
IEM_MC_BEGIN(0, 0);
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
return VINF_SUCCESS;
IEM_MC_BEGIN(0, 0);
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
return VINF_SUCCESS;
IEM_MC_BEGIN(0, 0);
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
return VINF_SUCCESS;
IEM_MC_BEGIN(0, 0);
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
return VINF_SUCCESS;
IEM_MC_BEGIN(0, 0);
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
return VINF_SUCCESS;
IEM_MC_BEGIN(0, 0);
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
return VINF_SUCCESS;
IEMOP_MNEMONIC2("add\0or\0\0adc\0sbb\0and\0sub\0xor\0cmp" + ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)*4, "Eb,Ib");
IEM_MC_END();
IEM_MC_END();
return VINF_SUCCESS;
IEMOP_MNEMONIC2("add\0or\0\0adc\0sbb\0and\0sub\0xor\0cmp" + ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)*4, "Ev,Iz");
case IEMMODE_16BIT:
IEM_MC_END();
IEM_MC_END();
case IEMMODE_32BIT:
IEM_MC_END();
IEM_MC_END();
case IEMMODE_64BIT:
IEM_MC_END();
IEM_MC_END();
return VINF_SUCCESS;
IEMOP_MNEMONIC2("add\0or\0\0adc\0sbb\0and\0sub\0xor\0cmp" + ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)*4, "Ev,Ib");
case IEMMODE_16BIT:
IEM_MC_END();
case IEMMODE_32BIT:
IEM_MC_END();
case IEMMODE_64BIT:
IEM_MC_END();
case IEMMODE_16BIT:
IEM_MC_END();
case IEMMODE_32BIT:
IEM_MC_END();
case IEMMODE_64BIT:
IEM_MC_END();
return VINF_SUCCESS;
IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
IEM_MC_FETCH_GREG_U8(u8Value, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
IEM_MC_END();
IEM_MC_FETCH_GREG_U8(u8Value, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
IEM_MC_END();
return VINF_SUCCESS;
IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
case IEMMODE_16BIT:
IEM_MC_FETCH_GREG_U16(u16Value, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
IEM_MC_END();
case IEMMODE_32BIT:
IEM_MC_FETCH_GREG_U32(u32Value, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
IEM_MC_END();
case IEMMODE_64BIT:
IEM_MC_FETCH_GREG_U64(u64Value, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
IEM_MC_END();
case IEMMODE_16BIT:
IEM_MC_FETCH_GREG_U16(u16Value, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
IEM_MC_END();
case IEMMODE_32BIT:
IEM_MC_FETCH_GREG_U32(u32Value, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
IEM_MC_END();
case IEMMODE_64BIT:
IEM_MC_FETCH_GREG_U64(u64Value, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
IEM_MC_END();
return VINF_SUCCESS;
IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
IEM_MC_STORE_GREG_U8(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u8Value);
IEM_MC_END();
IEM_MC_STORE_GREG_U8(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u8Value);
IEM_MC_END();
return VINF_SUCCESS;
IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
case IEMMODE_16BIT:
IEM_MC_STORE_GREG_U16(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u16Value);
IEM_MC_END();
case IEMMODE_32BIT:
IEM_MC_STORE_GREG_U32(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u32Value);
IEM_MC_END();
case IEMMODE_64BIT:
IEM_MC_STORE_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u64Value);
IEM_MC_END();
case IEMMODE_16BIT:
IEM_MC_STORE_GREG_U16(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u16Value);
IEM_MC_END();
case IEMMODE_32BIT:
IEM_MC_STORE_GREG_U32(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u32Value);
IEM_MC_END();
case IEMMODE_64BIT:
IEM_MC_STORE_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u64Value);
IEM_MC_END();
return VINF_SUCCESS;
IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
return IEMOP_RAISE_INVALID_OPCODE(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
case IEMMODE_16BIT:
IEM_MC_END();
case IEMMODE_32BIT:
IEM_MC_END();
case IEMMODE_64BIT:
IEM_MC_END();
IEM_MC_END();
return VINF_SUCCESS;
IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
case IEMMODE_16BIT:
IEM_MC_STORE_GREG_U16(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, GCPtrEffSrc);
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_32BIT:
IEM_MC_STORE_GREG_U32(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, GCPtrEffSrc);
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_64BIT:
IEM_MC_STORE_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, GCPtrEffSrc);
IEM_MC_END();
return VINF_SUCCESS;
IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
return IEMOP_RAISE_INVALID_OPCODE(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
IEM_MC_END();
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_16BIT:
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_32BIT:
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_64BIT:
IEM_MC_END();
return VINF_SUCCESS;
IEM_MC_BEGIN(0, 0);
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_16BIT:
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_32BIT:
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_64BIT:
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_16BIT: \
case IEMMODE_32BIT: \
case IEMMODE_64BIT: \
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_16BIT:
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_32BIT:
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_64BIT:
IEM_MC_END();
return VINF_SUCCESS;
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_16BIT:
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_32BIT:
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_64BIT:
IEM_MC_END();
return VINF_SUCCESS;
} IEM_MC_ELSE() { \
} IEM_MC_ENDIF(); \
IEM_MC_ADVANCE_RIP(); \
IEM_MC_END(); \
return VINF_SUCCESS;
case IEMMODE_16BIT:
case IEMMODE_16BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_rep_movs_op16_addr16, pIemCpu->iEffSeg);
case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_rep_movs_op16_addr32, pIemCpu->iEffSeg);
case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_rep_movs_op16_addr64, pIemCpu->iEffSeg);
case IEMMODE_32BIT:
case IEMMODE_16BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_rep_movs_op32_addr16, pIemCpu->iEffSeg);
case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_rep_movs_op32_addr32, pIemCpu->iEffSeg);
case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_rep_movs_op32_addr64, pIemCpu->iEffSeg);
case IEMMODE_64BIT:
case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_rep_movs_op64_addr32, pIemCpu->iEffSeg);
case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_rep_movs_op64_addr64, pIemCpu->iEffSeg);
case IEMMODE_16BIT:
case IEMMODE_32BIT:
case IEMMODE_64BIT:
return VINF_SUCCESS;
} IEM_MC_ELSE() { \
} IEM_MC_ENDIF(); \
IEM_MC_ADVANCE_RIP(); \
IEM_MC_END(); \
return VINF_SUCCESS;
case IEMMODE_16BIT:
case IEMMODE_32BIT:
case IEMMODE_64BIT:
case IEMMODE_16BIT:
case IEMMODE_32BIT:
case IEMMODE_64BIT:
return VINF_SUCCESS;
} IEM_MC_ELSE() { \
} IEM_MC_ENDIF(); \
IEM_MC_ADVANCE_RIP(); \
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_16BIT:
case IEMMODE_32BIT:
case IEMMODE_64BIT:
case IEMMODE_16BIT:
case IEMMODE_32BIT:
case IEMMODE_64BIT:
return VINF_SUCCESS;
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_16BIT:
IEM_MC_END();
case IEMMODE_32BIT:
IEM_MC_END();
case IEMMODE_64BIT:
IEM_MC_END();
return VINF_SUCCESS;
IEM_MC_END();
IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
IEM_MC_END();
return VINF_SUCCESS;
#ifdef IEM_VERIFICATION_MODE
case IEMMODE_16BIT:
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_32BIT:
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_64BIT:
IEM_MC_END();
return VINF_SUCCESS;
IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
case IEMMODE_16BIT:
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_32BIT:
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_64BIT:
IEM_MC_END();
return VINF_SUCCESS;
IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
return IEMOP_RAISE_INVALID_LOCK_PREFIX();
IEM_MC_BEGIN(0, 0);
IEM_MC_END();
IEM_MC_END();
return VINF_SUCCESS;
IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
return IEMOP_RAISE_INVALID_LOCK_PREFIX();
case IEMMODE_16BIT:
IEM_MC_BEGIN(0, 0);
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_32BIT:
IEM_MC_BEGIN(0, 0);
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_64BIT:
IEM_MC_BEGIN(0, 0);
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_16BIT:
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_32BIT:
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_64BIT:
IEM_MC_END();
return VINF_SUCCESS;
IEM_MC_END();
return VINF_SUCCESS;
IEM_MC_END();
IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
IEM_MC_END();
return VINF_SUCCESS;
#ifdef IEM_VERIFICATION_MODE
case IEMMODE_16BIT:
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_32BIT:
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_64BIT:
IEM_MC_END();
return VINF_SUCCESS;
IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
case IEMMODE_16BIT:
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_32BIT:
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_64BIT:
IEM_MC_END();
return VINF_SUCCESS;
IEM_MC_END();
IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
IEM_MC_END();
return VINF_SUCCESS;
#ifdef IEM_VERIFICATION_MODE
case IEMMODE_16BIT:
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_32BIT:
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_64BIT:
IEM_MC_END();
return VINF_SUCCESS;
IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
case IEMMODE_16BIT:
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_32BIT:
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_64BIT:
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_16BIT:
IEM_MC_BEGIN(0,0);
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_32BIT:
IEM_MC_BEGIN(0,0);
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_64BIT:
IEM_MC_BEGIN(0,0);
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_16BIT:
IEM_MC_BEGIN(0,0);
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_32BIT:
IEM_MC_BEGIN(0,0);
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_64BIT:
IEM_MC_BEGIN(0,0);
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_16BIT:
IEM_MC_BEGIN(0,0);
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_32BIT:
IEM_MC_BEGIN(0,0);
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_64BIT:
IEM_MC_BEGIN(0,0);
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_16BIT:
IEM_MC_BEGIN(0,0);
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_32BIT:
IEM_MC_BEGIN(0,0);
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_64BIT:
IEM_MC_BEGIN(0,0);
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
return VINF_SUCCESS;
return IEM_MC_DEFER_TO_CIMPL_2(iemCImpl_out, u8Imm, pIemCpu->enmEffOpSize == IEMMODE_16BIT ? 2 : 4);
case IEMMODE_16BIT:
case IEMMODE_32BIT:
case IEMMODE_64BIT:
case IEMMODE_16BIT:
IEM_MC_BEGIN(0, 0);
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_64BIT:
case IEMMODE_32BIT:
IEM_MC_BEGIN(0, 0);
IEM_MC_END();
return VINF_SUCCESS;
IEM_MC_BEGIN(0, 0);
IEM_MC_END();
return VINF_SUCCESS;
return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_out_DX_eAX, pIemCpu->enmEffOpSize == IEMMODE_16BIT ? 2 : 4);
IEM_MC_END();
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_16BIT:
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_32BIT:
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_64BIT:
IEM_MC_END();
return VINF_SUCCESS;
IEM_MC_END();
IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
IEM_MC_END();
return VINF_SUCCESS;
IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
case IEMMODE_16BIT:
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_32BIT:
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_64BIT:
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_16BIT:
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_32BIT:
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_64BIT:
IEM_MC_END();
return VINF_SUCCESS;
IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
#ifdef IEM_VERIFICATION_MODE
IEM_MC_END();
IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
IEM_MC_END();
return VINF_SUCCESS;
IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
#ifdef IEM_VERIFICATION_MODE
case IEMMODE_16BIT:
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_32BIT:
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_64BIT:
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_16BIT:
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_32BIT:
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_64BIT:
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
return VINF_SUCCESS;
return IEMOP_RAISE_INVALID_LOCK_PREFIX();
return IEMOP_RAISE_INVALID_LOCK_PREFIX();
IEM_MC_BEGIN(0, 0);
IEM_MC_END();
return VINF_SUCCESS;
IEM_MC_BEGIN(0, 0);
IEM_MC_END();
return VINF_SUCCESS;
IEM_MC_BEGIN(0, 0);
IEM_MC_END();
return VINF_SUCCESS;
IEM_MC_BEGIN(0, 0);
IEM_MC_END();
return VINF_SUCCESS;
return IEMOP_RAISE_INVALID_OPCODE();
return VERR_NOT_IMPLEMENTED;
case IEMMODE_16BIT:
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_32BIT:
IEM_MC_END();
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_64BIT:
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_16BIT:
return VINF_SUCCESS;
case IEMMODE_32BIT:
return VINF_SUCCESS;
case IEMMODE_64BIT:
return VINF_SUCCESS;
case IEMMODE_16BIT:
return VINF_SUCCESS;
case IEMMODE_32BIT:
return VINF_SUCCESS;
case IEMMODE_64BIT:
return VINF_SUCCESS;
return VERR_NOT_IMPLEMENTED;
case IEMMODE_16BIT:
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_32BIT:
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_64BIT:
IEM_MC_END();
return VINF_SUCCESS;
return IEMOP_RAISE_INVALID_OPCODE();