IEMAllInstructions.cpp.h revision 6e561e438c22d6525356608a7962efda30ba5740
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * IEM - Instruction Decoding and Emulation.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Copyright (C) 2011 Oracle Corporation
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * This file is part of VirtualBox Open Source Edition (OSE), as
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * available from http://www.virtualbox.org. This file is free software;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * you can redistribute it and/or modify it under the terms of the GNU
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * General Public License (GPL) as published by the Free Software
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Foundation, in version 2 as it comes in the "COPYING" file of the
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/*******************************************************************************
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync* Global Variables *
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync*******************************************************************************/
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncextern const PFNIEMOP g_apfnOneByteMap[256]; /* not static since we need to forward declare it. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Common worker for instructions like ADD, AND, OR, ++ with a byte
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * memory/register as the destination.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * @param pImpl Pointer to the instruction implementation (assembly).
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_DEF_1(iemOpHlpBinaryOperator_rm_r8, PCIEMOPBINSIZES, pImpl)
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * If rm is denoting a register, no more instruction bytes.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U8(u8Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U8(pu8Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU8, pu8Dst, u8Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * We're accessing memory.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Note! We're putting the eflags on the stack here so we can commit them
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * after the memory.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync uint32_t const fAccess = pImpl->pfnLockedU8 ? IEM_ACCESS_DATA_RW : IEM_ACCESS_DATA_R; /* CMP,TEST */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_MAP(pu8Dst, fAccess, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U8(u8Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU8, pu8Dst, u8Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnLockedU8, pu8Dst, u8Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Common worker for word/dword/qword instructions like ADD, AND, OR, ++ with
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * memory/register as the destination.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * @param pImpl Pointer to the instruction implementation (assembly).
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_DEF_1(iemOpHlpBinaryOperator_rm_rv, PCIEMOPBINSIZES, pImpl)
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * If rm is denoting a register, no more instruction bytes.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U16(u16Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U16(pu16Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU16, pu16Dst, u16Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U32(u32Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U32(pu32Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU32, pu32Dst, u32Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U64(u64Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U64(pu64Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU64, pu64Dst, u64Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * We're accessing memory.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Note! We're putting the eflags on the stack here so we can commit them
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * after the memory.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync uint32_t const fAccess = pImpl->pfnLockedU8 ? IEM_ACCESS_DATA_RW : IEM_ACCESS_DATA_R /* CMP,TEST */;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_MAP(pu16Dst, fAccess, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U16(u16Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU16, pu16Dst, u16Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnLockedU16, pu16Dst, u16Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_MAP(pu32Dst, fAccess, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U32(u32Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU32, pu32Dst, u32Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnLockedU32, pu32Dst, u32Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_MAP(pu64Dst, fAccess, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U64(u64Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU64, pu64Dst, u64Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnLockedU64, pu64Dst, u64Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Common worker for byte instructions like ADD, AND, OR, ++ with a register as
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * the destination.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * @param pImpl Pointer to the instruction implementation (assembly).
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_DEF_1(iemOpHlpBinaryOperator_r8_rm, PCIEMOPBINSIZES, pImpl)
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * If rm is denoting a register, no more instruction bytes.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U8(u8Src, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U8(pu8Dst, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU8, pu8Dst, u8Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * We're accessing memory.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_MEM_U8(u8Src, pIemCpu->iEffSeg, GCPtrEffDst);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U8(pu8Dst, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU8, pu8Dst, u8Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Common worker for word/dword/qword instructions like ADD, AND, OR, ++ with a
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * register as the destination.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * @param pImpl Pointer to the instruction implementation (assembly).
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_DEF_1(iemOpHlpBinaryOperator_rv_rm, PCIEMOPBINSIZES, pImpl)
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * If rm is denoting a register, no more instruction bytes.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U16(u16Src, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U16(pu16Dst, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU16, pu16Dst, u16Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U32(u32Src, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U32(pu32Dst, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU32, pu32Dst, u32Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U64(u64Src, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U64(pu64Dst, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU64, pu64Dst, u64Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * We're accessing memory.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_MEM_U16(u16Src, pIemCpu->iEffSeg, GCPtrEffDst);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U16(pu16Dst, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU16, pu16Dst, u16Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_MEM_U32(u32Src, pIemCpu->iEffSeg, GCPtrEffDst);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U32(pu32Dst, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU32, pu32Dst, u32Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_MEM_U64(u64Src, pIemCpu->iEffSeg, GCPtrEffDst);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U64(pu64Dst, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU64, pu64Dst, u64Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Common worker for instructions like ADD, AND, OR, ++ with working on AL with
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * a byte immediate.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * @param pImpl Pointer to the instruction implementation (assembly).
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_DEF_1(iemOpHlpBinaryOperator_AL_Ib, PCIEMOPBINSIZES, pImpl)
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU8, pu8Dst, u8Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Common worker for instructions like ADD, AND, OR, ++ with working on
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * @param pImpl Pointer to the instruction implementation (assembly).
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_DEF_1(iemOpHlpBinaryOperator_rAX_Iz, PCIEMOPBINSIZES, pImpl)
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_ARG_CONST(uint16_t, u16Src,/*=*/ u16Imm, 1);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU16, pu16Dst, u16Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_ARG_CONST(uint32_t, u32Src,/*=*/ u32Imm, 1);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU32, pu32Dst, u32Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync uint64_t u64Imm; IEM_OPCODE_GET_NEXT_S32_SX_U64(&u64Imm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_ARG_CONST(uint64_t, u64Src,/*=*/ u64Imm, 1);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU64, pu64Dst, u64Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcodes 0xf1, 0xd6. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** @name ..... opcodes.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** @name Two byte opcodes (first byte 0x0f).
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x00 /0. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x00 /1. */
d4a8f6749f70bad88edc04de808643d372faa35avboxsync/** Opcode 0x0f 0x00 /2. */
d4a8f6749f70bad88edc04de808643d372faa35avboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
d4a8f6749f70bad88edc04de808643d372faa35avboxsync IEM_MC_FETCH_GREG_U16(u16Sel, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
d4a8f6749f70bad88edc04de808643d372faa35avboxsync IEM_MC_FETCH_MEM_U16(u16Sel, pIemCpu->iEffSeg, GCPtrEffSrc);
d4a8f6749f70bad88edc04de808643d372faa35avboxsync/** Opcode 0x0f 0x00 /3. */
d4a8f6749f70bad88edc04de808643d372faa35avboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
d4a8f6749f70bad88edc04de808643d372faa35avboxsync IEM_MC_FETCH_GREG_U16(u16Sel, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_MEM_U16(u16Sel, pIemCpu->iEffSeg, GCPtrEffSrc);
d4a8f6749f70bad88edc04de808643d372faa35avboxsync/** Opcode 0x0f 0x00 /4. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x00 /5. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x00. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 0: return FNIEMOP_CALL_1(iemOp_Grp6_sldt, bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 1: return FNIEMOP_CALL_1(iemOp_Grp6_str, bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 2: return FNIEMOP_CALL_1(iemOp_Grp6_lldt, bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 3: return FNIEMOP_CALL_1(iemOp_Grp6_ltr, bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 4: return FNIEMOP_CALL_1(iemOp_Grp6_verr, bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 5: return FNIEMOP_CALL_1(iemOp_Grp6_verw, bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x01 /0. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync AssertFailedReturn(VERR_IEM_INSTR_NOT_IMPLEMENTED);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x01 /0. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x01 /0. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x01 /0. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x01 /0. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x01 /1. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync AssertFailedReturn(VERR_IEM_INSTR_NOT_IMPLEMENTED);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x01 /1. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync AssertFailedReturn(VERR_IEM_INSTR_NOT_IMPLEMENTED);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x01 /1. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync AssertFailedReturn(VERR_IEM_INSTR_NOT_IMPLEMENTED);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x01 /2. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMMODE enmEffOpSize = pIemCpu->enmCpuMode == IEMMODE_64BIT
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_ARG_CONST(uint8_t, iEffSeg, /*=*/pIemCpu->iEffSeg, 0);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_ARG_CONST(IEMMODE, enmEffOpSizeArg,/*=*/enmEffOpSize, 2);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_CIMPL_3(iemCImpl_lgdt, iEffSeg, GCPtrEffSrc, enmEffOpSizeArg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x01 /2. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x01 /2. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x01 /3. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMMODE enmEffOpSize = pIemCpu->enmCpuMode == IEMMODE_64BIT
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_ARG_CONST(uint8_t, iEffSeg, /*=*/pIemCpu->iEffSeg, 0);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_ARG_CONST(IEMMODE, enmEffOpSizeArg,/*=*/enmEffOpSize, 2);
374f0b5fc4e70777b3f9ad8586ad7aa2551f37ccvboxsync IEM_MC_CALL_CIMPL_3(iemCImpl_lidt, iEffSeg, GCPtrEffSrc, enmEffOpSizeArg);
374f0b5fc4e70777b3f9ad8586ad7aa2551f37ccvboxsync/** Opcode 0x0f 0x01 /4. */
374f0b5fc4e70777b3f9ad8586ad7aa2551f37ccvboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
374f0b5fc4e70777b3f9ad8586ad7aa2551f37ccvboxsync IEM_MC_STORE_GREG_U16((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, u16Tmp);
374f0b5fc4e70777b3f9ad8586ad7aa2551f37ccvboxsync IEM_MC_STORE_GREG_U32((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, u32Tmp);
374f0b5fc4e70777b3f9ad8586ad7aa2551f37ccvboxsync IEM_MC_STORE_GREG_U64((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, u64Tmp);
374f0b5fc4e70777b3f9ad8586ad7aa2551f37ccvboxsync /* Ignore operand size here, memory refs are always 16-bit. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_MEM_U16(pIemCpu->iEffSeg, GCPtrEffDst, u16Tmp);
374f0b5fc4e70777b3f9ad8586ad7aa2551f37ccvboxsync/** Opcode 0x0f 0x01 /6. */
374f0b5fc4e70777b3f9ad8586ad7aa2551f37ccvboxsync /* The operand size is effectively ignored, all is 16-bit and only the
374f0b5fc4e70777b3f9ad8586ad7aa2551f37ccvboxsync lower 3-bits are used. */
374f0b5fc4e70777b3f9ad8586ad7aa2551f37ccvboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
374f0b5fc4e70777b3f9ad8586ad7aa2551f37ccvboxsync IEM_MC_FETCH_GREG_U16(u16Tmp, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_MEM_U16(u16Tmp, pIemCpu->iEffSeg, GCPtrEffDst);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x01 /7. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x01 /7. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync AssertFailedReturn(VERR_IEM_INSTR_NOT_IMPLEMENTED);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x01 /7. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync AssertFailedReturn(VERR_IEM_INSTR_NOT_IMPLEMENTED);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x01. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) != (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) != (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) != (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) != (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) != (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x02. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x03. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x04. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x05. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x06. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x08. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x09. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x0b. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x0d. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* AMD prefetch group, Intel implements this as NOP Ev (and so do we). */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if (!IEM_IS_AMD_CPUID_FEATURES_ANY_PRESENT(X86_CPUID_AMD_FEATURE_EDX_LONG_MODE | X86_CPUID_AMD_FEATURE_EDX_3DNOW,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* Currently a NOP. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x0e. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x0f. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x10. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_movups_Vps_Wps__movupd_Vpd_Wpd__movss_Vss_Wss__movsd_Vsd_Wsd);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x11. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_movups_Wps_Vps__movupd_Wpd_Vpd__movss_Wss_Vss__movsd_Vsd_Wsd);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x12. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_movlps_Vq_Mq__movhlps_Vq_Uq__movlpd_Vq_Mq__movsldup_Vq_Wq__movddup_Vq_Wq);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x13. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x14. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_unpckhlps_Vps_Wq__unpcklpd_Vpd_Wq);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x15. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_unpckhps_Vps_Wq__unpckhpd_Vpd_Wq);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x16. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_movhps_Vq_Mq__movlhps_Vq_Uq__movhpd_Vq_Mq__movshdup_Vq_Wq);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x17. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x18. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) != (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 4: /* Aliased to /0 for the time being according to AMD. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 5: /* Aliased to /0 for the time being according to AMD. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 6: /* Aliased to /0 for the time being according to AMD. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 7: /* Aliased to /0 for the time being according to AMD. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* Currently a NOP. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x19..0x1f. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* Currently a NOP. */
a13bd47f22085c82960265c150f10f2195369630vboxsync/** Opcode 0x0f 0x20. */
a13bd47f22085c82960265c150f10f2195369630vboxsync /* mod is ignored, as is operand size overrides. */
a13bd47f22085c82960265c150f10f2195369630vboxsync pIemCpu->enmEffOpSize = pIemCpu->enmDefOpSize = IEMMODE_64BIT;
a13bd47f22085c82960265c150f10f2195369630vboxsync pIemCpu->enmEffOpSize = pIemCpu->enmDefOpSize = IEMMODE_32BIT;
a13bd47f22085c82960265c150f10f2195369630vboxsync /** @todo Verify that the the invalid lock sequence exception (\#UD) is raised
a13bd47f22085c82960265c150f10f2195369630vboxsync * before the privilege level violation (\#GP). */
a13bd47f22085c82960265c150f10f2195369630vboxsync uint8_t iCrReg = ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg;
a13bd47f22085c82960265c150f10f2195369630vboxsync /* The lock prefix can be used to encode CR8 accesses on some CPUs. */
a13bd47f22085c82960265c150f10f2195369630vboxsync if (!IEM_IS_AMD_CPUID_FEATURE_PRESENT_ECX(X86_CPUID_AMD_FEATURE_ECX_CR8L))
a13bd47f22085c82960265c150f10f2195369630vboxsync return IEM_MC_DEFER_TO_CIMPL_2(iemCImpl_mov_Rd_Cd, (X86_MODRM_RM_MASK & bRm) | pIemCpu->uRexB, iCrReg);
a13bd47f22085c82960265c150f10f2195369630vboxsync/** Opcode 0x0f 0x21. */
a13bd47f22085c82960265c150f10f2195369630vboxsync ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK));
a13bd47f22085c82960265c150f10f2195369630vboxsync/** Opcode 0x0f 0x22. */
a13bd47f22085c82960265c150f10f2195369630vboxsync /* mod is ignored, as is operand size overrides. */
a13bd47f22085c82960265c150f10f2195369630vboxsync pIemCpu->enmEffOpSize = pIemCpu->enmDefOpSize = IEMMODE_64BIT;
a13bd47f22085c82960265c150f10f2195369630vboxsync pIemCpu->enmEffOpSize = pIemCpu->enmDefOpSize = IEMMODE_32BIT;
a13bd47f22085c82960265c150f10f2195369630vboxsync /** @todo Verify that the the invalid lock sequence exception (\#UD) is raised
a13bd47f22085c82960265c150f10f2195369630vboxsync * before the privilege level violation (\#GP). */
a13bd47f22085c82960265c150f10f2195369630vboxsync uint8_t iCrReg = ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg;
a13bd47f22085c82960265c150f10f2195369630vboxsync /* The lock prefix can be used to encode CR8 accesses on some CPUs. */
a13bd47f22085c82960265c150f10f2195369630vboxsync if (!IEM_IS_AMD_CPUID_FEATURE_PRESENT_ECX(X86_CPUID_AMD_FEATURE_ECX_CR8L))
a13bd47f22085c82960265c150f10f2195369630vboxsync return IEM_MC_DEFER_TO_CIMPL_2(iemCImpl_mov_Cd_Rd, iCrReg, (X86_MODRM_RM_MASK & bRm) | pIemCpu->uRexB);
a13bd47f22085c82960265c150f10f2195369630vboxsync/** Opcode 0x0f 0x23. */
a13bd47f22085c82960265c150f10f2195369630vboxsync ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK),
a13bd47f22085c82960265c150f10f2195369630vboxsync/** Opcode 0x0f 0x24. */
a13bd47f22085c82960265c150f10f2195369630vboxsync/** @todo Is the invalid opcode raise before parsing any R/M byte? */
a13bd47f22085c82960265c150f10f2195369630vboxsync/** Opcode 0x0f 0x26. */
a13bd47f22085c82960265c150f10f2195369630vboxsync/** Opcode 0x0f 0x28. */
a13bd47f22085c82960265c150f10f2195369630vboxsync/** Opcode 0x0f 0x29. */
a13bd47f22085c82960265c150f10f2195369630vboxsync/** Opcode 0x0f 0x2a. */
a13bd47f22085c82960265c150f10f2195369630vboxsyncFNIEMOP_STUB(iemOp_cvtpi2ps_Vps_Qpi__cvtpi2pd_Vpd_Qpi__cvtsi2ss_Vss_Ey__cvtsi2sd_Vsd_Ey);
a13bd47f22085c82960265c150f10f2195369630vboxsync/** Opcode 0x0f 0x2b. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_movntps_Mps_Vps__movntpd_Mpd_Vpd);
a13bd47f22085c82960265c150f10f2195369630vboxsync/** Opcode 0x0f 0x2c. */
a13bd47f22085c82960265c150f10f2195369630vboxsyncFNIEMOP_STUB(iemOp_cvttps2pi_Ppi_Wps__cvttpd2pi_Ppi_Wpd__cvttss2si_Gy_Wss__cvttsd2si_Yu_Wsd);
a13bd47f22085c82960265c150f10f2195369630vboxsync/** Opcode 0x0f 0x2d. */
a13bd47f22085c82960265c150f10f2195369630vboxsyncFNIEMOP_STUB(iemOp_cvtps2pi_Ppi_Wps__cvtpd2pi_QpiWpd__cvtss2si_Gy_Wss__cvtsd2si_Gy_Wsd);
a13bd47f22085c82960265c150f10f2195369630vboxsync/** Opcode 0x0f 0x2e. */
a13bd47f22085c82960265c150f10f2195369630vboxsyncFNIEMOP_STUB(iemOp_ucomiss_Vss_Wss__ucomisd_Vsd_Wsd);
a13bd47f22085c82960265c150f10f2195369630vboxsync/** Opcode 0x0f 0x2f. */
a13bd47f22085c82960265c150f10f2195369630vboxsync/** Opcode 0x0f 0x30. */
a13bd47f22085c82960265c150f10f2195369630vboxsync/** Opcode 0x0f 0x31. */
a13bd47f22085c82960265c150f10f2195369630vboxsync/** Opcode 0x0f 0x33. */
a13bd47f22085c82960265c150f10f2195369630vboxsync/** Opcode 0x0f 0x34. */
a13bd47f22085c82960265c150f10f2195369630vboxsync/** Opcode 0x0f 0x34. */
a13bd47f22085c82960265c150f10f2195369630vboxsync/** Opcode 0x0f 0x35. */
a13bd47f22085c82960265c150f10f2195369630vboxsync/** Opcode 0x0f 0x37. */
a13bd47f22085c82960265c150f10f2195369630vboxsync/** Opcode 0x0f 0x38. */
a13bd47f22085c82960265c150f10f2195369630vboxsync/** Opcode 0x0f 0x39. */
a13bd47f22085c82960265c150f10f2195369630vboxsync/** Opcode 0x0f 0x3c (?). */
a13bd47f22085c82960265c150f10f2195369630vboxsync * Implements a conditional move.
a13bd47f22085c82960265c150f10f2195369630vboxsync * Wish there was an obvious way to do this where we could share and reduce
a13bd47f22085c82960265c150f10f2195369630vboxsync * code bloat.
a13bd47f22085c82960265c150f10f2195369630vboxsync * @param a_Cnd The conditional "microcode" operation.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT)) \
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U16(u16Tmp, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB); \
a13bd47f22085c82960265c150f10f2195369630vboxsync IEM_MC_STORE_GREG_U16(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u16Tmp); \
a13bd47f22085c82960265c150f10f2195369630vboxsync IEM_MC_FETCH_GREG_U32(u32Tmp, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB); \
a13bd47f22085c82960265c150f10f2195369630vboxsync IEM_MC_STORE_GREG_U32(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u32Tmp); \
a13bd47f22085c82960265c150f10f2195369630vboxsync IEM_MC_CLEAR_HIGH_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg); \
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U64(u64Tmp, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB); \
a13bd47f22085c82960265c150f10f2195369630vboxsync IEM_MC_STORE_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u64Tmp); \
a13bd47f22085c82960265c150f10f2195369630vboxsync IEM_MC_FETCH_MEM_U16(u16Tmp, pIemCpu->iEffSeg, GCPtrEffSrc); \
a13bd47f22085c82960265c150f10f2195369630vboxsync IEM_MC_STORE_GREG_U16(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u16Tmp); \
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_MEM_U32(u32Tmp, pIemCpu->iEffSeg, GCPtrEffSrc); \
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U32(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u32Tmp); \
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CLEAR_HIGH_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg); \
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_MEM_U64(u64Tmp, pIemCpu->iEffSeg, GCPtrEffSrc); \
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u64Tmp); \
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync } do {} while (0)
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x40. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x41. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x42. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x43. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x44. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x45. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x46. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync CMOV_X(IEM_MC_IF_EFL_ANY_BITS_SET(X86_EFL_CF | X86_EFL_ZF));
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x47. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync CMOV_X(IEM_MC_IF_EFL_NO_BITS_SET(X86_EFL_CF | X86_EFL_ZF));
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x48. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x49. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x4a. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x4b. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x4c. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync CMOV_X(IEM_MC_IF_EFL_BITS_NE(X86_EFL_SF, X86_EFL_OF));
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x4d. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync CMOV_X(IEM_MC_IF_EFL_BITS_EQ(X86_EFL_SF, X86_EFL_OF));
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x4e. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync CMOV_X(IEM_MC_IF_EFL_BIT_SET_OR_BITS_NE(X86_EFL_ZF, X86_EFL_SF, X86_EFL_OF));
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x4f. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync CMOV_X(IEM_MC_IF_EFL_BIT_NOT_SET_AND_BITS_EQ(X86_EFL_ZF, X86_EFL_SF, X86_EFL_OF));
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x50. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_movmskps_Gy_Ups__movmskpd_Gy_Upd);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x51. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_sqrtps_Wps_Vps__sqrtpd_Wpd_Vpd__sqrtss_Vss_Wss__sqrtsd_Vsd_Wsd);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x52. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_rsqrtps_Wps_Vps__rsqrtss_Vss_Wss);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x53. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x54. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x55. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x56. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x57. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x58. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_addps_Vps_Wps__addpd_Vpd_Wpd__addss_Vss_Wss__addsd_Vsd_Wsd);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x59. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_mulps_Vps_Wps__mulpd_Vpd_Wpd__mulss_Vss__Wss__mulsd_Vsd_Wsd);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x5a. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_cvtps2pd_Vpd_Wps__cvtpd2ps_Vps_Wpd__cvtss2sd_Vsd_Wss__cvtsd2ss_Vss_Wsd);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x5b. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_cvtdq2ps_Vps_Wdq__cvtps2dq_Vdq_Wps__cvtps2dq_Vdq_Wps);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x5c. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_subps_Vps_Wps__subpd_Vps_Wdp__subss_Vss_Wss__subsd_Vsd_Wsd);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x5d. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_minps_Vps_Wps__minpd_Vpd_Wpd__minss_Vss_Wss__minsd_Vsd_Wsd);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x5e. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_divps_Vps_Wps__divpd_Vpd_Wpd__divss_Vss_Wss__divsd_Vsd_Wsd);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x5f. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_maxps_Vps_Wps__maxpd_Vpd_Wpd__maxss_Vss_Wss__maxsd_Vsd_Wsd);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x60. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_punpcklbw_Pq_Qd__punpcklbw_Vdq_Wdq);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x61. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_punpcklwd_Pq_Qd__punpcklwd_Vdq_Wdq);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x62. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_punpckldq_Pq_Qd__punpckldq_Vdq_Wdq);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x63. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_packsswb_Pq_Qq__packsswb_Vdq_Wdq);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x64. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x65. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x66. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x67. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_packuswb_Pq_Qq__packuswb_Vdq_Wdq);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x68. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_punpckhbw_Pq_Qq__punpckhbw_Vdq_Wdq);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x69. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_punpckhwd_Pq_Qd__punpckhwd_Vdq_Wdq);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x6a. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_punpckhdq_Pq_Qd__punpckhdq_Vdq_Wdq);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x6b. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_packssdw_Pq_Qd__packssdq_Vdq_Wdq);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x6c. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x6d. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x6e. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x6f. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_movq_Pq_Qq__movdqa_Vdq_Wdq__movdqu_Vdq_Wdq);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x70. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_pshufw_Pq_Qq_Ib__pshufd_Vdq_Wdq_Ib__pshufhw_Vdq_Wdq_Ib__pshuflq_Vdq_Wdq_Ib);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x71. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x72. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x73. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x74. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x75. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x76. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x77. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x78. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x79. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x7c. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x7d. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x7e. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_movd_q_Ey_Pd__movd_q_Ey_Vy__movq_Vq_Wq);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x7f. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_movq_Qq_Pq__movq_movdqa_Wdq_Vdq__movdqu_Wdq_Vdq);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x80. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x81. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x82. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x83. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x84. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x85. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x86. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_IF_EFL_ANY_BITS_SET(X86_EFL_CF | X86_EFL_ZF) {
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_IF_EFL_ANY_BITS_SET(X86_EFL_CF | X86_EFL_ZF) {
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x87. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_IF_EFL_ANY_BITS_SET(X86_EFL_CF | X86_EFL_ZF) {
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_IF_EFL_ANY_BITS_SET(X86_EFL_CF | X86_EFL_ZF) {
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x88. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x89. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x8a. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0x8b. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync/** Opcode 0x0f 0x8c. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync/** Opcode 0x0f 0x8d. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync/** Opcode 0x0f 0x8e. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_IF_EFL_BIT_SET_OR_BITS_NE(X86_EFL_ZF, X86_EFL_SF, X86_EFL_OF) {
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_IF_EFL_BIT_SET_OR_BITS_NE(X86_EFL_ZF, X86_EFL_SF, X86_EFL_OF) {
b1e4667c5a9588bd509d569ce252127891b44923vboxsync/** Opcode 0x0f 0x8f. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_IF_EFL_BIT_SET_OR_BITS_NE(X86_EFL_ZF, X86_EFL_SF, X86_EFL_OF) {
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_IF_EFL_BIT_SET_OR_BITS_NE(X86_EFL_ZF, X86_EFL_SF, X86_EFL_OF) {
b1e4667c5a9588bd509d569ce252127891b44923vboxsync/** Opcode 0x0f 0x90. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo too early? */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /** @todo Encoding test: Check if the 'reg' field is ignored or decoded in
b1e4667c5a9588bd509d569ce252127891b44923vboxsync * any way. AMD says it's "unused", whatever that means. We're
b1e4667c5a9588bd509d569ce252127891b44923vboxsync * ignoring for now. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /* register target */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /* memory target */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_STORE_MEM_U8_CONST(pIemCpu->iEffSeg, GCPtrEffDst, 1);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_STORE_MEM_U8_CONST(pIemCpu->iEffSeg, GCPtrEffDst, 0);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync/** Opcode 0x0f 0x91. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo too early? */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /** @todo Encoding test: Check if the 'reg' field is ignored or decoded in
b1e4667c5a9588bd509d569ce252127891b44923vboxsync * any way. AMD says it's "unused", whatever that means. We're
b1e4667c5a9588bd509d569ce252127891b44923vboxsync * ignoring for now. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /* register target */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /* memory target */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_STORE_MEM_U8_CONST(pIemCpu->iEffSeg, GCPtrEffDst, 0);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_STORE_MEM_U8_CONST(pIemCpu->iEffSeg, GCPtrEffDst, 1);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync/** Opcode 0x0f 0x92. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo too early? */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /** @todo Encoding test: Check if the 'reg' field is ignored or decoded in
b1e4667c5a9588bd509d569ce252127891b44923vboxsync * any way. AMD says it's "unused", whatever that means. We're
b1e4667c5a9588bd509d569ce252127891b44923vboxsync * ignoring for now. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /* register target */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /* memory target */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_STORE_MEM_U8_CONST(pIemCpu->iEffSeg, GCPtrEffDst, 1);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_STORE_MEM_U8_CONST(pIemCpu->iEffSeg, GCPtrEffDst, 0);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync/** Opcode 0x0f 0x93. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo too early? */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /** @todo Encoding test: Check if the 'reg' field is ignored or decoded in
b1e4667c5a9588bd509d569ce252127891b44923vboxsync * any way. AMD says it's "unused", whatever that means. We're
b1e4667c5a9588bd509d569ce252127891b44923vboxsync * ignoring for now. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /* register target */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /* memory target */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_STORE_MEM_U8_CONST(pIemCpu->iEffSeg, GCPtrEffDst, 0);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_STORE_MEM_U8_CONST(pIemCpu->iEffSeg, GCPtrEffDst, 1);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync/** Opcode 0x0f 0x94. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo too early? */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /** @todo Encoding test: Check if the 'reg' field is ignored or decoded in
b1e4667c5a9588bd509d569ce252127891b44923vboxsync * any way. AMD says it's "unused", whatever that means. We're
b1e4667c5a9588bd509d569ce252127891b44923vboxsync * ignoring for now. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /* register target */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /* memory target */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_STORE_MEM_U8_CONST(pIemCpu->iEffSeg, GCPtrEffDst, 1);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_STORE_MEM_U8_CONST(pIemCpu->iEffSeg, GCPtrEffDst, 0);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync/** Opcode 0x0f 0x95. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo too early? */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /** @todo Encoding test: Check if the 'reg' field is ignored or decoded in
b1e4667c5a9588bd509d569ce252127891b44923vboxsync * any way. AMD says it's "unused", whatever that means. We're
b1e4667c5a9588bd509d569ce252127891b44923vboxsync * ignoring for now. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /* register target */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /* memory target */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_STORE_MEM_U8_CONST(pIemCpu->iEffSeg, GCPtrEffDst, 0);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_STORE_MEM_U8_CONST(pIemCpu->iEffSeg, GCPtrEffDst, 1);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync/** Opcode 0x0f 0x96. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo too early? */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /** @todo Encoding test: Check if the 'reg' field is ignored or decoded in
b1e4667c5a9588bd509d569ce252127891b44923vboxsync * any way. AMD says it's "unused", whatever that means. We're
b1e4667c5a9588bd509d569ce252127891b44923vboxsync * ignoring for now. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /* register target */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_IF_EFL_ANY_BITS_SET(X86_EFL_CF | X86_EFL_ZF) {
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /* memory target */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_IF_EFL_ANY_BITS_SET(X86_EFL_CF | X86_EFL_ZF) {
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_STORE_MEM_U8_CONST(pIemCpu->iEffSeg, GCPtrEffDst, 1);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_STORE_MEM_U8_CONST(pIemCpu->iEffSeg, GCPtrEffDst, 0);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync/** Opcode 0x0f 0x97. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo too early? */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /** @todo Encoding test: Check if the 'reg' field is ignored or decoded in
b1e4667c5a9588bd509d569ce252127891b44923vboxsync * any way. AMD says it's "unused", whatever that means. We're
b1e4667c5a9588bd509d569ce252127891b44923vboxsync * ignoring for now. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /* register target */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_IF_EFL_ANY_BITS_SET(X86_EFL_CF | X86_EFL_ZF) {
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /* memory target */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_IF_EFL_ANY_BITS_SET(X86_EFL_CF | X86_EFL_ZF) {
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_STORE_MEM_U8_CONST(pIemCpu->iEffSeg, GCPtrEffDst, 0);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_STORE_MEM_U8_CONST(pIemCpu->iEffSeg, GCPtrEffDst, 1);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync/** Opcode 0x0f 0x98. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo too early? */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /** @todo Encoding test: Check if the 'reg' field is ignored or decoded in
b1e4667c5a9588bd509d569ce252127891b44923vboxsync * any way. AMD says it's "unused", whatever that means. We're
b1e4667c5a9588bd509d569ce252127891b44923vboxsync * ignoring for now. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /* register target */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /* memory target */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_STORE_MEM_U8_CONST(pIemCpu->iEffSeg, GCPtrEffDst, 1);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_STORE_MEM_U8_CONST(pIemCpu->iEffSeg, GCPtrEffDst, 0);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync/** Opcode 0x0f 0x99. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo too early? */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /** @todo Encoding test: Check if the 'reg' field is ignored or decoded in
b1e4667c5a9588bd509d569ce252127891b44923vboxsync * any way. AMD says it's "unused", whatever that means. We're
b1e4667c5a9588bd509d569ce252127891b44923vboxsync * ignoring for now. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /* register target */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /* memory target */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_STORE_MEM_U8_CONST(pIemCpu->iEffSeg, GCPtrEffDst, 0);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_STORE_MEM_U8_CONST(pIemCpu->iEffSeg, GCPtrEffDst, 1);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync/** Opcode 0x0f 0x9a. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo too early? */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /** @todo Encoding test: Check if the 'reg' field is ignored or decoded in
b1e4667c5a9588bd509d569ce252127891b44923vboxsync * any way. AMD says it's "unused", whatever that means. We're
b1e4667c5a9588bd509d569ce252127891b44923vboxsync * ignoring for now. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /* register target */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /* memory target */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_STORE_MEM_U8_CONST(pIemCpu->iEffSeg, GCPtrEffDst, 1);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_STORE_MEM_U8_CONST(pIemCpu->iEffSeg, GCPtrEffDst, 0);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync/** Opcode 0x0f 0x9b. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo too early? */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /** @todo Encoding test: Check if the 'reg' field is ignored or decoded in
b1e4667c5a9588bd509d569ce252127891b44923vboxsync * any way. AMD says it's "unused", whatever that means. We're
b1e4667c5a9588bd509d569ce252127891b44923vboxsync * ignoring for now. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /* register target */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync /* memory target */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_STORE_MEM_U8_CONST(pIemCpu->iEffSeg, GCPtrEffDst, 0);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_STORE_MEM_U8_CONST(pIemCpu->iEffSeg, GCPtrEffDst, 1);
064e87232010cd1a6a7e554428a5ba8053e96612vboxsync/** Opcode 0x0f 0x9c. */
064e87232010cd1a6a7e554428a5ba8053e96612vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo too early? */
064e87232010cd1a6a7e554428a5ba8053e96612vboxsync /** @todo Encoding test: Check if the 'reg' field is ignored or decoded in
064e87232010cd1a6a7e554428a5ba8053e96612vboxsync * any way. AMD says it's "unused", whatever that means. We're
064e87232010cd1a6a7e554428a5ba8053e96612vboxsync * ignoring for now. */
064e87232010cd1a6a7e554428a5ba8053e96612vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
064e87232010cd1a6a7e554428a5ba8053e96612vboxsync /* register target */
064e87232010cd1a6a7e554428a5ba8053e96612vboxsync IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
064e87232010cd1a6a7e554428a5ba8053e96612vboxsync IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
064e87232010cd1a6a7e554428a5ba8053e96612vboxsync /* memory target */
064e87232010cd1a6a7e554428a5ba8053e96612vboxsync IEM_MC_STORE_MEM_U8_CONST(pIemCpu->iEffSeg, GCPtrEffDst, 1);
064e87232010cd1a6a7e554428a5ba8053e96612vboxsync IEM_MC_STORE_MEM_U8_CONST(pIemCpu->iEffSeg, GCPtrEffDst, 0);
064e87232010cd1a6a7e554428a5ba8053e96612vboxsync/** Opcode 0x0f 0x9d. */
064e87232010cd1a6a7e554428a5ba8053e96612vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo too early? */
064e87232010cd1a6a7e554428a5ba8053e96612vboxsync /** @todo Encoding test: Check if the 'reg' field is ignored or decoded in
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * any way. AMD says it's "unused", whatever that means. We're
064e87232010cd1a6a7e554428a5ba8053e96612vboxsync * ignoring for now. */
064e87232010cd1a6a7e554428a5ba8053e96612vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
064e87232010cd1a6a7e554428a5ba8053e96612vboxsync /* register target */
064e87232010cd1a6a7e554428a5ba8053e96612vboxsync IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
f6f5b68ebbb3a264e0a27e2a5848774722fccfd2vboxsync /* memory target */
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_STORE_MEM_U8_CONST(pIemCpu->iEffSeg, GCPtrEffDst, 0);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_STORE_MEM_U8_CONST(pIemCpu->iEffSeg, GCPtrEffDst, 1);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync/** Opcode 0x0f 0x9e. */
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo too early? */
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync /** @todo Encoding test: Check if the 'reg' field is ignored or decoded in
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync * any way. AMD says it's "unused", whatever that means. We're
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync * ignoring for now. */
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync /* register target */
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_IF_EFL_BIT_SET_OR_BITS_NE(X86_EFL_ZF, X86_EFL_SF, X86_EFL_OF) {
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync /* memory target */
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_IF_EFL_BIT_SET_OR_BITS_NE(X86_EFL_ZF, X86_EFL_SF, X86_EFL_OF) {
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_STORE_MEM_U8_CONST(pIemCpu->iEffSeg, GCPtrEffDst, 1);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_STORE_MEM_U8_CONST(pIemCpu->iEffSeg, GCPtrEffDst, 0);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync/** Opcode 0x0f 0x9f. */
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo too early? */
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync /** @todo Encoding test: Check if the 'reg' field is ignored or decoded in
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync * any way. AMD says it's "unused", whatever that means. We're
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync * ignoring for now. */
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync /* register target */
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_IF_EFL_BIT_SET_OR_BITS_NE(X86_EFL_ZF, X86_EFL_SF, X86_EFL_OF) {
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync /* memory target */
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_IF_EFL_BIT_SET_OR_BITS_NE(X86_EFL_ZF, X86_EFL_SF, X86_EFL_OF) {
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_STORE_MEM_U8_CONST(pIemCpu->iEffSeg, GCPtrEffDst, 0);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_STORE_MEM_U8_CONST(pIemCpu->iEffSeg, GCPtrEffDst, 1);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync * Common 'push segment-register' helper.
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync/** Opcode 0x0f 0xa0. */
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync return FNIEMOP_CALL_1(iemOpCommonPushSReg, X86_SREG_FS);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync/** Opcode 0x0f 0xa1. */
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync return IEM_MC_DEFER_TO_CIMPL_2(iemCImpl_pop_Sreg, X86_SREG_FS, pIemCpu->enmEffOpSize);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync/** Opcode 0x0f 0xa2. */
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync * Common worker for iemOp_bt_Ev_Gv, iemOp_btc_Ev_Gv, iemOp_btr_Ev_Gv and
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync * iemOp_bts_Ev_Gv.
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsyncFNIEMOP_DEF_1(iemOpCommonBit_Ev_Gv, PCIEMOPBINSIZES, pImpl)
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_OF | X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync /* register destination. */
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_FETCH_GREG_U16(u16Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_REF_GREG_U16(pu16Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU16, pu16Dst, u16Src, pEFlags);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_FETCH_GREG_U32(u32Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_REF_GREG_U32(pu32Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU32, pu32Dst, u32Src, pEFlags);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_FETCH_GREG_U64(u64Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_REF_GREG_U64(pu64Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU64, pu64Dst, u64Src, pEFlags);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync /* memory destination. */
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync else /* BT */
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync /** @todo test negative bit offsets! */
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_FETCH_GREG_U16(u16Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_ADD_LOCAL_S16_TO_EFF_ADDR(GCPtrEffDst, i16AddrAdj);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_MEM_MAP(pu16Dst, IEM_ACCESS_DATA_RW, pIemCpu->iEffSeg, GCPtrEffDst, 0);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU16, pu16Dst, u16Src, pEFlags);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnLockedU16, pu16Dst, u16Src, pEFlags);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pu16Dst, IEM_ACCESS_DATA_RW);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_FETCH_GREG_U32(u32Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_ADD_LOCAL_S32_TO_EFF_ADDR(GCPtrEffDst, i32AddrAdj);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_MEM_MAP(pu32Dst, IEM_ACCESS_DATA_RW, pIemCpu->iEffSeg, GCPtrEffDst, 0);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU32, pu32Dst, u32Src, pEFlags);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnLockedU32, pu32Dst, u32Src, pEFlags);
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pu32Dst, IEM_ACCESS_DATA_RW);
064e87232010cd1a6a7e554428a5ba8053e96612vboxsync IEM_MC_FETCH_GREG_U64(u64Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
064e87232010cd1a6a7e554428a5ba8053e96612vboxsync IEM_MC_ADD_LOCAL_S64_TO_EFF_ADDR(GCPtrEffDst, i64AddrAdj);
064e87232010cd1a6a7e554428a5ba8053e96612vboxsync IEM_MC_MEM_MAP(pu64Dst, IEM_ACCESS_DATA_RW, pIemCpu->iEffSeg, GCPtrEffDst, 0);
064e87232010cd1a6a7e554428a5ba8053e96612vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU64, pu64Dst, u64Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnLockedU64, pu64Dst, u64Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pu64Dst, IEM_ACCESS_DATA_RW);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xa3. */
2a69254c6b802ee414e54fe0c1202d67dac90ce8vboxsync return FNIEMOP_CALL_1(iemOpCommonBit_Ev_Gv, &g_iemAImpl_bt);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Common worker for iemOp_shrd_Ev_Gv_Ib and iemOp_shld_Ev_Gv_Ib.
064e87232010cd1a6a7e554428a5ba8053e96612vboxsyncFNIEMOP_DEF_1(iemOpCommonShldShrd_Ib, PCIEMOPSHIFTDBLSIZES, pImpl)
064e87232010cd1a6a7e554428a5ba8053e96612vboxsync IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_AF | X86_EFL_OF);
064e87232010cd1a6a7e554428a5ba8053e96612vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
e41f0459369a6d814aa36bf4def225482fc56026vboxsync IEM_MC_ARG_CONST(uint8_t, cShiftArg, /*=*/cShift, 2);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync IEM_MC_FETCH_GREG_U16(u16Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync IEM_MC_REF_GREG_U16(pu16Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync IEM_MC_CALL_VOID_AIMPL_4(pImpl->pfnNormalU16, pu16Dst, u16Src, cShiftArg, pEFlags);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync IEM_MC_ARG_CONST(uint8_t, cShiftArg, /*=*/cShift, 2);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync IEM_MC_FETCH_GREG_U32(u32Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync IEM_MC_REF_GREG_U32(pu32Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync IEM_MC_CALL_VOID_AIMPL_4(pImpl->pfnNormalU32, pu32Dst, u32Src, cShiftArg, pEFlags);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync IEM_MC_ARG_CONST(uint8_t, cShiftArg, /*=*/cShift, 2);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync IEM_MC_FETCH_GREG_U64(u64Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync IEM_MC_REF_GREG_U64(pu64Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync IEM_MC_CALL_VOID_AIMPL_4(pImpl->pfnNormalU64, pu64Dst, u64Src, cShiftArg, pEFlags);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo too early? */
e41f0459369a6d814aa36bf4def225482fc56026vboxsync IEM_MC_FETCH_GREG_U16(u16Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync IEM_MC_MEM_MAP(pu16Dst, IEM_ACCESS_DATA_RW, pIemCpu->iEffSeg, GCPtrEffDst, 0);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync IEM_MC_CALL_VOID_AIMPL_4(pImpl->pfnNormalU16, pu16Dst, u16Src, cShiftArg, pEFlags);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pu16Dst, IEM_ACCESS_DATA_RW);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync IEM_MC_FETCH_GREG_U32(u32Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync IEM_MC_MEM_MAP(pu32Dst, IEM_ACCESS_DATA_RW, pIemCpu->iEffSeg, GCPtrEffDst, 0);
6e9b663a1ac9b2adc21436da50bf52d56c8950b7vboxsync IEM_MC_CALL_VOID_AIMPL_4(pImpl->pfnNormalU32, pu32Dst, u32Src, cShiftArg, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pu32Dst, IEM_ACCESS_DATA_RW);
6e9b663a1ac9b2adc21436da50bf52d56c8950b7vboxsync IEM_MC_FETCH_GREG_U64(u64Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
6e9b663a1ac9b2adc21436da50bf52d56c8950b7vboxsync IEM_MC_MEM_MAP(pu64Dst, IEM_ACCESS_DATA_RW, pIemCpu->iEffSeg, GCPtrEffDst, 0);
6e9b663a1ac9b2adc21436da50bf52d56c8950b7vboxsync IEM_MC_CALL_VOID_AIMPL_4(pImpl->pfnNormalU64, pu64Dst, u64Src, cShiftArg, pEFlags);
6e9b663a1ac9b2adc21436da50bf52d56c8950b7vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pu64Dst, IEM_ACCESS_DATA_RW);
6e9b663a1ac9b2adc21436da50bf52d56c8950b7vboxsync * Common worker for iemOp_shrd_Ev_Gv_CL and iemOp_shld_Ev_Gv_CL.
6e9b663a1ac9b2adc21436da50bf52d56c8950b7vboxsyncFNIEMOP_DEF_1(iemOpCommonShldShrd_CL, PCIEMOPSHIFTDBLSIZES, pImpl)
6e9b663a1ac9b2adc21436da50bf52d56c8950b7vboxsync IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_AF | X86_EFL_OF);
6e9b663a1ac9b2adc21436da50bf52d56c8950b7vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
6e9b663a1ac9b2adc21436da50bf52d56c8950b7vboxsync IEM_MC_FETCH_GREG_U16(u16Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
6e9b663a1ac9b2adc21436da50bf52d56c8950b7vboxsync IEM_MC_REF_GREG_U16(pu16Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
6e9b663a1ac9b2adc21436da50bf52d56c8950b7vboxsync IEM_MC_CALL_VOID_AIMPL_4(pImpl->pfnNormalU16, pu16Dst, u16Src, cShiftArg, pEFlags);
6e9b663a1ac9b2adc21436da50bf52d56c8950b7vboxsync IEM_MC_FETCH_GREG_U32(u32Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
6e9b663a1ac9b2adc21436da50bf52d56c8950b7vboxsync IEM_MC_REF_GREG_U32(pu32Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
6e9b663a1ac9b2adc21436da50bf52d56c8950b7vboxsync IEM_MC_CALL_VOID_AIMPL_4(pImpl->pfnNormalU32, pu32Dst, u32Src, cShiftArg, pEFlags);
6e9b663a1ac9b2adc21436da50bf52d56c8950b7vboxsync IEM_MC_FETCH_GREG_U64(u64Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U64(pu64Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync IEM_MC_CALL_VOID_AIMPL_4(pImpl->pfnNormalU64, pu64Dst, u64Src, cShiftArg, pEFlags);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo too early? */
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync IEM_MC_FETCH_GREG_U16(u16Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync IEM_MC_MEM_MAP(pu16Dst, IEM_ACCESS_DATA_RW, pIemCpu->iEffSeg, GCPtrEffDst, 0);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync IEM_MC_CALL_VOID_AIMPL_4(pImpl->pfnNormalU16, pu16Dst, u16Src, cShiftArg, pEFlags);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pu16Dst, IEM_ACCESS_DATA_RW);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync IEM_MC_FETCH_GREG_U32(u32Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync IEM_MC_MEM_MAP(pu32Dst, IEM_ACCESS_DATA_RW, pIemCpu->iEffSeg, GCPtrEffDst, 0);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync IEM_MC_CALL_VOID_AIMPL_4(pImpl->pfnNormalU32, pu32Dst, u32Src, cShiftArg, pEFlags);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pu32Dst, IEM_ACCESS_DATA_RW);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U64(u64Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_MAP(pu64Dst, IEM_ACCESS_DATA_RW, pIemCpu->iEffSeg, GCPtrEffDst, 0);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_4(pImpl->pfnNormalU64, pu64Dst, u64Src, cShiftArg, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pu64Dst, IEM_ACCESS_DATA_RW);
d4a8f6749f70bad88edc04de808643d372faa35avboxsync/** Opcode 0x0f 0xa4. */
d4a8f6749f70bad88edc04de808643d372faa35avboxsync return FNIEMOP_CALL_1(iemOpCommonShldShrd_Ib, &g_iemAImpl_shld);
d4a8f6749f70bad88edc04de808643d372faa35avboxsync/** Opcode 0x0f 0xa7. */
d4a8f6749f70bad88edc04de808643d372faa35avboxsync return FNIEMOP_CALL_1(iemOpCommonShldShrd_CL, &g_iemAImpl_shld);
d4a8f6749f70bad88edc04de808643d372faa35avboxsync/** Opcode 0x0f 0xa8. */
d4a8f6749f70bad88edc04de808643d372faa35avboxsync return FNIEMOP_CALL_1(iemOpCommonPushSReg, X86_SREG_GS);
d4a8f6749f70bad88edc04de808643d372faa35avboxsync/** Opcode 0x0f 0xa9. */
d4a8f6749f70bad88edc04de808643d372faa35avboxsync return IEM_MC_DEFER_TO_CIMPL_2(iemCImpl_pop_Sreg, X86_SREG_GS, pIemCpu->enmEffOpSize);
d4a8f6749f70bad88edc04de808643d372faa35avboxsync/** Opcode 0x0f 0xaa. */
d4a8f6749f70bad88edc04de808643d372faa35avboxsync/** Opcode 0x0f 0xab. */
d4a8f6749f70bad88edc04de808643d372faa35avboxsync return FNIEMOP_CALL_1(iemOpCommonBit_Ev_Gv, &g_iemAImpl_bts);
d4a8f6749f70bad88edc04de808643d372faa35avboxsync/** Opcode 0x0f 0xac. */
d4a8f6749f70bad88edc04de808643d372faa35avboxsync return FNIEMOP_CALL_1(iemOpCommonShldShrd_Ib, &g_iemAImpl_shrd);
d4a8f6749f70bad88edc04de808643d372faa35avboxsync/** Opcode 0x0f 0xad. */
d4a8f6749f70bad88edc04de808643d372faa35avboxsync return FNIEMOP_CALL_1(iemOpCommonShldShrd_CL, &g_iemAImpl_shrd);
d4a8f6749f70bad88edc04de808643d372faa35avboxsync/** Opcode 0x0f 0xae mem/0. */
d4a8f6749f70bad88edc04de808643d372faa35avboxsync if (!IEM_IS_INTEL_CPUID_FEATURE_PRESENT_EDX(X86_CPUID_FEATURE_EDX_FXSR))
d4a8f6749f70bad88edc04de808643d372faa35avboxsync IEM_MC_ARG_CONST(uint8_t, iEffSeg,/*=*/pIemCpu->iEffSeg, 0);
d4a8f6749f70bad88edc04de808643d372faa35avboxsync IEM_MC_ARG_CONST(IEMMODE, enmEffOpSize,/*=*/pIemCpu->enmEffOpSize, 2);
d4a8f6749f70bad88edc04de808643d372faa35avboxsync IEM_MC_CALL_CIMPL_3(iemCImpl_fxsave, iEffSeg, GCPtrEff, enmEffOpSize);
d4a8f6749f70bad88edc04de808643d372faa35avboxsync/** Opcode 0x0f 0xae mem/1. */
d4a8f6749f70bad88edc04de808643d372faa35avboxsync if (!IEM_IS_INTEL_CPUID_FEATURE_PRESENT_EDX(X86_CPUID_FEATURE_EDX_FXSR))
d4a8f6749f70bad88edc04de808643d372faa35avboxsync IEM_MC_ARG_CONST(uint8_t, iEffSeg,/*=*/pIemCpu->iEffSeg, 0);
d4a8f6749f70bad88edc04de808643d372faa35avboxsync IEM_MC_ARG_CONST(IEMMODE, enmEffOpSize,/*=*/pIemCpu->enmEffOpSize, 2);
d4a8f6749f70bad88edc04de808643d372faa35avboxsync IEM_MC_CALL_CIMPL_3(iemCImpl_fxrstor, iEffSeg, GCPtrEff, enmEffOpSize);
d4a8f6749f70bad88edc04de808643d372faa35avboxsync/** Opcode 0x0f 0xae mem/2. */
d4a8f6749f70bad88edc04de808643d372faa35avboxsync/** Opcode 0x0f 0xae mem/3. */
d4a8f6749f70bad88edc04de808643d372faa35avboxsync/** Opcode 0x0f 0xae mem/4. */
d4a8f6749f70bad88edc04de808643d372faa35avboxsync/** Opcode 0x0f 0xae mem/5. */
d4a8f6749f70bad88edc04de808643d372faa35avboxsync/** Opcode 0x0f 0xae mem/6. */
d4a8f6749f70bad88edc04de808643d372faa35avboxsync/** Opcode 0x0f 0xae mem/7. */
d4a8f6749f70bad88edc04de808643d372faa35avboxsync/** Opcode 0x0f 0xae 11b/5. */
d4a8f6749f70bad88edc04de808643d372faa35avboxsync/** Opcode 0x0f 0xae 11b/6. */
d4a8f6749f70bad88edc04de808643d372faa35avboxsync/** Opcode 0x0f 0xae 11b/7. */
d4a8f6749f70bad88edc04de808643d372faa35avboxsync/** Opcode 0xf3 0x0f 0xae 11b/0. */
d4a8f6749f70bad88edc04de808643d372faa35avboxsync/** Opcode 0xf3 0x0f 0xae 11b/1. */
d4a8f6749f70bad88edc04de808643d372faa35avboxsync/** Opcode 0xf3 0x0f 0xae 11b/2. */
d4a8f6749f70bad88edc04de808643d372faa35avboxsync/** Opcode 0xf3 0x0f 0xae 11b/3. */
d4a8f6749f70bad88edc04de808643d372faa35avboxsync/** Opcode 0x0f 0xae. */
d4a8f6749f70bad88edc04de808643d372faa35avboxsync if ((bRm & X86_MODRM_MOD_MASK) != (3 << X86_MODRM_MOD_SHIFT))
d4a8f6749f70bad88edc04de808643d372faa35avboxsync switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
d4a8f6749f70bad88edc04de808643d372faa35avboxsync case 0: return FNIEMOP_CALL_1(iemOp_Grp15_fxsave, bRm);
d4a8f6749f70bad88edc04de808643d372faa35avboxsync case 1: return FNIEMOP_CALL_1(iemOp_Grp15_fxrstor, bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 2: return FNIEMOP_CALL_1(iemOp_Grp15_ldmxcsr, bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 3: return FNIEMOP_CALL_1(iemOp_Grp15_stmxcsr, bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 4: return FNIEMOP_CALL_1(iemOp_Grp15_xsave, bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 5: return FNIEMOP_CALL_1(iemOp_Grp15_xrstor, bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 6: return FNIEMOP_CALL_1(iemOp_Grp15_xsaveopt,bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 7: return FNIEMOP_CALL_1(iemOp_Grp15_clflush, bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync switch (pIemCpu->fPrefixes & (IEM_OP_PRF_REPZ | IEM_OP_PRF_REPNZ | IEM_OP_PRF_SIZE_OP | IEM_OP_PRF_LOCK))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 0: return IEMOP_RAISE_INVALID_OPCODE();
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 5: return FNIEMOP_CALL_1(iemOp_Grp15_lfence, bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 6: return FNIEMOP_CALL_1(iemOp_Grp15_mfence, bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 7: return FNIEMOP_CALL_1(iemOp_Grp15_sfence, bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 0: return FNIEMOP_CALL_1(iemOp_Grp15_rdfsbase, bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 1: return FNIEMOP_CALL_1(iemOp_Grp15_rdgsbase, bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 2: return FNIEMOP_CALL_1(iemOp_Grp15_wrfsbase, bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 3: return FNIEMOP_CALL_1(iemOp_Grp15_wrgsbase, bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xaf. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rv_rm, &g_iemAImpl_imul_two);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xb0. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xb1. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_DEF_1(iemOpCommonLoadSRegAndGreg, uint8_t, iSegReg)
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* The source cannot be a register. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync uint8_t const iGReg = ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_ARG_CONST(uint8_t, iSegRegArg,/*=*/iSegReg, 2);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_ARG_CONST(uint8_t, iGRegArg, /*=*/iGReg, 3);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_ARG_CONST(IEMMODE, enmEffOpSize,/*=*/pIemCpu->enmEffOpSize, 4);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_MEM_U16(offSeg, pIemCpu->iEffSeg, GCPtrEff);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_MEM_U16_DISP(uSel, pIemCpu->iEffSeg, GCPtrEff, 2);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_CIMPL_5(iemCImpl_load_SReg_Greg, uSel, offSeg, iSegRegArg, iGRegArg, enmEffOpSize);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_ARG_CONST(uint8_t, iSegRegArg,/*=*/iSegReg, 2);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_ARG_CONST(uint8_t, iGRegArg, /*=*/iGReg, 3);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_ARG_CONST(IEMMODE, enmEffOpSize,/*=*/pIemCpu->enmEffOpSize, 4);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_MEM_U32(offSeg, pIemCpu->iEffSeg, GCPtrEff);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_MEM_U16_DISP(uSel, pIemCpu->iEffSeg, GCPtrEff, 4);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_CIMPL_5(iemCImpl_load_SReg_Greg, uSel, offSeg, iSegRegArg, iGRegArg, enmEffOpSize);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_ARG_CONST(uint8_t, iSegRegArg,/*=*/iSegReg, 2);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_ARG_CONST(uint8_t, iGRegArg, /*=*/iGReg, 3);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_ARG_CONST(IEMMODE, enmEffOpSize,/*=*/pIemCpu->enmEffOpSize, 4);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_MEM_U64(offSeg, pIemCpu->iEffSeg, GCPtrEff);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_MEM_U16_DISP(uSel, pIemCpu->iEffSeg, GCPtrEff, 8);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_CIMPL_5(iemCImpl_load_SReg_Greg, uSel, offSeg, iSegRegArg, iGRegArg, enmEffOpSize);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xb2. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonLoadSRegAndGreg, X86_SREG_SS);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xb3. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonBit_Ev_Gv, &g_iemAImpl_btr);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xb4. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonLoadSRegAndGreg, X86_SREG_FS);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xb5. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonLoadSRegAndGreg, X86_SREG_GS);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xb6. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * If rm is denoting a register, no more instruction bytes.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U8_ZX_U16(u16Value, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U16(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u16Value);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U8_ZX_U32(u32Value, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U32(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u32Value);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U8_ZX_U64(u64Value, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u64Value);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * We're loading a register from memory.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_MEM_U8_ZX_U16(u16Value, pIemCpu->iEffSeg, GCPtrEffDst);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U16(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u16Value);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_MEM_U8_ZX_U32(u32Value, pIemCpu->iEffSeg, GCPtrEffDst);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U32(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u32Value);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_MEM_U8_ZX_U64(u64Value, pIemCpu->iEffSeg, GCPtrEffDst);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u64Value);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xb7. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /** @todo Not entirely sure how the operand size prefix is handled here,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * assuming that it will be ignored. Would be nice to have a few
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * test for this. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * If rm is denoting a register, no more instruction bytes.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U16_ZX_U32(u32Value, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U32(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u32Value);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U16_ZX_U64(u64Value, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u64Value);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * We're loading a register from memory.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_MEM_U16_ZX_U32(u32Value, pIemCpu->iEffSeg, GCPtrEffDst);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U32(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u32Value);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_MEM_U16_ZX_U64(u64Value, pIemCpu->iEffSeg, GCPtrEffDst);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u64Value);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xb8. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xb9. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xba. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 4: pImpl = &g_iemAImpl_bt; IEMOP_MNEMONIC("bt Ev,Ib"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 5: pImpl = &g_iemAImpl_bts; IEMOP_MNEMONIC("bts Ev,Ib"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 6: pImpl = &g_iemAImpl_btr; IEMOP_MNEMONIC("btr Ev,Ib"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 7: pImpl = &g_iemAImpl_btc; IEMOP_MNEMONIC("btc Ev,Ib"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_OF | X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* register destination. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_ARG_CONST(uint16_t, u16Src, /*=*/ u8Bit & 0x0f, 1);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U16(pu16Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU16, pu16Dst, u16Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_ARG_CONST(uint32_t, u32Src, /*=*/ u8Bit & 0x1f, 1);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U32(pu32Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU32, pu32Dst, u32Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_ARG_CONST(uint64_t, u64Src, /*=*/ u8Bit & 0x3f, 1);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U64(pu64Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU64, pu64Dst, u64Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* memory destination. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync else /* BT */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /** @todo test negative bit offsets! */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_MAP(pu16Dst, IEM_ACCESS_DATA_RW, pIemCpu->iEffSeg, GCPtrEffDst, 0);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU16, pu16Dst, u16Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnLockedU16, pu16Dst, u16Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pu16Dst, IEM_ACCESS_DATA_RW);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_MAP(pu32Dst, IEM_ACCESS_DATA_RW, pIemCpu->iEffSeg, GCPtrEffDst, 0);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU32, pu32Dst, u32Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnLockedU32, pu32Dst, u32Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pu32Dst, IEM_ACCESS_DATA_RW);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_MAP(pu64Dst, IEM_ACCESS_DATA_RW, pIemCpu->iEffSeg, GCPtrEffDst, 0);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU64, pu64Dst, u64Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnLockedU64, pu64Dst, u64Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pu64Dst, IEM_ACCESS_DATA_RW);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xbb. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonBit_Ev_Gv, &g_iemAImpl_btc);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xbc. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_OF | X86_EFL_SF | X86_EFL_AF | X86_EFL_PF | X86_EFL_CF);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rv_rm, &g_iemAImpl_bsf);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xbd. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_OF | X86_EFL_SF | X86_EFL_AF | X86_EFL_PF | X86_EFL_CF);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rv_rm, &g_iemAImpl_bsr);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xbe. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * If rm is denoting a register, no more instruction bytes.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U8_SX_U16(u16Value, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U16(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u16Value);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U8_SX_U32(u32Value, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U32(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u32Value);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U8_SX_U64(u64Value, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u64Value);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * We're loading a register from memory.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_MEM_U8_SX_U16(u16Value, pIemCpu->iEffSeg, GCPtrEffDst);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U16(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u16Value);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_MEM_U8_SX_U32(u32Value, pIemCpu->iEffSeg, GCPtrEffDst);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U32(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u32Value);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_MEM_U8_SX_U64(u64Value, pIemCpu->iEffSeg, GCPtrEffDst);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u64Value);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xbf. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /** @todo Not entirely sure how the operand size prefix is handled here,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * assuming that it will be ignored. Would be nice to have a few
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * test for this. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * If rm is denoting a register, no more instruction bytes.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U16_SX_U32(u32Value, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U32(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u32Value);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U16_SX_U64(u64Value, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u64Value);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * We're loading a register from memory.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_MEM_U16_SX_U32(u32Value, pIemCpu->iEffSeg, GCPtrEffDst);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U32(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u32Value);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_MEM_U16_SX_U64(u64Value, pIemCpu->iEffSeg, GCPtrEffDst);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u64Value);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xc0. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * If rm is denoting a register, no more instruction bytes.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U8(pu8Dst, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U8(pu8Reg, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_xadd_u8, pu8Dst, pu8Reg, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * We're accessing memory.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_MAP(pu8Dst, IEM_ACCESS_DATA_RW, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U8(u8RegCopy, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_xadd_u8, pu8Dst, pu8Reg, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_xadd_u8_locked, pu8Dst, pu8Reg, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pu8Dst, IEM_ACCESS_DATA_RW);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U8((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, u8RegCopy);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xc1. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * If rm is denoting a register, no more instruction bytes.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U16(pu16Dst, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U16(pu16Reg, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_xadd_u16, pu16Dst, pu16Reg, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U32(pu32Dst, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U32(pu32Reg, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_xadd_u32, pu32Dst, pu32Reg, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U64(pu64Dst, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U64(pu64Reg, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_xadd_u64, pu64Dst, pu64Reg, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * We're accessing memory.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_MAP(pu16Dst, IEM_ACCESS_DATA_RW, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U16(u16RegCopy, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_xadd_u16, pu16Dst, pu16Reg, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_xadd_u16_locked, pu16Dst, pu16Reg, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pu16Dst, IEM_ACCESS_DATA_RW);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U16((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, u16RegCopy);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_MAP(pu32Dst, IEM_ACCESS_DATA_RW, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U32(u32RegCopy, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_xadd_u32, pu32Dst, pu32Reg, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_xadd_u32_locked, pu32Dst, pu32Reg, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pu32Dst, IEM_ACCESS_DATA_RW);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U32((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, u32RegCopy);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_MAP(pu64Dst, IEM_ACCESS_DATA_RW, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U64(u64RegCopy, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_xadd_u64, pu64Dst, pu64Reg, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_xadd_u64_locked, pu64Dst, pu64Reg, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pu64Dst, IEM_ACCESS_DATA_RW);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U64((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, u64RegCopy);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xc2. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_cmpps_Vps_Wps_Ib__cmppd_Vpd_Wpd_Ib__cmpss_Vss_Wss_Ib__cmpsd_Vsd_Wsd_Ib);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xc3. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xc4. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_pinsrw_Pq_Ry_Mw_Ib__pinsrw_Vdq_Ry_Mw_Ib);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xc5. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_pextrw_Gd_Nq_Ib__pextrw_Gd_Udq_Ib);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xc6. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_shufps_Vps_Wps_Ib__shufdp_Vpd_Wpd_Ib);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xc7. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Common 'bswap register' helper.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U32(pu32Dst, iReg); /* Don't clear the high dword! */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_1(iemAImpl_bswap_u16, pu32Dst);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_1(iemAImpl_bswap_u32, pu32Dst);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_1(iemAImpl_bswap_u64, pu64Dst);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xc8. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonBswapGReg, X86_GREG_xAX | pIemCpu->uRexReg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xc9. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonBswapGReg, X86_GREG_xCX | pIemCpu->uRexReg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xca. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonBswapGReg, X86_GREG_xDX | pIemCpu->uRexReg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xcb. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonBswapGReg, X86_GREG_xBX | pIemCpu->uRexReg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xcc. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonBswapGReg, X86_GREG_xSP | pIemCpu->uRexReg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xcd. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonBswapGReg, X86_GREG_xBP | pIemCpu->uRexReg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xce. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonBswapGReg, X86_GREG_xSI | pIemCpu->uRexReg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xcf. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonBswapGReg, X86_GREG_xDI | pIemCpu->uRexReg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xd0. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_addsubpd_Vpd_Wpd__addsubps_Vps_Wps);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xd1. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xd2. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xd3. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xd4. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xd5. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xd6. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_movq_Wq_Vq__movq2dq_Vdq_Nq__movdq2q_Pq_Uq);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xd7. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_pmovmskb_Gd_Nq__pmovmskb_Gd_Udq);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xd8. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xd9. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xda. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xdb. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xdc. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xdd. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xde. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xdf. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xe0. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xe1. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xe2. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xe3. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xe4. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xe5. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xe6. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_cvttpd2dq_Vdq_Wdp__cvtdq2pd_Vdq_Wpd__cvtpd2dq_Vdq_Wpd);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xe7. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xe8. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xe9. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xea. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xeb. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xec. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xed. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xee. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xef. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xf0. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xf1. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xf2. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xf3. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xf4. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xf5. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xf6. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xf7. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_STUB(iemOp_maskmovq_Pq_Nq__maskmovdqu_Vdq_Udq);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xf8. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xf9. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xfa. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xfb. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xfc. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xfd. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f 0xfe. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x00 */ iemOp_Grp6, iemOp_Grp7, iemOp_lar_Gv_Ew, iemOp_lsl_Gv_Ew,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x04 */ iemOp_Invalid, iemOp_syscall, iemOp_clts, iemOp_sysret,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x08 */ iemOp_invd, iemOp_wbinvd, iemOp_Invalid, iemOp_ud2,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x0c */ iemOp_Invalid, iemOp_nop_Ev_GrpP, iemOp_femms, iemOp_3Dnow,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x10 */ iemOp_movups_Vps_Wps__movupd_Vpd_Wpd__movss_Vss_Wss__movsd_Vsd_Wsd,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x11 */ iemOp_movups_Wps_Vps__movupd_Wpd_Vpd__movss_Wss_Vss__movsd_Vsd_Wsd,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x12 */ iemOp_movlps_Vq_Mq__movhlps_Vq_Uq__movlpd_Vq_Mq__movsldup_Vq_Wq__movddup_Vq_Wq,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x14 */ iemOp_unpckhlps_Vps_Wq__unpcklpd_Vpd_Wq,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x16 */ iemOp_movhps_Vq_Mq__movlhps_Vq_Uq__movhpd_Vq_Mq__movshdup_Vq_Wq,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x18 */ iemOp_prefetch_Grp16, iemOp_nop_Ev, iemOp_nop_Ev, iemOp_nop_Ev,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x1c */ iemOp_nop_Ev, iemOp_nop_Ev, iemOp_nop_Ev, iemOp_nop_Ev,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x20 */ iemOp_mov_Rd_Cd, iemOp_mov_Rd_Dd, iemOp_mov_Cd_Rd, iemOp_mov_Dd_Rd,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x24 */ iemOp_mov_Rd_Td, iemOp_Invalid, iemOp_mov_Td_Rd, iemOp_Invalid,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x2a */ iemOp_cvtpi2ps_Vps_Qpi__cvtpi2pd_Vpd_Qpi__cvtsi2ss_Vss_Ey__cvtsi2sd_Vsd_Ey,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x2c */ iemOp_cvttps2pi_Ppi_Wps__cvttpd2pi_Ppi_Wpd__cvttss2si_Gy_Wss__cvttsd2si_Yu_Wsd,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x2d */ iemOp_cvtps2pi_Ppi_Wps__cvtpd2pi_QpiWpd__cvtss2si_Gy_Wss__cvtsd2si_Gy_Wsd,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x30 */ iemOp_wrmsr, iemOp_rdtsc, iemOp_rdmsr, iemOp_rdpmc,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x34 */ iemOp_sysenter, iemOp_sysexit, iemOp_Invalid, iemOp_getsec,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x38 */ iemOp_3byte_Esc_A4, iemOp_Invalid, iemOp_3byte_Esc_A5, iemOp_Invalid,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x3c */ iemOp_movnti_Gv_Ev/*?*/,iemOp_Invalid, iemOp_Invalid, iemOp_Invalid,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x40 */ iemOp_cmovo_Gv_Ev, iemOp_cmovno_Gv_Ev, iemOp_cmovc_Gv_Ev, iemOp_cmovnc_Gv_Ev,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x44 */ iemOp_cmove_Gv_Ev, iemOp_cmovne_Gv_Ev, iemOp_cmovbe_Gv_Ev, iemOp_cmovnbe_Gv_Ev,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x48 */ iemOp_cmovs_Gv_Ev, iemOp_cmovns_Gv_Ev, iemOp_cmovp_Gv_Ev, iemOp_cmovnp_Gv_Ev,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x4c */ iemOp_cmovl_Gv_Ev, iemOp_cmovnl_Gv_Ev, iemOp_cmovle_Gv_Ev, iemOp_cmovnle_Gv_Ev,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x51 */ iemOp_sqrtps_Wps_Vps__sqrtpd_Wpd_Vpd__sqrtss_Vss_Wss__sqrtsd_Vsd_Wsd,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x58 */ iemOp_addps_Vps_Wps__addpd_Vpd_Wpd__addss_Vss_Wss__addsd_Vsd_Wsd,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x59 */ iemOp_mulps_Vps_Wps__mulpd_Vpd_Wpd__mulss_Vss__Wss__mulsd_Vsd_Wsd,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x5a */ iemOp_cvtps2pd_Vpd_Wps__cvtpd2ps_Vps_Wpd__cvtss2sd_Vsd_Wss__cvtsd2ss_Vss_Wsd,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x5b */ iemOp_cvtdq2ps_Vps_Wdq__cvtps2dq_Vdq_Wps__cvtps2dq_Vdq_Wps,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x5c */ iemOp_subps_Vps_Wps__subpd_Vps_Wdp__subss_Vss_Wss__subsd_Vsd_Wsd,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x5d */ iemOp_minps_Vps_Wps__minpd_Vpd_Wpd__minss_Vss_Wss__minsd_Vsd_Wsd,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x5e */ iemOp_divps_Vps_Wps__divpd_Vpd_Wpd__divss_Vss_Wss__divsd_Vsd_Wsd,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x5f */ iemOp_maxps_Vps_Wps__maxpd_Vpd_Wpd__maxss_Vss_Wss__maxsd_Vsd_Wsd,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x60 */ iemOp_punpcklbw_Pq_Qd__punpcklbw_Vdq_Wdq,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x61 */ iemOp_punpcklwd_Pq_Qd__punpcklwd_Vdq_Wdq,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x62 */ iemOp_punpckldq_Pq_Qd__punpckldq_Vdq_Wdq,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x68 */ iemOp_punpckhbw_Pq_Qq__punpckhbw_Vdq_Wdq,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x69 */ iemOp_punpckhwd_Pq_Qd__punpckhwd_Vdq_Wdq,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x6a */ iemOp_punpckhdq_Pq_Qd__punpckhdq_Vdq_Wdq,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x6f */ iemOp_movq_Pq_Qq__movdqa_Vdq_Wdq__movdqu_Vdq_Wdq,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x70 */ iemOp_pshufw_Pq_Qq_Ib__pshufd_Vdq_Wdq_Ib__pshufhw_Vdq_Wdq_Ib__pshuflq_Vdq_Wdq_Ib,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x78 */ iemOp_vmread, iemOp_vmwrite, iemOp_Invalid, iemOp_Invalid,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x7e */ iemOp_movd_q_Ey_Pd__movd_q_Ey_Vy__movq_Vq_Wq,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x7f */ iemOp_movq_Qq_Pq__movq_movdqa_Wdq_Vdq__movdqu_Wdq_Vdq,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x80 */ iemOp_jo_Jv, iemOp_jno_Jv, iemOp_jc_Jv, iemOp_jnc_Jv,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x84 */ iemOp_je_Jv, iemOp_jne_Jv, iemOp_jbe_Jv, iemOp_jnbe_Jv,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x88 */ iemOp_js_Jv, iemOp_jns_Jv, iemOp_jp_Jv, iemOp_jnp_Jv,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x8c */ iemOp_jl_Jv, iemOp_jnl_Jv, iemOp_jle_Jv, iemOp_jnle_Jv,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x90 */ iemOp_seto_Eb, iemOp_setno_Eb, iemOp_setc_Eb, iemOp_setnc_Eb,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x94 */ iemOp_sete_Eb, iemOp_setne_Eb, iemOp_setbe_Eb, iemOp_setnbe_Eb,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x98 */ iemOp_sets_Eb, iemOp_setns_Eb, iemOp_setp_Eb, iemOp_setnp_Eb,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0x9c */ iemOp_setl_Eb, iemOp_setnl_Eb, iemOp_setle_Eb, iemOp_setnle_Eb,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0xa0 */ iemOp_push_fs, iemOp_pop_fs, iemOp_cpuid, iemOp_bt_Ev_Gv,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0xa4 */ iemOp_shld_Ev_Gv_Ib, iemOp_shld_Ev_Gv_CL, iemOp_Invalid, iemOp_Invalid,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0xa8 */ iemOp_push_gs, iemOp_pop_gs, iemOp_rsm, iemOp_bts_Ev_Gv,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0xac */ iemOp_shrd_Ev_Gv_Ib, iemOp_shrd_Ev_Gv_CL, iemOp_Grp15, iemOp_imul_Gv_Ev,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0xb0 */ iemOp_cmpxchg_Eb_Gb, iemOp_cmpxchg_Ev_Gv, iemOp_lss_Gv_Mp, iemOp_btr_Ev_Gv,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0xb4 */ iemOp_lfs_Gv_Mp, iemOp_lgs_Gv_Mp, iemOp_movzx_Gv_Eb, iemOp_movzx_Gv_Ew,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0xb8 */ iemOp_popcnt_Gv_Ev_jmpe,iemOp_Grp10, iemOp_Grp8, iemOp_btc_Ev_Gv,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0xbc */ iemOp_bsf_Gv_Ev, iemOp_bsr_Gv_Ev, iemOp_movsx_Gv_Eb, iemOp_movsx_Gv_Ew,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0xc2 */ iemOp_cmpps_Vps_Wps_Ib__cmppd_Vpd_Wpd_Ib__cmpss_Vss_Wss_Ib__cmpsd_Vsd_Wsd_Ib,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0xc4 */ iemOp_pinsrw_Pq_Ry_Mw_Ib__pinsrw_Vdq_Ry_Mw_Ib,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0xc5 */ iemOp_pextrw_Gd_Nq_Ib__pextrw_Gd_Udq_Ib,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0xc6 */ iemOp_shufps_Vps_Wps_Ib__shufdp_Vpd_Wpd_Ib,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0xc8 */ iemOp_bswap_rAX_r8, iemOp_bswap_rCX_r9, iemOp_bswap_rDX_r10, iemOp_bswap_rBX_r11,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0xcc */ iemOp_bswap_rSP_r12, iemOp_bswap_rBP_r13, iemOp_bswap_rSI_r14, iemOp_bswap_rDI_r15,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0xd0 */ iemOp_addsubpd_Vpd_Wpd__addsubps_Vps_Wps,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0xd6 */ iemOp_movq_Wq_Vq__movq2dq_Vdq_Nq__movdq2q_Pq_Uq,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0xe6 */ iemOp_cvttpd2dq_Vdq_Wdp__cvtdq2pd_Vdq_Wpd__cvtpd2dq_Vdq_Wpd,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* 0xf7 */ iemOp_maskmovq_Pq_Nq__maskmovdqu_Vdq_Udq,
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** @name One byte opcodes.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x00. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rm_r8, &g_iemAImpl_add);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x01. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rm_rv, &g_iemAImpl_add);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x02. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_r8_rm, &g_iemAImpl_add);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x03. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rv_rm, &g_iemAImpl_add);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x04. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_AL_Ib, &g_iemAImpl_add);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x05. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rAX_Iz, &g_iemAImpl_add);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x06. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonPushSReg, X86_SREG_ES);
f44d6fa3e2499e24568e13bf478400381a5493b1vboxsync/** Opcode 0x07. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return IEM_MC_DEFER_TO_CIMPL_2(iemCImpl_pop_Sreg, X86_SREG_ES, pIemCpu->enmEffOpSize);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x08. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rm_r8, &g_iemAImpl_or);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x09. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rm_rv, &g_iemAImpl_or);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0a. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_r8_rm, &g_iemAImpl_or);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0b. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rv_rm, &g_iemAImpl_or);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0c. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_AL_Ib, &g_iemAImpl_or);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0d. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rAX_Iz, &g_iemAImpl_or);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0e. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonPushSReg, X86_SREG_CS);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x0f. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x10. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rm_r8, &g_iemAImpl_adc);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x11. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rm_rv, &g_iemAImpl_adc);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x12. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_r8_rm, &g_iemAImpl_adc);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x13. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rv_rm, &g_iemAImpl_adc);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x14. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_AL_Ib, &g_iemAImpl_adc);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x15. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rAX_Iz, &g_iemAImpl_adc);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x16. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonPushSReg, X86_SREG_SS);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x17. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMOP_MNEMONIC("pop ss"); /** @todo implies instruction fusing? */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return IEM_MC_DEFER_TO_CIMPL_2(iemCImpl_pop_Sreg, X86_SREG_SS, pIemCpu->enmEffOpSize);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x18. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rm_r8, &g_iemAImpl_sbb);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x19. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rm_rv, &g_iemAImpl_sbb);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x1a. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_r8_rm, &g_iemAImpl_sbb);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x1b. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rv_rm, &g_iemAImpl_sbb);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x1c. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_AL_Ib, &g_iemAImpl_sbb);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x1d. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rAX_Iz, &g_iemAImpl_sbb);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x1e. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonPushSReg, X86_SREG_DS);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x1f. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return IEM_MC_DEFER_TO_CIMPL_2(iemCImpl_pop_Sreg, X86_SREG_DS, pIemCpu->enmEffOpSize);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x20. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rm_r8, &g_iemAImpl_and);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x21. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rm_rv, &g_iemAImpl_and);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x22. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_r8_rm, &g_iemAImpl_and);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x23. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rv_rm, &g_iemAImpl_and);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x24. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_AL_Ib, &g_iemAImpl_and);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x25. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rAX_Iz, &g_iemAImpl_and);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x26. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x27. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x28. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rm_r8, &g_iemAImpl_sub);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x29. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rm_rv, &g_iemAImpl_sub);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x2a. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_r8_rm, &g_iemAImpl_sub);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x2b. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rv_rm, &g_iemAImpl_sub);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x2c. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_AL_Ib, &g_iemAImpl_sub);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x2d. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rAX_Iz, &g_iemAImpl_sub);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x2e. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x2f. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x30. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rm_r8, &g_iemAImpl_xor);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x31. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rm_rv, &g_iemAImpl_xor);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x32. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_r8_rm, &g_iemAImpl_xor);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x33. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rv_rm, &g_iemAImpl_xor);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x34. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_AL_Ib, &g_iemAImpl_xor);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x35. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rAX_Iz, &g_iemAImpl_xor);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x36. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x37. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x38. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo do we have to decode the whole instruction first? */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rm_r8, &g_iemAImpl_cmp);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x39. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo do we have to decode the whole instruction first? */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rm_rv, &g_iemAImpl_cmp);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x3a. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_r8_rm, &g_iemAImpl_cmp);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x3b. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rv_rm, &g_iemAImpl_cmp);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x3c. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_AL_Ib, &g_iemAImpl_cmp);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x3d. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rAX_Iz, &g_iemAImpl_cmp);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x3e. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x3f. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsyncFNIEMOP_DEF_2(iemOpCommonUnaryGReg, PCIEMOPUNARYSIZES, pImpl, uint8_t, iReg)
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_2(pImpl->pfnNormalU16, pu16Dst, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_2(pImpl->pfnNormalU32, pu32Dst, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_2(pImpl->pfnNormalU64, pu64Dst, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x40. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * This is a REX prefix in 64-bit mode.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_2(iemOpCommonUnaryGReg, &g_iemAImpl_inc, X86_GREG_xAX);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x41. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * This is a REX prefix in 64-bit mode.
6e9b663a1ac9b2adc21436da50bf52d56c8950b7vboxsync pIemCpu->fPrefixes |= IEM_OP_PRF_REX | IEM_OP_PRF_REX_B;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_2(iemOpCommonUnaryGReg, &g_iemAImpl_inc, X86_GREG_xCX);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x42. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * This is a REX prefix in 64-bit mode.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync pIemCpu->fPrefixes |= IEM_OP_PRF_REX | IEM_OP_PRF_REX_X;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_2(iemOpCommonUnaryGReg, &g_iemAImpl_inc, X86_GREG_xDX);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x43. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * This is a REX prefix in 64-bit mode.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync pIemCpu->fPrefixes |= IEM_OP_PRF_REX | IEM_OP_PRF_REX_B | IEM_OP_PRF_REX_X;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_2(iemOpCommonUnaryGReg, &g_iemAImpl_inc, X86_GREG_xBX);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x44. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * This is a REX prefix in 64-bit mode.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync pIemCpu->fPrefixes |= IEM_OP_PRF_REX | IEM_OP_PRF_REX_R;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_2(iemOpCommonUnaryGReg, &g_iemAImpl_inc, X86_GREG_xSP);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x45. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * This is a REX prefix in 64-bit mode.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync pIemCpu->fPrefixes |= IEM_OP_PRF_REX | IEM_OP_PRF_REX_R | IEM_OP_PRF_REX_B;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_2(iemOpCommonUnaryGReg, &g_iemAImpl_inc, X86_GREG_xBP);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x46. */
e41f0459369a6d814aa36bf4def225482fc56026vboxsync * This is a REX prefix in 64-bit mode.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync pIemCpu->fPrefixes |= IEM_OP_PRF_REX | IEM_OP_PRF_REX_R | IEM_OP_PRF_REX_X;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_2(iemOpCommonUnaryGReg, &g_iemAImpl_inc, X86_GREG_xSI);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x47. */
e41f0459369a6d814aa36bf4def225482fc56026vboxsync * This is a REX prefix in 64-bit mode.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync pIemCpu->fPrefixes |= IEM_OP_PRF_REX | IEM_OP_PRF_REX_R | IEM_OP_PRF_REX_B | IEM_OP_PRF_REX_X;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_2(iemOpCommonUnaryGReg, &g_iemAImpl_inc, X86_GREG_xDI);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x48. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * This is a REX prefix in 64-bit mode.
e41f0459369a6d814aa36bf4def225482fc56026vboxsync pIemCpu->fPrefixes |= IEM_OP_PRF_REX | IEM_OP_PRF_SIZE_REX_W;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_2(iemOpCommonUnaryGReg, &g_iemAImpl_dec, X86_GREG_xAX);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync/** Opcode 0x49. */
6e9b663a1ac9b2adc21436da50bf52d56c8950b7vboxsync * This is a REX prefix in 64-bit mode.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync pIemCpu->fPrefixes |= IEM_OP_PRF_REX | IEM_OP_PRF_REX_B | IEM_OP_PRF_SIZE_REX_W;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_2(iemOpCommonUnaryGReg, &g_iemAImpl_dec, X86_GREG_xCX);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x4a. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * This is a REX prefix in 64-bit mode.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync pIemCpu->fPrefixes |= IEM_OP_PRF_REX | IEM_OP_PRF_REX_X | IEM_OP_PRF_SIZE_REX_W;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_2(iemOpCommonUnaryGReg, &g_iemAImpl_dec, X86_GREG_xDX);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x4b. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * This is a REX prefix in 64-bit mode.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync pIemCpu->fPrefixes |= IEM_OP_PRF_REX | IEM_OP_PRF_REX_B | IEM_OP_PRF_REX_X | IEM_OP_PRF_SIZE_REX_W;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_2(iemOpCommonUnaryGReg, &g_iemAImpl_dec, X86_GREG_xBX);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x4c. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * This is a REX prefix in 64-bit mode.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync pIemCpu->fPrefixes |= IEM_OP_PRF_REX | IEM_OP_PRF_REX_R | IEM_OP_PRF_SIZE_REX_W;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_2(iemOpCommonUnaryGReg, &g_iemAImpl_dec, X86_GREG_xSP);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x4d. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * This is a REX prefix in 64-bit mode.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync pIemCpu->fPrefixes |= IEM_OP_PRF_REX | IEM_OP_PRF_REX_R | IEM_OP_PRF_REX_B | IEM_OP_PRF_SIZE_REX_W;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_2(iemOpCommonUnaryGReg, &g_iemAImpl_dec, X86_GREG_xBP);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x4e. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * This is a REX prefix in 64-bit mode.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync pIemCpu->fPrefixes |= IEM_OP_PRF_REX | IEM_OP_PRF_REX_R | IEM_OP_PRF_REX_X | IEM_OP_PRF_SIZE_REX_W;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_2(iemOpCommonUnaryGReg, &g_iemAImpl_dec, X86_GREG_xSI);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x4f. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * This is a REX prefix in 64-bit mode.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync pIemCpu->fPrefixes |= IEM_OP_PRF_REX | IEM_OP_PRF_REX_R | IEM_OP_PRF_REX_B | IEM_OP_PRF_REX_X | IEM_OP_PRF_SIZE_REX_W;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_2(iemOpCommonUnaryGReg, &g_iemAImpl_dec, X86_GREG_xDI);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Common 'push register' helper.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync pIemCpu->enmEffOpSize = !(pIemCpu->fPrefixes & IEM_OP_PRF_SIZE_OP) ? IEMMODE_64BIT : IEMMODE_16BIT;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x50. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonPushGReg, X86_GREG_xAX);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x51. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonPushGReg, X86_GREG_xCX);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x52. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonPushGReg, X86_GREG_xDX);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x53. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonPushGReg, X86_GREG_xBX);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x54. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonPushGReg, X86_GREG_xSP);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x55. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonPushGReg, X86_GREG_xBP);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x56. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonPushGReg, X86_GREG_xSI);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x57. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonPushGReg, X86_GREG_xDI);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Common 'pop register' helper.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync pIemCpu->enmEffOpSize = !(pIemCpu->fPrefixes & IEM_OP_PRF_SIZE_OP) ? IEMMODE_64BIT : IEMMODE_16BIT;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** @todo How does this code handle iReg==X86_GREG_xSP. How does a real CPU
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * handle it, for that matter (Intel pseudo code hints that the popped
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * value is incremented by the stack item size.) Test it, both encodings
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * and all three register sizes. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x58. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonPopGReg, X86_GREG_xAX);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x59. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonPopGReg, X86_GREG_xCX);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x5a. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonPopGReg, X86_GREG_xDX);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x5b. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonPopGReg, X86_GREG_xBX);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x5c. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonPopGReg, X86_GREG_xSP);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x5d. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonPopGReg, X86_GREG_xBP);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x5e. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonPopGReg, X86_GREG_xSI);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x5f. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonPopGReg, X86_GREG_xDI);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x60. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x61. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x62. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x63. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x64. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x65. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x66. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x67. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_16BIT: pIemCpu->enmEffAddrMode = IEMMODE_32BIT; break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_32BIT: pIemCpu->enmEffAddrMode = IEMMODE_16BIT; break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_64BIT: pIemCpu->enmEffAddrMode = IEMMODE_32BIT; break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x68. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync uint64_t u64Imm; IEM_OPCODE_GET_NEXT_S32_SX_U64(&u64Imm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x69. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMOP_MNEMONIC("imul Gv,Ev,Iz"); /* Gv = Ev * Iz; */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* register operand */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U16(u16Tmp, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_imul_two_u16, pu16Dst, u16Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U16(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u16Tmp);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* memory operand */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_MEM_U16(u16Tmp, pIemCpu->iEffSeg, GCPtrEffDst);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_imul_two_u16, pu16Dst, u16Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U16(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u16Tmp);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* register operand */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U32(u32Tmp, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_imul_two_u32, pu32Dst, u32Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U32(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u32Tmp);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* memory operand */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_MEM_U32(u32Tmp, pIemCpu->iEffSeg, GCPtrEffDst);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_imul_two_u32, pu32Dst, u32Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U32(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u32Tmp);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync uint64_t u64Imm; IEM_OPCODE_GET_NEXT_S32_SX_U64(&u64Imm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* register operand */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U64(u64Tmp, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_imul_two_u64, pu64Dst, u64Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u64Tmp);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* memory operand */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_MEM_U64(u64Tmp, pIemCpu->iEffSeg, GCPtrEffDst);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_imul_two_u64, pu64Dst, u64Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u64Tmp);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x6a. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x6b. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMOP_MNEMONIC("imul Gv,Ev,Ib"); /* Gv = Ev * Iz; */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* register operand */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_ARG_CONST(uint16_t, u16Src,/*=*/ (int8_t)u8Imm, 1);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U16(u16Tmp, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_imul_two_u16, pu16Dst, u16Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U16(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u16Tmp);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* memory operand */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_ARG_CONST(uint16_t, u16Src,/*=*/ (int8_t)u8Imm, 1);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_MEM_U16(u16Tmp, pIemCpu->iEffSeg, GCPtrEffDst);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_imul_two_u16, pu16Dst, u16Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U16(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u16Tmp);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* register operand */
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync IEM_MC_ARG_CONST(uint32_t, u32Src,/*=*/ (int8_t)u8Imm, 1);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync IEM_MC_FETCH_GREG_U32(u32Tmp, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_imul_two_u32, pu32Dst, u32Src, pEFlags);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync IEM_MC_STORE_GREG_U32(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u32Tmp);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync /* memory operand */
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync IEM_MC_ARG_CONST(uint32_t, u32Src,/*=*/ (int8_t)u8Imm, 1);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync IEM_MC_FETCH_MEM_U32(u32Tmp, pIemCpu->iEffSeg, GCPtrEffDst);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_imul_two_u32, pu32Dst, u32Src, pEFlags);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync IEM_MC_STORE_GREG_U32(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u32Tmp);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync /* register operand */
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync IEM_MC_ARG_CONST(uint64_t, u64Src,/*=*/ (int8_t)u8Imm, 1);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync IEM_MC_FETCH_GREG_U64(u64Tmp, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_imul_two_u64, pu64Dst, u64Src, pEFlags);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync IEM_MC_STORE_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u64Tmp);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync /* memory operand */
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync IEM_MC_ARG_CONST(uint64_t, u64Src,/*=*/ (int8_t)u8Imm, 1);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync IEM_MC_FETCH_MEM_U64(u64Tmp, pIemCpu->iEffSeg, GCPtrEffDst);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_imul_two_u64, pu64Dst, u64Src, pEFlags);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync IEM_MC_STORE_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u64Tmp);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync/** Opcode 0x6c. */
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync if (pIemCpu->fPrefixes & (IEM_OP_PRF_REPNZ | IEM_OP_PRF_REPZ))
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync case IEMMODE_16BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_rep_ins_op8_addr16);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_rep_ins_op8_addr32);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_rep_ins_op8_addr64);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync case IEMMODE_16BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_ins_op8_addr16);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_ins_op8_addr32);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_ins_op8_addr64);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync/** Opcode 0x6d. */
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync if (pIemCpu->fPrefixes & (IEM_OP_PRF_REPZ | IEM_OP_PRF_REPNZ))
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync case IEMMODE_16BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_rep_ins_op16_addr16);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_rep_ins_op16_addr32);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_rep_ins_op16_addr64);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync case IEMMODE_16BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_rep_ins_op32_addr16);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_rep_ins_op32_addr32);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_rep_ins_op32_addr64);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync case IEMMODE_16BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_ins_op16_addr16);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_ins_op16_addr32);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_ins_op16_addr64);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync case IEMMODE_16BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_ins_op32_addr16);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_ins_op32_addr32);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_ins_op32_addr64);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x6e. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if (pIemCpu->fPrefixes & (IEM_OP_PRF_REPNZ | IEM_OP_PRF_REPZ))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_16BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_rep_outs_op8_addr16, pIemCpu->iEffSeg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_rep_outs_op8_addr32, pIemCpu->iEffSeg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_rep_outs_op8_addr64, pIemCpu->iEffSeg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_16BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_outs_op8_addr16, pIemCpu->iEffSeg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_outs_op8_addr32, pIemCpu->iEffSeg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_outs_op8_addr64, pIemCpu->iEffSeg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x6f. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if (pIemCpu->fPrefixes & (IEM_OP_PRF_REPZ | IEM_OP_PRF_REPNZ))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_16BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_rep_outs_op16_addr16, pIemCpu->iEffSeg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_rep_outs_op16_addr32, pIemCpu->iEffSeg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_rep_outs_op16_addr64, pIemCpu->iEffSeg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_16BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_rep_outs_op32_addr16, pIemCpu->iEffSeg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_rep_outs_op32_addr32, pIemCpu->iEffSeg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_rep_outs_op32_addr64, pIemCpu->iEffSeg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_16BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_outs_op16_addr16, pIemCpu->iEffSeg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_outs_op16_addr32, pIemCpu->iEffSeg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_outs_op16_addr64, pIemCpu->iEffSeg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_16BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_outs_op32_addr16, pIemCpu->iEffSeg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_outs_op32_addr32, pIemCpu->iEffSeg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_outs_op32_addr64, pIemCpu->iEffSeg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x70. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x71. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x72. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x73. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x74. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x75. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x76. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_IF_EFL_ANY_BITS_SET(X86_EFL_CF | X86_EFL_ZF) {
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x77. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_IF_EFL_ANY_BITS_SET(X86_EFL_CF | X86_EFL_ZF) {
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x78. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x79. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x7a. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x7b. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x7c. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x7d. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x7e. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_IF_EFL_BIT_SET_OR_BITS_NE(X86_EFL_ZF, X86_EFL_SF, X86_EFL_OF) {
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x7f. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_IF_EFL_BIT_SET_OR_BITS_NE(X86_EFL_ZF, X86_EFL_SF, X86_EFL_OF) {
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x80. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMOP_MNEMONIC2("add\0or\0\0adc\0sbb\0and\0sub\0xor\0cmp" + ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)*4, "Eb,Ib");
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync PCIEMOPBINSIZES pImpl = g_apIemImplGrp1[(bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK];
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* register target */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U8(pu8Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU8, pu8Dst, u8Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* memory target */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync { /* CMP */
f44d6fa3e2499e24568e13bf478400381a5493b1vboxsync IEM_MC_MEM_MAP(pu8Dst, fAccess, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
f44d6fa3e2499e24568e13bf478400381a5493b1vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU8, pu8Dst, u8Src, pEFlags);
f44d6fa3e2499e24568e13bf478400381a5493b1vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnLockedU8, pu8Dst, u8Src, pEFlags);
f44d6fa3e2499e24568e13bf478400381a5493b1vboxsync/** Opcode 0x81. */
f44d6fa3e2499e24568e13bf478400381a5493b1vboxsync IEMOP_MNEMONIC2("add\0or\0\0adc\0sbb\0and\0sub\0xor\0cmp" + ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)*4, "Ev,Iz");
f44d6fa3e2499e24568e13bf478400381a5493b1vboxsync PCIEMOPBINSIZES pImpl = g_apIemImplGrp1[(bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK];
f44d6fa3e2499e24568e13bf478400381a5493b1vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
f44d6fa3e2499e24568e13bf478400381a5493b1vboxsync /* register target */
f44d6fa3e2499e24568e13bf478400381a5493b1vboxsync IEM_MC_ARG_CONST(uint16_t, u16Src, /*=*/ u16Imm, 1);
f44d6fa3e2499e24568e13bf478400381a5493b1vboxsync IEM_MC_REF_GREG_U16(pu16Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
f44d6fa3e2499e24568e13bf478400381a5493b1vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU16, pu16Dst, u16Src, pEFlags);
f44d6fa3e2499e24568e13bf478400381a5493b1vboxsync /* memory target */
f44d6fa3e2499e24568e13bf478400381a5493b1vboxsync { /* CMP, TEST */
f44d6fa3e2499e24568e13bf478400381a5493b1vboxsync IEM_MC_MEM_MAP(pu16Dst, fAccess, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
f44d6fa3e2499e24568e13bf478400381a5493b1vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU16, pu16Dst, u16Src, pEFlags);
f44d6fa3e2499e24568e13bf478400381a5493b1vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnLockedU16, pu16Dst, u16Src, pEFlags);
f44d6fa3e2499e24568e13bf478400381a5493b1vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
f44d6fa3e2499e24568e13bf478400381a5493b1vboxsync /* register target */
f44d6fa3e2499e24568e13bf478400381a5493b1vboxsync IEM_MC_ARG_CONST(uint32_t, u32Src, /*=*/ u32Imm, 1);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U32(pu32Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU32, pu32Dst, u32Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* memory target */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync { /* CMP, TEST */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_MAP(pu32Dst, fAccess, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU32, pu32Dst, u32Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnLockedU32, pu32Dst, u32Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* register target */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync uint64_t u64Imm; IEM_OPCODE_GET_NEXT_S32_SX_U64(&u64Imm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_ARG_CONST(uint64_t, u64Src, /*=*/ u64Imm, 1);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U64(pu64Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU64, pu64Dst, u64Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* memory target */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync { /* CMP */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync uint64_t u64Imm; IEM_OPCODE_GET_NEXT_S32_SX_U64(&u64Imm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_MAP(pu64Dst, fAccess, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU64, pu64Dst, u64Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnLockedU64, pu64Dst, u64Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x82. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMOP_HLP_NO_64BIT(); /** @todo do we need to decode the whole instruction or is this ok? */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x83. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMOP_MNEMONIC2("add\0or\0\0adc\0sbb\0and\0sub\0xor\0cmp" + ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)*4, "Ev,Ib");
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync PCIEMOPBINSIZES pImpl = g_apIemImplGrp1[(bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK];
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Register target
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_ARG_CONST(uint16_t, u16Src, /*=*/ (int8_t)u8Imm,1);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync IEM_MC_REF_GREG_U16(pu16Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU16, pu16Dst, u16Src, pEFlags);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync IEM_MC_ARG_CONST(uint32_t, u32Src, /*=*/ (int8_t)u8Imm,1);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync IEM_MC_REF_GREG_U32(pu32Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU32, pu32Dst, u32Src, pEFlags);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync IEM_MC_ARG_CONST(uint64_t, u64Src, /*=*/ (int8_t)u8Imm,1);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync IEM_MC_REF_GREG_U64(pu64Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU64, pu64Dst, u64Src, pEFlags);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync * Memory target.
d4a8f6749f70bad88edc04de808643d372faa35avboxsync { /* CMP */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_MAP(pu16Dst, fAccess, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU16, pu16Dst, u16Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnLockedU16, pu16Dst, u16Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_MAP(pu32Dst, fAccess, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU32, pu32Dst, u32Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnLockedU32, pu32Dst, u32Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_MAP(pu64Dst, fAccess, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU64, pu64Dst, u64Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnLockedU64, pu64Dst, u64Src, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x84. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo do we have to decode the whole instruction first? */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rm_r8, &g_iemAImpl_test);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x85. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo do we have to decode the whole instruction first? */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rm_rv, &g_iemAImpl_test);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x86. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * If rm is denoting a register, no more instruction bytes.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U8(uTmp1, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U8(uTmp2, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U8((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, uTmp1);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U8(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, uTmp2);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * We're accessing memory.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** @todo the register must be committed separately! */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_MAP(pu8Mem, IEM_ACCESS_DATA_RW, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U8(pu8Reg, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_2(iemAImpl_xchg_u8, pu8Mem, pu8Reg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pu8Mem, IEM_ACCESS_DATA_RW);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x87. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * If rm is denoting a register, no more instruction bytes.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U16(uTmp1, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U16(uTmp2, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U16((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, uTmp1);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U16(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, uTmp2);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U32(uTmp1, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U32(uTmp2, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U32((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, uTmp1);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U32(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, uTmp2);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U64(uTmp1, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U64(uTmp2, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U64((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, uTmp1);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, uTmp2);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * We're accessing memory.
b1e4667c5a9588bd509d569ce252127891b44923vboxsync/** @todo the register must be committed separately! */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_MEM_MAP(pu16Mem, IEM_ACCESS_DATA_RW, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U16(pu16Reg, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_2(iemAImpl_xchg_u16, pu16Mem, pu16Reg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pu16Mem, IEM_ACCESS_DATA_RW);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_MAP(pu32Mem, IEM_ACCESS_DATA_RW, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U32(pu32Reg, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_2(iemAImpl_xchg_u32, pu32Mem, pu32Reg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pu32Mem, IEM_ACCESS_DATA_RW);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_MAP(pu64Mem, IEM_ACCESS_DATA_RW, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U64(pu64Reg, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_2(iemAImpl_xchg_u64, pu64Mem, pu64Reg);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pu64Mem, IEM_ACCESS_DATA_RW);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x88. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * If rm is denoting a register, no more instruction bytes.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U8(u8Value, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U8((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, u8Value);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * We're writing a register to memory.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U8(u8Value, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_MEM_U8(pIemCpu->iEffSeg, GCPtrEffDst, u8Value);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x89. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * If rm is denoting a register, no more instruction bytes.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U16(u16Value, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U16((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, u16Value);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_FETCH_GREG_U32(u32Value, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_STORE_GREG_U32((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, u32Value);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_FETCH_GREG_U64(u64Value, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_STORE_GREG_U64((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, u64Value);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync * We're writing a register to memory.
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_FETCH_GREG_U16(u16Value, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_STORE_MEM_U16(pIemCpu->iEffSeg, GCPtrEffDst, u16Value);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_FETCH_GREG_U32(u32Value, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_STORE_MEM_U32(pIemCpu->iEffSeg, GCPtrEffDst, u32Value);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_FETCH_GREG_U64(u64Value, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_STORE_MEM_U64(pIemCpu->iEffSeg, GCPtrEffDst, u64Value);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync/** Opcode 0x8a. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync * If rm is denoting a register, no more instruction bytes.
b1e4667c5a9588bd509d569ce252127891b44923vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_FETCH_GREG_U8(u8Value, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_STORE_GREG_U8(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u8Value);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync * We're loading a register from memory.
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_FETCH_MEM_U8(u8Value, pIemCpu->iEffSeg, GCPtrEffDst);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_STORE_GREG_U8(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u8Value);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync/** Opcode 0x8b. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync * If rm is denoting a register, no more instruction bytes.
b1e4667c5a9588bd509d569ce252127891b44923vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_FETCH_GREG_U16(u16Value, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_STORE_GREG_U16(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u16Value);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_FETCH_GREG_U32(u32Value, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_STORE_GREG_U32(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u32Value);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_FETCH_GREG_U64(u64Value, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_STORE_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u64Value);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync * We're loading a register from memory.
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_FETCH_MEM_U16(u16Value, pIemCpu->iEffSeg, GCPtrEffDst);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_STORE_GREG_U16(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u16Value);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_FETCH_MEM_U32(u32Value, pIemCpu->iEffSeg, GCPtrEffDst);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_STORE_GREG_U32(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u32Value);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_FETCH_MEM_U64(u64Value, pIemCpu->iEffSeg, GCPtrEffDst);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_STORE_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u64Value);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync/** Opcode 0x8c. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Check that the destination register exists. The REX.R prefix is ignored.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync uint8_t const iSegReg = ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return IEMOP_RAISE_INVALID_OPCODE(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * If rm is denoting a register, no more instruction bytes.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * In that case, the operand size is respected and the upper bits are
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * cleared (starting with some pentium).
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U16((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, u16Value);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U32((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, u32Value);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_STORE_GREG_U64((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, u64Value);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * We're saving the register to memory. The access is word sized
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * regardless of operand size prefixes.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync#if 0 /* not necessary */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync pIemCpu->enmEffOpSize = pIemCpu->enmDefOpSize = IEMMODE_16BIT;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_MEM_U16(pIemCpu->iEffSeg, GCPtrEffDst, u16Value);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x8d. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return IEMOP_RAISE_INVALID_LOCK_PREFIX(); /* no register form */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U16(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u16Cast);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U32(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u32Cast);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U64(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, GCPtrEffSrc);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x8e. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * The practical operand size is 16-bit.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync#if 0 /* not necessary */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync pIemCpu->enmEffOpSize = pIemCpu->enmDefOpSize = IEMMODE_16BIT;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Check that the destination register exists and can be used with this
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * instruction. The REX.R prefix is ignored.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync uint8_t const iSegReg = ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return IEMOP_RAISE_INVALID_OPCODE(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * If rm is denoting a register, no more instruction bytes.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U16(u16Value, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_CIMPL_2(iemCImpl_load_SReg, iSRegArg, u16Value);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync * We're loading the register from memory. The access is word sized
e41f0459369a6d814aa36bf4def225482fc56026vboxsync * regardless of operand size prefixes.
e41f0459369a6d814aa36bf4def225482fc56026vboxsync IEM_MC_FETCH_MEM_U16(u16Value, pIemCpu->iEffSeg, GCPtrEffDst);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync IEM_MC_CALL_CIMPL_2(iemCImpl_load_SReg, iSRegArg, u16Value);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync/** Opcode 0x8f. */
e41f0459369a6d814aa36bf4def225482fc56026vboxsync /* This bugger is rather annoying as it requires rSP to be updated before
e41f0459369a6d814aa36bf4def225482fc56026vboxsync doing the effective address calculations. Will eventually require a
b1e4667c5a9588bd509d569ce252127891b44923vboxsync split between the R/M+SIB decoding and the effective address
e41f0459369a6d814aa36bf4def225482fc56026vboxsync calculation - which is something that is required for any attempt at
e41f0459369a6d814aa36bf4def225482fc56026vboxsync reusing this code for a recompiler. It may also be good to have if we
e41f0459369a6d814aa36bf4def225482fc56026vboxsync need to delay #UD exception caused by invalid lock prefixes.
e41f0459369a6d814aa36bf4def225482fc56026vboxsync For now, we'll do a mostly safe interpreter-only implementation here. */
e41f0459369a6d814aa36bf4def225482fc56026vboxsync /** @todo What's the deal with the 'reg' field and pop Ev? Ignorning it for
e41f0459369a6d814aa36bf4def225482fc56026vboxsync * now until tests show it's checked.. */
e41f0459369a6d814aa36bf4def225482fc56026vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
e41f0459369a6d814aa36bf4def225482fc56026vboxsync /* Register access is relatively easy and can share code. */
e41f0459369a6d814aa36bf4def225482fc56026vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
e41f0459369a6d814aa36bf4def225482fc56026vboxsync return FNIEMOP_CALL_1(iemOpCommonPopGReg, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync * Memory target.
e41f0459369a6d814aa36bf4def225482fc56026vboxsync * Intel says that RSP is incremented before it's used in any effective
e41f0459369a6d814aa36bf4def225482fc56026vboxsync * address calcuations. This means some serious extra annoyance here since
e41f0459369a6d814aa36bf4def225482fc56026vboxsync * we decode and caclulate the effective address in one step and like to
e41f0459369a6d814aa36bf4def225482fc56026vboxsync * delay committing registers till everything is done.
e41f0459369a6d814aa36bf4def225482fc56026vboxsync * So, we'll decode and calculate the effective address twice. This will
e41f0459369a6d814aa36bf4def225482fc56026vboxsync * require some recoding if turned into a recompiler.
e41f0459369a6d814aa36bf4def225482fc56026vboxsync IEMOP_HLP_DEFAULT_64BIT_OP_SIZE(); /* The common code does this differently. */
e41f0459369a6d814aa36bf4def225482fc56026vboxsync /* Calc effective address with modified ESP. */
e41f0459369a6d814aa36bf4def225482fc56026vboxsync rcStrict = iemOpHlpCalcRmEffAddr(pIemCpu, bRm, &GCPtrEff);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync case IEMMODE_16BIT: iemRegAddToRsp(pCtx, 2); break;
e41f0459369a6d814aa36bf4def225482fc56026vboxsync case IEMMODE_32BIT: iemRegAddToRsp(pCtx, 4); break;
e41f0459369a6d814aa36bf4def225482fc56026vboxsync case IEMMODE_64BIT: iemRegAddToRsp(pCtx, 8); break;
e41f0459369a6d814aa36bf4def225482fc56026vboxsync rcStrict = iemOpHlpCalcRmEffAddr(pIemCpu, bRm, &GCPtrEff);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync /* Perform the operation - this should be CImpl. */
e41f0459369a6d814aa36bf4def225482fc56026vboxsync rcStrict = iemMemStackPopU16Ex(pIemCpu, &u16Value, &TmpRsp);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync rcStrict = iemMemStoreDataU16(pIemCpu, pIemCpu->iEffSeg, GCPtrEff, u16Value);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync rcStrict = iemMemStackPopU32Ex(pIemCpu, &u32Value, &TmpRsp);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync rcStrict = iemMemStoreDataU32(pIemCpu, pIemCpu->iEffSeg, GCPtrEff, u32Value);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync rcStrict = iemMemStackPopU64Ex(pIemCpu, &u64Value, &TmpRsp);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync rcStrict = iemMemStoreDataU16(pIemCpu, pIemCpu->iEffSeg, GCPtrEff, u64Value);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync * Common 'xchg reg,rAX' helper.
e41f0459369a6d814aa36bf4def225482fc56026vboxsyncFNIEMOP_DEF_1(iemOpCommonXchgGRegRax, uint8_t, iReg)
b1e4667c5a9588bd509d569ce252127891b44923vboxsync/** Opcode 0x90. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync return FNIEMOP_CALL_1(iemOpCommonXchgGRegRax, X86_GREG_xAX);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync/** Opcode 0x91. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync return FNIEMOP_CALL_1(iemOpCommonXchgGRegRax, X86_GREG_xCX);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync/** Opcode 0x92. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync return FNIEMOP_CALL_1(iemOpCommonXchgGRegRax, X86_GREG_xDX);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync/** Opcode 0x93. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync return FNIEMOP_CALL_1(iemOpCommonXchgGRegRax, X86_GREG_xBX);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync/** Opcode 0x94. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync return FNIEMOP_CALL_1(iemOpCommonXchgGRegRax, X86_GREG_xSP);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync/** Opcode 0x95. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync return FNIEMOP_CALL_1(iemOpCommonXchgGRegRax, X86_GREG_xBP);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync/** Opcode 0x96. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync return FNIEMOP_CALL_1(iemOpCommonXchgGRegRax, X86_GREG_xSI);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync/** Opcode 0x97. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync return FNIEMOP_CALL_1(iemOpCommonXchgGRegRax, X86_GREG_xDI);
b1e4667c5a9588bd509d569ce252127891b44923vboxsync/** Opcode 0x98. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_OR_GREG_U16(X86_GREG_xAX, UINT16_C(0xff00));
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_AND_GREG_U16(X86_GREG_xAX, UINT16_C(0x00ff));
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_OR_GREG_U32(X86_GREG_xAX, UINT32_C(0xffff0000));
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_AND_GREG_U32(X86_GREG_xAX, UINT32_C(0x0000ffff));
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_OR_GREG_U64(X86_GREG_xAX, UINT64_C(0xffffffff00000000));
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_AND_GREG_U64(X86_GREG_xAX, UINT64_C(0x00000000ffffffff));
b1e4667c5a9588bd509d569ce252127891b44923vboxsync/** Opcode 0x99. */
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_STORE_GREG_U16_CONST(X86_GREG_xDX, UINT16_C(0xffff));
b1e4667c5a9588bd509d569ce252127891b44923vboxsync IEM_MC_STORE_GREG_U32_CONST(X86_GREG_xDX, UINT32_C(0xffffffff));
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U64_CONST(X86_GREG_xDX, UINT64_C(0xffffffffffffffff));
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x9a. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* Decode the far pointer address and pass it on to the far call C implementation. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return IEM_MC_DEFER_TO_CIMPL_3(iemCImpl_callf, uSel, offSeg, pIemCpu->enmEffOpSize);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x9b. (aka fwait) */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x9c. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_pushf, pIemCpu->enmEffOpSize);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x9d. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_popf, pIemCpu->enmEffOpSize);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x9e. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync && !IEM_IS_AMD_CPUID_FEATURE_PRESENT_ECX(X86_CPUID_AMD_FEATURE_ECX_LAHF_SAHF))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U8_ZX_U32(u32Flags, X86_GREG_xSP/*=AH*/);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_AND_LOCAL_U32(u32Flags, X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF | X86_EFL_CF);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_AND_LOCAL_U32(EFlags, UINT32_C(0xffffff00));
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0x9f. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync && !IEM_IS_AMD_CPUID_FEATURE_PRESENT_ECX(X86_CPUID_AMD_FEATURE_ECX_LAHF_SAHF))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U8(X86_GREG_xSP/*=AH*/, u8Flags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Macro used by iemOp_mov_Al_Ob, iemOp_mov_rAX_Ov, iemOp_mov_Ob_AL and
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * iemOp_mov_Ov_rAX to fetch the moffsXX bit of the opcode and fend of lock
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * prefixes. Will return on failures.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * @param a_GCPtrMemOff The variable to store the offset in.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_OPCODE_GET_NEXT_U16_ZX_U64(&(a_GCPtrMemOff)); \
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_OPCODE_GET_NEXT_U32_ZX_U64(&(a_GCPtrMemOff)); \
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync } while (0)
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xa0. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Get the offset and fend of lock prefixes.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Fetch AL.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_MEM_U8(u8Tmp, pIemCpu->iEffSeg, GCPtrMemOff);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xa1. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Get the offset and fend of lock prefixes.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Fetch rAX.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_MEM_U16(u16Tmp, pIemCpu->iEffSeg, GCPtrMemOff);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_MEM_U32(u32Tmp, pIemCpu->iEffSeg, GCPtrMemOff);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_MEM_U64(u64Tmp, pIemCpu->iEffSeg, GCPtrMemOff);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xa2. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Get the offset and fend of lock prefixes.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Store AL.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_MEM_U8(pIemCpu->iEffSeg, GCPtrMemOff, u8Tmp);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xa3. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Get the offset and fend of lock prefixes.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Store rAX.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_MEM_U16(pIemCpu->iEffSeg, GCPtrMemOff, u16Tmp);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_MEM_U32(pIemCpu->iEffSeg, GCPtrMemOff, u32Tmp);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_MEM_U64(pIemCpu->iEffSeg, GCPtrMemOff, u64Tmp);
f6f5b68ebbb3a264e0a27e2a5848774722fccfd2vboxsync/** Macro used by iemOp_movsb_Xb_Yb and iemOp_movswd_Xv_Yv */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U##AddrBits##_ZX_U64(uAddr, X86_GREG_xSI); \
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_MEM_U##ValBits(uValue, pIemCpu->iEffSeg, uAddr); \
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U##AddrBits##_ZX_U64(uAddr, X86_GREG_xDI); \
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_MEM_U##ValBits(X86_SREG_ES, uAddr, uValue); \
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_SUB_GREG_U##AddrBits(X86_GREG_xDI, ValBits / 8); \
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_SUB_GREG_U##AddrBits(X86_GREG_xSI, ValBits / 8); \
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_ADD_GREG_U##AddrBits(X86_GREG_xDI, ValBits / 8); \
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_ADD_GREG_U##AddrBits(X86_GREG_xSI, ValBits / 8); \
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xa4. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Use the C implementation if a repeat prefix is encountered.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if (pIemCpu->fPrefixes & (IEM_OP_PRF_REPNZ | IEM_OP_PRF_REPZ))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_16BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_rep_movs_op8_addr16, pIemCpu->iEffSeg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_rep_movs_op8_addr32, pIemCpu->iEffSeg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_rep_movs_op8_addr64, pIemCpu->iEffSeg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Sharing case implementation with movs[wdq] below.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xa5. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Use the C implementation if a repeat prefix is encountered.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if (pIemCpu->fPrefixes & (IEM_OP_PRF_REPNZ | IEM_OP_PRF_REPZ))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_16BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_rep_movs_op16_addr16, pIemCpu->iEffSeg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_rep_movs_op16_addr32, pIemCpu->iEffSeg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_rep_movs_op16_addr64, pIemCpu->iEffSeg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_16BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_rep_movs_op32_addr16, pIemCpu->iEffSeg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_rep_movs_op32_addr32, pIemCpu->iEffSeg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_rep_movs_op32_addr64, pIemCpu->iEffSeg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_16BIT: AssertFailedReturn(VERR_INTERNAL_ERROR_3);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_rep_movs_op64_addr32, pIemCpu->iEffSeg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_rep_movs_op64_addr64, pIemCpu->iEffSeg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Annoying double switch here.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Using ugly macro for implementing the cases, sharing it with movsb.
6e9b663a1ac9b2adc21436da50bf52d56c8950b7vboxsync case IEMMODE_16BIT: AssertFailedReturn(VERR_INTERNAL_ERROR_4); /* cannot be encoded */ break;
6e9b663a1ac9b2adc21436da50bf52d56c8950b7vboxsync/** Macro used by iemOp_cmpsb_Xb_Yb and iemOp_cmpswd_Xv_Yv */
e41f0459369a6d814aa36bf4def225482fc56026vboxsync IEM_MC_FETCH_GREG_U##AddrBits##_ZX_U64(uAddr, X86_GREG_xSI); \
e41f0459369a6d814aa36bf4def225482fc56026vboxsync IEM_MC_FETCH_MEM_U##ValBits(uValue1, pIemCpu->iEffSeg, uAddr); \
e41f0459369a6d814aa36bf4def225482fc56026vboxsync IEM_MC_FETCH_GREG_U##AddrBits##_ZX_U64(uAddr, X86_GREG_xDI); \
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_MEM_U##ValBits(uValue2, X86_SREG_ES, uAddr); \
e41f0459369a6d814aa36bf4def225482fc56026vboxsync IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_cmp_u##ValBits, puValue1, uValue2, pEFlags); \
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_SUB_GREG_U##AddrBits(X86_GREG_xDI, ValBits / 8); \
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_SUB_GREG_U##AddrBits(X86_GREG_xSI, ValBits / 8); \
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_ADD_GREG_U##AddrBits(X86_GREG_xDI, ValBits / 8); \
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_ADD_GREG_U##AddrBits(X86_GREG_xSI, ValBits / 8); \
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xa6. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Use the C implementation if a repeat prefix is encountered.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_16BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_repe_cmps_op8_addr16, pIemCpu->iEffSeg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_repe_cmps_op8_addr32, pIemCpu->iEffSeg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_repe_cmps_op8_addr64, pIemCpu->iEffSeg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_16BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_repne_cmps_op8_addr16, pIemCpu->iEffSeg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_repne_cmps_op8_addr32, pIemCpu->iEffSeg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_repne_cmps_op8_addr64, pIemCpu->iEffSeg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Sharing case implementation with cmps[wdq] below.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xa7. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Use the C implementation if a repeat prefix is encountered.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_16BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_repe_cmps_op16_addr16, pIemCpu->iEffSeg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_repe_cmps_op16_addr32, pIemCpu->iEffSeg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_repe_cmps_op16_addr64, pIemCpu->iEffSeg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_16BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_repe_cmps_op32_addr16, pIemCpu->iEffSeg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_repe_cmps_op32_addr32, pIemCpu->iEffSeg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_repe_cmps_op32_addr64, pIemCpu->iEffSeg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_16BIT: AssertFailedReturn(VERR_INTERNAL_ERROR_3);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_repe_cmps_op64_addr32, pIemCpu->iEffSeg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_repe_cmps_op64_addr64, pIemCpu->iEffSeg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_16BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_repne_cmps_op16_addr16, pIemCpu->iEffSeg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_repne_cmps_op16_addr32, pIemCpu->iEffSeg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_repne_cmps_op16_addr64, pIemCpu->iEffSeg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_16BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_repne_cmps_op32_addr16, pIemCpu->iEffSeg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_repne_cmps_op32_addr32, pIemCpu->iEffSeg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_repne_cmps_op32_addr64, pIemCpu->iEffSeg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_16BIT: AssertFailedReturn(VERR_INTERNAL_ERROR_3);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_repne_cmps_op64_addr32, pIemCpu->iEffSeg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_repne_cmps_op64_addr64, pIemCpu->iEffSeg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Annoying double switch here.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Using ugly macro for implementing the cases, sharing it with cmpsb.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_16BIT: AssertFailedReturn(VERR_INTERNAL_ERROR_4); /* cannot be encoded */ break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xa8. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_AL_Ib, &g_iemAImpl_test);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xa9. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rAX_Iz, &g_iemAImpl_test);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Macro used by iemOp_stosb_Yb_AL and iemOp_stoswd_Yv_eAX */
f6f5b68ebbb3a264e0a27e2a5848774722fccfd2vboxsync IEM_MC_FETCH_GREG_U##ValBits(uValue, X86_GREG_xAX); \
f6f5b68ebbb3a264e0a27e2a5848774722fccfd2vboxsync IEM_MC_FETCH_GREG_U##AddrBits##_ZX_U64(uAddr, X86_GREG_xDI); \
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_MEM_U##ValBits(X86_SREG_ES, uAddr, uValue); \
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_SUB_GREG_U##AddrBits(X86_GREG_xDI, ValBits / 8); \
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_ADD_GREG_U##AddrBits(X86_GREG_xDI, ValBits / 8); \
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xaa. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Use the C implementation if a repeat prefix is encountered.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if (pIemCpu->fPrefixes & (IEM_OP_PRF_REPNZ | IEM_OP_PRF_REPZ))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_16BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_stos_al_m16);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_stos_al_m32);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_stos_al_m64);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Sharing case implementation with stos[wdq] below.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xab. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Use the C implementation if a repeat prefix is encountered.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if (pIemCpu->fPrefixes & (IEM_OP_PRF_REPNZ | IEM_OP_PRF_REPZ))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_16BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_stos_ax_m16);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_stos_ax_m32);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_stos_ax_m64);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_16BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_stos_eax_m16);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_stos_eax_m32);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_stos_eax_m64);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_16BIT: AssertFailedReturn(VERR_INTERNAL_ERROR_3);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_stos_rax_m32);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_stos_rax_m64);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Annoying double switch here.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Using ugly macro for implementing the cases, sharing it with stosb.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_16BIT: AssertFailedReturn(VERR_INTERNAL_ERROR_4); /* cannot be encoded */ break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Macro used by iemOp_lodsb_AL_Xb and iemOp_lodswd_eAX_Xv */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U##AddrBits##_ZX_U64(uAddr, X86_GREG_xSI); \
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_MEM_U##ValBits(uValue, pIemCpu->iEffSeg, uAddr); \
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U##ValBits(X86_GREG_xAX, uValue); \
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_SUB_GREG_U##AddrBits(X86_GREG_xSI, ValBits / 8); \
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_ADD_GREG_U##AddrBits(X86_GREG_xSI, ValBits / 8); \
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xac. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Use the C implementation if a repeat prefix is encountered.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if (pIemCpu->fPrefixes & (IEM_OP_PRF_REPNZ | IEM_OP_PRF_REPZ))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_16BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_lods_al_m16, pIemCpu->iEffSeg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_lods_al_m32, pIemCpu->iEffSeg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_lods_al_m64, pIemCpu->iEffSeg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Sharing case implementation with stos[wdq] below.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xad. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Use the C implementation if a repeat prefix is encountered.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if (pIemCpu->fPrefixes & (IEM_OP_PRF_REPNZ | IEM_OP_PRF_REPZ))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_16BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_lods_ax_m16, pIemCpu->iEffSeg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_lods_ax_m32, pIemCpu->iEffSeg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_lods_ax_m64, pIemCpu->iEffSeg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_16BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_lods_eax_m16, pIemCpu->iEffSeg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_lods_eax_m32, pIemCpu->iEffSeg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_lods_eax_m64, pIemCpu->iEffSeg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_16BIT: AssertFailedReturn(VERR_INTERNAL_ERROR_3);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_lods_rax_m32, pIemCpu->iEffSeg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_lods_rax_m64, pIemCpu->iEffSeg);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Annoying double switch here.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Using ugly macro for implementing the cases, sharing it with lodsb.
f6f5b68ebbb3a264e0a27e2a5848774722fccfd2vboxsync case IEMMODE_16BIT: AssertFailedReturn(VERR_INTERNAL_ERROR_4); /* cannot be encoded */ break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Macro used by iemOp_scasb_AL_Xb and iemOp_scaswd_eAX_Xv */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U##AddrBits##_ZX_U64(uAddr, X86_GREG_xDI); \
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_MEM_U##ValBits(uValue, X86_SREG_ES, uAddr); \
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_cmp_u##ValBits, puRax, uValue, pEFlags); \
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_SUB_GREG_U##AddrBits(X86_GREG_xDI, ValBits / 8); \
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_ADD_GREG_U##AddrBits(X86_GREG_xDI, ValBits / 8); \
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xae. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Use the C implementation if a repeat prefix is encountered.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_16BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_repe_scas_al_m16);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_repe_scas_al_m32);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_repe_scas_al_m64);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_16BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_repne_scas_al_m16);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_repne_scas_al_m32);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_repne_scas_al_m64);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Sharing case implementation with stos[wdq] below.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xaf. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync * Use the C implementation if a repeat prefix is encountered.
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_16BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_repe_scas_ax_m16);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_repe_scas_ax_m32);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_repe_scas_ax_m64);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_16BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_repe_scas_eax_m16);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_repe_scas_eax_m32);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_repe_scas_eax_m64);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_16BIT: AssertFailedReturn(VERR_INTERNAL_ERROR_3); /** @todo It's this wrong, we can do 16-bit addressing in 64-bit mode, but not 32-bit. right? */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_repe_scas_rax_m32);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_repe_scas_rax_m64);
26dcae93046505a1d6a46ae2974f5c4e7aebf37fvboxsync case IEMMODE_16BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_repe_scas_ax_m16);
26dcae93046505a1d6a46ae2974f5c4e7aebf37fvboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_repe_scas_ax_m32);
26dcae93046505a1d6a46ae2974f5c4e7aebf37fvboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_repe_scas_ax_m64);
26dcae93046505a1d6a46ae2974f5c4e7aebf37fvboxsync case IEMMODE_16BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_repe_scas_eax_m16);
26dcae93046505a1d6a46ae2974f5c4e7aebf37fvboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_repe_scas_eax_m32);
26dcae93046505a1d6a46ae2974f5c4e7aebf37fvboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_repe_scas_eax_m64);
26dcae93046505a1d6a46ae2974f5c4e7aebf37fvboxsync case IEMMODE_16BIT: AssertFailedReturn(VERR_INTERNAL_ERROR_3);
26dcae93046505a1d6a46ae2974f5c4e7aebf37fvboxsync case IEMMODE_32BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_repe_scas_rax_m32);
26dcae93046505a1d6a46ae2974f5c4e7aebf37fvboxsync case IEMMODE_64BIT: return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_repe_scas_rax_m64);
26dcae93046505a1d6a46ae2974f5c4e7aebf37fvboxsync * Annoying double switch here.
26dcae93046505a1d6a46ae2974f5c4e7aebf37fvboxsync * Using ugly macro for implementing the cases, sharing it with scasb.
06ac458ac1e4617fad41757c1319f8f64cf32b89vboxsync case IEMMODE_16BIT: AssertFailedReturn(VERR_INTERNAL_ERROR_4); /* cannot be encoded */ break;
d4a8f6749f70bad88edc04de808643d372faa35avboxsync * Common 'mov r8, imm8' helper.
d4a8f6749f70bad88edc04de808643d372faa35avboxsync/** Opcode 0xb0. */
d4a8f6749f70bad88edc04de808643d372faa35avboxsync return FNIEMOP_CALL_1(iemOpCommonMov_r8_Ib, X86_GREG_xAX);
d4a8f6749f70bad88edc04de808643d372faa35avboxsync/** Opcode 0xb1. */
d4a8f6749f70bad88edc04de808643d372faa35avboxsync return FNIEMOP_CALL_1(iemOpCommonMov_r8_Ib, X86_GREG_xCX);
d4a8f6749f70bad88edc04de808643d372faa35avboxsync/** Opcode 0xb2. */
d4a8f6749f70bad88edc04de808643d372faa35avboxsync return FNIEMOP_CALL_1(iemOpCommonMov_r8_Ib, X86_GREG_xDX);
d4a8f6749f70bad88edc04de808643d372faa35avboxsync/** Opcode 0xb3. */
d4a8f6749f70bad88edc04de808643d372faa35avboxsync return FNIEMOP_CALL_1(iemOpCommonMov_r8_Ib, X86_GREG_xBX);
06ac458ac1e4617fad41757c1319f8f64cf32b89vboxsync/** Opcode 0xb4. */
06ac458ac1e4617fad41757c1319f8f64cf32b89vboxsync return FNIEMOP_CALL_1(iemOpCommonMov_r8_Ib, X86_GREG_xSP);
06ac458ac1e4617fad41757c1319f8f64cf32b89vboxsync/** Opcode 0xb5. */
d4a8f6749f70bad88edc04de808643d372faa35avboxsync return FNIEMOP_CALL_1(iemOpCommonMov_r8_Ib, X86_GREG_xBP);
d4a8f6749f70bad88edc04de808643d372faa35avboxsync/** Opcode 0xb6. */
d4a8f6749f70bad88edc04de808643d372faa35avboxsync return FNIEMOP_CALL_1(iemOpCommonMov_r8_Ib, X86_GREG_xSI);
d4a8f6749f70bad88edc04de808643d372faa35avboxsync/** Opcode 0xb7. */
d4a8f6749f70bad88edc04de808643d372faa35avboxsync return FNIEMOP_CALL_1(iemOpCommonMov_r8_Ib, X86_GREG_xDI);
06ac458ac1e4617fad41757c1319f8f64cf32b89vboxsync * Common 'mov regX,immX' helper.
06ac458ac1e4617fad41757c1319f8f64cf32b89vboxsync IEM_MC_LOCAL_CONST(uint16_t, u16Value,/*=*/ u16Imm);
d4a8f6749f70bad88edc04de808643d372faa35avboxsync IEM_MC_LOCAL_CONST(uint32_t, u32Value,/*=*/ u32Imm);
d4a8f6749f70bad88edc04de808643d372faa35avboxsync IEM_MC_LOCAL_CONST(uint64_t, u64Value,/*=*/ u64Imm);
d4a8f6749f70bad88edc04de808643d372faa35avboxsync/** Opcode 0xb8. */
d4a8f6749f70bad88edc04de808643d372faa35avboxsync return FNIEMOP_CALL_1(iemOpCommonMov_Rv_Iv, X86_GREG_xAX);
d4a8f6749f70bad88edc04de808643d372faa35avboxsync/** Opcode 0xb9. */
d4a8f6749f70bad88edc04de808643d372faa35avboxsync return FNIEMOP_CALL_1(iemOpCommonMov_Rv_Iv, X86_GREG_xCX);
d4a8f6749f70bad88edc04de808643d372faa35avboxsync/** Opcode 0xba. */
d4a8f6749f70bad88edc04de808643d372faa35avboxsync return FNIEMOP_CALL_1(iemOpCommonMov_Rv_Iv, X86_GREG_xDX);
d4a8f6749f70bad88edc04de808643d372faa35avboxsync/** Opcode 0xbb. */
d4a8f6749f70bad88edc04de808643d372faa35avboxsync return FNIEMOP_CALL_1(iemOpCommonMov_Rv_Iv, X86_GREG_xBX);
d4a8f6749f70bad88edc04de808643d372faa35avboxsync/** Opcode 0xbc. */
d4a8f6749f70bad88edc04de808643d372faa35avboxsync return FNIEMOP_CALL_1(iemOpCommonMov_Rv_Iv, X86_GREG_xSP);
d4a8f6749f70bad88edc04de808643d372faa35avboxsync/** Opcode 0xbd. */
d4a8f6749f70bad88edc04de808643d372faa35avboxsync return FNIEMOP_CALL_1(iemOpCommonMov_Rv_Iv, X86_GREG_xBP);
d4a8f6749f70bad88edc04de808643d372faa35avboxsync/** Opcode 0xbe. */
d4a8f6749f70bad88edc04de808643d372faa35avboxsync return FNIEMOP_CALL_1(iemOpCommonMov_Rv_Iv, X86_GREG_xSI);
d4a8f6749f70bad88edc04de808643d372faa35avboxsync/** Opcode 0xbf. */
d4a8f6749f70bad88edc04de808643d372faa35avboxsync return FNIEMOP_CALL_1(iemOpCommonMov_Rv_Iv, X86_GREG_xDI);
d4a8f6749f70bad88edc04de808643d372faa35avboxsync/** Opcode 0xc0. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 0: pImpl = &g_iemAImpl_rol; IEMOP_MNEMONIC("rol Eb,Ib"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 1: pImpl = &g_iemAImpl_ror; IEMOP_MNEMONIC("ror Eb,Ib"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 2: pImpl = &g_iemAImpl_rcl; IEMOP_MNEMONIC("rcl Eb,Ib"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 3: pImpl = &g_iemAImpl_rcr; IEMOP_MNEMONIC("rcr Eb,Ib"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 4: pImpl = &g_iemAImpl_shl; IEMOP_MNEMONIC("shl Eb,Ib"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 5: pImpl = &g_iemAImpl_shr; IEMOP_MNEMONIC("shr Eb,Ib"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 7: pImpl = &g_iemAImpl_sar; IEMOP_MNEMONIC("sar Eb,Ib"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_NOT_REACHED_DEFAULT_CASE_RET(); /* gcc maybe stupid */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_OF | X86_EFL_AF);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* register */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U8(pu8Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU8, pu8Dst, cShiftArg, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* memory */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_MAP(pu8Dst, IEM_ACCESS_DATA_RW, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU8, pu8Dst, cShiftArg, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pu8Dst, IEM_ACCESS_DATA_RW);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xc1. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 0: pImpl = &g_iemAImpl_rol; IEMOP_MNEMONIC("rol Ev,Ib"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 1: pImpl = &g_iemAImpl_ror; IEMOP_MNEMONIC("ror Ev,Ib"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 2: pImpl = &g_iemAImpl_rcl; IEMOP_MNEMONIC("rcl Ev,Ib"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 3: pImpl = &g_iemAImpl_rcr; IEMOP_MNEMONIC("rcr Ev,Ib"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 4: pImpl = &g_iemAImpl_shl; IEMOP_MNEMONIC("shl Ev,Ib"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 5: pImpl = &g_iemAImpl_shr; IEMOP_MNEMONIC("shr Ev,Ib"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 7: pImpl = &g_iemAImpl_sar; IEMOP_MNEMONIC("sar Ev,Ib"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_NOT_REACHED_DEFAULT_CASE_RET(); /* gcc maybe stupid */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_OF | X86_EFL_AF);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* register */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U16(pu16Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU16, pu16Dst, cShiftArg, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U32(pu32Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU32, pu32Dst, cShiftArg, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U64(pu64Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU64, pu64Dst, cShiftArg, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* memory */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_MAP(pu16Dst, IEM_ACCESS_DATA_RW, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU16, pu16Dst, cShiftArg, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pu16Dst, IEM_ACCESS_DATA_RW);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_MAP(pu32Dst, IEM_ACCESS_DATA_RW, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU32, pu32Dst, cShiftArg, pEFlags);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pu32Dst, IEM_ACCESS_DATA_RW);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_MAP(pu64Dst, IEM_ACCESS_DATA_RW, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU64, pu64Dst, cShiftArg, pEFlags);
e41f0459369a6d814aa36bf4def225482fc56026vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pu64Dst, IEM_ACCESS_DATA_RW);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xc2. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return IEM_MC_DEFER_TO_CIMPL_2(iemCImpl_retn, pIemCpu->enmEffOpSize, u16Imm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xc3. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return IEM_MC_DEFER_TO_CIMPL_2(iemCImpl_retn, pIemCpu->enmEffOpSize, 0);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xc4. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonLoadSRegAndGreg, X86_SREG_ES);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xc5. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return FNIEMOP_CALL_1(iemOpCommonLoadSRegAndGreg, X86_SREG_DS);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xc6. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_REG_MASK) != (0 << X86_MODRM_REG_SHIFT)) /* only mov Eb,Ib in this group. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* register access */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U8((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, u8Imm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* memory access. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_MEM_U8(pIemCpu->iEffSeg, GCPtrEffDst, u8Imm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xc7. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_REG_MASK) != (0 << X86_MODRM_REG_SHIFT)) /* only mov Eb,Ib in this group. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* register access */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U16((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, u16Imm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U32((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, u32Imm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_GREG_U64((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, u64Imm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* memory access. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_MEM_U16(pIemCpu->iEffSeg, GCPtrEffDst, u16Imm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_MEM_U32(pIemCpu->iEffSeg, GCPtrEffDst, u32Imm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_STORE_MEM_U64(pIemCpu->iEffSeg, GCPtrEffDst, u64Imm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xc8. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xc9. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_leave, pIemCpu->enmEffOpSize);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xca. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return IEM_MC_DEFER_TO_CIMPL_2(iemCImpl_retf, pIemCpu->enmEffOpSize, u16Imm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xcb. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return IEM_MC_DEFER_TO_CIMPL_2(iemCImpl_retf, pIemCpu->enmEffOpSize, 0);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xcc. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return IEM_MC_DEFER_TO_CIMPL_2(iemCImpl_int, X86_XCPT_BP, true /*fIsBpInstr*/);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xcd. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return IEM_MC_DEFER_TO_CIMPL_2(iemCImpl_int, u8Int, false /*fIsBpInstr*/);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xce. */
f7f6566815ee2d52e6a10782759ef6278db0f236vboxsync IEM_MC_ARG_CONST(uint8_t, u8Int, /*=*/ X86_XCPT_OF, 0);
f7f6566815ee2d52e6a10782759ef6278db0f236vboxsync IEM_MC_ARG_CONST(bool, fIsBpInstr, /*=*/ false, 1);
f7f6566815ee2d52e6a10782759ef6278db0f236vboxsync IEM_MC_CALL_CIMPL_2(iemCImpl_int, u8Int, fIsBpInstr);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xcf. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_iret, pIemCpu->enmEffOpSize);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xd0. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 0: pImpl = &g_iemAImpl_rol; IEMOP_MNEMONIC("rol Eb,1"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 1: pImpl = &g_iemAImpl_ror; IEMOP_MNEMONIC("ror Eb,1"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 2: pImpl = &g_iemAImpl_rcl; IEMOP_MNEMONIC("rcl Eb,1"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 3: pImpl = &g_iemAImpl_rcr; IEMOP_MNEMONIC("rcr Eb,1"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 4: pImpl = &g_iemAImpl_shl; IEMOP_MNEMONIC("shl Eb,1"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 5: pImpl = &g_iemAImpl_shr; IEMOP_MNEMONIC("shr Eb,1"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 7: pImpl = &g_iemAImpl_sar; IEMOP_MNEMONIC("sar Eb,1"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_NOT_REACHED_DEFAULT_CASE_RET(); /* gcc maybe, well... */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_OF | X86_EFL_AF);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* register */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U8(pu8Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU8, pu8Dst, cShiftArg, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* memory */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_MAP(pu8Dst, IEM_ACCESS_DATA_RW, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU8, pu8Dst, cShiftArg, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pu8Dst, IEM_ACCESS_DATA_RW);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xd1. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 0: pImpl = &g_iemAImpl_rol; IEMOP_MNEMONIC("rol Ev,1"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 1: pImpl = &g_iemAImpl_ror; IEMOP_MNEMONIC("ror Ev,1"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 2: pImpl = &g_iemAImpl_rcl; IEMOP_MNEMONIC("rcl Ev,1"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 3: pImpl = &g_iemAImpl_rcr; IEMOP_MNEMONIC("rcr Ev,1"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 4: pImpl = &g_iemAImpl_shl; IEMOP_MNEMONIC("shl Ev,1"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 5: pImpl = &g_iemAImpl_shr; IEMOP_MNEMONIC("shr Ev,1"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 7: pImpl = &g_iemAImpl_sar; IEMOP_MNEMONIC("sar Ev,1"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_NOT_REACHED_DEFAULT_CASE_RET(); /* gcc maybe, well... */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_OF | X86_EFL_AF);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* register */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U16(pu16Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU16, pu16Dst, cShiftArg, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U32(pu32Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU32, pu32Dst, cShiftArg, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U64(pu64Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU64, pu64Dst, cShiftArg, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* memory */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_MAP(pu16Dst, IEM_ACCESS_DATA_RW, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU16, pu16Dst, cShiftArg, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pu16Dst, IEM_ACCESS_DATA_RW);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_MAP(pu32Dst, IEM_ACCESS_DATA_RW, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU32, pu32Dst, cShiftArg, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pu32Dst, IEM_ACCESS_DATA_RW);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_MAP(pu64Dst, IEM_ACCESS_DATA_RW, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU64, pu64Dst, cShiftArg, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pu64Dst, IEM_ACCESS_DATA_RW);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xd2. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 0: pImpl = &g_iemAImpl_rol; IEMOP_MNEMONIC("rol Eb,CL"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 1: pImpl = &g_iemAImpl_ror; IEMOP_MNEMONIC("ror Eb,CL"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 2: pImpl = &g_iemAImpl_rcl; IEMOP_MNEMONIC("rcl Eb,CL"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 3: pImpl = &g_iemAImpl_rcr; IEMOP_MNEMONIC("rcr Eb,CL"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 4: pImpl = &g_iemAImpl_shl; IEMOP_MNEMONIC("shl Eb,CL"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 5: pImpl = &g_iemAImpl_shr; IEMOP_MNEMONIC("shr Eb,CL"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 7: pImpl = &g_iemAImpl_sar; IEMOP_MNEMONIC("sar Eb,CL"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_NOT_REACHED_DEFAULT_CASE_RET(); /* gcc, grr. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_OF | X86_EFL_AF);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* register */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U8(pu8Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU8, pu8Dst, cShiftArg, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* memory */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_MAP(pu8Dst, IEM_ACCESS_DATA_RW, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU8, pu8Dst, cShiftArg, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pu8Dst, IEM_ACCESS_DATA_RW);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xd3. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 0: pImpl = &g_iemAImpl_rol; IEMOP_MNEMONIC("rol Ev,CL"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 1: pImpl = &g_iemAImpl_ror; IEMOP_MNEMONIC("ror Ev,CL"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 2: pImpl = &g_iemAImpl_rcl; IEMOP_MNEMONIC("rcl Ev,CL"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 3: pImpl = &g_iemAImpl_rcr; IEMOP_MNEMONIC("rcr Ev,CL"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 4: pImpl = &g_iemAImpl_shl; IEMOP_MNEMONIC("shl Ev,CL"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 5: pImpl = &g_iemAImpl_shr; IEMOP_MNEMONIC("shr Ev,CL"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 7: pImpl = &g_iemAImpl_sar; IEMOP_MNEMONIC("sar Ev,CL"); break;
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_NOT_REACHED_DEFAULT_CASE_RET(); /* gcc maybe stupid */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_OF | X86_EFL_AF);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* register */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U16(pu16Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU16, pu16Dst, cShiftArg, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U32(pu32Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU32, pu32Dst, cShiftArg, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_REF_GREG_U64(pu64Dst, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU64, pu64Dst, cShiftArg, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* memory */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_MAP(pu16Dst, IEM_ACCESS_DATA_RW, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU16, pu16Dst, cShiftArg, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pu16Dst, IEM_ACCESS_DATA_RW);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_MAP(pu32Dst, IEM_ACCESS_DATA_RW, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU32, pu32Dst, cShiftArg, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pu32Dst, IEM_ACCESS_DATA_RW);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_MAP(pu64Dst, IEM_ACCESS_DATA_RW, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU64, pu64Dst, cShiftArg, pEFlags);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_MEM_COMMIT_AND_UNMAP(pu64Dst, IEM_ACCESS_DATA_RW);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xd4. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_aam, bImm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xd5. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_aad, bImm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xd7. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U8_ZX_U16(u16Addr, X86_GREG_xAX);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_ADD_GREG_U16_TO_LOCAL(u16Addr, X86_GREG_xBX);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_MEM16_U8(u8Tmp, pIemCpu->iEffSeg, u16Addr);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U8_ZX_U32(u32Addr, X86_GREG_xAX);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_ADD_GREG_U32_TO_LOCAL(u32Addr, X86_GREG_xBX);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_MEM32_U8(u8Tmp, pIemCpu->iEffSeg, u32Addr);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_GREG_U8_ZX_U64(u64Addr, X86_GREG_xAX);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_ADD_GREG_U64_TO_LOCAL(u64Addr, X86_GREG_xBX);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_MEM_U8(u8Tmp, pIemCpu->iEffSeg, u64Addr);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xd8 11/0. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xd8 11/1. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xd8 11/2. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xd8 11/3. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xd8 11/4. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xd8 11/5. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xd8 11/6. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xd8 11/7. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xd8 !11/0. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xd8 !11/1. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xd8 !11/2. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xd8 !11/3. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xd8 !11/4. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xd8 !11/5. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xd8 !11/6. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xd8 !11/7. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xd8. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 0: return FNIEMOP_CALL_1(iemOp_fadd_stN, bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 1: return FNIEMOP_CALL_1(iemOp_fmul_stN, bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 2: return FNIEMOP_CALL_1(iemOp_fcom_stN, bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 3: return FNIEMOP_CALL_1(iemOp_fcomp_stN, bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 4: return FNIEMOP_CALL_1(iemOp_fsub_stN, bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 5: return FNIEMOP_CALL_1(iemOp_fsubr_stN, bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 6: return FNIEMOP_CALL_1(iemOp_fdiv_stN, bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 7: return FNIEMOP_CALL_1(iemOp_fdivr_stN, bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 0: return FNIEMOP_CALL_1(iemOp_fadd_m32r, bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 1: return FNIEMOP_CALL_1(iemOp_fmul_m32r, bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 2: return FNIEMOP_CALL_1(iemOp_fcom_m32r, bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 3: return FNIEMOP_CALL_1(iemOp_fcomp_m32r, bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 4: return FNIEMOP_CALL_1(iemOp_fsub_m32r, bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 5: return FNIEMOP_CALL_1(iemOp_fsubr_m32r, bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 6: return FNIEMOP_CALL_1(iemOp_fdiv_m32r, bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 7: return FNIEMOP_CALL_1(iemOp_fdivr_m32r, bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xd9 /0 mem32real */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_ARG_LOCAL_REF(PIEMFPURESULT, pFpuRes, FpuRes, 0);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_FETCH_MEM_R32(r32Val, pIemCpu->iEffSeg, GCPtrEffSrc);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEM_MC_CALL_FPU_AIMPL_2(iemAImpl_fpu_r32_to_r80, pFpuRes, r32Val);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xd9 !11/2 mem32real */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xd9 !11/3 */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xd9 !11/4 */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xd9 !11/5 */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xd9 !11/6 */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xd9 !11/7 */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xd9 0xc9, 0xd9 0xd8-0xdf, ++?. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync /* Note! This updates the FPU instruction pointer but leaves the opcode alone. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync RTAssertMsg1(NULL, __LINE__, __FILE__, __FUNCTION__);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xd9 11/0 stN */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xd9 11/3 stN */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xd9 11/4, 0xdd 11/2. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xd9 0xe0. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xd9 0xe1. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xd9 0xe4. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xd9 0xe5. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xd9 0xe8. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xd9 0xe9. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xd9 0xea. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xd9 0xeb. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xd9 0xec. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xd9 0xed. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xd9 0xee. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xd9 0xf0. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xd9 0xf1. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xd9 0xf2. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xd9 0xf3. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xd9 0xf4. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xd9 0xf5. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xd9 0xf6. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xd9 0xf7. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xd9 0xf8. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xd9 0xf9. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xd9 0xfa. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xd9 0xfb. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xd9 0xfc. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xd9 0xfd. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xd9 0xfe. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xd9 0xff. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Used by iemOp_EscF1. */
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync/** Opcode 0xd9. */
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync case 1: return FNIEMOP_CALL_1(iemOp_fxch_stN, bRm);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync case 3: return FNIEMOP_CALL_1(iemOp_fstp_stN, bRm); /* Reserved. Intel behavior seems to be FSTP ST(i) though. */
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync return FNIEMOP_CALL(g_apfnEscF1_E0toFF[(bRm & (X86_MODRM_REG_MASK |X86_MODRM_RM_MASK)) - 0xe0]);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync case 0: return FNIEMOP_CALL_1(iemOp_fld_m32r, bRm);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync case 2: return FNIEMOP_CALL_1(iemOp_fst_m32r, bRm);
4c46bb28a73dee292c3657d2945574a1c267b89dvboxsync case 3: return FNIEMOP_CALL_1(iemOp_fstp_m32r, bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xda 11/0. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xda 11/1. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xda 11/2. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xda 11/3. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xda 0xe9. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xda !11/0. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xda !11/1. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xda !11/2. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xda !11/3. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xda !11/4. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xda !11/5. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xda !11/6. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xda !11/7. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xda. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
a13bd47f22085c82960265c150f10f2195369630vboxsync case 0: return FNIEMOP_CALL_1(iemOp_fcmovb_stN, bRm);
a13bd47f22085c82960265c150f10f2195369630vboxsync case 1: return FNIEMOP_CALL_1(iemOp_fcmove_stN, bRm);
a13bd47f22085c82960265c150f10f2195369630vboxsync case 2: return FNIEMOP_CALL_1(iemOp_fcmovbe_stN, bRm);
a13bd47f22085c82960265c150f10f2195369630vboxsync case 3: return FNIEMOP_CALL_1(iemOp_fcmovu_stN, bRm);
a13bd47f22085c82960265c150f10f2195369630vboxsync switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 0: return FNIEMOP_CALL_1(iemOp_fiadd_m32i, bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 1: return FNIEMOP_CALL_1(iemOp_fimul_m32i, bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 2: return FNIEMOP_CALL_1(iemOp_ficom_m32i, bRm);
a13bd47f22085c82960265c150f10f2195369630vboxsync case 3: return FNIEMOP_CALL_1(iemOp_ficomp_m32i, bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 4: return FNIEMOP_CALL_1(iemOp_fisub_m32i, bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 5: return FNIEMOP_CALL_1(iemOp_fisubr_m32i, bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 6: return FNIEMOP_CALL_1(iemOp_fidiv_m32i, bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 7: return FNIEMOP_CALL_1(iemOp_fidivr_m32i, bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xdb !11/0. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xdb !11/1. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xdb !11/2. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xdb !11/3. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xdb !11/5. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xdb !11/7. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xdb 11/0. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xdb 11/1. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xdb 11/2. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xdb 11/3. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xdb 0xe0. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xdb 0xe1. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xdb 0xe2. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xdb 0xe3. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_finit, false /*fCheckXcpts*/);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xdb 0xe4. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMOP_MNEMONIC("fnsetpm (80287/ign)"); /* set protected mode on fpu. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xdb 0xe5. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync IEMOP_MNEMONIC("frstpm (80287XL/ign)"); /* reset pm, back to real mode. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync#if 0 /* #UDs on newer CPUs */
a13bd47f22085c82960265c150f10f2195369630vboxsync/** Opcode 0xdb 11/5. */
a13bd47f22085c82960265c150f10f2195369630vboxsync/** Opcode 0xdb 11/6. */
a13bd47f22085c82960265c150f10f2195369630vboxsync/** Opcode 0xdb. */
a13bd47f22085c82960265c150f10f2195369630vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
a13bd47f22085c82960265c150f10f2195369630vboxsync switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
a13bd47f22085c82960265c150f10f2195369630vboxsync case 5: return FNIEMOP_CALL_1(iemOp_fucomi_stN, bRm);
a13bd47f22085c82960265c150f10f2195369630vboxsync case 6: return FNIEMOP_CALL_1(iemOp_fcomi_stN, bRm);
a13bd47f22085c82960265c150f10f2195369630vboxsync switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
a13bd47f22085c82960265c150f10f2195369630vboxsync case 0: return FNIEMOP_CALL_1(iemOp_fild_m32i, bRm);
a13bd47f22085c82960265c150f10f2195369630vboxsync case 1: return FNIEMOP_CALL_1(iemOp_fisttp_m32i,bRm);
a13bd47f22085c82960265c150f10f2195369630vboxsync case 2: return FNIEMOP_CALL_1(iemOp_fist_m32i, bRm);
a13bd47f22085c82960265c150f10f2195369630vboxsync case 3: return FNIEMOP_CALL_1(iemOp_fistp_m32i, bRm);
a13bd47f22085c82960265c150f10f2195369630vboxsync case 7: return FNIEMOP_CALL_1(iemOp_fstp_r80, bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xdc 11/0. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xdc 11/1. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xdc 11/4. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xdc 11/5. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xdc 11/6. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xdc 11/7. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xdc !11/0. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xdc !11/1. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xdc !11/2. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xdc !11/3. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xdc !11/4. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xdc !11/5. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xdc !11/6. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xdc !11/7. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xdc. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 0: return FNIEMOP_CALL_1(iemOp_fadd_stN_st0, bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 1: return FNIEMOP_CALL_1(iemOp_fmul_stN_st0, bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 2: return FNIEMOP_CALL_1(iemOp_fcom_stN, bRm); /* Marked reserved, intel behavior is that of FCOM ST(i). */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 3: return FNIEMOP_CALL_1(iemOp_fcomp_stN, bRm); /* Marked reserved, intel behavior is that of FCOMP ST(i). */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 4: return FNIEMOP_CALL_1(iemOp_fsubr_stN_st0, bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 5: return FNIEMOP_CALL_1(iemOp_fsub_stN_st0, bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 6: return FNIEMOP_CALL_1(iemOp_fdivr_stN_st0, bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 7: return FNIEMOP_CALL_1(iemOp_fdiv_stN_st0, bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 0: return FNIEMOP_CALL_1(iemOp_fadd_m64r, bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 1: return FNIEMOP_CALL_1(iemOp_fmul_m64r, bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 2: return FNIEMOP_CALL_1(iemOp_fcom_m64r, bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 3: return FNIEMOP_CALL_1(iemOp_fcomp_m64r, bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 4: return FNIEMOP_CALL_1(iemOp_fsub_m64r, bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 5: return FNIEMOP_CALL_1(iemOp_fsubr_m64r, bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 6: return FNIEMOP_CALL_1(iemOp_fdiv_m64r, bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 7: return FNIEMOP_CALL_1(iemOp_fdivr_m64r, bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xdd !11/0. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xdd !11/0. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xdd !11/0. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xdd !11/0. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xdd !11/0. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xdd !11/0. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xdd !11/0. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xdd 11/0. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xdd 11/1. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xdd 11/3. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xdd 11/4. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xdd. */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 0: return FNIEMOP_CALL_1(iemOp_ffree_stN, bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 1: return FNIEMOP_CALL_1(iemOp_fxch_stN, bRm); /* Reserved, intel behavior is that of XCHG ST(i). */
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 3: return FNIEMOP_CALL_1(iemOp_fstp_stN, bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 4: return FNIEMOP_CALL_1(iemOp_fucom_stN_st0,bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 5: return FNIEMOP_CALL_1(iemOp_fucomp_stN, bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 0: return FNIEMOP_CALL_1(iemOp_fld_m64r, bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 1: return FNIEMOP_CALL_1(iemOp_fisttp_m64i, bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 2: return FNIEMOP_CALL_1(iemOp_fst_m64r, bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync case 3: return FNIEMOP_CALL_1(iemOp_fstp_m64r, bRm);
65c72795ab90d3daefa759b716fbb5c6352c7a56vboxsync/** Opcode 0xde 11/0. */
return IEMOP_RAISE_INVALID_OPCODE();
IEM_MC_END();
return VINF_SUCCESS;
case 0: return FNIEMOP_CALL_1(iemOp_ffreep_stN, bRm); /* ffree + pop afterwards, since forever according to AMD. */
case 1: return FNIEMOP_CALL_1(iemOp_fxch_stN, bRm); /* Reserved, behaves like FXCH ST(i) on intel. */
case 2: return FNIEMOP_CALL_1(iemOp_fstp_stN, bRm); /* Reserved, behaves like FSTP ST(i) on intel. */
case 3: return FNIEMOP_CALL_1(iemOp_fstp_stN, bRm); /* Reserved, behaves like FSTP ST(i) on intel. */
return IEMOP_RAISE_INVALID_OPCODE();
case IEMMODE_16BIT:
IEM_MC_BEGIN(0,0);
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_32BIT:
IEM_MC_BEGIN(0,0);
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_64BIT:
IEM_MC_BEGIN(0,0);
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_16BIT:
IEM_MC_BEGIN(0,0);
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_32BIT:
IEM_MC_BEGIN(0,0);
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_64BIT:
IEM_MC_BEGIN(0,0);
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_16BIT:
IEM_MC_BEGIN(0,0);
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_32BIT:
IEM_MC_BEGIN(0,0);
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_64BIT:
IEM_MC_BEGIN(0,0);
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_16BIT:
IEM_MC_BEGIN(0,0);
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_32BIT:
IEM_MC_BEGIN(0,0);
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_64BIT:
IEM_MC_BEGIN(0,0);
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
return VINF_SUCCESS;
return IEM_MC_DEFER_TO_CIMPL_2(iemCImpl_out, u8Imm, pIemCpu->enmEffOpSize == IEMMODE_16BIT ? 2 : 4);
case IEMMODE_16BIT:
case IEMMODE_32BIT:
case IEMMODE_64BIT:
case IEMMODE_16BIT:
IEM_MC_BEGIN(0, 0);
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_64BIT:
case IEMMODE_32BIT:
IEM_MC_BEGIN(0, 0);
IEM_MC_END();
return VINF_SUCCESS;
IEM_MC_BEGIN(0, 0);
IEM_MC_END();
return VINF_SUCCESS;
return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_out_DX_eAX, pIemCpu->enmEffOpSize == IEMMODE_16BIT ? 2 : 4);
IEM_MC_BEGIN(0, 0);
IEM_MC_END();
return VINF_SUCCESS;
IEM_MC_END();
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_16BIT:
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_32BIT:
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_64BIT:
IEM_MC_END();
return VINF_SUCCESS;
IEM_MC_END();
IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
IEM_MC_END();
return VINF_SUCCESS;
IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
case IEMMODE_16BIT:
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_32BIT:
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_64BIT:
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_16BIT:
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_32BIT:
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_64BIT:
IEM_MC_END();
return VINF_SUCCESS;
IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
IEM_MC_END();
IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
IEM_MC_END();
return VINF_SUCCESS;
IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
case IEMMODE_16BIT:
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_32BIT:
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_64BIT:
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_16BIT:
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_32BIT:
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_64BIT:
} IEM_MC_ELSE() {
} IEM_MC_ENDIF();
IEM_MC_END();
return VINF_SUCCESS;
return IEMOP_RAISE_INVALID_LOCK_PREFIX();
IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF | X86_EFL_OF | X86_EFL_CF);
IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF | X86_EFL_OF | X86_EFL_CF);
return IEMOP_RAISE_INVALID_LOCK_PREFIX();
IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF | X86_EFL_OF | X86_EFL_CF);
IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF | X86_EFL_OF | X86_EFL_CF);
IEM_MC_BEGIN(0, 0);
IEM_MC_END();
return VINF_SUCCESS;
IEM_MC_BEGIN(0, 0);
IEM_MC_END();
return VINF_SUCCESS;
IEM_MC_BEGIN(0, 0);
IEM_MC_END();
return VINF_SUCCESS;
IEM_MC_BEGIN(0, 0);
IEM_MC_END();
return VINF_SUCCESS;
return IEMOP_RAISE_INVALID_OPCODE();
case IEMMODE_16BIT:
return VINF_SUCCESS;
case IEMMODE_32BIT:
return VINF_SUCCESS;
case IEMMODE_64BIT:
return VINF_SUCCESS;
case IEMMODE_16BIT:
return VINF_SUCCESS;
case IEMMODE_32BIT:
return VINF_SUCCESS;
case IEMMODE_64BIT:
return VINF_SUCCESS;
case IEMMODE_16BIT:
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_32BIT:
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_64BIT:
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_16BIT:
return VINF_SUCCESS;
case IEMMODE_32BIT:
return VINF_SUCCESS;
case IEMMODE_64BIT:
return VINF_SUCCESS;
case IEMMODE_16BIT:
return VINF_SUCCESS;
case IEMMODE_32BIT:
return VINF_SUCCESS;
case IEMMODE_64BIT:
return VINF_SUCCESS;
case IEMMODE_16BIT:
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_32BIT:
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_64BIT:
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_16BIT:
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_32BIT:
IEM_MC_END();
return VINF_SUCCESS;
case IEMMODE_64BIT:
IEM_MC_END();
return VINF_SUCCESS;
return IEMOP_RAISE_INVALID_OPCODE();