IEMAllAImpl.asm revision d90ecb7d42294cf1616483e627bc82e101c935aa
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync; IEM - Instruction Implementation in Assembly.
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync; Copyright (C) 2011-2012 Oracle Corporation
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync; This file is part of VirtualBox Open Source Edition (OSE), as
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync; available from http://www.virtualbox.org. This file is free software;
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync; you can redistribute it and/or modify it under the terms of the GNU
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync; General Public License (GPL) as published by the Free Software
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync; Foundation, in version 2 as it comes in the "COPYING" file of the
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync; VirtualBox OSE distribution. VirtualBox OSE is distributed in the
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync; hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync; Header Files ;
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync; Defined Constants And Macros ;
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync; RET XX / RET wrapper for fastcall.
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync%macro RET_FASTCALL 1
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync%ifdef RT_ARCH_X86
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %ifdef RT_OS_WINDOWS
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync; NAME for fastcall functions.
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync;; @todo 'global @fastcall@12' is still broken in yasm and requires dollar
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync; escaping (or whatever the dollar is good for here). Thus the ugly
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync; prefix argument.
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync%define NAME_FASTCALL(a_Name, a_cbArgs, a_Prefix) NAME(a_Name)
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync%ifdef RT_ARCH_X86
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %ifdef RT_OS_WINDOWS
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %undef NAME_FASTCALL
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %define NAME_FASTCALL(a_Name, a_cbArgs, a_Prefix) a_Prefix %+ a_Name %+ @ %+ a_cbArgs
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync; BEGINPROC for fastcall functions.
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync; @param 1 The function name (C).
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync; @param 2 The argument size on x86.
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync%macro BEGINPROC_FASTCALL 2
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %ifdef ASM_FORMAT_PE
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync export %1=NAME_FASTCALL(%1,%2,$@)
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %ifdef __NASM__
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %ifdef ASM_FORMAT_OMF
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync export NAME(%1) NAME_FASTCALL(%1,%2,$@)
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %ifndef ASM_FORMAT_BIN
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync global NAME_FASTCALL(%1,%2,$@)
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsyncNAME_FASTCALL(%1,%2,@):
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync; We employ some macro assembly here to hid the calling convention differences.
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync%ifdef RT_ARCH_AMD64
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %macro PROLOGUE_1_ARGS 0
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %macro EPILOGUE_1_ARGS 0
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %macro EPILOGUE_1_ARGS_EX 0
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %macro PROLOGUE_2_ARGS 0
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %macro EPILOGUE_2_ARGS 0
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %macro EPILOGUE_2_ARGS_EX 1
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %macro PROLOGUE_3_ARGS 0
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %macro EPILOGUE_3_ARGS 0
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %macro EPILOGUE_3_ARGS_EX 1
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %macro PROLOGUE_4_ARGS 0
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %macro EPILOGUE_4_ARGS 0
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %macro EPILOGUE_4_ARGS_EX 1
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %ifdef ASM_CALL64_GCC
6bf3b95b543a9eacd1025b4c3c6409f9765099a8vboxsync %define A0 rdi
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %define A0_32 edi
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %define A0_16 di
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %define A0_8 dil
6bf3b95b543a9eacd1025b4c3c6409f9765099a8vboxsync %define A1 rsi
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %define A1_32 esi
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %define A1_16 si
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %define A1_8 sil
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %define A2 rdx
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %define A2_32 edx
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %define A2_16 dx
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %define A2_8 dl
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %define A3 rcx
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %define A3_32 ecx
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %define A3_16 cx
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %ifdef ASM_CALL64_MSC
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %define A0 rcx
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %define A0_32 ecx
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %define A0_16 cx
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %define A0_8 cl
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %define A1 rdx
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %define A1_32 edx
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %define A1_16 dx
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %define A1_8 dl
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %define A2 r8
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %define A2_32 r8d
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %define A2_16 r8w
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %define A2_8 r8b
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %define A3 r9
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %define A3_32 r9d
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %define A3_16 r9w
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %define T0 rax
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %define T0_32 eax
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %define T0_16 ax
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %define T0_8 al
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %define T1 r11
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %define T1_32 r11d
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %define T1_16 r11w
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %define T1_8 r11b
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %macro PROLOGUE_1_ARGS 0
018872730d2bb228577f818371b9b3d513168a74vboxsync %macro EPILOGUE_1_ARGS 0
018872730d2bb228577f818371b9b3d513168a74vboxsync %macro EPILOGUE_1_ARGS_EX 1
018872730d2bb228577f818371b9b3d513168a74vboxsync %macro PROLOGUE_2_ARGS 0
018872730d2bb228577f818371b9b3d513168a74vboxsync %macro EPILOGUE_2_ARGS 0
018872730d2bb228577f818371b9b3d513168a74vboxsync %macro EPILOGUE_2_ARGS_EX 1
018872730d2bb228577f818371b9b3d513168a74vboxsync %macro PROLOGUE_3_ARGS 0
018872730d2bb228577f818371b9b3d513168a74vboxsync mov ebx, [esp + 4 + 4]
018872730d2bb228577f818371b9b3d513168a74vboxsync %macro EPILOGUE_3_ARGS_EX 1
018872730d2bb228577f818371b9b3d513168a74vboxsync %if (%1) < 4
018872730d2bb228577f818371b9b3d513168a74vboxsync %error "With three args, at least 4 bytes must be remove from the stack upon return (32-bit)."
018872730d2bb228577f818371b9b3d513168a74vboxsync %macro EPILOGUE_3_ARGS 0
018872730d2bb228577f818371b9b3d513168a74vboxsync EPILOGUE_3_ARGS_EX 4
018872730d2bb228577f818371b9b3d513168a74vboxsync %macro PROLOGUE_4_ARGS 0
018872730d2bb228577f818371b9b3d513168a74vboxsync mov ebx, [esp + 12 + 4 + 0]
018872730d2bb228577f818371b9b3d513168a74vboxsync mov esi, [esp + 12 + 4 + 4]
018872730d2bb228577f818371b9b3d513168a74vboxsync %macro EPILOGUE_4_ARGS_EX 1
018872730d2bb228577f818371b9b3d513168a74vboxsync %if (%1) < 8
018872730d2bb228577f818371b9b3d513168a74vboxsync %error "With four args, at least 8 bytes must be remove from the stack upon return (32-bit)."
018872730d2bb228577f818371b9b3d513168a74vboxsync %macro EPILOGUE_4_ARGS 0
018872730d2bb228577f818371b9b3d513168a74vboxsync EPILOGUE_4_ARGS_EX 8
018872730d2bb228577f818371b9b3d513168a74vboxsync %define A0 ecx
018872730d2bb228577f818371b9b3d513168a74vboxsync %define A0_32 ecx
018872730d2bb228577f818371b9b3d513168a74vboxsync %define A0_16 cx
018872730d2bb228577f818371b9b3d513168a74vboxsync %define A0_8 cl
018872730d2bb228577f818371b9b3d513168a74vboxsync %define A1 edx
018872730d2bb228577f818371b9b3d513168a74vboxsync %define A1_32 edx
018872730d2bb228577f818371b9b3d513168a74vboxsync %define A1_16 dx
018872730d2bb228577f818371b9b3d513168a74vboxsync %define A1_8 dl
018872730d2bb228577f818371b9b3d513168a74vboxsync %define A2 ebx
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %define A2_32 ebx
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %define A2_16 bx
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %define A2_8 bl
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %define A3 esi
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %define A3_32 esi
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %define A3_16 si
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %define T0 eax
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %define T0_32 eax
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %define T0_16 ax
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %define T0_8 al
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %define T1 edi
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %define T1_32 edi
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %define T1_16 di
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync; Load the relevant flags from [%1] if there are undefined flags (%3).
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync; @remarks Clobbers T0, stack. Changes EFLAGS.
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync; @param A2 The register pointing to the flags.
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync; @param 1 The parameter (A0..A3) pointing to the eflags.
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync; @param 2 The set of modified flags.
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync; @param 3 The set of undefined flags.
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync%macro IEM_MAYBE_LOAD_FLAGS 3
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync ;%if (%3) != 0
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync pushf ; store current flags
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync mov T0_32, [%1] ; load the guest flags
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync and dword [xSP], ~(%2 | %3) ; mask out the modified and undefined flags
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync and T0_32, (%2 | %3) ; select the modified and undefined flags.
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync or [xSP], T0 ; merge guest flags with host flags.
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync popf ; load the mixed flags.
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync; Update the flag.
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync; @remarks Clobbers T0, T1, stack.
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync; @param 1 The register pointing to the EFLAGS.
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync; @param 2 The mask of modified flags to save.
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync; @param 3 The mask of undefined flags to (maybe) save.
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync%macro IEM_SAVE_FLAGS 3
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %if (%2 | %3) != 0
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync mov T0_32, [%1] ; flags
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync and T0_32, ~(%2 | %3) ; clear the modified & undefined flags.
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync and T1_32, (%2 | %3) ; select the modified and undefined flags.
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync or T0_32, T1_32 ; combine the flags.
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync mov [%1], T0_32 ; save the flags.
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync; Macro for implementing a binary operator.
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync; This will generate code for the 8, 16, 32 and 64 bit accesses with locked
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync; variants, except on 32-bit system where the 64-bit accesses requires hand
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync; All the functions takes a pointer to the destination memory operand in A0,
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync; the source register operand in A1 and a pointer to eflags in A2.
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync; @param 1 The instruction mnemonic.
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync; @param 2 Non-zero if there should be a locked version.
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync; @param 3 The modified flags.
c1e15b3c98815ead93f67b8eb8b116189497cfb4vboxsync; @param 4 The undefined flags.
c1e15b3c98815ead93f67b8eb8b116189497cfb4vboxsync%macro IEMIMPL_BIN_OP 4
c1e15b3c98815ead93f67b8eb8b116189497cfb4vboxsyncBEGINPROC_FASTCALL iemAImpl_ %+ %1 %+ _u8, 12
c1e15b3c98815ead93f67b8eb8b116189497cfb4vboxsync PROLOGUE_3_ARGS
c1e15b3c98815ead93f67b8eb8b116189497cfb4vboxsync IEM_MAYBE_LOAD_FLAGS A2, %3, %4
c1e15b3c98815ead93f67b8eb8b116189497cfb4vboxsync %1 byte [A0], A1_8
c1e15b3c98815ead93f67b8eb8b116189497cfb4vboxsync IEM_SAVE_FLAGS A2, %3, %4
c1e15b3c98815ead93f67b8eb8b116189497cfb4vboxsync EPILOGUE_3_ARGS
c1e15b3c98815ead93f67b8eb8b116189497cfb4vboxsyncENDPROC iemAImpl_ %+ %1 %+ _u8
c1e15b3c98815ead93f67b8eb8b116189497cfb4vboxsyncBEGINPROC_FASTCALL iemAImpl_ %+ %1 %+ _u16, 12
c1e15b3c98815ead93f67b8eb8b116189497cfb4vboxsync PROLOGUE_3_ARGS
c1e15b3c98815ead93f67b8eb8b116189497cfb4vboxsync IEM_MAYBE_LOAD_FLAGS A2, %3, %4
c1e15b3c98815ead93f67b8eb8b116189497cfb4vboxsync %1 word [A0], A1_16
c1e15b3c98815ead93f67b8eb8b116189497cfb4vboxsync IEM_SAVE_FLAGS A2, %3, %4
c1e15b3c98815ead93f67b8eb8b116189497cfb4vboxsync EPILOGUE_3_ARGS
c1e15b3c98815ead93f67b8eb8b116189497cfb4vboxsyncENDPROC iemAImpl_ %+ %1 %+ _u16
c1e15b3c98815ead93f67b8eb8b116189497cfb4vboxsyncBEGINPROC_FASTCALL iemAImpl_ %+ %1 %+ _u32, 12
c1e15b3c98815ead93f67b8eb8b116189497cfb4vboxsync PROLOGUE_3_ARGS
c1e15b3c98815ead93f67b8eb8b116189497cfb4vboxsync IEM_MAYBE_LOAD_FLAGS A2, %3, %4
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %1 dword [A0], A1_32
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync IEM_SAVE_FLAGS A2, %3, %4
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync EPILOGUE_3_ARGS
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsyncENDPROC iemAImpl_ %+ %1 %+ _u32
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %ifdef RT_ARCH_AMD64
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsyncBEGINPROC_FASTCALL iemAImpl_ %+ %1 %+ _u64, 16
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync PROLOGUE_3_ARGS
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync IEM_MAYBE_LOAD_FLAGS A2, %3, %4
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %1 qword [A0], A1
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync IEM_SAVE_FLAGS A2, %3, %4
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync EPILOGUE_3_ARGS_EX 8
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsyncENDPROC iemAImpl_ %+ %1 %+ _u64
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %else ; stub it for now - later, replace with hand coded stuff.
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsyncBEGINPROC_FASTCALL iemAImpl_ %+ %1 %+ _u64, 16
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsyncENDPROC iemAImpl_ %+ %1 %+ _u64
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %endif ; !RT_ARCH_AMD64
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync %if %2 != 0 ; locked versions requested?
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsyncBEGINPROC_FASTCALL iemAImpl_ %+ %1 %+ _u8_locked, 12
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync PROLOGUE_3_ARGS
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync IEM_MAYBE_LOAD_FLAGS A2, %3, %4
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync lock %1 byte [A0], A1_8
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync IEM_SAVE_FLAGS A2, %3, %4
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsync EPILOGUE_3_ARGS
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsyncENDPROC iemAImpl_ %+ %1 %+ _u8_locked
354c88062085b9c03e4ea164f29c461b2ea842d6vboxsyncBEGINPROC_FASTCALL iemAImpl_ %+ %1 %+ _u16_locked, 12
IEMIMPL_BIN_OP add, 1, (X86_EFL_OF | X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF | X86_EFL_CF), 0
IEMIMPL_BIN_OP adc, 1, (X86_EFL_OF | X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF | X86_EFL_CF), 0
IEMIMPL_BIN_OP sub, 1, (X86_EFL_OF | X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF | X86_EFL_CF), 0
IEMIMPL_BIN_OP sbb, 1, (X86_EFL_OF | X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF | X86_EFL_CF), 0
IEMIMPL_BIN_OP xor, 1, (X86_EFL_OF | X86_EFL_SF | X86_EFL_ZF | X86_EFL_PF | X86_EFL_CF), X86_EFL_AF,
IEMIMPL_BIN_OP and, 1, (X86_EFL_OF | X86_EFL_SF | X86_EFL_ZF | X86_EFL_PF | X86_EFL_CF), X86_EFL_AF,
IEMIMPL_BIN_OP cmp, 0, (X86_EFL_OF | X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF | X86_EFL_CF), 0
IEMIMPL_BIN_OP test, 0, (X86_EFL_OF | X86_EFL_SF | X86_EFL_ZF | X86_EFL_PF | X86_EFL_CF), X86_EFL_AF,
IEMIMPL_BIT_OP bt, 0, (X86_EFL_CF), (X86_EFL_OF | X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF)
IEMIMPL_BIT_OP btc, 1, (X86_EFL_CF), (X86_EFL_OF | X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF)
IEMIMPL_BIT_OP bts, 1, (X86_EFL_CF), (X86_EFL_OF | X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF)
IEMIMPL_BIT_OP btr, 1, (X86_EFL_CF), (X86_EFL_OF | X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF)
IEM_MAYBE_LOAD_FLAGS A2, (X86_EFL_OF | X86_EFL_CF), (X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF)
IEM_MAYBE_LOAD_FLAGS A2, (X86_EFL_OF | X86_EFL_CF), (X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF)
IEM_MAYBE_LOAD_FLAGS A2, (X86_EFL_OF | X86_EFL_CF), (X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF)
; memory/register, then the pointer to the register, and finally a pointer to
IEM_MAYBE_LOAD_FLAGS A2, (X86_EFL_OF | X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF | X86_EFL_CF), 0
IEM_MAYBE_LOAD_FLAGS A2, (X86_EFL_OF | X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF | X86_EFL_CF), 0
IEM_MAYBE_LOAD_FLAGS A2, (X86_EFL_OF | X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF | X86_EFL_CF), 0
IEM_MAYBE_LOAD_FLAGS A2, (X86_EFL_OF | X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF | X86_EFL_CF), 0
IEM_MAYBE_LOAD_FLAGS A2, (X86_EFL_OF | X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF | X86_EFL_CF), 0
IEM_MAYBE_LOAD_FLAGS A2, (X86_EFL_OF | X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF | X86_EFL_CF), 0
IEM_MAYBE_LOAD_FLAGS A2, (X86_EFL_OF | X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF | X86_EFL_CF), 0
IEM_MAYBE_LOAD_FLAGS A2, (X86_EFL_OF | X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF | X86_EFL_CF), 0
; IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg8b,(uint64_t *pu64Dst, PRTUINT64U pu64EaxEdx, PRTUINT64U pu64EbxEcx,
; IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg,(uintX_t *puXDst, uintX_t puEax, uintX_t uReg, uint32_t *pEFlags));
IEM_MAYBE_LOAD_FLAGS A3, (X86_EFL_ZF | X86_EFL_CF | X86_EFL_PF | X86_EFL_AF | X86_EFL_SF | X86_EFL_OF), 0 ; clobbers T0 (eax)
IEM_SAVE_FLAGS A3, (X86_EFL_ZF | X86_EFL_CF | X86_EFL_PF | X86_EFL_AF | X86_EFL_SF | X86_EFL_OF), 0 ; clobbers T0+T1 (eax, r11/edi)
IEM_MAYBE_LOAD_FLAGS A3, (X86_EFL_ZF | X86_EFL_CF | X86_EFL_PF | X86_EFL_AF | X86_EFL_SF | X86_EFL_OF), 0 ; clobbers T0 (eax)
IEM_SAVE_FLAGS A3, (X86_EFL_ZF | X86_EFL_CF | X86_EFL_PF | X86_EFL_AF | X86_EFL_SF | X86_EFL_OF), 0 ; clobbers T0+T1 (eax, r11/edi)
IEM_MAYBE_LOAD_FLAGS A3, (X86_EFL_ZF | X86_EFL_CF | X86_EFL_PF | X86_EFL_AF | X86_EFL_SF | X86_EFL_OF), 0 ; clobbers T0 (eax)
IEM_SAVE_FLAGS A3, (X86_EFL_ZF | X86_EFL_CF | X86_EFL_PF | X86_EFL_AF | X86_EFL_SF | X86_EFL_OF), 0 ; clobbers T0+T1 (eax, r11/edi)
IEM_MAYBE_LOAD_FLAGS A3, (X86_EFL_ZF | X86_EFL_CF | X86_EFL_PF | X86_EFL_AF | X86_EFL_SF | X86_EFL_OF), 0 ; clobbers T0 (eax)
IEM_SAVE_FLAGS A3, (X86_EFL_ZF | X86_EFL_CF | X86_EFL_PF | X86_EFL_AF | X86_EFL_SF | X86_EFL_OF), 0 ; clobbers T0+T1 (eax, r11/edi)
IEM_MAYBE_LOAD_FLAGS ebp, (X86_EFL_ZF | X86_EFL_CF | X86_EFL_PF | X86_EFL_AF | X86_EFL_SF | X86_EFL_OF), 0 ; clobbers T0 (eax)
IEM_SAVE_FLAGS ebp, (X86_EFL_ZF | X86_EFL_CF | X86_EFL_PF | X86_EFL_AF | X86_EFL_SF | X86_EFL_OF), 0 ; clobbers T0+T1 (eax, edi)
IEMIMPL_UNARY_OP neg, (X86_EFL_OF | X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF | X86_EFL_CF), 0
IEMIMPL_SHIFT_OP shl, (X86_EFL_OF | X86_EFL_SF | X86_EFL_ZF | X86_EFL_PF | X86_EFL_CF), (X86_EFL_AF)
IEMIMPL_SHIFT_OP shr, (X86_EFL_OF | X86_EFL_SF | X86_EFL_ZF | X86_EFL_PF | X86_EFL_CF), (X86_EFL_AF)
IEMIMPL_SHIFT_OP sar, (X86_EFL_OF | X86_EFL_SF | X86_EFL_ZF | X86_EFL_PF | X86_EFL_CF), (X86_EFL_AF)
; A1, the shift count in A2 and a pointer to the eflags variable/register in A3.
IEMIMPL_SHIFT_DBL_OP shld, (X86_EFL_OF | X86_EFL_SF | X86_EFL_ZF | X86_EFL_PF | X86_EFL_CF), (X86_EFL_AF)
IEMIMPL_SHIFT_DBL_OP shrd, (X86_EFL_OF | X86_EFL_SF | X86_EFL_ZF | X86_EFL_PF | X86_EFL_CF), (X86_EFL_AF)
; The functions all return 0 so the caller can be used for div/idiv as well as
; for the mul/imul implementation.
IEMIMPL_DIV_OP div, 0, (X86_EFL_OF | X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF | X86_EFL_CF), 0
IEMIMPL_DIV_OP idiv, 0, (X86_EFL_OF | X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF | X86_EFL_CF), 1
; (input/output). They all return void.
movzx T0, word [%1 + X86FXSTATE.FCW]
mov [xSP + X86FSTENV32P.FCW], T0_16
movzx T1, word [%1 + X86FXSTATE.FSW]
movzx T0, word [xSP + X86FSTENV32P.FSW]
mov [xSP + X86FSTENV32P.FSW], T0_16
fnstsw word [A1 + IEMFPURESULT.FSW]
fstp tword [A1 + IEMFPURESULT.r80Result]
fnstsw word [A1 + IEMFPURESULT.FSW]
fstp tword [A1 + IEMFPURESULT.r80Result]
fnstsw word [A1 + IEMFPURESULT.FSW]
fstp tword [A1 + IEMFPURESULT.r80Result]
fnstsw word [A1 + IEMFPURESULT.FSW]
fstp tword [A1 + IEMFPURESULT.r80Result]
fnstsw word [A1 + IEMFPURESULT.FSW]
fstp tword [A1 + IEMFPURESULT.r80Result]
fnstsw word [A1 + IEMFPURESULT.FSW]
fstp tword [A1 + IEMFPURESULT.r80Result]
fnstsw word [A1 + IEMFPURESULT.FSW]
fstp tword [A1 + IEMFPURESULT.r80Result]
fnstsw word [A1 + IEMFPURESULT.FSW]
fstp tword [A1 + IEMFPURESULT.r80Result]
fnstsw word [A1 + IEMFPURESULT.FSW]
fstp tword [A1 + IEMFPURESULT.r80Result]
fnstsw word [A1 + IEMFPURESULT.FSW]
fstp tword [A1 + IEMFPURESULT.r80Result]
fnstsw word [A1 + IEMFPURESULT.FSW]
fstp tword [A1 + IEMFPURESULT.r80Result]
fnstsw word [A1 + IEMFPURESULT.FSW]
fstp tword [A1 + IEMFPURESULT.r80Result]
fnstsw word [A1 + IEMFPURESULT.FSW]
fstp tword [A1 + IEMFPURESULT.r80Result]
fnstsw word [A1 + IEMFPURESULT.FSW]
fstp tword [A1 + IEMFPURESULT.r80Result]
fnstsw word [A1 + IEMFPURESULTTWO.FSW]
fstp tword [A1 + IEMFPURESULTTWO.r80Result2]
fstp tword [A1 + IEMFPURESULTTWO.r80Result1]