PGMInternal.h revision 1231b30fab5c1709edd342286eb5630736f2b933
/* $Id$ */
/** @file
* PGM - Internal header file.
*/
/*
* Copyright (C) 2006-2007 Sun Microsystems, Inc.
*
* This file is part of VirtualBox Open Source Edition (OSE), as
* available from http://www.virtualbox.org. This file is free software;
* General Public License (GPL) as published by the Free Software
* Foundation, in version 2 as it comes in the "COPYING" file of the
* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
*
* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
* Clara, CA 95054 USA or visit http://www.sun.com if you need
* additional information or have any questions.
*/
#ifndef ___PGMInternal_h
#define ___PGMInternal_h
#include <VBox/pdmcritsect.h>
#include <iprt/critsect.h>
/** @defgroup grp_pgm_int Internals
* @ingroup grp_pgm
* @internal
* @{
*/
/** @name PGM Compile Time Config
* @{
*/
/*
* Enable to use the PGM pool for all levels in the paging chain in all paging modes.
*/
//#define VBOX_WITH_PGMPOOL_PAGING_ONLY
/**
* Solve page is out of sync issues inside Guest Context (in PGMGC.cpp).
* Comment it if it will break something.
*/
#define PGM_OUT_OF_SYNC_IN_GC
/**
* Check and skip global PDEs for non-global flushes
*/
/**
* Sync N pages instead of a whole page table
*/
#define PGM_SYNC_N_PAGES
/**
* Number of pages to sync during a page fault
*
* When PGMPOOL_WITH_GCPHYS_TRACKING is enabled using high values here
* causes a lot of unnecessary extents and also is slower than taking more \#PFs.
*/
#define PGM_SYNC_NR_PAGES 8
/**
* Number of PGMPhysRead/Write cache entries (must be <= sizeof(uint64_t))
*/
#define PGM_MAX_PHYSCACHE_ENTRIES 64
/**
* Enable caching of PGMR3PhysRead/WriteByte/Word/Dword
*/
#define PGM_PHYSMEMACCESS_CACHING
/** @def PGMPOOL_WITH_CACHE
* Enable agressive caching using the page pool.
*
* This requires PGMPOOL_WITH_USER_TRACKING and PGMPOOL_WITH_MONITORING.
*/
#define PGMPOOL_WITH_CACHE
/** @def PGMPOOL_WITH_MIXED_PT_CR3
* When defined, we'll deal with 'uncachable' pages.
*/
#ifdef PGMPOOL_WITH_CACHE
# define PGMPOOL_WITH_MIXED_PT_CR3
#endif
/** @def PGMPOOL_WITH_MONITORING
* Monitor the guest pages which are shadowed.
* When this is enabled, PGMPOOL_WITH_CACHE or PGMPOOL_WITH_GCPHYS_TRACKING must
* be enabled as well.
*/
#ifdef PGMPOOL_WITH_CACHE
# define PGMPOOL_WITH_MONITORING
#endif
/** @def PGMPOOL_WITH_GCPHYS_TRACKING
* Tracking the of shadow pages mapping guest physical pages.
*
* This is very expensive, the current cache prototype is trying to figure out
* whether it will be acceptable with an agressive caching policy.
*/
#if defined(PGMPOOL_WITH_CACHE) || defined(PGMPOOL_WITH_MONITORING)
# define PGMPOOL_WITH_GCPHYS_TRACKING
#endif
/** @def PGMPOOL_WITH_USER_TRACKING
* Tracking users of shadow pages. This is required for the linking of shadow page
* tables and physical guest addresses.
*/
#if defined(PGMPOOL_WITH_GCPHYS_TRACKING) || defined(PGMPOOL_WITH_CACHE) || defined(PGMPOOL_WITH_MONITORING)
# define PGMPOOL_WITH_USER_TRACKING
#endif
/** @def PGMPOOL_CFG_MAX_GROW
* The maximum number of pages to add to the pool in one go.
*/
/** @def VBOX_STRICT_PGM_HANDLER_VIRTUAL
* Enables some extra assertions for virtual handlers (mainly phys2virt related).
*/
#ifdef VBOX_STRICT
# define VBOX_STRICT_PGM_HANDLER_VIRTUAL
#endif
/** @} */
/** @name PDPT and PML4 flags.
* These are placed in the three bits available for system programs in
* the PDPT and PML4 entries.
* @{ */
/** The entry is a permanent one and it's must always be present.
* Never free such an entry. */
/** Mapping (hypervisor allocated pagetable). */
/** @} */
/** @name Page directory flags.
* These are placed in the three bits available for system programs in
* the page directory entries.
* @{ */
/** Mapping (hypervisor allocated pagetable). */
/** Made read-only to facilitate dirty bit tracking. */
/** @} */
/** @name Page flags.
* These are placed in the three bits available for system programs in
* the page entries.
* @{ */
/** Made read-only to facilitate dirty bit tracking. */
#ifndef PGM_PTFLAGS_CSAM_VALIDATED
/** Scanned and approved by CSAM (tm).
* NOTE: Must be identical to the one defined in CSAMInternal.h!!
#endif
/** @} */
/** @name Defines used to indicate the shadow and guest paging in the templates.
* @{ */
#define PGM_TYPE_REAL 1
#define PGM_TYPE_PROT 2
#define PGM_TYPE_32BIT 3
#define PGM_TYPE_PAE 4
#define PGM_TYPE_AMD64 5
#define PGM_TYPE_NESTED 6
#define PGM_TYPE_EPT 7
#define PGM_TYPE_MAX PGM_TYPE_EPT
/** @} */
/** Macro for checking if the guest is using paging.
* @param uGstType PGM_TYPE_*
* @param uShwType PGM_TYPE_*
* @remark ASSUMES certain order of the PGM_TYPE_* values.
*/
( (uGstType) >= PGM_TYPE_32BIT \
&& (uShwType) != PGM_TYPE_NESTED \
&& (uShwType) != PGM_TYPE_EPT)
/** Macro for checking if the guest supports the NX bit.
* @param uGstType PGM_TYPE_*
* @param uShwType PGM_TYPE_*
* @remark ASSUMES certain order of the PGM_TYPE_* values.
*/
( (uGstType) >= PGM_TYPE_PAE \
&& (uShwType) != PGM_TYPE_NESTED \
&& (uShwType) != PGM_TYPE_EPT)
/** @def PGM_HCPHYS_2_PTR
* Maps a HC physical page pool address to a virtual address.
*
* @returns VBox status code.
* @param pVM The VM handle.
* @param HCPhys The HC physical address to map to a virtual one.
* @param ppv Where to store the virtual address. No need to cast this.
*
* @remark In GC this uses PGMGCDynMapHCPage(), so it will consume of the
* small page window employeed by that function. Be careful.
* @remark There is no need to assert on the result.
*/
#ifdef IN_RC
#elif defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
#else
#endif
/** @def PGM_HCPHYS_2_PTR_BY_PGM
* Maps a HC physical page pool address to a virtual address.
*
* @returns VBox status code.
* @param pPGM The PGM instance data.
* @param HCPhys The HC physical address to map to a virtual one.
* @param ppv Where to store the virtual address. No need to cast this.
*
* @remark In GC this uses PGMGCDynMapHCPage(), so it will consume of the
* small page window employeed by that function. Be careful.
* @remark There is no need to assert on the result.
*/
#else
#endif
/** @def PGM_GCPHYS_2_PTR
* Maps a GC physical page address to a virtual address.
*
* @returns VBox status code.
* @param pVM The VM handle.
* @param GCPhys The GC physical address to map to a virtual one.
* @param ppv Where to store the virtual address. No need to cast this.
*
* @remark In GC this uses PGMGCDynMapGCPage(), so it will consume of the
* small page window employeed by that function. Be careful.
* @remark There is no need to assert on the result.
*/
#ifdef IN_RC
#elif defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
#else
PGMPhysGCPhys2R3Ptr(pVM, GCPhys, 1 /* one page only */, (PRTR3PTR)(ppv)) /** @todo this isn't asserting, use PGMRamGCPhys2HCPtr! */
#endif
/** @def PGM_GCPHYS_2_PTR_BY_PGM
* Maps a GC physical page address to a virtual address.
*
* @returns VBox status code.
* @param pPGM Pointer to the PGM instance data.
* @param GCPhys The GC physical address to map to a virtual one.
* @param ppv Where to store the virtual address. No need to cast this.
*
* @remark In GC this uses PGMGCDynMapGCPage(), so it will consume of the
* small page window employeed by that function. Be careful.
* @remark There is no need to assert on the result.
*/
#else
#endif
/** @def PGM_GCPHYS_2_PTR_EX
* Maps a unaligned GC physical page address to a virtual address.
*
* @returns VBox status code.
* @param pVM The VM handle.
* @param GCPhys The GC physical address to map to a virtual one.
* @param ppv Where to store the virtual address. No need to cast this.
*
* @remark In GC this uses PGMGCDynMapGCPage(), so it will consume of the
* small page window employeed by that function. Be careful.
* @remark There is no need to assert on the result.
*/
#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
#else
PGMPhysGCPhys2R3Ptr(pVM, GCPhys, 1 /* one page only */, (PRTR3PTR)(ppv)) /** @todo this isn't asserting, use PGMRamGCPhys2HCPtr! */
#endif
/** @def PGM_INVL_PG
* Invalidates a page when in GC does nothing in HC.
*
* @param GCVirt The virtual address of the page to invalidate.
*/
#ifdef IN_RC
#else
#endif
/** @def PGM_INVL_BIG_PG
* Invalidates a 4MB page directory entry when in GC does nothing in HC.
*
* @param GCVirt The virtual address within the page directory to invalidate.
*/
#ifdef IN_RC
#else
#endif
/** @def PGM_INVL_GUEST_TLBS()
* Invalidates all guest TLBs.
*/
#ifdef IN_RC
# define PGM_INVL_GUEST_TLBS() ASMReloadCR3()
#else
#endif
/**
* Structure for tracking GC Mappings.
*
* This structure is used by linked list in both GC and HC.
*/
typedef struct PGMMAPPING
{
/** Pointer to next entry. */
/** Pointer to next entry. */
/** Pointer to next entry. */
/** Indicate whether this entry is finalized. */
bool fFinalized;
/** Start Virtual address. */
/** Last Virtual address (inclusive). */
/** Range size (bytes). */
/** Pointer to relocation callback function. */
/** User argument to the callback. */
/** Mapping description / name. For easing debugging. */
/** Number of page tables. */
#endif
/** Array of page table mapping data. Each entry
* describes one page table. The array can be longer
* than the declared length.
*/
struct
{
/** The HC physical address of the page table. */
/** The HC physical address of the first PAE page table. */
/** The HC physical address of the second PAE page table. */
/** The HC virtual address of the 32-bit page table. */
/** The HC virtual address of the two PAE page table. (i.e 1024 entries instead of 512) */
/** The GC virtual address of the 32-bit page table. */
/** The GC virtual address of the two PAE page table. */
/** The GC virtual address of the 32-bit page table. */
/** The GC virtual address of the two PAE page table. */
} aPTs[1];
} PGMMAPPING;
/** Pointer to structure for tracking GC Mappings. */
typedef struct PGMMAPPING *PPGMMAPPING;
/**
* Physical page access handler structure.
*
* This is used to keep track of physical address ranges
* which are being monitored in some kind of way.
*/
typedef struct PGMPHYSHANDLER
{
/** Access type. */
/** Number of pages to update. */
/** Pointer to R3 callback function. */
/** User argument for R3 handlers. */
/** Pointer to R0 callback function. */
/** User argument for R0 handlers. */
/** Pointer to GC callback function. */
/** User argument for RC handlers. */
/** Description / Name. For easing debugging. */
#ifdef VBOX_WITH_STATISTICS
/** Profiling of this handler. */
#endif
/** Pointer to a physical page access handler structure. */
typedef PGMPHYSHANDLER *PPGMPHYSHANDLER;
/**
* Cache node for the physical addresses covered by a virtual handler.
*/
typedef struct PGMPHYS2VIRTHANDLER
{
/** Core node for the tree based on physical ranges. */
/** Offset from this struct to the PGMVIRTHANDLER structure. */
/** Offset of the next alias relative to this one.
* Bit 0 is used for indicating whether we're in the tree.
* Bit 1 is used for indicating that we're the head node.
*/
/** Pointer to a phys to virtual handler structure. */
typedef PGMPHYS2VIRTHANDLER *PPGMPHYS2VIRTHANDLER;
/** The bit in PGMPHYS2VIRTHANDLER::offNextAlias used to indicate that the
* node is in the tree. */
#define PGMPHYS2VIRTHANDLER_IN_TREE RT_BIT(0)
/** The bit in PGMPHYS2VIRTHANDLER::offNextAlias used to indicate that the
* node is in the head of an alias chain.
* The PGMPHYS2VIRTHANDLER_IN_TREE is always set if this bit is set. */
/** The mask to apply to PGMPHYS2VIRTHANDLER::offNextAlias to get the offset. */
/**
* Virtual page access handler structure.
*
* This is used to keep track of virtual address ranges
* which are being monitored in some kind of way.
*/
typedef struct PGMVIRTHANDLER
{
/** Core node for the tree based on virtual ranges. */
/** Size of the range (in bytes). */
/** Number of cache pages. */
/** Access type. */
/** Pointer to the RC callback function. */
#if HC_ARCH_BITS == 64
#endif
/** Pointer to the R3 callback function for invalidation. */
/** Pointer to the R3 callback function. */
/** Description / Name. For easing debugging. */
#ifdef VBOX_WITH_STATISTICS
/** Profiling of this handler. */
#endif
/** Array of cached physical addresses for the monitored ranged. */
/** Pointer to a virtual page access handler structure. */
typedef PGMVIRTHANDLER *PPGMVIRTHANDLER;
/**
* Page type.
* @remarks This enum has to fit in a 3-bit field (see PGMPAGE::u3Type).
* @todo convert to \#defines.
*/
typedef enum PGMPAGETYPE
{
/** The usual invalid zero entry. */
PGMPAGETYPE_INVALID = 0,
/** RAM page. (RWX) */
/** MMIO2 page. (RWX) */
/** Shadowed ROM. (RWX) */
/** ROM page. (R-X) */
/** MMIO page. (---) */
/** End of valid entries. */
} PGMPAGETYPE;
/** @name Page type predicates.
* @{ */
/** @} */
/**
* A Physical Guest Page tracking structure.
*
* The format of this structure is complicated because we have to fit a lot
* of information into as few bits as possible. The format is also subject
* to change (there is one comming up soon). Which means that for we'll be
* using PGM_PAGE_GET_*, PGM_PAGE_IS_ and PGM_PAGE_SET_* macros for *all*
* accessess to the structure.
*/
typedef struct PGMPAGE
{
/** The physical address and a whole lot of other stuff. All bits are used! */
/** The page state. */
/** Flag indicating that a write monitored page was written to when set. */
/** For later. */
/** The Page ID.
* @todo Merge with HCPhys once we've liberated HCPhys of its stuff.
* The HCPhys will be 100% static. */
/** The page type (PGMPAGETYPE). */
/** The physical handler state (PGM_PAGE_HNDL_PHYS_STATE*) */
/** The virtual handler state (PGM_PAGE_HNDL_VIRT_STATE*) */
} PGMPAGE;
/** Pointer to a physical guest page. */
/** Pointer to a const physical guest page. */
/** Pointer to a physical guest page pointer. */
/**
* Clears the page structure.
* @param pPage Pointer to the physical guest page tracking structure.
*/
#define PGM_PAGE_CLEAR(pPage) \
do { \
(pPage)->fWrittenToX = 0; \
(pPage)->fSomethingElse = 0; \
} while (0)
/**
* Initializes the page structure.
* @param pPage Pointer to the physical guest page tracking structure.
*/
do { \
(pPage)->fWrittenToX = 0; \
(pPage)->fSomethingElse = 0; \
/*(pPage)->u3Type = (_uType); - later */ \
} while (0)
/**
* Initializes the page structure of a ZERO page.
* @param pPage Pointer to the physical guest page tracking structure.
*/
#ifdef VBOX_WITH_NEW_PHYS_CODE
#else
#endif
/** Temporary hack. Replaced by PGM_PAGE_INIT_ZERO once the old code is kicked out. */
/** @name The Page state, PGMPAGE::u2StateX.
* @{ */
/** The zero page.
* This is a per-VM page that's never ever mapped writable. */
#define PGM_PAGE_STATE_ZERO 0
/** A allocated page.
* This is a per-VM page allocated from the page pool (or wherever
* we get MMIO2 pages from if the type is MMIO2).
*/
#define PGM_PAGE_STATE_ALLOCATED 1
/** A allocated page that's being monitored for writes.
* The shadow page table mappings are read-only. When a write occurs, the
* fWrittenTo member is set, the page remapped as read-write and the state
* moved back to allocated. */
#define PGM_PAGE_STATE_WRITE_MONITORED 2
/** The page is shared, aka. copy-on-write.
* This is a page that's shared with other VMs. */
#define PGM_PAGE_STATE_SHARED 3
/** @} */
/**
* Gets the page state.
* @returns page state (PGM_PAGE_STATE_*).
* @param pPage Pointer to the physical guest page tracking structure.
*/
/**
* Sets the page state.
* @param pPage Pointer to the physical guest page tracking structure.
* @param _uState The new page state.
*/
/**
* Gets the host physical address of the guest page.
* @returns host physical address (RTHCPHYS).
* @param pPage Pointer to the physical guest page tracking structure.
*/
/**
* Sets the host physical address of the guest page.
* @param pPage Pointer to the physical guest page tracking structure.
* @param _HCPhys The new host physical address.
*/
/**
* Get the Page ID.
* @returns The Page ID; NIL_GMM_PAGEID if it's a ZERO page.
* @param pPage Pointer to the physical guest page tracking structure.
*/
/* later:
#define PGM_PAGE_GET_PAGEID(pPage) ( ((uint32_t)(pPage)->HCPhys >> (48 - 12))
| ((uint32_t)(pPage)->HCPhys & 0xfff) )
*/
/**
* Sets the Page ID.
* @param pPage Pointer to the physical guest page tracking structure.
*/
/* later:
#define PGM_PAGE_SET_PAGEID(pPage, _idPage) do { (pPage)->HCPhys = (((pPage)->HCPhys) & UINT64_C(0x0000fffffffff000)) \
| ((_idPage) & 0xfff) \
| (((_idPage) & 0x0ffff000) << (48-12)); } while (0)
*/
/**
* Get the Chunk ID.
* @returns The Chunk ID; NIL_GMM_CHUNKID if it's a ZERO page.
* @param pPage Pointer to the physical guest page tracking structure.
*/
/* later:
#if GMM_CHUNKID_SHIFT == 12
# define PGM_PAGE_GET_CHUNKID(pPage) ( (uint32_t)((pPage)->HCPhys >> 48) )
#elif GMM_CHUNKID_SHIFT > 12
# define PGM_PAGE_GET_CHUNKID(pPage) ( (uint32_t)((pPage)->HCPhys >> (48 + (GMM_CHUNKID_SHIFT - 12)) )
#elif GMM_CHUNKID_SHIFT < 12
# define PGM_PAGE_GET_CHUNKID(pPage) ( ( (uint32_t)((pPage)->HCPhys >> 48) << (12 - GMM_CHUNKID_SHIFT) ) \
| ( (uint32_t)((pPage)->HCPhys & 0xfff) >> GMM_CHUNKID_SHIFT ) )
#else
# error "GMM_CHUNKID_SHIFT isn't defined or something."
#endif
*/
/**
* Get the index of the page within the allocaiton chunk.
* @returns The page index.
* @param pPage Pointer to the physical guest page tracking structure.
*/
/* later:
#if GMM_CHUNKID_SHIFT <= 12
# define PGM_PAGE_GET_PAGE_IN_CHUNK(pPage) ( (uint32_t)((pPage)->HCPhys & GMM_PAGEID_IDX_MASK) )
#else
# define PGM_PAGE_GET_PAGE_IN_CHUNK(pPage) ( (uint32_t)((pPage)->HCPhys & 0xfff) \
| ( (uint32_t)((pPage)->HCPhys >> 48) & (RT_BIT_32(GMM_CHUNKID_SHIFT - 12) - 1) ) )
#endif
*/
/**
* Gets the page type.
* @returns The page type.
* @param pPage Pointer to the physical guest page tracking structure.
*/
/**
* Sets the page type.
* @param pPage Pointer to the physical guest page tracking structure.
* @param _enmType The new page type (PGMPAGETYPE).
*/
#ifdef VBOX_WITH_NEW_PHYS_CODE
#else
do { \
if ((_enmType) == PGMPAGETYPE_ROM) \
else if ((_enmType) == PGMPAGETYPE_ROM_SHADOW) \
else if ((_enmType) == PGMPAGETYPE_MMIO2) \
} while (0)
#endif
/**
* Checks if the page is 'reserved'.
* @param pPage Pointer to the physical guest page tracking structure.
*/
/**
* Checks if the page is marked for MMIO.
* @param pPage Pointer to the physical guest page tracking structure.
*/
/**
* Checks if the page is backed by the ZERO page.
* @param pPage Pointer to the physical guest page tracking structure.
*/
/**
* Checks if the page is backed by a SHARED page.
* @param pPage Pointer to the physical guest page tracking structure.
*/
/**
* Marks the paget as written to (for GMM change monitoring).
* @param pPage Pointer to the physical guest page tracking structure.
*/
/**
* Clears the written-to indicator.
* @param pPage Pointer to the physical guest page tracking structure.
*/
/**
* Checks if the page was marked as written-to.
* @param pPage Pointer to the physical guest page tracking structure.
*/
/** @name Physical Access Handler State values (PGMPAGE::u2HandlerPhysStateX).
*
* @remarks The values are assigned in order of priority, so we can calculate
* the correct state for a page with different handlers installed.
* @{ */
/** No handler installed. */
#define PGM_PAGE_HNDL_PHYS_STATE_NONE 0
/** Monitoring is temporarily disabled. */
#define PGM_PAGE_HNDL_PHYS_STATE_DISABLED 1
/** Write access is monitored. */
#define PGM_PAGE_HNDL_PHYS_STATE_WRITE 2
/** All access is monitored. */
#define PGM_PAGE_HNDL_PHYS_STATE_ALL 3
/** @} */
/**
* Gets the physical access handler state of a page.
* @returns PGM_PAGE_HNDL_PHYS_STATE_* value.
* @param pPage Pointer to the physical guest page tracking structure.
*/
/**
* Sets the physical access handler state of a page.
* @param pPage Pointer to the physical guest page tracking structure.
* @param _uState The new state value.
*/
/**
* Checks if the page has any physical access handlers, including temporariliy disabled ones.
* @param pPage Pointer to the physical guest page tracking structure.
*/
#define PGM_PAGE_HAS_ANY_PHYSICAL_HANDLERS(pPage) ( (pPage)->u2HandlerPhysStateX != PGM_PAGE_HNDL_PHYS_STATE_NONE )
/**
* Checks if the page has any active physical access handlers.
* @param pPage Pointer to the physical guest page tracking structure.
*/
#define PGM_PAGE_HAS_ACTIVE_PHYSICAL_HANDLERS(pPage) ( (pPage)->u2HandlerPhysStateX >= PGM_PAGE_HNDL_PHYS_STATE_WRITE )
/** @name Virtual Access Handler State values (PGMPAGE::u2HandlerVirtStateX).
*
* @remarks The values are assigned in order of priority, so we can calculate
* the correct state for a page with different handlers installed.
* @{ */
/** No handler installed. */
#define PGM_PAGE_HNDL_VIRT_STATE_NONE 0
/* 1 is reserved so the lineup is identical with the physical ones. */
/** Write access is monitored. */
#define PGM_PAGE_HNDL_VIRT_STATE_WRITE 2
/** All access is monitored. */
#define PGM_PAGE_HNDL_VIRT_STATE_ALL 3
/** @} */
/**
* Gets the virtual access handler state of a page.
* @returns PGM_PAGE_HNDL_VIRT_STATE_* value.
* @param pPage Pointer to the physical guest page tracking structure.
*/
/**
* Sets the virtual access handler state of a page.
* @param pPage Pointer to the physical guest page tracking structure.
* @param _uState The new state value.
*/
/**
* Checks if the page has any virtual access handlers.
* @param pPage Pointer to the physical guest page tracking structure.
*/
#define PGM_PAGE_HAS_ANY_VIRTUAL_HANDLERS(pPage) ( (pPage)->u2HandlerVirtStateX != PGM_PAGE_HNDL_VIRT_STATE_NONE )
/**
* Same as PGM_PAGE_HAS_ANY_VIRTUAL_HANDLERS - can't disable pages in
* virtual handlers.
* @param pPage Pointer to the physical guest page tracking structure.
*/
/**
* Checks if the page has any access handlers, including temporarily disabled ones.
* @param pPage Pointer to the physical guest page tracking structure.
*/
#define PGM_PAGE_HAS_ANY_HANDLERS(pPage) \
/**
* Checks if the page has any active access handlers.
* @param pPage Pointer to the physical guest page tracking structure.
*/
#define PGM_PAGE_HAS_ACTIVE_HANDLERS(pPage) \
/**
* Checks if the page has any active access handlers catching all accesses.
* @param pPage Pointer to the physical guest page tracking structure.
*/
#define PGM_PAGE_HAS_ACTIVE_ALL_HANDLERS(pPage) \
/**
* Ram range for GC Phys to HC Phys conversion.
*
* Can be used for HC Virt to GC Phys and HC Virt to HC Phys
* conversions too, but we'll let MM handle that for now.
*
* This structure is used by linked lists in both GC and HC.
*/
typedef struct PGMRAMRANGE
{
/** Pointer to the next RAM range - for R3. */
/** Pointer to the next RAM range - for R0. */
/** Pointer to the next RAM range - for RC. */
/** Pointer alignment. */
/** Start of the range. Page aligned. */
/** Last address in the range (inclusive). Page aligned (-1). */
/** Size of the range. (Page aligned of course). */
/** MM_RAM_* flags */
#ifndef VBOX_WITH_NEW_PHYS_CODE
/** R3 virtual lookup ranges for chunks.
* Currently only used with MM_RAM_FLAGS_DYNAMIC_ALLOC ranges.
* @remarks This is occationally accessed from ring-0!! (not darwin) */
# else
# endif
#endif
/** Start of the HC mapping of the range. This is only used for MMIO2. */
/** The range description. */
/** Padding to make aPage aligned on sizeof(PGMPAGE). */
#ifdef VBOX_WITH_NEW_PHYS_CODE
#endif
/** Array of physical guest page tracking structures. */
} PGMRAMRANGE;
/** Pointer to Ram range for GC Phys to HC Phys conversion. */
typedef PGMRAMRANGE *PPGMRAMRANGE;
/** Return hc ptr corresponding to the ram range and physical offset */
(pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC) ? (RTHCPTR)((pRam)->paChunkR3Ptrs[(off) >> PGM_DYNAMIC_CHUNK_SHIFT] + ((off) & PGM_DYNAMIC_CHUNK_OFFSET_MASK)) \
/**
* Per page tracking structure for ROM image.
*
* A ROM image may have a shadow page, in which case we may have
* two pages backing it. This structure contains the PGMPAGE for
* both while PGMRAMRANGE have a copy of the active one. It is
* important that these aren't out of sync in any regard other
* than page pool tracking data.
*/
typedef struct PGMROMPAGE
{
/** The page structure for the virgin ROM page. */
/** The page structure for the shadow RAM page. */
/** The current protection setting. */
/** Pad the structure size to a multiple of 8. */
} PGMROMPAGE;
/** Pointer to a ROM page tracking structure. */
typedef PGMROMPAGE *PPGMROMPAGE;
/**
* A registered ROM image.
*
* This is needed to keep track of ROM image since they generally
* intrude into a PGMRAMRANGE. It also keeps track of additional
* info like the two page sets (read-only virgin and read-write shadow),
* the current state of each page.
*
* Because access handlers cannot easily be executed in a different
* context, the ROM ranges needs to be accessible and in all contexts.
*/
typedef struct PGMROMRANGE
{
/** Pointer to the next range - R3. */
/** Pointer to the next range - R0. */
/** Pointer to the next range - RC. */
/** Pointer alignment */
/** Address of the range. */
/** Address of the last byte in the range. */
/** Size of the range. */
/** The flags (PGMPHYS_ROM_FLAG_*). */
/** Alignment padding ensuring that aPages is sizeof(PGMROMPAGE) aligned. */
/** Pointer to the original bits when PGMPHYS_ROM_FLAG_PERMANENT_BINARY was specified.
* This is used for strictness checks. */
R3PTRTYPE(const void *) pvOriginal;
/** The ROM description. */
/** The per page tracking structures. */
} PGMROMRANGE;
/** Pointer to a ROM range. */
typedef PGMROMRANGE *PPGMROMRANGE;
/**
* A registered MMIO2 (= Device RAM) range.
*
* There are a few reason why we need to keep track of these
* registrations. One of them is the deregistration & cleanup
* stuff, while another is that the PGMRAMRANGE associated with
* such a region may have to be removed from the ram range list.
*
* Overlapping with a RAM range has to be 100% or none at all. The
* pages in the existing RAM range must not be ROM nor MMIO. A guru
* meditation will be raised if a partial overlap or an overlap of
* ROM pages is encountered. On an overlap we will free all the
* existing RAM pages and put in the ram range pages instead.
*/
typedef struct PGMMMIO2RANGE
{
/** The owner of the range. (a device) */
/** Pointer to the ring-3 mapping of the allocation. */
/** Pointer to the next range - R3. */
/** Whether it's mapped or not. */
bool fMapped;
/** Whether it's overlapping or not. */
bool fOverlapping;
/** The PCI region number.
* @remarks This ASSUMES that nobody will ever really need to have multiple
* PCI devices with matching MMIO region numbers on a single device. */
/** Alignment padding for putting the ram range on a PGMPAGE alignment boundrary. */
/** The associated RAM range. */
/** Pointer to a MMIO2 range. */
typedef PGMMMIO2RANGE *PPGMMMIO2RANGE;
/**
* PGMPhysRead/Write cache entry
*/
typedef struct PGMPHYSCACHEENTRY
{
/** R3 pointer to physical page. */
/** GC Physical address for cache entry */
#endif
/**
* PGMPhysRead/Write cache to reduce REM memory access overhead
*/
typedef struct PGMPHYSCACHE
{
/** Bitmap of valid cache entries */
/** Cache entries */
} PGMPHYSCACHE;
/** Pointer to an allocation chunk ring-3 mapping. */
typedef struct PGMCHUNKR3MAP *PPGMCHUNKR3MAP;
/** Pointer to an allocation chunk ring-3 mapping pointer. */
typedef PPGMCHUNKR3MAP *PPPGMCHUNKR3MAP;
/**
* Ring-3 tracking structore for an allocation chunk ring-3 mapping.
*
* The primary tree (Core) uses the chunk id as key.
* The secondary tree (AgeCore) is used for ageing and uses ageing sequence number as key.
*/
typedef struct PGMCHUNKR3MAP
{
/** The key is the chunk id. */
/** The key is the ageing sequence number. */
/** The current age thingy. */
/** The current reference count. */
/** The current permanent reference count. */
/** The mapping address. */
void *pv;
/**
* Allocation chunk ring-3 mapping TLB entry.
*/
typedef struct PGMCHUNKR3MAPTLBE
{
/** The chunk id. */
#if HC_ARCH_BITS == 64
#endif
/** The chunk map. */
#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE
#else
#endif
/** Pointer to the an allocation chunk ring-3 mapping TLB entry. */
typedef PGMCHUNKR3MAPTLBE *PPGMCHUNKR3MAPTLBE;
/** The number of TLB entries in PGMCHUNKR3MAPTLB.
* @remark Must be a power of two value. */
#define PGM_CHUNKR3MAPTLB_ENTRIES 32
/**
* Allocation chunk ring-3 mapping TLB.
*
* @remarks We use a TLB to speed up lookups by avoiding walking the AVL.
* At first glance this might look kinda odd since AVL trees are
* supposed to give the most optimial lookup times of all trees
* due to their balancing. However, take a tree with 1023 nodes
* in it, that's 10 levels, meaning that most searches has to go
* down 9 levels before they find what they want. This isn't fast
* compared to a TLB hit. There is the factor of cache misses,
* and of course the problem with trees and branch prediction.
* This is why we use TLBs in front of most of the trees.
*
* @todo Generalize this TLB + AVL stuff, shouldn't be all that
* difficult when we switch to the new inlined AVL trees (from kStuff).
*/
typedef struct PGMCHUNKR3MAPTLB
{
/** The TLB entries. */
/**
* Calculates the index of a guest page in the Ring-3 Chunk TLB.
* @returns Chunk TLB index.
* @param idChunk The Chunk ID.
*/
/**
* Ring-3 guest page mapping TLB entry.
* @remarks used in ring-0 as well at the moment.
*/
typedef struct PGMPAGER3MAPTLBE
{
/** Address of the page. */
/** The guest page. */
#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE
#else
#endif
/** Pointer to the page mapping tracking structure, PGMCHUNKR3MAP. */
#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE
#else
#endif
/** The address */
#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE
#else
R3R0PTRTYPE(void *) volatile pv;
#endif
#if HC_ARCH_BITS == 32
#endif
/** Pointer to an entry in the HC physical TLB. */
typedef PGMPAGER3MAPTLBE *PPGMPAGER3MAPTLBE;
/** The number of entries in the ring-3 guest page mapping TLB.
* @remarks The value must be a power of two. */
#define PGM_PAGER3MAPTLB_ENTRIES 64
/**
* Ring-3 guest page mapping TLB.
* @remarks used in ring-0 as well at the moment.
*/
typedef struct PGMPAGER3MAPTLB
{
/** The TLB entries. */
/** Pointer to the ring-3 guest page mapping TLB. */
typedef PGMPAGER3MAPTLB *PPGMPAGER3MAPTLB;
/**
* Calculates the index of the TLB entry for the specified guest page.
* @returns Physical TLB index.
* @param GCPhys The guest physical address.
*/
/**
* Mapping cache usage set entry.
*
* @remarks 16-bit ints was choosen as the set is not expected to be used beyond
* the dynamic ring-0 and (to some extent) raw-mode context mapping
* cache. If it's extended to include ring-3, well, then something will
* have be changed here...
*/
typedef struct PGMMAPSETENTRY
{
/** The mapping cache index. */
/** The number of references.
* The max is UINT16_MAX - 1. */
/** Pointer to the page. */
/** The physical address for this entry. */
/** Pointer to a mapping cache usage set entry. */
typedef PGMMAPSETENTRY *PPGMMAPSETENTRY;
/**
* Mapping cache usage set.
*
* This is used in ring-0 and the raw-mode context to track dynamic mappings
* done during exits / traps. The set is
*/
typedef struct PGMMAPSET
{
/** The number of occupied entries.
* This is PGMMAPSET_CLOSED if the set is closed and we're not supposed to do
* dynamic mappings. */
/** The start of the current subset.
* This is UINT32_MAX if no subset is currently open. */
/** The index of the current CPU, only valid if the set is open. */
/** The entries. */
/** HCPhys -> iEntry fast lookup table.
* Use PGMMAPSET_HASH for hashing.
* The entries may or may not be valid, check against cEntries. */
} PGMMAPSET;
/** Pointer to the mapping cache set. */
typedef PGMMAPSET *PPGMMAPSET;
/** PGMMAPSET::cEntries value for a closed set. */
/** Hash function for aiHashTable. */
/** The max fill size (strict builds). */
/** @name Context neutrual page mapper TLB.
*
* Hoping to avoid some code and bug duplication parts of the GCxxx->CCPtr
* code is writting in a kind of context neutrual way. Time will show whether
* this actually makes sense or not...
*
* context ends up using a global mapping cache on some platforms
* (darwin).
*
* @{ */
/** @typedef PPGMPAGEMAPTLB
* The page mapper TLB pointer type for the current context. */
/** @typedef PPGMPAGEMAPTLB
* The page mapper TLB entry pointer type for the current context. */
/** @typedef PPGMPAGEMAPTLB
* The page mapper TLB entry pointer pointer type for the current context. */
/** @def PGM_PAGEMAPTLB_ENTRIES
* The number of TLB entries in the page mapper TLB for the current context. */
/** @def PGM_PAGEMAPTLB_IDX
* Calculate the TLB index for a guest physical address.
* @returns The TLB index.
* @param GCPhys The guest physical address. */
/** @typedef PPGMPAGEMAP
* Pointer to a page mapper unit for current context. */
/** @typedef PPPGMPAGEMAP
* Pointer to a page mapper unit pointer for current context. */
#ifdef IN_RC
// typedef PPGMPAGEGCMAPTLB PPGMPAGEMAPTLB;
// typedef PPGMPAGEGCMAPTLBE PPGMPAGEMAPTLBE;
// typedef PPGMPAGEGCMAPTLBE *PPPGMPAGEMAPTLBE;
typedef void * PPGMPAGEMAP;
typedef void ** PPPGMPAGEMAP;
//#elif IN_RING0
// typedef PPGMPAGER0MAPTLB PPGMPAGEMAPTLB;
// typedef PPGMPAGER0MAPTLBE PPGMPAGEMAPTLBE;
// typedef PPGMPAGER0MAPTLBE *PPPGMPAGEMAPTLBE;
//# define PGM_PAGEMAPTLB_ENTRIES PGM_PAGER0MAPTLB_ENTRIES
//# define PGM_PAGEMAPTLB_IDX(GCPhys) PGM_PAGER0MAPTLB_IDX(GCPhys)
// typedef PPGMCHUNKR0MAP PPGMPAGEMAP;
// typedef PPPGMCHUNKR0MAP PPPGMPAGEMAP;
#else
typedef PPGMPAGER3MAPTLB PPGMPAGEMAPTLB;
typedef PPGMPAGER3MAPTLBE PPGMPAGEMAPTLBE;
typedef PPGMPAGER3MAPTLBE *PPPGMPAGEMAPTLBE;
typedef PPGMCHUNKR3MAP PPGMPAGEMAP;
typedef PPPGMCHUNKR3MAP PPPGMPAGEMAP;
#endif
/** @} */
/** @name PGM Pool Indexes.
* Aka. the unique shadow page identifier.
* @{ */
/** NIL page pool IDX. */
#define NIL_PGMPOOL_IDX 0
/** The first normal index. */
#define PGMPOOL_IDX_FIRST_SPECIAL 1
/** Page directory (32-bit root). */
#define PGMPOOL_IDX_PD 1
/** Page Directory Pointer Table (PAE root). */
#define PGMPOOL_IDX_PDPT 2
/** AMD64 CR3 level index.*/
#define PGMPOOL_IDX_AMD64_CR3 3
/** Nested paging root.*/
#define PGMPOOL_IDX_NESTED_ROOT 4
/** The first normal index. */
#define PGMPOOL_IDX_FIRST 5
#else
/** Page directory (32-bit root). */
#define PGMPOOL_IDX_PD 1
/** The extended PAE page directory (2048 entries, works as root currently). */
#define PGMPOOL_IDX_PAE_PD 2
/** PAE Page Directory Table 0. */
#define PGMPOOL_IDX_PAE_PD_0 3
/** PAE Page Directory Table 1. */
#define PGMPOOL_IDX_PAE_PD_1 4
/** PAE Page Directory Table 2. */
#define PGMPOOL_IDX_PAE_PD_2 5
/** PAE Page Directory Table 3. */
#define PGMPOOL_IDX_PAE_PD_3 6
/** Page Directory Pointer Table (PAE root, not currently used). */
#define PGMPOOL_IDX_PDPT 7
/** AMD64 CR3 level index.*/
#define PGMPOOL_IDX_AMD64_CR3 8
/** Nested paging root.*/
#define PGMPOOL_IDX_NESTED_ROOT 9
/** The first normal index. */
#define PGMPOOL_IDX_FIRST 10
#endif
/** The last valid index. (inclusive, 14 bits) */
#define PGMPOOL_IDX_LAST 0x3fff
/** @} */
/** The NIL index for the parent chain. */
/**
* Node in the chain linking a shadowed page to it's parent (user).
*/
#pragma pack(1)
typedef struct PGMPOOLUSER
{
/** The index to the next item in the chain. NIL_PGMPOOL_USER_INDEX is no next. */
/** The user page index. */
/** Index into the user table. */
} PGMPOOLUSER, *PPGMPOOLUSER;
typedef const PGMPOOLUSER *PCPGMPOOLUSER;
#pragma pack()
/** The NIL index for the phys ext chain. */
/**
* Node in the chain of physical cross reference extents.
*/
#pragma pack(1)
typedef struct PGMPOOLPHYSEXT
{
/** The index to the next item in the chain. NIL_PGMPOOL_PHYSEXT_INDEX is no next. */
/** The user page index. */
typedef const PGMPOOLPHYSEXT *PCPGMPOOLPHYSEXT;
#pragma pack()
/**
* The kind of page that's being shadowed.
*/
typedef enum PGMPOOLKIND
{
/** The virtual invalid 0 entry. */
PGMPOOLKIND_INVALID = 0,
/** The entry is free (=unused). */
/** Shw: 32-bit page table; Gst: no paging */
/** Shw: 32-bit page table; Gst: 32-bit page table. */
/** Shw: 32-bit page table; Gst: 4MB page. */
/** Shw: PAE page table; Gst: no paging */
/** Shw: PAE page table; Gst: 32-bit page table. */
/** Shw: PAE page table; Gst: Half of a 4MB page. */
/** Shw: PAE page table; Gst: PAE page table. */
/** Shw: PAE page table; Gst: 2MB page. */
/** Shw: 32-bit page directory. Gst: 32-bit page directory. */
/** Shw: 32-bit page directory. Gst: no paging. */
/** Shw: PAE page directory 0; Gst: 32-bit page directory. */
/** Shw: PAE page directory 1; Gst: 32-bit page directory. */
/** Shw: PAE page directory 2; Gst: 32-bit page directory. */
/** Shw: PAE page directory 3; Gst: 32-bit page directory. */
/** Shw: PAE page directory; Gst: PAE page directory. */
/** Shw: PAE page directory; Gst: no paging. */
/** Shw: PAE page directory pointer table (legacy, 4 entries); Gst 32 bits paging. */
/** Shw: PAE page directory pointer table (legacy, 4 entries); Gst PAE PDPT. */
/** Shw: PAE page directory pointer table (legacy, 4 entries); Gst: no paging. */
/** Shw: 64-bit page directory pointer table; Gst: 64-bit page directory pointer table. */
/** Shw: 64-bit page directory pointer table; Gst: no paging */
/** Shw: 64-bit page directory table; Gst: 64-bit page directory table. */
/** Shw: 64-bit page directory table; Gst: no paging */
PGMPOOLKIND_64BIT_PD_FOR_PHYS, /* 22 */
/** Shw: 64-bit PML4; Gst: 64-bit PML4. */
/** Shw: EPT page directory pointer table; Gst: no paging */
/** Shw: EPT page directory table; Gst: no paging */
/** Shw: EPT page table; Gst: no paging */
#ifndef VBOX_WITH_PGMPOOL_PAGING_ONLY
/** Shw: Root 32-bit page directory. */
/** Shw: Root PAE page directory */
/** Shw: Root PAE page directory pointer table (legacy, 4 entries). */
#endif
/** Shw: Root Nested paging table. */
/** The last valid entry. */
} PGMPOOLKIND;
/**
* The tracking data for a page in the pool.
*/
typedef struct PGMPOOLPAGE
{
/** AVL node code with the (R3) physical address of this page. */
/** Pointer to the R3 mapping of the page. */
#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE
#else
R3R0PTRTYPE(void *) pvPageR3;
#endif
/** The guest physical address. */
#endif
/** The kind of page we're shadowing. (This is really a PGMPOOLKIND enum.) */
/** The index of this page. */
/** The next entry in the list this page currently resides in.
* It's either in the free list or in the GCPhys hash. */
#ifdef PGMPOOL_WITH_USER_TRACKING
/** Head of the user chain. NIL_PGMPOOL_USER_INDEX if not currently in use. */
/** The number of present entries. */
/** The first entry in the table which is present. */
#endif
#ifdef PGMPOOL_WITH_MONITORING
/** The number of modifications to the monitored page. */
/** The next modified page. NIL_PGMPOOL_IDX if tail. */
/** The previous modified page. NIL_PGMPOOL_IDX if head. */
/** The next page sharing access handler. NIL_PGMPOOL_IDX if tail. */
/** The previous page sharing access handler. NIL_PGMPOOL_IDX if head. */
#endif
#ifdef PGMPOOL_WITH_CACHE
/** The next page in the age list. */
/** The previous page in the age list. */
#endif /* PGMPOOL_WITH_CACHE */
/** Used to indicate that the page is zeroed. */
bool fZeroed;
/** Used to indicate that a PT has non-global entries. */
bool fSeenNonGlobal;
/** Used to indicate that we're monitoring writes to the guest page. */
bool fMonitored;
/** Used to indicate that the page is in the cache (e.g. in the GCPhys hash).
* (All pages are in the age list.) */
bool fCached;
/** This is used by the R3 access handlers when invoked by an async thread.
* It's a hack required because of REMR3NotifyHandlerPhysicalDeregister. */
bool volatile fReusedFlushPending;
/** Used to indicate that the guest is mapping the page is also used as a CR3.
* In these cases the access handler acts differently and will check
* for mapping conflicts like the normal CR3 handler.
* @todo When we change the CR3 shadowing to use pool pages, this flag can be
* replaced by a list of pages which share access handler.
*/
bool fCR3Mix;
#ifdef PGMPOOL_WITH_CACHE
/** The hash table size. */
# define PGMPOOL_HASH_SIZE 0x40
/** The hash function. */
#endif
/**
* The shadow page pool instance data.
*
* It's all one big allocation made at init time, except for the
* pages that is. The user nodes follows immediatly after the
* page structures.
*/
typedef struct PGMPOOL
{
/** The VM handle - R3 Ptr. */
/** The VM handle - R0 Ptr. */
/** The VM handle - RC Ptr. */
/** The max pool size. This includes the special IDs. */
/** The current pool size. */
/** The head of the free page list. */
/* Padding. */
#ifdef PGMPOOL_WITH_USER_TRACKING
/** Head of the chain of free user nodes. */
/** The number of user nodes we've allocated. */
/** The number of present page table entries in the entire pool. */
/** Pointer to the array of user nodes - RC pointer. */
/** Pointer to the array of user nodes - R3 pointer. */
/** Pointer to the array of user nodes - R0 pointer. */
#endif /* PGMPOOL_WITH_USER_TRACKING */
#ifdef PGMPOOL_WITH_GCPHYS_TRACKING
/** Head of the chain of free phys ext nodes. */
/** The number of user nodes we've allocated. */
/** Pointer to the array of physical xref extent - RC pointer. */
/** Pointer to the array of physical xref extent nodes - R3 pointer. */
/** Pointer to the array of physical xref extent nodes - R0 pointer. */
#endif /* PGMPOOL_WITH_GCPHYS_TRACKING */
#ifdef PGMPOOL_WITH_CACHE
/** Hash table for GCPhys addresses. */
/** The head of the age list. */
/** The tail of the age list. */
/** Set if the cache is enabled. */
bool fCacheEnabled;
#endif /* PGMPOOL_WITH_CACHE */
#ifdef PGMPOOL_WITH_MONITORING
/** Head of the list of modified pages. */
/** The current number of modified pages. */
/** Access handler, RC. */
/** Access handler, R0. */
/** Access handler, R3. */
/** The access handler description (HC ptr). */
R3PTRTYPE(const char *) pszAccessHandler;
#endif /* PGMPOOL_WITH_MONITORING */
/** The number of pages currently in use. */
#ifdef VBOX_WITH_STATISTICS
/** The high wather mark for cUsedPages. */
/** Profiling pgmPoolAlloc(). */
/** Profiling pgmPoolClearAll(). */
/** Profiling pgmPoolFlushAllInt(). */
/** Profiling pgmPoolFlushPage(). */
/** Profiling pgmPoolFree(). */
/** Profiling time spent zeroing pages. */
# ifdef PGMPOOL_WITH_USER_TRACKING
/** Profiling of pgmPoolTrackDeref. */
/** Profiling pgmTrackFlushGCPhysPT. */
/** Profiling pgmTrackFlushGCPhysPTs. */
/** Profiling pgmTrackFlushGCPhysPTsSlow. */
/** Number of times we've been out of user records. */
# endif
# ifdef PGMPOOL_WITH_GCPHYS_TRACKING
/** Profiling deref activity related tracking GC physical pages. */
/** Number of linear searches for a HCPhys in the ram ranges. */
/** The number of failing pgmPoolTrackPhysExtAlloc calls. */
# endif
# ifdef PGMPOOL_WITH_MONITORING
/** Times we've failed interpreting the instruction. */
/** Times we've detected fork(). */
/** Times we've failed interpreting a patch code instruction. */
/** Times we've failed interpreting a patch code instruction during flushing. */
/** The number of times we've seen rep prefixes we can't handle. */
/** Profiling the REP STOSD cases we've handled. */
/** Profiling the R3 access handler. */
/** Times we've failed interpreting the instruction. */
/** Profiling the pgmPoolFlushPage calls made from the R3 access handler. */
/** Times we've detected fork(). */
/** Profiling the R3 access we've handled (except REP STOSD). */
/** The number of times we've seen rep prefixes we can't handle. */
/** Profiling the REP STOSD cases we've handled. */
/** The number of times we're called in an async thread an need to flush. */
/** The high wather mark for cModifiedPages. */
# endif
# ifdef PGMPOOL_WITH_CACHE
/** The number of cache hits. */
/** The number of cache misses. */
/** The number of times we've got a conflict of 'kind' in the cache. */
/** Number of times we've been out of pages. */
/** The number of cacheable allocations. */
/** The number of uncacheable allocations. */
# endif
#endif
/** The AVL tree for looking up a page by its HC physical address. */
/** Array of pages. (cMaxPages in length)
* The Id is the index into thist array.
*/
/** @def PGMPOOL_PAGE_2_PTR
* Maps a pool page pool into the current context.
*
* @returns VBox status code.
* @param pVM The VM handle.
* @param pPage The pool page.
*
* @remark In RC this uses PGMGCDynMapHCPage(), so it will consume of the
* small page window employeed by that function. Be careful.
* @remark There is no need to assert on the result.
*/
#if defined(IN_RC)
#elif defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
#elif defined(VBOX_STRICT)
{
}
#else
#endif
/** @def PGMPOOL_PAGE_2_PTR_BY_PGM
* Maps a pool page pool into the current context.
*
* @returns VBox status code.
* @param pPGM Pointer to the PGM instance data.
* @param pPage The pool page.
*
* @remark In RC this uses PGMGCDynMapHCPage(), so it will consume of the
* small page window employeed by that function. Be careful.
* @remark There is no need to assert on the result.
*/
#if defined(IN_RC)
#elif defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
#else
#endif
/**
* Trees are using self relative offsets as pointers.
* So, all its data, including the root pointer, must be in the heap for HC and GC
* to have the same layout.
*/
typedef struct PGMTREES
{
/** Physical access handlers (AVL range+offsetptr tree). */
/** Virtual access handlers (AVL range + GC ptr tree). */
/** Virtual access handlers (Phys range AVL range + offsetptr tree). */
/** Virtual access handlers for the hypervisor (AVL range + GC ptr tree). */
} PGMTREES;
/** Pointer to PGM trees. */
/** @name Paging mode macros
* @{ */
#ifdef IN_RC
# define PGM_CTX_STR(a,b) a "GC" b
#else
# ifdef IN_RING3
# define PGM_CTX_STR(a,b) a "R3" b
# else
# define PGM_CTX_STR(a,b) a "R0" b
# endif
#endif
/* Shw_Gst */
/** @} */
/**
* Data for each paging mode.
*/
typedef struct PGMMODEDATA
{
/** The guest mode type. */
/** The shadow mode type. */
/** @name Function pointers for Shadow paging.
* @{
*/
DECLR3CALLBACKMEMBER(int, pfnR3ShwGetPage,(PVM pVM, RTGCPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys));
DECLR3CALLBACKMEMBER(int, pfnR3ShwModifyPage,(PVM pVM, RTGCPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
DECLRCCALLBACKMEMBER(int, pfnRCShwGetPage,(PVM pVM, RTGCPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys));
DECLRCCALLBACKMEMBER(int, pfnRCShwModifyPage,(PVM pVM, RTGCPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
DECLR0CALLBACKMEMBER(int, pfnR0ShwGetPage,(PVM pVM, RTGCPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys));
DECLR0CALLBACKMEMBER(int, pfnR0ShwModifyPage,(PVM pVM, RTGCPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
/** @} */
/** @name Function pointers for Guest paging.
* @{
*/
DECLR3CALLBACKMEMBER(int, pfnR3GstGetPage,(PVM pVM, RTGCPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys));
DECLR3CALLBACKMEMBER(int, pfnR3GstModifyPage,(PVM pVM, RTGCPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
#ifndef VBOX_WITH_PGMPOOL_PAGING_ONLY
R3PTRTYPE(const char *) pszR3GstWriteHandlerCR3;
R3PTRTYPE(const char *) pszR3GstPAEWriteHandlerCR3;
#endif
DECLRCCALLBACKMEMBER(int, pfnRCGstGetPage,(PVM pVM, RTGCPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys));
DECLRCCALLBACKMEMBER(int, pfnRCGstModifyPage,(PVM pVM, RTGCPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
#ifndef VBOX_WITH_PGMPOOL_PAGING_ONLY
#endif
DECLR0CALLBACKMEMBER(int, pfnR0GstGetPage,(PVM pVM, RTGCPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys));
DECLR0CALLBACKMEMBER(int, pfnR0GstModifyPage,(PVM pVM, RTGCPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
#ifndef VBOX_WITH_PGMPOOL_PAGING_ONLY
#endif
/** @} */
/** @name Function pointers for Both Shadow and Guest paging.
* @{
*/
/* no pfnR3BthTrap0eHandler */
DECLR3CALLBACKMEMBER(int, pfnR3BthSyncCR3,(PVM pVM, uint64_t cr0, uint64_t cr3, uint64_t cr4, bool fGlobal));
DECLR3CALLBACKMEMBER(int, pfnR3BthSyncPage,(PVM pVM, X86PDE PdeSrc, RTGCPTR GCPtrPage, unsigned cPages, unsigned uError));
DECLR3CALLBACKMEMBER(int, pfnR3BthVerifyAccessSyncPage,(PVM pVM, RTGCPTR GCPtrPage, unsigned fFlags, unsigned uError));
#ifdef VBOX_STRICT
DECLR3CALLBACKMEMBER(unsigned, pfnR3BthAssertCR3,(PVM pVM, uint64_t cr3, uint64_t cr4, RTGCPTR GCPtr, RTGCPTR cb));
#endif
DECLRCCALLBACKMEMBER(int, pfnRCBthTrap0eHandler,(PVM pVM, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault));
DECLRCCALLBACKMEMBER(int, pfnRCBthSyncCR3,(PVM pVM, uint64_t cr0, uint64_t cr3, uint64_t cr4, bool fGlobal));
DECLRCCALLBACKMEMBER(int, pfnRCBthSyncPage,(PVM pVM, X86PDE PdeSrc, RTGCPTR GCPtrPage, unsigned cPages, unsigned uError));
DECLRCCALLBACKMEMBER(int, pfnRCBthVerifyAccessSyncPage,(PVM pVM, RTGCPTR GCPtrPage, unsigned fFlags, unsigned uError));
#ifdef VBOX_STRICT
DECLRCCALLBACKMEMBER(unsigned, pfnRCBthAssertCR3,(PVM pVM, uint64_t cr3, uint64_t cr4, RTGCPTR GCPtr, RTGCPTR cb));
#endif
DECLR0CALLBACKMEMBER(int, pfnR0BthTrap0eHandler,(PVM pVM, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault));
DECLR0CALLBACKMEMBER(int, pfnR0BthSyncCR3,(PVM pVM, uint64_t cr0, uint64_t cr3, uint64_t cr4, bool fGlobal));
DECLR0CALLBACKMEMBER(int, pfnR0BthSyncPage,(PVM pVM, X86PDE PdeSrc, RTGCPTR GCPtrPage, unsigned cPages, unsigned uError));
DECLR0CALLBACKMEMBER(int, pfnR0BthVerifyAccessSyncPage,(PVM pVM, RTGCPTR GCPtrPage, unsigned fFlags, unsigned uError));
#ifdef VBOX_STRICT
DECLR0CALLBACKMEMBER(unsigned, pfnR0BthAssertCR3,(PVM pVM, uint64_t cr3, uint64_t cr4, RTGCPTR GCPtr, RTGCPTR cb));
#endif
/** @} */
} PGMMODEDATA, *PPGMMODEDATA;
/**
* Converts a PGM pointer into a VM pointer.
* @returns Pointer to the VM structure the PGM is part of.
* @param pPGM Pointer to PGM instance data.
*/
/**
* PGM Data (part of VM)
*/
typedef struct PGM
{
/** Offset to the VM structure. */
/** Offset of the PGMCPU structure relative to VMCPU. */
/** Alignment padding. */
/*
* This will be redefined at least two more times before we're done, I'm sure.
* The current code is only to get on with the coding.
* - 2004-06-10: initial version, bird.
* - 2004-07-02: 1st time, bird.
* - 2004-10-18: 2nd time, bird.
* - 2005-07-xx: 3rd time, bird.
*/
/** Pointer to the page table entries for the dynamic page mapping area - GCPtr. */
/** Pointer to the page table entries for the dynamic page mapping area - GCPtr. */
/** The host paging mode. (This is what SUPLib reports.) */
/** The shadow paging mode. */
/** The guest paging mode. */
/** The current physical address representing in the guest CR3 register. */
/** Pointer to the 5 page CR3 content mapping.
* The first page is always the CR3 (in some form) while the 4 other pages
* are used of the PDs in PAE mode. */
#endif
/** The physical address of the currently monitored guest CR3 page.
* When this value is NIL_RTGCPHYS no page is being monitored. */
/** @name 32-bit Guest Paging.
* @{ */
/** The guest's page directory, R3 pointer. */
#ifndef VBOX_WITH_2X_4GB_ADDR_SPACE
/** The guest's page directory, R0 pointer. */
#endif
/** The guest's page directory, static RC mapping. */
/** @} */
/** @name PAE Guest Paging.
* @{ */
/** The guest's page directory pointer table, static RC mapping. */
/** The guest's page directory pointer table, R3 pointer. */
#ifndef VBOX_WITH_2X_4GB_ADDR_SPACE
/** The guest's page directory pointer table, R0 pointer. */
#endif
/** The guest's page directories, R3 pointers.
* These are individual pointers and don't have to be adjecent.
* These don't have to be up-to-date - use pgmGstGetPaePD() to access them. */
/** The guest's page directories, R0 pointers.
* Same restrictions as apGstPaePDsR3. */
#ifndef VBOX_WITH_2X_4GB_ADDR_SPACE
#endif
/** The guest's page directories, static GC mapping.
* These don't have to be up-to-date - use pgmGstGetPaePD() to access them. */
/** The physical addresses of the guest page directories (PAE) pointed to by apGstPagePDsHC/GC. */
/** The physical addresses of the monitored guest page directories (PAE). */
/** @} */
/** @name AMD64 Guest Paging.
* @{ */
/** The guest's page directory pointer table, R3 pointer. */
#ifndef VBOX_WITH_2X_4GB_ADDR_SPACE
/** The guest's page directory pointer table, R0 pointer. */
#endif
/** @} */
/** @name Shadow paging
* @{ */
/** The root page table - R3 Ptr. */
R3PTRTYPE(void *) pShwRootR3;
# ifndef VBOX_WITH_2X_4GB_ADDR_SPACE
/** The root page table - R0 Ptr. */
R0PTRTYPE(void *) pShwRootR0;
# endif
/** The root page table - RC Ptr. */
RCPTRTYPE(void *) pShwRootRC;
# if HC_ARCH_BITS == 64
# endif
/** The Physical Address (HC) of the current active shadow CR3. */
/** Pointer to the page of the current active CR3 - R3 Ptr. */
/** Pointer to the page of the current active CR3 - R0 Ptr. */
/** Pointer to the page of the current active CR3 - RC Ptr. */
/* The shadow page pool index of the user table as specified during allocation; useful for freeing root pages */
/* The index into the user table (shadowed) as specified during allocation; useful for freeing root pages. */
# if HC_ARCH_BITS == 64
# endif
/** @} */
#ifndef VBOX_WITH_PGMPOOL_PAGING_ONLY
/** @name 32-bit Shadow Paging
* @{ */
/** The 32-Bit PD - R3 Ptr. */
/** The 32-Bit PD - R0 Ptr. */
/** The 32-Bit PD - RC Ptr. */
# if HC_ARCH_BITS == 64
# endif
/** The Physical Address (HC) of the 32-Bit PD. */
/** @} */
/** @name PAE Shadow Paging
* @{ */
/** The four PDs for the low 4GB - R3 Ptr.
* Even though these are 4 pointers, what they point at is a single table.
* Thus, it's possible to walk the 2048 entries starting where apHCPaePDs[0] points. */
# ifndef VBOX_WITH_2X_4GB_ADDR_SPACE
/** The four PDs for the low 4GB - R0 Ptr.
* Same kind of mapping as apHCPaePDs. */
# endif
/** The four PDs for the low 4GB - RC Ptr.
* Same kind of mapping as apHCPaePDs. */
/** The Physical Address (HC) of the four PDs for the low 4GB.
* These are *NOT* 4 contiguous pages. */
/** The Physical Address (HC) of the PAE PDPT. */
/** The PAE PDPT - R3 Ptr. */
/** The PAE PDPT - R0 Ptr. */
/** The PAE PDPT - RC Ptr. */
/** @} */
# if HC_ARCH_BITS == 64
# endif
#endif /* !VBOX_WITH_PGMPOOL_PAGING_ONLY */
/** @name Nested Shadow Paging
* @{ */
/** Root table; format depends on the host paging mode (AMD-V) or EPT - R3 pointer. */
# ifndef VBOX_WITH_2X_4GB_ADDR_SPACE
/** Root table; format depends on the host paging mode (AMD-V) or EPT - R0 pointer. */
# endif
/** The Physical Address (HC) of the nested paging root. */
/** @} */
/** @name Function pointers for Shadow paging.
* @{
*/
DECLR3CALLBACKMEMBER(int, pfnR3ShwGetPage,(PVM pVM, RTGCPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys));
DECLR3CALLBACKMEMBER(int, pfnR3ShwModifyPage,(PVM pVM, RTGCPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
DECLRCCALLBACKMEMBER(int, pfnRCShwGetPage,(PVM pVM, RTGCPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys));
DECLRCCALLBACKMEMBER(int, pfnRCShwModifyPage,(PVM pVM, RTGCPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
DECLR0CALLBACKMEMBER(int, pfnR0ShwGetPage,(PVM pVM, RTGCPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys));
DECLR0CALLBACKMEMBER(int, pfnR0ShwModifyPage,(PVM pVM, RTGCPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
/** @} */
/** @name Function pointers for Guest paging.
* @{
*/
DECLR3CALLBACKMEMBER(int, pfnR3GstGetPage,(PVM pVM, RTGCPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys));
DECLR3CALLBACKMEMBER(int, pfnR3GstModifyPage,(PVM pVM, RTGCPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
#ifndef VBOX_WITH_PGMPOOL_PAGING_ONLY
R3PTRTYPE(const char *) pszR3GstWriteHandlerCR3;
R3PTRTYPE(const char *) pszR3GstPAEWriteHandlerCR3;
#endif
DECLRCCALLBACKMEMBER(int, pfnRCGstGetPage,(PVM pVM, RTGCPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys));
DECLRCCALLBACKMEMBER(int, pfnRCGstModifyPage,(PVM pVM, RTGCPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
#ifndef VBOX_WITH_PGMPOOL_PAGING_ONLY
#endif
#if HC_ARCH_BITS == 64
#endif
DECLR0CALLBACKMEMBER(int, pfnR0GstGetPage,(PVM pVM, RTGCPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys));
DECLR0CALLBACKMEMBER(int, pfnR0GstModifyPage,(PVM pVM, RTGCPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
#ifndef VBOX_WITH_PGMPOOL_PAGING_ONLY
#endif
/** @} */
/** @name Function pointers for Both Shadow and Guest paging.
* @{
*/
/* no pfnR3BthTrap0eHandler */
DECLR3CALLBACKMEMBER(int, pfnR3BthSyncCR3,(PVM pVM, uint64_t cr0, uint64_t cr3, uint64_t cr4, bool fGlobal));
DECLR3CALLBACKMEMBER(int, pfnR3BthSyncPage,(PVM pVM, X86PDE PdeSrc, RTGCPTR GCPtrPage, unsigned cPages, unsigned uError));
DECLR3CALLBACKMEMBER(int, pfnR3BthVerifyAccessSyncPage,(PVM pVM, RTGCPTR GCPtrPage, unsigned fFlags, unsigned uError));
DECLR3CALLBACKMEMBER(unsigned, pfnR3BthAssertCR3,(PVM pVM, uint64_t cr3, uint64_t cr4, RTGCPTR GCPtr, RTGCPTR cb));
DECLR0CALLBACKMEMBER(int, pfnR0BthTrap0eHandler,(PVM pVM, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault));
DECLR0CALLBACKMEMBER(int, pfnR0BthSyncCR3,(PVM pVM, uint64_t cr0, uint64_t cr3, uint64_t cr4, bool fGlobal));
DECLR0CALLBACKMEMBER(int, pfnR0BthSyncPage,(PVM pVM, X86PDE PdeSrc, RTGCPTR GCPtrPage, unsigned cPages, unsigned uError));
DECLR0CALLBACKMEMBER(int, pfnR0BthVerifyAccessSyncPage,(PVM pVM, RTGCPTR GCPtrPage, unsigned fFlags, unsigned uError));
DECLR0CALLBACKMEMBER(unsigned, pfnR0BthAssertCR3,(PVM pVM, uint64_t cr3, uint64_t cr4, RTGCPTR GCPtr, RTGCPTR cb));
DECLRCCALLBACKMEMBER(int, pfnRCBthTrap0eHandler,(PVM pVM, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault));
DECLRCCALLBACKMEMBER(int, pfnRCBthSyncCR3,(PVM pVM, uint64_t cr0, uint64_t cr3, uint64_t cr4, bool fGlobal));
DECLRCCALLBACKMEMBER(int, pfnRCBthSyncPage,(PVM pVM, X86PDE PdeSrc, RTGCPTR GCPtrPage, unsigned cPages, unsigned uError));
DECLRCCALLBACKMEMBER(int, pfnRCBthVerifyAccessSyncPage,(PVM pVM, RTGCPTR GCPtrPage, unsigned fFlags, unsigned uError));
DECLRCCALLBACKMEMBER(unsigned, pfnRCBthAssertCR3,(PVM pVM, uint64_t cr3, uint64_t cr4, RTGCPTR GCPtr, RTGCPTR cb));
#if HC_ARCH_BITS == 64
#endif
/** @} */
/** Pointer to SHW+GST mode data (function pointers).
* The index into this table is made up from */
/** Pointer to the list of RAM ranges (Phys GC -> Phys HC conversion) - for R3.
* This is sorted by physical address and contains no overlapping ranges. */
/** R0 pointer corresponding to PGM::pRamRangesR3. */
/** RC pointer corresponding to PGM::pRamRangesR3. */
/** The configured RAM size. */
/** Pointer to the list of ROM ranges - for R3.
* This is sorted by physical address and contains no overlapping ranges. */
/** R0 pointer corresponding to PGM::pRomRangesR3. */
/** RC pointer corresponding to PGM::pRomRangesR3. */
/** Alignment padding. */
/** Pointer to the list of MMIO2 ranges - for R3.
* Registration order. */
/** PGM offset based trees - R3 Ptr. */
/** PGM offset based trees - R0 Ptr. */
/** PGM offset based trees - RC Ptr. */
/** Linked list of GC mappings - for RC.
* The list is sorted ascending on address.
*/
/** Linked list of GC mappings - for HC.
* The list is sorted ascending on address.
*/
/** Linked list of GC mappings - for R0.
* The list is sorted ascending on address.
*/
/** Indicates that PGMR3FinalizeMappings has been called and that further
* PGMR3MapIntermediate calls will be rejected. */
bool fFinalizedMappings;
/** If set no conflict checks are required. (boolean) */
bool fMappingsFixed;
/** If set, then no mappings are put into the shadow page table. (boolean) */
bool fDisableMappings;
/** Size of fixed mapping */
/** Base address (GC) of fixed mapping */
#endif
/** @name Intermediate Context
* @{ */
/** Pointer to the intermediate page directory - Normal. */
/** Pointer to the intermedate page tables - Normal.
* There are two page tables, one for the identity mapping and one for
* the host context mapping (of the core code). */
/** Pointer to the intermedate page tables - PAE. */
/** Pointer to the intermedate page directory - PAE. */
/** Pointer to the intermedate page directory - PAE. */
/** Pointer to the intermedate page-map level 4 - AMD64. */
/** Pointer to the intermedate page directory - AMD64. */
/** The Physical Address (HC) of the intermediate Page Directory - Normal. */
/** The Physical Address (HC) of the intermediate Page Directory Pointer Table - PAE. */
/** The Physical Address (HC) of the intermediate Page Map Level 4 table - AMD64. */
/** @} */
/** Base address of the dynamic page mapping area.
* The array is MM_HYPER_DYNAMIC_SIZE bytes big.
*/
/** The index of the last entry used in the dynamic page mapping area. */
/** Cache containing the last entries in the dynamic page mapping area.
* The cache size is covering half of the mapping area. */
/** The address of the ring-0 mapping cache if we're making use of it. */
#if HC_ARCH_BITS == 32
#endif
/** 4 MB page mask; 32 or 36 bits depending on PSE-36 */
/** A20 gate mask.
* Our current approach to A20 emulation is to let REM do it and don't bother
* anywhere else. The interesting Guests will be operating with it enabled anyway.
* But whould need arrise, we'll subject physical addresses to this mask. */
/** A20 gate state - boolean! */
/** What needs syncing (PGM_SYNC_*).
* This is used to queue operations for PGMSyncCR3, PGMInvalidatePage,
* PGMFlushTLB, and PGMR3Load. */
/** PGM critical section.
* This protects the physical & virtual access handlers, ram ranges,
* and the page flag updating (some of it anyway).
*/
/** Shadow Page Pool - R3 Ptr. */
/** Shadow Page Pool - R0 Ptr. */
/** Shadow Page Pool - RC Ptr. */
/** We're not in a state which permits writes to guest memory.
* (Only used in strict builds.) */
bool fNoMorePhysWrites;
/** Flush the cache on the next access. */
bool fPhysCacheFlushPending;
/** @todo r=bird: Fix member names!*/
/** PGMPhysRead cache */
/** PGMPhysWrite cache */
/**
* Data associated with managing the ring-3 mappings of the allocation chunks.
*/
struct
{
/** The chunk tree, ordered by chunk id. */
#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE
#else
#endif
/** The chunk mapping TLB. */
/** The number of mapped chunks. */
uint32_t c;
/** The maximum number of mapped chunks.
* @cfgm PGM/MaxRing3Chunks */
/** The chunk age tree, ordered by ageing sequence number. */
/** The current time. */
/** Number of pgmR3PhysChunkFindUnmapCandidate calls left to the next ageing. */
} ChunkR3Map;
/**
* The page mapping TLB for ring-3 and (for the time being) ring-0.
*/
/** @name The zero page.
* @{ */
/** The host physical address of the zero page. */
/** The ring-3 mapping of the zero page. */
/** The ring-0 mapping of the zero page. */
/** The GC mapping of the zero page. */
#if GC_ARCH_BITS != 32
#endif
/** @}*/
/** The number of handy pages. */
/**
* Array of handy pages.
*
* This array is used in a two way communication between pgmPhysAllocPage
* and GMMR0AllocateHandyPages, with PGMR3PhysAllocateHandyPages serving as
* an intermediary.
*
* The size of this array is important, see pgmPhysEnsureHandyPage for details.
* (The current size of 32 pages, means 128 KB of handy memory.)
*/
/** @name Release Statistics
* @{ */
/** The number of times the guest has switched mode since last reset or statistics reset. */
/** The number of times we were forced to change the hypervisor region location. */
/** @} */
#ifdef VBOX_WITH_STATISTICS /** @todo move this chunk to the heap. */
/** RC: Which statistic this \#PF should be attributed to. */
/** R0: Which statistic this \#PF should be attributed to. */
/* Common */
# ifdef PGMPOOL_WITH_GCPHYS_TRACKING
STAMCOUNTER StatTrackAliased; /**< The number of times switching to cRef2, i.e. the page is being shadowed by two PTs. */
STAMCOUNTER StatTrackAliasedLots; /**< The number of times we're hitting pages which has overflowed cRef2. */
# endif
/* R3 only: */
STAMCOUNTER StatR3DetectedConflicts; /**< R3: Number of times PGMR3MapHasConflicts() detected a conflict. */
STAMPROFILE StatR3ResolveConflict; /**< R3: pgmR3SyncPTResolveConflict() profiling (includes the entire relocation). */
STAMCOUNTER StatR3GuestPDWrite; /**< R3: The total number of times pgmHCGuestPDWriteHandler() was called. */
STAMCOUNTER StatR3GuestPDWriteConflict; /**< R3: The number of times GuestPDWriteContlict() detected a conflict. */
/* R0 only: */
STAMCOUNTER StatR0DynMapGCPageInlMisses; /**< R0: Misses that falls back to code common with PGMDynMapHCPage. */
STAMCOUNTER StatR0DynMapHCPageInlMisses; /**< R0: Misses that falls back to code common with PGMDynMapHCPage. */
STAMCOUNTER StatR0DynMapPageSlowLoopMisses; /**< R0: Misses in the pgmR0DynMapPageSlow search loop. */
//STAMCOUNTER StatR0DynMapPageSlowLostHits; /**< R0: Lost hits. */
/* RC only: */
STAMCOUNTER StatRCInvlPgConflict; /**< RC: Number of times PGMInvalidatePage() detected a mapping conflict. */
STAMCOUNTER StatRCInvlPgSyncMonCR3; /**< RC: Number of times PGMInvalidatePage() ran into PGM_SYNC_MONITOR_CR3. */
/* RZ only: */
STAMPROFILE StatRZTrap0eTime2CSAM; /**< RC/R0: Profiling of the Trap0eHandler body when the cause is CSAM. */
STAMPROFILE StatRZTrap0eTime2DirtyAndAccessed; /**< RC/R0: Profiling of the Trap0eHandler body when the cause is dirty and/or accessed bit emulation. */
STAMPROFILE StatRZTrap0eTime2GuestTrap; /**< RC/R0: Profiling of the Trap0eHandler body when the cause is a guest trap. */
STAMPROFILE StatRZTrap0eTime2HndPhys; /**< RC/R0: Profiling of the Trap0eHandler body when the cause is a physical handler. */
STAMPROFILE StatRZTrap0eTime2HndVirt; /**< RC/R0: Profiling of the Trap0eHandler body when the cause is a virtual handler. */
STAMPROFILE StatRZTrap0eTime2HndUnhandled; /**< RC/R0: Profiling of the Trap0eHandler body when the cause is access outside the monitored areas of a monitored page. */
STAMPROFILE StatRZTrap0eTime2Misc; /**< RC/R0: Profiling of the Trap0eHandler body when the cause is not known. */
STAMPROFILE StatRZTrap0eTime2OutOfSync; /**< RC/R0: Profiling of the Trap0eHandler body when the cause is an out-of-sync page. */
STAMPROFILE StatRZTrap0eTime2OutOfSyncHndPhys; /**< RC/R0: Profiling of the Trap0eHandler body when the cause is an out-of-sync physical handler page. */
STAMPROFILE StatRZTrap0eTime2OutOfSyncHndVirt; /**< RC/R0: Profiling of the Trap0eHandler body when the cause is an out-of-sync virtual handler page. */
STAMPROFILE StatRZTrap0eTime2OutOfSyncHndObs; /**< RC/R0: Profiling of the Trap0eHandler body when the cause is an obsolete handler page. */
STAMPROFILE StatRZTrap0eTime2SyncPT; /**< RC/R0: Profiling of the Trap0eHandler body when the cause is lazy syncing of a PT. */
STAMCOUNTER StatRZTrap0eConflicts; /**< RC/R0: The number of times \#PF was caused by an undetected conflict. */
STAMCOUNTER StatRZTrap0eHandlersMapping; /**< RC/R0: Number of traps due to access handlers in mappings. */
STAMCOUNTER StatRZTrap0eHandlersPhysical; /**< RC/R0: Number of traps due to physical access handlers. */
STAMCOUNTER StatRZTrap0eHandlersVirtual; /**< RC/R0: Number of traps due to virtual access handlers. */
STAMCOUNTER StatRZTrap0eHandlersVirtualByPhys; /**< RC/R0: Number of traps due to virtual access handlers found by physical address. */
STAMCOUNTER StatRZTrap0eHandlersVirtualUnmarked;/**< RC/R0: Number of traps due to virtual access handlers found by virtual address (without proper physical flags). */
STAMCOUNTER StatRZTrap0eHandlersUnhandled; /**< RC/R0: Number of traps due to access outside range of monitored page(s). */
STAMCOUNTER StatRZTrap0eHandlersInvalid; /**< RC/R0: Number of traps due to access to invalid physical memory. */
STAMCOUNTER StatRZTrap0eGuestPFUnh; /**< RC/R0: Real guest #PF ending up at the end of the #PF code. */
STAMCOUNTER StatRZGuestCR3WriteHandled; /**< RC/R0: The number of times WriteHandlerCR3() was successfully called. */
STAMCOUNTER StatRZGuestCR3WriteUnhandled; /**< RC/R0: The number of times WriteHandlerCR3() was called and we had to fall back to the recompiler. */
STAMCOUNTER StatRZGuestCR3WriteConflict; /**< RC/R0: The number of times WriteHandlerCR3() was called and a conflict was detected. */
STAMCOUNTER StatRZGuestROMWriteHandled; /**< RC/R0: The number of times pgmPhysRomWriteHandler() was successfully called. */
STAMCOUNTER StatRZGuestROMWriteUnhandled; /**< RC/R0: The number of times pgmPhysRomWriteHandler() was called and we had to fall back to the recompiler */
/* HC - R3 and (maybe) R0: */
/* RZ & R3: */
STAMPROFILE StatRZSyncCR3Handlers; /**< RC/R0: Profiling of the PGMSyncCR3() update handler section. */
STAMPROFILE StatRZSyncCR3HandlerVirtualReset; /**< RC/R0: Profiling of the virtual handler resets. */
STAMPROFILE StatRZSyncCR3HandlerVirtualUpdate; /**< RC/R0: Profiling of the virtual handler updates. */
STAMCOUNTER StatRZSyncCR3DstCacheHit; /**< RC/R0: The number of times we got some kind of cache hit on a page table. */
STAMCOUNTER StatRZSyncCR3DstFreed; /**< RC/R0: The number of times we've had to free a shadow entry. */
STAMCOUNTER StatRZSyncCR3DstFreedSrcNP; /**< RC/R0: The number of times we've had to free a shadow entry for which the source entry was not present. */
STAMCOUNTER StatRZSyncCR3DstNotPresent; /**< RC/R0: The number of times we've encountered a not present shadow entry for a present guest entry. */
STAMCOUNTER StatRZSyncCR3DstSkippedGlobalPD; /**< RC/R0: The number of times a global page directory wasn't flushed. */
STAMCOUNTER StatRZSyncCR3DstSkippedGlobalPT; /**< RC/R0: The number of times a page table with only global entries wasn't flushed. */
STAMCOUNTER StatRZSyncPagePDNAs; /**< RC/R0: The number of time we've marked a PD not present from SyncPage to virtualize the accessed bit. */
STAMCOUNTER StatRZSyncPagePDOutOfSync; /**< RC/R0: The number of time we've encountered an out-of-sync PD in SyncPage. */
STAMCOUNTER StatRZAccessedPage; /**< RC/R0: The number of pages marked not present for accessed bit emulation. */
STAMPROFILE StatRZDirtyBitTracking; /**< RC/R0: Profiling the dirty bit tracking in CheckPageFault().. */
STAMCOUNTER StatRZDirtyPage; /**< RC/R0: The number of pages marked read-only for dirty bit tracking. */
STAMCOUNTER StatRZDirtyPageBig; /**< RC/R0: The number of pages marked read-only for dirty bit tracking. */
STAMCOUNTER StatRZDirtyPageTrap; /**< RC/R0: The number of traps generated for dirty bit tracking. */
STAMCOUNTER StatRZDirtyTrackRealPF; /**< RC/R0: The number of real pages faults during dirty bit tracking. */
STAMCOUNTER StatRZDirtiedPage; /**< RC/R0: The number of pages marked dirty because of write accesses. */
STAMCOUNTER StatRZPageAlreadyDirty; /**< RC/R0: The number of pages already marked dirty because of write accesses. */
STAMCOUNTER StatRZInvalidatePage4KBPages; /**< RC/R0: The number of times PGMInvalidatePage() was called for a 4KB page. */
STAMCOUNTER StatRZInvalidatePage4MBPages; /**< RC/R0: The number of times PGMInvalidatePage() was called for a 4MB page. */
STAMCOUNTER StatRZInvalidatePage4MBPagesSkip; /**< RC/R0: The number of times PGMInvalidatePage() skipped a 4MB page. */
STAMCOUNTER StatRZInvalidatePagePDMappings; /**< RC/R0: The number of times PGMInvalidatePage() was called for a page directory containing mappings (no conflict). */
STAMCOUNTER StatRZInvalidatePagePDNAs; /**< RC/R0: The number of times PGMInvalidatePage() was called for a not accessed page directory. */
STAMCOUNTER StatRZInvalidatePagePDNPs; /**< RC/R0: The number of times PGMInvalidatePage() was called for a not present page directory. */
STAMCOUNTER StatRZInvalidatePagePDOutOfSync; /**< RC/R0: The number of times PGMInvalidatePage() was called for an out of sync page directory. */
STAMCOUNTER StatRZInvalidatePageSkipped; /**< RC/R0: The number of times PGMInvalidatePage() was skipped due to not present shw or pending pending SyncCR3. */
STAMPROFILE StatRZVirtHandlerSearchByPhys; /**< RC/R0: Profiling of pgmHandlerVirtualFindByPhysAddr. */
STAMCOUNTER StatRZPhysHandlerReset; /**< RC/R0: The number of times PGMHandlerPhysicalReset is called. */
STAMCOUNTER StatRZPageOutOfSyncUser; /**< RC/R0: The number of times user page is out of sync was detected in #PF or VerifyAccessSyncPage. */
STAMCOUNTER StatRZPageOutOfSyncSupervisor; /**< RC/R0: The number of times supervisor page is out of sync was detected in in #PF or VerifyAccessSyncPage. */
STAMCOUNTER StatRZPageReplaceShared; /**< RC/R0: Times a shared page has been replaced by a private one. */
STAMCOUNTER StatRZPageReplaceZero; /**< RC/R0: Times the zero page has been replaced by a private one. */
/// @todo STAMCOUNTER StatRZPageHandyAllocs; /**< RC/R0: The number of times we've executed GMMR3AllocateHandyPages. */
STAMCOUNTER StatRZFlushTLBNewCR3; /**< RC/R0: The number of times PGMFlushTLB was called with a new CR3, non-global. (switch) */
STAMCOUNTER StatRZFlushTLBNewCR3Global; /**< RC/R0: The number of times PGMFlushTLB was called with a new CR3, global. (switch) */
STAMCOUNTER StatRZFlushTLBSameCR3; /**< RC/R0: The number of times PGMFlushTLB was called with the same CR3, non-global. (flush) */
STAMCOUNTER StatRZFlushTLBSameCR3Global; /**< RC/R0: The number of times PGMFlushTLB was called with the same CR3, global. (flush) */
STAMPROFILE StatR3SyncCR3Handlers; /**< R3: Profiling of the PGMSyncCR3() update handler section. */
STAMPROFILE StatR3SyncCR3HandlerVirtualUpdate; /**< R3: Profiling of the virtual handler updates. */
STAMCOUNTER StatR3SyncCR3DstFreed; /**< R3: The number of times we've had to free a shadow entry. */
STAMCOUNTER StatR3SyncCR3DstFreedSrcNP; /**< R3: The number of times we've had to free a shadow entry for which the source entry was not present. */
STAMCOUNTER StatR3SyncCR3DstNotPresent; /**< R3: The number of times we've encountered a not present shadow entry for a present guest entry. */
STAMCOUNTER StatR3SyncCR3DstSkippedGlobalPD; /**< R3: The number of times a global page directory wasn't flushed. */
STAMCOUNTER StatR3SyncCR3DstSkippedGlobalPT; /**< R3: The number of times a page table with only global entries wasn't flushed. */
STAMCOUNTER StatR3SyncCR3DstCacheHit; /**< R3: The number of times we got some kind of cache hit on a page table. */
STAMCOUNTER StatR3SyncPagePDNAs; /**< R3: The number of time we've marked a PD not present from SyncPage to virtualize the accessed bit. */
STAMCOUNTER StatR3SyncPagePDOutOfSync; /**< R3: The number of time we've encountered an out-of-sync PD in SyncPage. */
STAMCOUNTER StatR3AccessedPage; /**< R3: The number of pages marked not present for accessed bit emulation. */
STAMPROFILE StatR3DirtyBitTracking; /**< R3: Profiling the dirty bit tracking in CheckPageFault(). */
STAMCOUNTER StatR3DirtyPage; /**< R3: The number of pages marked read-only for dirty bit tracking. */
STAMCOUNTER StatR3DirtyPageBig; /**< R3: The number of pages marked read-only for dirty bit tracking. */
STAMCOUNTER StatR3DirtyTrackRealPF; /**< R3: The number of real pages faults during dirty bit tracking. */
STAMCOUNTER StatR3DirtiedPage; /**< R3: The number of pages marked dirty because of write accesses. */
STAMCOUNTER StatR3PageAlreadyDirty; /**< R3: The number of pages already marked dirty because of write accesses. */
STAMCOUNTER StatR3InvalidatePage4KBPages; /**< R3: The number of times PGMInvalidatePage() was called for a 4KB page. */
STAMCOUNTER StatR3InvalidatePage4MBPages; /**< R3: The number of times PGMInvalidatePage() was called for a 4MB page. */
STAMCOUNTER StatR3InvalidatePage4MBPagesSkip; /**< R3: The number of times PGMInvalidatePage() skipped a 4MB page. */
STAMCOUNTER StatR3InvalidatePagePDNAs; /**< R3: The number of times PGMInvalidatePage() was called for a not accessed page directory. */
STAMCOUNTER StatR3InvalidatePagePDNPs; /**< R3: The number of times PGMInvalidatePage() was called for a not present page directory. */
STAMCOUNTER StatR3InvalidatePagePDMappings; /**< R3: The number of times PGMInvalidatePage() was called for a page directory containing mappings (no conflict). */
STAMCOUNTER StatR3InvalidatePagePDOutOfSync; /**< R3: The number of times PGMInvalidatePage() was called for an out of sync page directory. */
STAMCOUNTER StatR3InvalidatePageSkipped; /**< R3: The number of times PGMInvalidatePage() was skipped due to not present shw or pending pending SyncCR3. */
STAMPROFILE StatR3VirtHandlerSearchByPhys; /**< R3: Profiling of pgmHandlerVirtualFindByPhysAddr. */
STAMCOUNTER StatR3PhysHandlerReset; /**< R3: The number of times PGMHandlerPhysicalReset is called. */
STAMCOUNTER StatR3PageOutOfSyncUser; /**< R3: The number of times user page is out of sync was detected in #PF or VerifyAccessSyncPage. */
STAMCOUNTER StatR3PageOutOfSyncSupervisor; /**< R3: The number of times supervisor page is out of sync was detected in in #PF or VerifyAccessSyncPage. */
STAMCOUNTER StatR3PageReplaceShared; /**< R3: Times a shared page has been replaced by a private one. */
STAMCOUNTER StatR3PageReplaceZero; /**< R3: Times the zero page has been replaced by a private one. */
/// @todo STAMCOUNTER StatR3PageHandyAllocs; /**< R3: The number of times we've executed GMMR3AllocateHandyPages. */
STAMCOUNTER StatR3FlushTLBNewCR3; /**< R3: The number of times PGMFlushTLB was called with a new CR3, non-global. (switch) */
STAMCOUNTER StatR3FlushTLBNewCR3Global; /**< R3: The number of times PGMFlushTLB was called with a new CR3, global. (switch) */
STAMCOUNTER StatR3FlushTLBSameCR3; /**< R3: The number of times PGMFlushTLB was called with the same CR3, non-global. (flush) */
STAMCOUNTER StatR3FlushTLBSameCR3Global; /**< R3: The number of times PGMFlushTLB was called with the same CR3, global. (flush) */
#endif /* VBOX_WITH_STATISTICS */
} PGM;
/** Pointer to the PGM instance data. */
/**
* PGMCPU Data (part of VMCPU).
*/
typedef struct PGMCPU
{
/** Offset to the VMCPU structure. */
/** Automatically tracked physical memory mapping set.
* Ring-0 and strict raw-mode builds. */
} PGMCPU;
/** Pointer to the per-cpu PGM data. */
/** @name PGM::fSyncFlags Flags
* @{
*/
/** Updates the virtual access handler state bit in PGMPAGE. */
#define PGM_SYNC_UPDATE_PAGE_BIT_VIRTUAL RT_BIT(0)
/** Always sync CR3. */
/** Check monitoring on next CR3 (re)load and invalidate page. */
/** Check guest mapping in SyncCR3. */
/** Clear the page pool (a light weight flush). */
/** @} */
VMMRCDECL(int) pgmGCGuestPDWriteHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, void *pvFault, RTGCPHYS GCPhysFault, void *pvUser);
VMMDECL(int) pgmPhysRomWriteHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, void *pvFault, RTGCPHYS GCPhysFault, void *pvUser);
int pgmR3SyncPTResolveConflict(PVM pVM, PPGMMAPPING pMapping, PX86PD pPDSrc, RTGCPTR GCPtrOldMapping);
void pgmR3MapRelocate(PVM pVM, PPGMMAPPING pMapping, RTGCPTR GCPtrOldMapping, RTGCPTR GCPtrNewMapping);
int pgmHandlerVirtualFindByPhysAddr(PVM pVM, RTGCPHYS GCPhys, PPGMVIRTHANDLER *ppVirt, unsigned *piPage);
#if defined(VBOX_STRICT) || defined(LOG_ENABLED)
#else
# define pgmHandlerVirtualDumpPhysPages(a) do { } while (0)
#endif
#ifdef IN_RING3
# ifndef VBOX_WITH_NEW_PHYS_CODE
# endif
#endif /* IN_RING3 */
#endif
#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
#endif
int pgmPoolAlloc(PVM pVM, RTGCPHYS GCPhys, PGMPOOLKIND enmKind, uint16_t iUser, uint32_t iUserTable, PPPGMPOOLPAGE ppPage);
#ifdef PGMPOOL_WITH_MONITORING
# ifdef IN_RING3
void pgmPoolMonitorChainChanging(PPGMPOOL pPool, PPGMPOOLPAGE pPage, RTGCPHYS GCPhysFault, RTHCPTR pvAddress, PDISCPUSTATE pCpu);
# else
void pgmPoolMonitorChainChanging(PPGMPOOL pPool, PPGMPOOLPAGE pPage, RTGCPHYS GCPhysFault, RTGCPTR pvAddress, PDISCPUSTATE pCpu);
# endif
# ifdef VBOX_WITH_PGMPOOL_PAGING_ONLY
# else
# endif
#endif
#endif
#ifndef IN_RC
int pgmShwSyncLongModePDPtr(PVM pVM, RTGCPTR64 GCPtr, PX86PML4E pGstPml4e, PX86PDPE pGstPdpe, PX86PDPAE *ppPD);
#endif
/**
* Gets the PGMRAMRANGE structure for a guest page.
*
* @returns Pointer to the RAM range on success.
* @returns NULL on a VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS condition.
*
* @param pPGM PGM handle.
* @param GCPhys The GC physical address.
*/
{
/*
* Optimize for the first range.
*/
{
do
{
if (RT_UNLIKELY(!pRam))
break;
}
return pRam;
}
/**
* Gets the PGMPAGE structure for a guest page.
*
* @returns Pointer to the page on success.
* @returns NULL on a VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS condition.
*
* @param pPGM PGM handle.
* @param GCPhys The GC physical address.
*/
{
/*
* Optimize for the first range.
*/
{
do
{
if (RT_UNLIKELY(!pRam))
return NULL;
}
}
/**
* Gets the PGMPAGE structure for a guest page.
*
* Old Phys code: Will make sure the page is present.
*
* @returns VBox status code.
* @retval VINF_SUCCESS and a valid *ppPage on success.
* @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if the address isn't valid.
*
* @param pPGM PGM handle.
* @param GCPhys The GC physical address.
* @param ppPage Where to store the page poitner on success.
*/
{
/*
* Optimize for the first range.
*/
{
do
{
if (RT_UNLIKELY(!pRam))
{
}
}
#ifndef VBOX_WITH_NEW_PHYS_CODE
/*
* Make sure it's present.
*/
{
#ifdef IN_RING3
#else
#endif
if (RT_FAILURE(rc))
{
return rc;
}
}
#endif
return VINF_SUCCESS;
}
/**
* Gets the PGMPAGE structure for a guest page.
*
* Old Phys code: Will make sure the page is present.
*
* @returns VBox status code.
* @retval VINF_SUCCESS and a valid *ppPage on success.
* @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if the address isn't valid.
*
* @param pPGM PGM handle.
* @param GCPhys The GC physical address.
* @param ppPage Where to store the page poitner on success.
* @param ppRamHint Where to read and store the ram list hint.
* The caller initializes this to NULL before the call.
*/
DECLINLINE(int) pgmPhysGetPageWithHintEx(PPGM pPGM, RTGCPHYS GCPhys, PPPGMPAGE ppPage, PPGMRAMRANGE *ppRamHint)
{
if ( !pRam
{
{
do
{
if (RT_UNLIKELY(!pRam))
{
}
}
}
#ifndef VBOX_WITH_NEW_PHYS_CODE
/*
* Make sure it's present.
*/
{
#ifdef IN_RING3
#else
#endif
if (RT_FAILURE(rc))
{
return rc;
}
}
#endif
return VINF_SUCCESS;
}
/**
* Gets the PGMPAGE structure for a guest page together with the PGMRAMRANGE.
*
* @returns Pointer to the page on success.
* @returns NULL on a VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS condition.
*
* @param pPGM PGM handle.
* @param GCPhys The GC physical address.
* @param ppRam Where to store the pointer to the PGMRAMRANGE.
*/
{
/*
* Optimize for the first range.
*/
{
do
{
if (RT_UNLIKELY(!pRam))
return NULL;
}
}
/**
* Gets the PGMPAGE structure for a guest page together with the PGMRAMRANGE.
*
* @returns Pointer to the page on success.
* @returns NULL on a VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS condition.
*
* @param pPGM PGM handle.
* @param GCPhys The GC physical address.
* @param ppPage Where to store the pointer to the PGMPAGE structure.
* @param ppRam Where to store the pointer to the PGMRAMRANGE structure.
*/
DECLINLINE(int) pgmPhysGetPageAndRangeEx(PPGM pPGM, RTGCPHYS GCPhys, PPPGMPAGE ppPage, PPGMRAMRANGE *ppRam)
{
/*
* Optimize for the first range.
*/
{
do
{
if (RT_UNLIKELY(!pRam))
{
}
}
#ifndef VBOX_WITH_NEW_PHYS_CODE
/*
* Make sure it's present.
*/
{
#ifdef IN_RING3
#else
#endif
if (RT_FAILURE(rc))
{
return rc;
}
}
#endif
return VINF_SUCCESS;
}
/**
* Convert GC Phys to HC Phys.
*
* @returns VBox status.
* @param pPGM PGM handle.
* @param GCPhys The GC physical address.
* @param pHCPhys Where to store the corresponding HC physical address.
*
* @deprecated Doesn't deal with zero, shared or write monitored pages.
* Avoid when writing new code!
*/
{
if (RT_FAILURE(rc))
return rc;
return VINF_SUCCESS;
}
/**
* Inlined version of the ring-0 version of PGMDynMapHCPage that
* optimizes access to pages already in the set.
*
* @returns VINF_SUCCESS. Will bail out to ring-3 on failure.
* @param pPGM Pointer to the PVM instance data.
* @param HCPhys The physical address of the page.
* @param ppv Where to store the mapping address.
*/
{
PPGMMAPSET pSet = &((PPGMCPU)((uint8_t *)VMMGetCpu(PGM2VM(pPGM)) + pPGM->offVCpu))->AutoSet; /* very pretty ;-) */
{
}
else
{
}
return VINF_SUCCESS;
}
/**
* Inlined version of the ring-0 version of PGMDynMapGCPage that optimizes
* access to pages already in the set.
*
* @returns See PGMDynMapGCPage.
* @param pPGM Pointer to the PVM instance data.
* @param HCPhys The physical address of the page.
* @param ppv Where to store the mapping address.
*/
{
/*
* Get the ram range.
*/
/** @todo || page state stuff */))
{
/* This case is not counted into StatR0DynMapGCPageInl. */
}
/*
* pgmR0DynMapHCPageInlined with out stats.
*/
PPGMMAPSET pSet = &((PPGMCPU)((uint8_t *)VMMGetCpu(PGM2VM(pPGM)) + pPGM->offVCpu))->AutoSet; /* very pretty ;-) */
{
}
else
{
}
return VINF_SUCCESS;
}
#endif /* VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0 */
#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
/**
* Maps the page into current context (RC and maybe R0).
*
* @returns pointer to the mapping.
* @param pVM Pointer to the PGM instance data.
* @param pPage The page.
*/
{
{
void *pv;
# else
# endif
return pv;
}
}
/**
* Temporarily maps one host page specified by HC physical address, returning
* pointer within the page.
*
* Be WARNED that the dynamic page mapping area is small, 8 pages, thus the space is
* reused after 8 mappings (or perhaps a few more if you score with the cache).
*
* @returns The address corresponding to HCPhys.
* @param pPGM Pointer to the PVM instance data.
* @param HCPhys HC Physical address of the page.
*/
{
void *pv;
# else
# endif
return pv;
}
#endif /* VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0 || IN_RC */
#ifndef IN_RC
/**
* Queries the Physical TLB entry for a physical guest page,
* attemting to load the TLB entry if necessary.
*
* @returns VBox status code.
* @retval VINF_SUCCESS on success
* @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
* @param pPGM The PGM instance handle.
* @param GCPhys The address of the guest page.
* @param ppTlbe Where to store the pointer to the TLB entry.
*/
{
int rc;
{
rc = VINF_SUCCESS;
}
else
return rc;
}
#endif /* !IN_RC */
#if !defined(IN_RC) && !defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
# ifndef VBOX_WITH_NEW_PHYS_CODE
/**
* Convert GC Phys to HC Virt.
*
* @returns VBox status.
* @param pPGM PGM handle.
* @param GCPhys The GC physical address.
* @param pHCPtr Where to store the corresponding HC virtual address.
*
* @deprecated This will be eliminated by PGMPhysGCPhys2CCPtr. Only user is
* pgmPoolMonitorGCPtr2CCPtr.
*/
{
if (RT_FAILURE(rc))
{
*pHCPtr = 0; /* Shut up silly GCC warnings. */
return rc;
}
{
return VINF_SUCCESS;
}
{
return VINF_SUCCESS;
}
*pHCPtr = 0; /* Shut up silly GCC warnings. */
}
# endif /* !VBOX_WITH_NEW_PHYS_CODE */
#endif /* !IN_RC && !defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0) */
/**
* Convert GC Phys to HC Virt and HC Phys.
*
* @returns VBox status.
* @param pPGM PGM handle.
* @param GCPhys The GC physical address.
* @param pHCPtr Where to store the corresponding HC virtual address.
* @param pHCPhys Where to store the HC Physical address and its flags.
*
* @deprecated Will go away or be changed. Only user is MapCR3. MapCR3 will have to do ring-3
* and ring-0 locking of the CR3 in a lazy fashion I'm fear... or perhaps not. we'll see.
*/
DECLINLINE(int) pgmRamGCPhys2HCPtrAndHCPhysWithFlags(PPGM pPGM, RTGCPHYS GCPhys, PRTHCPTR pHCPtr, PRTHCPHYS pHCPhys)
{
if (RT_FAILURE(rc))
{
*pHCPtr = 0; /* Shut up crappy GCC warnings */
*pHCPhys = 0; /* ditto */
return rc;
}
{
#else
#endif
return VINF_SUCCESS;
}
{
return VINF_SUCCESS;
}
*pHCPtr = 0;
}
/**
* Clears flags associated with a RAM address.
*
* @returns VBox status code.
* @param pPGM PGM handle.
* @param GCPhys Guest context physical address.
* @param fFlags fFlags to clear. (Bits 0-11.)
*/
{
if (RT_FAILURE(rc))
return rc;
return VINF_SUCCESS;
}
/**
* Clears flags associated with a RAM address.
*
* @returns VBox status code.
* @param pPGM PGM handle.
* @param GCPhys Guest context physical address.
* @param fFlags fFlags to clear. (Bits 0-11.)
* @param ppRamHint Where to read and store the ram list hint.
* The caller initializes this to NULL before the call.
*/
DECLINLINE(int) pgmRamFlagsClearByGCPhysWithHint(PPGM pPGM, RTGCPHYS GCPhys, unsigned fFlags, PPGMRAMRANGE *ppRamHint)
{
if (RT_FAILURE(rc))
return rc;
return VINF_SUCCESS;
}
/**
* Sets (bitwise OR) flags associated with a RAM address.
*
* @returns VBox status code.
* @param pPGM PGM handle.
* @param GCPhys Guest context physical address.
* @param fFlags fFlags to set clear. (Bits 0-11.)
*/
{
if (RT_FAILURE(rc))
return rc;
return VINF_SUCCESS;
}
/**
* Sets (bitwise OR) flags associated with a RAM address.
*
* @returns VBox status code.
* @param pPGM PGM handle.
* @param GCPhys Guest context physical address.
* @param fFlags fFlags to set clear. (Bits 0-11.)
* @param ppRamHint Where to read and store the ram list hint.
* The caller initializes this to NULL before the call.
*/
DECLINLINE(int) pgmRamFlagsSetByGCPhysWithHint(PPGM pPGM, RTGCPHYS GCPhys, unsigned fFlags, PPGMRAMRANGE *ppRamHint)
{
if (RT_FAILURE(rc))
return rc;
return VINF_SUCCESS;
}
/**
* Calculated the guest physical address of the large (4 MB) page in 32 bits paging mode.
* Takes PSE-36 into account.
*
* @returns guest physical address
* @param pPGM Pointer to the PGM instance data.
* @param Pde Guest Pde
*/
{
}
/**
* Gets the page directory entry for the specified address (32-bit paging).
*
* @returns The page directory entry in question.
* @param pPGM Pointer to the PGM instance data.
* @param GCPtr The address.
*/
{
if (RT_FAILURE(rc))
{
}
#else
#endif
}
/**
* Gets the address of a specific page directory entry (32-bit paging).
*
* @returns Pointer the page directory entry in question.
* @param pPGM Pointer to the PGM instance data.
* @param GCPtr The address.
*/
{
AssertRCReturn(rc, 0);
#else
#endif
}
/**
* Gets the address the guest page directory (32-bit paging).
*
* @returns Pointer the page directory entry in question.
* @param pPGM Pointer to the PGM instance data.
*/
{
AssertRCReturn(rc, 0);
return pGuestPD;
#else
#endif
}
/**
* Gets the guest page directory pointer table.
*
* @returns Pointer to the page directory in question.
* @returns NULL if the page directory is not present or on an invalid page.
* @param pPGM Pointer to the PGM instance data.
*/
{
PX86PDPT pGuestPDPT = 0;
AssertRCReturn(rc, 0);
return pGuestPDPT;
#else
#endif
}
/**
* Gets the guest page directory pointer table entry for the specified address.
*
* @returns Pointer to the page directory in question.
* @returns NULL if the page directory is not present or on an invalid page.
* @param pPGM Pointer to the PGM instance data.
* @param GCPtr The address.
*/
{
PX86PDPT pGuestPDPT = 0;
AssertRCReturn(rc, 0);
#else
#endif
}
/**
* Gets the page directory for the specified address.
*
* @returns Pointer to the page directory in question.
* @returns NULL if the page directory is not present or on an invalid page.
* @param pPGM Pointer to the PGM instance data.
* @param GCPtr The address.
*/
{
AssertReturn(pGuestPDPT, 0);
#else
#endif
{
#endif
/* cache is out-of-sync. */
if (RT_SUCCESS(rc))
return pPD;
/* returning NULL is ok if we assume it's just an invalid page of some kind emulated as all 0s. (not quite true) */
}
return NULL;
}
/**
* Gets the page directory entry for the specified address.
*
* @returns Pointer to the page directory entry in question.
* @returns NULL if the page directory is not present or on an invalid page.
* @param pPGM Pointer to the PGM instance data.
* @param GCPtr The address.
*/
{
AssertReturn(pGuestPDPT, 0);
#else
#endif
{
#endif
/* The cache is out-of-sync. */
if (RT_SUCCESS(rc))
/* returning NIL_RTGCPHYS is ok if we assume it's just an invalid page or something which we'll emulate as all 0s. (not quite true) */
}
return NULL;
}
/**
* Gets the page directory entry for the specified address.
*
* @returns The page directory entry in question.
* @returns A non-present entry if the page directory is not present or on an invalid page.
* @param pPGM Pointer to the PGM instance data.
* @param GCPtr The address.
*/
{
if (RT_LIKELY(pGuestPDPT))
#else
#endif
{
{
#endif
/* cache is out-of-sync. */
if (RT_SUCCESS(rc))
}
}
return ZeroPde;
}
/**
* Gets the page directory pointer table entry for the specified address
* and returns the index into the page directory
*
* @returns Pointer to the page directory in question.
* @returns NULL if the page directory is not present or on an invalid page.
* @param pPGM Pointer to the PGM instance data.
* @param GCPtr The address.
* @param piPD Receives the index into the returned page directory
* @param pPdpe Receives the page directory pointer entry. Optional.
*/
{
AssertReturn(pGuestPDPT, 0);
#else
#endif
if (pPdpe)
{
{
}
#endif
/* cache is out-of-sync. */
if (RT_SUCCESS(rc))
{
return pPD;
}
/* returning NIL_RTGCPHYS is ok if we assume it's just an invalid page of some kind emulated as all 0s. */
}
return NULL;
}
#ifndef IN_RC
/**
* Gets the page map level-4 pointer for the guest.
*
* @returns Pointer to the PML4 page.
* @param pPGM Pointer to the PGM instance data.
*/
{
return pGuestPml4;
#else
#endif
}
/**
* Gets the pointer to a page map level-4 entry.
*
* @returns Pointer to the PML4 entry.
* @param pPGM Pointer to the PGM instance data.
* @param iPml4 The index.
*/
{
return &pGuestPml4->a[iPml4];
#else
#endif
}
/**
* Gets a page map level-4 entry.
*
* @returns The PML4 entry.
* @param pPGM Pointer to the PGM instance data.
* @param iPml4 The index.
*/
{
if (RT_FAILURE(rc))
{
}
return pGuestPml4->a[iPml4];
#else
#endif
}
/**
* Gets the page directory pointer entry for the specified address.
*
* @returns Pointer to the page directory pointer entry in question.
* @returns NULL if the page directory is not present or on an invalid page.
* @param pPGM Pointer to the PGM instance data.
* @param GCPtr The address.
* @param ppPml4e Page Map Level-4 Entry (out)
*/
{
{
}
return NULL;
}
/**
* Gets the page directory entry for the specified address.
*
* @returns The page directory entry in question.
* @returns A non-present entry if the page directory is not present or on an invalid page.
* @param pPGM Pointer to the PGM instance data.
* @param GCPtr The address.
* @param ppPml4e Page Map Level-4 Entry (out)
* @param pPdpe Page directory pointer table entry (out)
*/
DECLINLINE(X86PDEPAE) pgmGstGetLongModePDEEx(PPGM pPGM, RTGCPTR64 GCPtr, PX86PML4E *ppPml4e, PX86PDPE pPdpe)
{
{
{
}
}
return ZeroPde;
}
/**
* Gets the page directory entry for the specified address.
*
* @returns The page directory entry in question.
* @returns A non-present entry if the page directory is not present or on an invalid page.
* @param pPGM Pointer to the PGM instance data.
* @param GCPtr The address.
*/
{
{
{
}
}
return ZeroPde;
}
/**
* Gets the page directory entry for the specified address.
*
* @returns Pointer to the page directory entry in question.
* @returns NULL if the page directory is not present or on an invalid page.
* @param pPGM Pointer to the PGM instance data.
* @param GCPtr The address.
*/
{
{
{
}
}
return NULL;
}
/**
* Gets the GUEST page directory pointer for the specified address.
*
* @returns The page directory in question.
* @returns NULL if the page directory is not present or on an invalid page.
* @param pPGM Pointer to the PGM instance data.
* @param GCPtr The address.
* @param ppPml4e Page Map Level-4 Entry (out)
* @param pPdpe Page directory pointer table entry (out)
* @param piPD Receives the index into the returned page directory
*/
DECLINLINE(PX86PDPAE) pgmGstGetLongModePDPtr(PPGM pPGM, RTGCPTR64 GCPtr, PX86PML4E *ppPml4e, PX86PDPE pPdpe, unsigned *piPD)
{
{
{
return pPD;
}
}
return 0;
}
#endif /* !IN_RC */
/**
* Gets the shadow page directory, 32-bit.
*
* @returns Pointer to the shadow 32-bit PD.
* @param pPGM Pointer to the PGM instance data.
*/
{
#else
return pShwPd;
# else
# endif
#endif
}
/**
* Gets the shadow page directory entry for the specified address, 32-bit.
*
* @returns Shadow 32-bit PDE.
* @param pPGM Pointer to the PGM instance data.
* @param GCPtr The address.
*/
{
if (!pShwPde)
{
return ZeroPde;
}
}
/**
* Gets the pointer to the shadow page directory entry for the specified
* address, 32-bit.
*
* @returns Pointer to the shadow 32-bit PDE.
* @param pPGM Pointer to the PGM instance data.
* @param GCPtr The address.
*/
{
}
/**
* Gets the shadow page pointer table, PAE.
*
* @returns Pointer to the shadow PAE PDPT.
* @param pPGM Pointer to the PGM instance data.
*/
{
#else
AssertRCReturn(rc, 0);
return pShwPdpt;
# else
# endif
#endif
}
/**
* Gets the shadow page directory for the specified address, PAE.
*
* @returns Pointer to the shadow PD.
* @param pPGM Pointer to the PGM instance data.
* @param GCPtr The address.
*/
{
return NULL;
/* Fetch the pgm pool shadow descriptor. */
#else
AssertRCReturn(rc, 0);
return pPD;
# else
return pPD;
# endif
#endif
}
/**
* Gets the shadow page directory for the specified address, PAE.
*
* @returns Pointer to the shadow PD.
* @param pPGM Pointer to the PGM instance data.
* @param GCPtr The address.
*/
{
return NULL;
/* Fetch the pgm pool shadow descriptor. */
#else
AssertFailed();
return NULL;
#endif
}
/**
* Gets the shadow page directory entry, PAE.
*
* @returns PDE.
* @param pPGM Pointer to the PGM instance data.
* @param GCPtr The address.
*/
{
if (!pShwPde)
{
return ZeroPde;
}
}
/**
* Gets the pointer to the shadow page directory entry for an address, PAE.
*
* @returns Pointer to the PDE.
* @param pPGM Pointer to the PGM instance data.
* @param GCPtr The address.
*/
{
}
#ifndef IN_RC
/**
* Gets the shadow page map level-4 pointer.
*
* @returns Pointer to the shadow PML4.
* @param pPGM Pointer to the PGM instance data.
*/
{
#else
AssertRCReturn(rc, 0);
return pShwPml4;
# else
# endif
#endif
}
/**
* Gets the shadow page map level-4 entry for the specified address.
*
* @returns The entry.
* @param pPGM Pointer to the PGM instance data.
* @param GCPtr The address.
*/
{
if (!pShwPml4)
{
return ZeroPml4e;
}
}
/**
* Gets the pointer to the specified shadow page map level-4 entry.
*
* @returns The entry.
* @param pPGM Pointer to the PGM instance data.
* @param iPml4 The PML4 index.
*/
{
if (!pShwPml4)
return NULL;
}
/**
* Gets the GUEST page directory pointer for the specified address.
*
* @returns The page directory in question.
* @returns NULL if the page directory is not present or on an invalid page.
* @param pPGM Pointer to the PGM instance data.
* @param GCPtr The address.
* @param piPD Receives the index into the returned page directory
*/
{
{
{
return pPD;
}
}
return NULL;
}
#endif /* !IN_RC */
/**
* Checks if any of the specified page flags are set for the given page.
*
* @returns true if any of the flags are set.
* @returns false if all the flags are clear.
* @param pPGM PGM handle.
* @param GCPhys The GC physical address.
* @param fFlags The flags to check for.
*/
{
return pPage
}
/**
* Gets the page state for a physical handler.
*
* @returns The physical handler page state.
* @param pCur The physical handler in question.
*/
{
{
return PGM_PAGE_HNDL_PHYS_STATE_WRITE;
case PGMPHYSHANDLERTYPE_MMIO:
return PGM_PAGE_HNDL_PHYS_STATE_ALL;
default:
}
}
/**
* Gets the page state for a virtual handler.
*
* @returns The virtual handler page state.
* @param pCur The virtual handler in question.
* @remarks This should never be used on a hypervisor access handler.
*/
{
{
case PGMVIRTHANDLERTYPE_WRITE:
return PGM_PAGE_HNDL_VIRT_STATE_WRITE;
case PGMVIRTHANDLERTYPE_ALL:
return PGM_PAGE_HNDL_VIRT_STATE_ALL;
default:
}
}
/**
* Clears one physical page of a virtual handler
*
* @param pPGM Pointer to the PGM instance.
* @param pCur Virtual handler structure
* @param iPage Physical page index
*
* @remark Only used when PGM_SYNC_UPDATE_PAGE_BIT_VIRTUAL is being set, so no
* need to care about other handlers in the same page.
*/
{
/*
* Remove the node from the tree (it's supposed to be in the tree if we get here!).
*/
("pPhys2Virt=%p:{.Core.Key=%RGp, .Core.KeyLast=%RGp, .offVirtHandler=%#RX32, .offNextAlias=%#RX32}\n",
pPhys2Virt, pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offVirtHandler, pPhys2Virt->offNextAlias));
#endif
{
/* We're the head of the alias chain. */
PPGMPHYS2VIRTHANDLER pRemove = (PPGMPHYS2VIRTHANDLER)RTAvlroGCPhysRemove(&pPGM->CTX_SUFF(pTrees)->PhysToVirtHandlers, pPhys2Virt->Core.Key); NOREF(pRemove);
("pPhys2Virt=%p:{.Core.Key=%RGp, .Core.KeyLast=%RGp, .offVirtHandler=%#RX32, .offNextAlias=%#RX32}\n",
pPhys2Virt, pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offVirtHandler, pPhys2Virt->offNextAlias));
("wanted: pPhys2Virt=%p:{.Core.Key=%RGp, .Core.KeyLast=%RGp, .offVirtHandler=%#RX32, .offNextAlias=%#RX32}\n"
" got: pRemove=%p:{.Core.Key=%RGp, .Core.KeyLast=%RGp, .offVirtHandler=%#RX32, .offNextAlias=%#RX32}\n",
pPhys2Virt, pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offVirtHandler, pPhys2Virt->offNextAlias,
pRemove, pRemove->Core.Key, pRemove->Core.KeyLast, pRemove->offVirtHandler, pRemove->offNextAlias));
#endif
{
/* Insert the next list in the alias chain into the tree. */
PPGMPHYS2VIRTHANDLER pNext = (PPGMPHYS2VIRTHANDLER)((intptr_t)pPhys2Virt + (pPhys2Virt->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK));
("pNext=%p:{.Core.Key=%RGp, .Core.KeyLast=%RGp, .offVirtHandler=%#RX32, .offNextAlias=%#RX32}\n",
#endif
}
}
else
{
/* Locate the previous node in the alias chain. */
PPGMPHYS2VIRTHANDLER pPrev = (PPGMPHYS2VIRTHANDLER)RTAvlroGCPhysGet(&pPGM->CTX_SUFF(pTrees)->PhysToVirtHandlers, pPhys2Virt->Core.Key);
("pPhys2Virt=%p:{.Core.Key=%RGp, .Core.KeyLast=%RGp, .offVirtHandler=%#RX32, .offNextAlias=%#RX32} pPrev=%p\n",
pPhys2Virt, pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offVirtHandler, pPhys2Virt->offNextAlias, pPrev));
#endif
for (;;)
{
PPGMPHYS2VIRTHANDLER pNext = (PPGMPHYS2VIRTHANDLER)((intptr_t)pPrev + (pPrev->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK));
if (pNext == pPhys2Virt)
{
/* unlink. */
LogFlow(("pgmHandlerVirtualClearPage: removed %p:{.offNextAlias=%#RX32} from alias chain. prev %p:{.offNextAlias=%#RX32} [%RGp-%RGp]\n",
pPhys2Virt, pPhys2Virt->offNextAlias, pPrev, pPrev->offNextAlias, pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast));
else
{
PPGMPHYS2VIRTHANDLER pNewNext = (PPGMPHYS2VIRTHANDLER)((intptr_t)pPhys2Virt + (pPhys2Virt->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK));
}
break;
}
/* next */
{
("pPhys2Virt=%p:{.Core.Key=%RGp, .Core.KeyLast=%RGp, .offVirtHandler=%#RX32, .offNextAlias=%#RX32} pPrev=%p\n",
pPhys2Virt, pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offVirtHandler, pPhys2Virt->offNextAlias, pPrev));
#endif
break;
}
}
}
Log2(("PHYS2VIRT: Removing %RGp-%RGp %#RX32 %s\n",
pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offNextAlias, R3STRING(pCur->pszDesc)));
pPhys2Virt->offNextAlias = 0;
/*
* Clear the ram flags for this page.
*/
}
/**
* Internal worker for finding a 'in-use' shadow page give by it's physical address.
*
* @returns Pointer to the shadow page structure.
* @param pPool The pool.
* @param HCPhys The HC physical address of the shadow page.
*/
{
/*
* Look up the page.
*/
PPGMPOOLPAGE pPage = (PPGMPOOLPAGE)RTAvloHCPhysGet(&pPool->HCPhysTree, HCPhys & X86_PTE_PAE_PG_MASK);
AssertFatalMsg(pPage && pPage->enmKind != PGMPOOLKIND_FREE, ("HCPhys=%RHp pPage=%p idx=%d\n", HCPhys, pPage, (pPage) ? pPage->idx : 0));
return pPage;
}
/**
* Internal worker for finding a 'in-use' shadow page give by it's physical address.
*
* @returns Pointer to the shadow page structure.
* @param pPool The pool.
* @param idx The pool page index.
*/
{
}
#ifdef PGMPOOL_WITH_GCPHYS_TRACKING
/**
* Clear references to guest physical memory.
*
* @param pPool The pool.
* @param pPoolPage The pool page.
* @param pPhysPage The physical guest page tracking structure.
*/
{
/*
* Just deal with the simple case here.
*/
# ifdef LOG_ENABLED
# endif
if (cRefs == 1)
{
}
else
}
#endif /* PGMPOOL_WITH_GCPHYS_TRACKING */
#ifdef PGMPOOL_WITH_CACHE
/**
* Moves the page to the head of the age list.
*
* This is done when the cached page is used in one way or another.
*
* @param pPool The pool.
* @param pPage The cached page.
* @todo inline in PGMInternal.h!
*/
{
/*
* Move to the head of the age list.
*/
{
/* unlink */
else
/* insert at head */
}
}
#endif /* PGMPOOL_WITH_CACHE */
/**
* Tells if mappings are to be put into the shadow page table or not
*
* @returns boolean result
* @param pVM VM handle.
*/
{
#ifdef IN_RING0
/* There are no mappings in VT-x and AMD-V mode. */
return false;
#else
return !pPGM->fDisableMappings;
#endif
}
/** @} */
#endif