a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync#ifndef ___PDMInternal_h

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync#define ___PDMInternal_h

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync#include <VBox/cdefs.h>

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync#include <VBox/types.h>

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync#include <VBox/param.h>

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync#include <VBox/cfgm.h>

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync#include <VBox/stam.h>

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync#include <VBox/vusb.h>

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync#include <VBox/pdmasynccompletion.h>

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync#include <iprt/critsect.h>

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync#ifdef IN_RING3

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync# include <iprt/thread.h>

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync#endif

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsynctypedef struct PDMDEV *PPDMDEV;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsynctypedef PPDMDEV *PPPDMDEV;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsynctypedef struct PDMUSB *PPDMUSB;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsynctypedef PPDMUSB *PPPDMUSB;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsynctypedef struct PDMDRV *PPDMDRV;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsynctypedef PPDMDRV *PPPDMDRV;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsynctypedef struct PDMLUN *PPDMLUN;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsynctypedef PPDMLUN *PPPDMLUN;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsynctypedef struct PDMPCIBUS *PPDMPCIBUS;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsynctypedef struct PDMDMAC *PPDMDMAC;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsynctypedef struct PDMRTC *PPDMRTC;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsynctypedef struct PDMUSBHUB *PPDMUSBHUB;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsynctypedef struct PDMDEVINSINT

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync{

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync /** Pointer to the next instance (HC Ptr).

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync R3PTRTYPE(PPDMDEVINS) pNextHC;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync /** Pointer to the next per device instance (HC Ptr).

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync R3PTRTYPE(PPDMDEVINS) pPerDeviceNextHC;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync /** Pointer to device structure - HC Ptr. */

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync R3PTRTYPE(PPDMDEV) pDevHC;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync /** Pointer to the VM this instance was created for - HC Ptr. */

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync R3R0PTRTYPE(PVM) pVMHC;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync /** Pointer to the list of logical units associated with the device. (FIFO) */

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync R3PTRTYPE(PPDMLUN) pLunsHC;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync /** Configuration handle to the instance node. */

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync R3PTRTYPE(PCFGMNODE) pCfgHandle;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync /** HC pointer to associated PCI device structure. */

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync R3R0PTRTYPE(struct PCIDevice *) pPciDeviceHC;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync /** HC pointer to associated PCI bus structure. */

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync R3R0PTRTYPE(PPDMPCIBUS) pPciBusHC;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync /** GC pointer to associated PCI device structure. */

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync RCPTRTYPE(struct PCIDevice *) pPciDeviceGC;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync /** Pointer to the VM this instance was created for - GC Ptr. */

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync RCPTRTYPE(PVM) pVMGC;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync /** GC pointer to associated PCI bus structure. */

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync RCPTRTYPE(PPDMPCIBUS) pPciBusGC;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync /** Alignment padding. */

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync uint32_t Alignment0;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync} PDMDEVINSINT;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsynctypedef struct PDMUSBINSINT

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync{

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync /** The UUID of this instance. */

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync RTUUID Uuid;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync /** Pointer to the next instance.

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync R3PTRTYPE(PPDMUSBINS) pNext;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync /** Pointer to the next per USB device instance.

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync R3PTRTYPE(PPDMUSBINS) pPerDeviceNext;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync /** Pointer to device structure. */

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync R3PTRTYPE(PPDMUSB) pUsbDev;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync /** Pointer to the VM this instance was created for. */

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync PVMR3 pVM;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync /** Pointer to the list of logical units associated with the device. (FIFO) */

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync R3PTRTYPE(PPDMLUN) pLuns;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync /** The per instance device configuration. */

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync R3PTRTYPE(PCFGMNODE) pCfg;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync /** Same as pCfg if the configuration should be deleted when detaching the device. */

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync R3PTRTYPE(PCFGMNODE) pCfgDelete;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync /** The global device configuration. */

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync R3PTRTYPE(PCFGMNODE) pCfgGlobal;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync /** Pointer to the USB hub this device is attached to.

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync R3PTRTYPE(PPDMUSBHUB) pHub;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync /** The port number that we're connected to. */

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync uint32_t iPort;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync#if HC_ARCH_BITS == 64

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync uint32_t Alignment0;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync#endif

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync} PDMUSBINSINT;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsynctypedef struct PDMDRVINSINT

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync{

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync /** Pointer to the driver instance above.

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync PPDMDRVINS pUp;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync /** Pointer to the driver instance below.

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync PPDMDRVINS pDown;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync /** Pointer to the logical unit this driver chained on. */

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync PPDMLUN pLun;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync /** Pointer to driver structure from which this was instantiated. */

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync PPDMDRV pDrv;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync /** Pointer to the VM this instance was created for. */

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync PVM pVM;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync /** Flag indicating that the driver is being detached and destroyed.

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync bool fDetaching;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync /** Configuration handle to the instance node. */

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync PCFGMNODE pCfgHandle;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync} PDMDRVINSINT;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsynctypedef struct PDMCRITSECTINT

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync{

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync /** The critical section core which is shared with IPRT. */

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync RTCRITSECT Core;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync /** Pointer to the next critical section.

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync R3PTRTYPE(struct PDMCRITSECTINT *) pNext;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync /** Owner identifier.

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync RTR3PTR pvKey;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync /** Pointer to the VM - R3Ptr. */

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync R3PTRTYPE(PVM) pVMR3;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync /** Pointer to the VM - R0Ptr. */

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync R0PTRTYPE(PVM) pVMR0;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync /** Pointer to the VM - GCPtr. */

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync RCPTRTYPE(PVM) pVMGC;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync#if HC_ARCH_BITS == 64

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync uint32_t padding;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync#endif

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync /** Event semaphore that is scheduled to be signaled upon leaving the

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync RTSEMEVENT EventToSignal;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync /** R0/GC lock contention. */

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync STAMCOUNTER StatContentionR0GCLock;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync /** R0/GC unlock contention. */

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync STAMCOUNTER StatContentionR0GCUnlock;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync /** R3 lock contention. */

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync STAMCOUNTER StatContentionR3;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync /** Profiling the time the section is locked. */

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync STAMPROFILEADV StatLocked;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync} PDMCRITSECTINT, *PPDMCRITSECTINT;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsynctypedef enum

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync{

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync /** The usual invalid entry. */

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync PDMTHREADTYPE_INVALID = 0,

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync /** Device type. */

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync PDMTHREADTYPE_DEVICE,

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync /** USB Device type. */

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync PDMTHREADTYPE_USB,

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync /** Driver type. */

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync PDMTHREADTYPE_DRIVER,

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync /** Internal type. */

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync PDMTHREADTYPE_INTERNAL,

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync /** External type. */

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync PDMTHREADTYPE_EXTERNAL,

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync /** The usual 32-bit hack. */

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync PDMTHREADTYPE_32BIT_HACK = 0x7fffffff

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync} PDMTHREADTYPE;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsynctypedef struct PDMTHREADINT

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync{

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync /** The VM pointer. */

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync PVMR3 pVM;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync /** The event semaphore the thread blocks on. */

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync RTSEMEVENTMULTI BlockEvent;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync /** Pointer to the next thread. */

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync R3PTRTYPE(struct PDMTHREAD *) pNext;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync /** The thread type. */

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync PDMTHREADTYPE enmType;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync} PDMTHREADINT;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync#define PDMDEVINSINT_DECLARED

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync#define PDMUSBINSINT_DECLARED

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync#define PDMDRVINSINT_DECLARED

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync#define PDMCRITSECTINT_DECLARED

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync#define PDMTHREADINT_DECLARED

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync#ifdef ___VBox_pdm_h

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync# error "Invalid header PDM order. Include PDMInternal.h before VBox/pdm.h!"

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync#endif

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync#include <VBox/pdm.h>

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsynctypedef struct PDMLUN

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync{

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync /** The LUN - The Logical Unit Number. */

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync RTUINT iLun;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync /** Pointer to the next LUN. */

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync PPDMLUN pNext;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync /** Pointer to the top driver in the driver chain. */

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync PPDMDRVINS pTop;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync /** Pointer to the bottom driver in the driver chain. */

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync PPDMDRVINS pBottom;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync /** Pointer to the device instance which the LUN belongs to.

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync PPDMDEVINS pDevIns;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync /** Pointer to the USB device instance which the LUN belongs to. */

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync PPDMUSBINS pUsbIns;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync /** Pointer to the device base interface. */

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync PPDMIBASE pBase;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync /** Description of this LUN. */

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync const char *pszDesc;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync} PDMLUN;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsynctypedef struct PDMDEV

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync{

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync /** Pointer to the next device (HC Ptr). */

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync R3PTRTYPE(PPDMDEV) pNext;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync /** Device name length. (search optimization) */

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync RTUINT cchName;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync /** Registration structure. */

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync R3PTRTYPE(const struct PDMDEVREG *) pDevReg;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync /** Number of instances. */

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync RTUINT cInstances;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync /** Pointer to chain of instances (HC Ptr). */

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync R3PTRTYPE(PPDMDEVINS) pInstances;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync} PDMDEV;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsynctypedef struct PDMUSB

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync{

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync /** Pointer to the next device (R3 Ptr). */

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync R3PTRTYPE(PPDMUSB) pNext;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync /** Device name length. (search optimization) */

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync RTUINT cchName;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync /** Registration structure. */

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync R3PTRTYPE(const struct PDMUSBREG *) pUsbReg;

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync /** Next instance number. */

a33af978add1a03aab11b2895f441af5cb2a11a6vboxsync RTUINT iNextInstance;

/** Pointer to chain of instances (R3 Ptr). */

R3PTRTYPE(PPDMUSBINS) pInstances;

} PDMUSB;

typedef struct PDMDRV

{

/** Pointer to the next device. */

PPDMDRV pNext;

/** Registration structure. */

const struct PDMDRVREG * pDrvReg;

/** Number of instances. */

RTUINT cInstances;

} PDMDRV;

typedef struct PDMPIC

{

/** Pointer to the PIC device instance - HC. */

R3PTRTYPE(PPDMDEVINS) pDevInsR3;

/** @copydoc PDMPICREG::pfnSetIrqHC */

DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel));

/** @copydoc PDMPICREG::pfnGetInterruptHC */

DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns));

/** Pointer to the PIC device instance - R0. */

R0PTRTYPE(PPDMDEVINS) pDevInsR0;

/** @copydoc PDMPICREG::pfnSetIrqHC */

DECLR0CALLBACKMEMBER(void, pfnSetIrqR0,(PPDMDEVINS pDevIns, int iIrq, int iLevel));

/** @copydoc PDMPICREG::pfnGetInterruptHC */

DECLR0CALLBACKMEMBER(int, pfnGetInterruptR0,(PPDMDEVINS pDevIns));

/** Pointer to the PIC device instance - RC. */

RCPTRTYPE(PPDMDEVINS) pDevInsRC;

/** @copydoc PDMPICREG::pfnSetIrqHC */

DECLRCCALLBACKMEMBER(void, pfnSetIrqRC,(PPDMDEVINS pDevIns, int iIrq, int iLevel));

/** @copydoc PDMPICREG::pfnGetInterruptHC */

DECLRCCALLBACKMEMBER(int, pfnGetInterruptRC,(PPDMDEVINS pDevIns));

/** Alignment padding. */

RTRCPTR RCPtrPadding;

} PDMPIC;

typedef struct PDMAPIC

{

/** Pointer to the APIC device instance - R3 Ptr. */

PPDMDEVINSR3 pDevInsR3;

/** @copydoc PDMAPICREG::pfnGetInterruptR3 */

DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns));

/** @copydoc PDMAPICREG::pfnHasPendingIrqR3 */

DECLR3CALLBACKMEMBER(bool, pfnHasPendingIrqR3,(PPDMDEVINS pDevIns));

/** @copydoc PDMAPICREG::pfnSetBaseR3 */

DECLR3CALLBACKMEMBER(void, pfnSetBaseR3,(PPDMDEVINS pDevIns, uint64_t u64Base));

/** @copydoc PDMAPICREG::pfnGetBaseR3 */

DECLR3CALLBACKMEMBER(uint64_t, pfnGetBaseR3,(PPDMDEVINS pDevIns));

/** @copydoc PDMAPICREG::pfnSetTPRR3 */

DECLR3CALLBACKMEMBER(void, pfnSetTPRR3,(PPDMDEVINS pDevIns, uint8_t u8TPR));

/** @copydoc PDMAPICREG::pfnGetTPRR3 */

DECLR3CALLBACKMEMBER(uint8_t, pfnGetTPRR3,(PPDMDEVINS pDevIns));

/** @copydoc PDMAPICREG::pfnBusDeliverR3 */

DECLR3CALLBACKMEMBER(void, pfnBusDeliverR3,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,

uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));

/** Pointer to the APIC device instance - R0. */

R0PTRTYPE(PPDMDEVINS) pDevInsR0;

/** @copydoc PDMAPICREG::pfnGetInterruptR3 */

DECLR0CALLBACKMEMBER(int, pfnGetInterruptR0,(PPDMDEVINS pDevIns));

/** @copydoc PDMAPICREG::pfnHasPendingIrqR3 */

DECLR0CALLBACKMEMBER(bool, pfnHasPendingIrqR0,(PPDMDEVINS pDevIns));

/** @copydoc PDMAPICREG::pfnSetBaseR3 */

DECLR0CALLBACKMEMBER(void, pfnSetBaseR0,(PPDMDEVINS pDevIns, uint64_t u64Base));

/** @copydoc PDMAPICREG::pfnGetBaseR3 */

DECLR0CALLBACKMEMBER(uint64_t, pfnGetBaseR0,(PPDMDEVINS pDevIns));

/** @copydoc PDMAPICREG::pfnSetTPRR3 */

DECLR0CALLBACKMEMBER(void, pfnSetTPRR0,(PPDMDEVINS pDevIns, uint8_t u8TPR));

/** @copydoc PDMAPICREG::pfnGetTPRR3 */

DECLR0CALLBACKMEMBER(uint8_t, pfnGetTPRR0,(PPDMDEVINS pDevIns));

/** @copydoc PDMAPICREG::pfnBusDeliverR3 */

DECLR0CALLBACKMEMBER(void, pfnBusDeliverR0,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,

uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));

/** Pointer to the APIC device instance - RC Ptr. */

PPDMDEVINSRC pDevInsRC;

/** @copydoc PDMAPICREG::pfnGetInterruptR3 */

DECLRCCALLBACKMEMBER(int, pfnGetInterruptRC,(PPDMDEVINS pDevIns));

/** @copydoc PDMAPICREG::pfnHasPendingIrqR3 */

DECLRCCALLBACKMEMBER(bool, pfnHasPendingIrqRC,(PPDMDEVINS pDevIns));

/** @copydoc PDMAPICREG::pfnSetBaseR3 */

DECLRCCALLBACKMEMBER(void, pfnSetBaseRC,(PPDMDEVINS pDevIns, uint64_t u64Base));

/** @copydoc PDMAPICREG::pfnGetBaseR3 */

DECLRCCALLBACKMEMBER(uint64_t, pfnGetBaseRC,(PPDMDEVINS pDevIns));

/** @copydoc PDMAPICREG::pfnSetTPRR3 */

DECLRCCALLBACKMEMBER(void, pfnSetTPRRC,(PPDMDEVINS pDevIns, uint8_t u8TPR));

/** @copydoc PDMAPICREG::pfnGetTPRR3 */

DECLRCCALLBACKMEMBER(uint8_t, pfnGetTPRRC,(PPDMDEVINS pDevIns));

/** @copydoc PDMAPICREG::pfnBusDeliverR3 */

DECLRCCALLBACKMEMBER(void, pfnBusDeliverRC,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,

uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));

} PDMAPIC;

typedef struct PDMIOAPIC

{

/** Pointer to the APIC device instance - R3 Ptr. */

PPDMDEVINSR3 pDevInsR3;

/** @copydoc PDMIOAPICREG::pfnSetIrqR3 */

DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel));

/** Pointer to the PIC device instance - R0. */

R0PTRTYPE(PPDMDEVINS) pDevInsR0;

/** @copydoc PDMIOAPICREG::pfnSetIrqR3 */

DECLR0CALLBACKMEMBER(void, pfnSetIrqR0,(PPDMDEVINS pDevIns, int iIrq, int iLevel));

/** Pointer to the APIC device instance - RC Ptr. */

PPDMDEVINSRC pDevInsRC;

/** @copydoc PDMIOAPICREG::pfnSetIrqR3 */

DECLRCCALLBACKMEMBER(void, pfnSetIrqRC,(PPDMDEVINS pDevIns, int iIrq, int iLevel));

} PDMIOAPIC;

typedef struct PDMPCIBUS

{

/** PCI bus number. */

RTUINT iBus;

RTUINT uPadding0; /**< Alignment padding.*/

/** Pointer to PCI Bus device instance. */

PPDMDEVINSR3 pDevInsR3;

/** @copydoc PDMPCIBUSREG::pfnSetIrqR3 */

DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel));

/** @copydoc PDMPCIBUSREG::pfnRegisterR3 */

DECLR3CALLBACKMEMBER(int, pfnRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, const char *pszName, int iDev));

/** @copydoc PDMPCIBUSREG::pfnIORegionRegisterR3 */

DECLR3CALLBACKMEMBER(int, pfnIORegionRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iRegion, uint32_t cbRegion,

PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));

/** @copydoc PDMPCIBUSREG::pfnSetConfigCallbacksR3 */

DECLR3CALLBACKMEMBER(void, pfnSetConfigCallbacksR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead,

PPFNPCICONFIGREAD ppfnReadOld, PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));

/** @copydoc PDMPCIBUSREG::pfnSaveExecR3 */

DECLR3CALLBACKMEMBER(int, pfnSaveExecR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));

/** @copydoc PDMPCIBUSREG::pfnLoadExecR3 */

DECLR3CALLBACKMEMBER(int, pfnLoadExecR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));

/** @copydoc PDMPCIBUSREG::pfnFakePCIBIOSR3 */

DECLR3CALLBACKMEMBER(int, pfnFakePCIBIOSR3,(PPDMDEVINS pDevIns));

/** Pointer to the PIC device instance - R0. */

R0PTRTYPE(PPDMDEVINS) pDevInsR0;

/** @copydoc PDMPCIBUSREG::pfnSetIrqR3 */

DECLR0CALLBACKMEMBER(void, pfnSetIrqR0,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel));

/** Pointer to PCI Bus device instance. */

PPDMDEVINSRC pDevInsRC;

/** @copydoc PDMPCIBUSREG::pfnSetIrqR3 */

DECLRCCALLBACKMEMBER(void, pfnSetIrqRC,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel));

} PDMPCIBUS;

#ifdef IN_RING3

typedef struct PDMDMAC

{

/** Pointer to the DMAC device instance. */

PPDMDEVINS pDevIns;

/** Copy of the registration structure. */

PDMDMACREG Reg;

} PDMDMAC;

typedef struct PDMRTC

{

/** Pointer to the RTC device instance. */

PPDMDEVINS pDevIns;

/** Copy of the registration structure. */

PDMRTCREG Reg;

} PDMRTC;

#endif /* IN_RING3 */

typedef enum PDMMODTYPE

{

/** Guest context module. */

PDMMOD_TYPE_GC,

/** Ring-0 (host) context module. */

PDMMOD_TYPE_R0,

/** Ring-3 (host) context module. */

PDMMOD_TYPE_R3

} PDMMODTYPE, *PPDMMODTYPE;

#define PDMMOD_NAME_LEN 32

typedef struct PDMMOD

{

/** Module name. This is used for refering to

char szName[PDMMOD_NAME_LEN];

/** Module type. */

PDMMODTYPE eType;

/** Loader module handle. Not used for R0 modules. */

RTLDRMOD hLdrMod;

/** Loaded address.

RTUINTPTR ImageBase;

/** Old loaded address.

RTUINTPTR OldImageBase;

/** Where the R3 HC bits are stored.

void *pvBits;

/** Pointer to next module. */

struct PDMMOD *pNext;

/** Module filename. */

char szFilename[1];

} PDMMOD;

typedef PDMMOD *PPDMMOD;

#define PDMQUEUE_FREE_SLACK 16

typedef enum PDMQUEUETYPE

{

/** Device consumer. */

PDMQUEUETYPE_DEV = 1,

/** Driver consumer. */

PDMQUEUETYPE_DRV,

/** Internal consumer. */

PDMQUEUETYPE_INTERNAL,

/** External consumer. */

PDMQUEUETYPE_EXTERNAL

} PDMQUEUETYPE;

typedef struct PDMQUEUE *PPDMQUEUE;

typedef struct PDMQUEUE

{

/** Pointer to the next queue in the list. */

R3PTRTYPE(PPDMQUEUE) pNext;

/** Type specific data. */

union

{

/** PDMQUEUETYPE_DEV */

struct

{

/** Pointer to consumer function. */

R3PTRTYPE(PFNPDMQUEUEDEV) pfnCallback;

/** Pointer to the device instance owning the queue. */

R3PTRTYPE(PPDMDEVINS) pDevIns;

} Dev;

/** PDMQUEUETYPE_DRV */

struct

{

/** Pointer to consumer function. */

R3PTRTYPE(PFNPDMQUEUEDRV) pfnCallback;

/** Pointer to the driver instance owning the queue. */

R3PTRTYPE(PPDMDRVINS) pDrvIns;

} Drv;

/** PDMQUEUETYPE_INTERNAL */

struct

{

/** Pointer to consumer function. */

R3PTRTYPE(PFNPDMQUEUEINT) pfnCallback;

} Int;

/** PDMQUEUETYPE_EXTERNAL */

struct

{

/** Pointer to consumer function. */

R3PTRTYPE(PFNPDMQUEUEEXT) pfnCallback;

/** Pointer to user argument. */

R3PTRTYPE(void *) pvUser;

} Ext;

} u;

/** Queue type. */

PDMQUEUETYPE enmType;

/** The interval between checking the queue for events.

uint32_t cMilliesInterval;

/** Interval timer. Only used if cMilliesInterval is non-zero. */

PTMTIMERR3 pTimer;

/** Pointer to the VM. */

R3R0PTRTYPE(PVM) pVMHC;

/** LIFO of pending items - HC. */

R3R0PTRTYPE(PPDMQUEUEITEMCORE) volatile pPendingHC;

/** Pointer to the GC VM and indicator for GC enabled queue.

RCPTRTYPE(PVM) pVMGC;

/** LIFO of pending items - GC. */

RCPTRTYPE(PPDMQUEUEITEMCORE) pPendingGC;

/** Item size (bytes). */

RTUINT cbItem;

/** Number of items in the queue. */

RTUINT cItems;

/** Index to the free head (where we insert). */

uint32_t volatile iFreeHead;

/** Index to the free tail (where we remove). */

uint32_t volatile iFreeTail;

/** Array of pointers to free items. Variable size. */

struct PDMQUEUEFREEITEM

{

/** Pointer to the free item - HC Ptr. */

R3R0PTRTYPE(PPDMQUEUEITEMCORE) volatile pItemHC;

/** Pointer to the free item - GC Ptr. */

RCPTRTYPE(PPDMQUEUEITEMCORE) volatile pItemGC;

#if HC_ARCH_BITS == 64

uint32_t Alignment0;

#endif

} aFreeItems[1];

} PDMQUEUE;

typedef enum PDMDEVHLPTASKOP

{

/** The usual invalid 0 entry. */

PDMDEVHLPTASKOP_INVALID = 0,

/** ISASetIrq */

PDMDEVHLPTASKOP_ISA_SET_IRQ,

/** PCISetIrq */

PDMDEVHLPTASKOP_PCI_SET_IRQ,

/** PCISetIrq */

PDMDEVHLPTASKOP_IOAPIC_SET_IRQ,

/** The usual 32-bit hack. */

PDMDEVHLPTASKOP_32BIT_HACK = 0x7fffffff

} PDMDEVHLPTASKOP;

typedef struct PDMDEVHLPTASK

{

/** The queue item core (don't touch). */

PDMQUEUEITEMCORE Core;

/** Pointer to the device instance (HC Ptr). */

R3R0PTRTYPE(PPDMDEVINS) pDevInsHC;

/** This operation to perform. */

PDMDEVHLPTASKOP enmOp;

#if HC_ARCH_BITS == 64

uint32_t Alignment0;

#endif

/** Parameters to the operation. */

union PDMDEVHLPTASKPARAMS

{

/**

struct PDMDEVHLPTASKSETIRQ

{

/** The IRQ */

int iIrq;

/** The new level. */

int iLevel;

} SetIRQ;

} u;

} PDMDEVHLPTASK;

typedef PDMDEVHLPTASK *PPDMDEVHLPTASK;

typedef const PDMDEVHLPTASK *PCPDMDEVHLPTASK;

typedef struct PDMUSBHUB

{

/** The USB versions this hub support.

uint32_t fVersions;

/** The number of ports on the hub. */

uint32_t cPorts;

/** The number of available ports (0..cPorts). */

uint32_t cAvailablePorts;

/** The driver instance of the hub. */

PPDMDRVINS pDrvIns;

/** Copy of the to the registration structure. */

PDMUSBHUBREG Reg;

/** Pointer to the next hub in the list. */

struct PDMUSBHUB *pNext;

} PDMUSBHUB;

typedef const PDMUSBHUB *PCPDMUSBHUB;

typedef struct PDMASYNCCOMPLETIONTEMPLATE *PPDMASYNCCOMPLETIONTEMPLATE;

typedef struct PDMASYNCCOMPLETIONMANAGER *PPDMASYNCCOMPLETIONMANAGER;

#define PDM2VM(pPDM) ( (PVM)((char*)pPDM - pPDM->offVM) )

typedef struct PDM

{

/** Offset to the VM structure.

RTUINT offVM;

RTUINT uPadding0; /**< Alignment padding.*/

/** List of registered devices. (FIFO) */

R3PTRTYPE(PPDMDEV) pDevs;

/** List of devices instances. (FIFO) */

R3PTRTYPE(PPDMDEVINS) pDevInstances;

/** List of registered USB devices. (FIFO) */

R3PTRTYPE(PPDMUSB) pUsbDevs;

/** List of USB devices instances. (FIFO) */

R3PTRTYPE(PPDMUSBINS) pUsbInstances;

/** List of registered drivers. (FIFO) */

R3PTRTYPE(PPDMDRV) pDrvs;

/** List of initialized critical sections. (LIFO) */

R3PTRTYPE(PPDMCRITSECTINT) pCritSects;

/** PCI Buses. */

PDMPCIBUS aPciBuses[1];

/** The register PIC device. */

PDMPIC Pic;

/** The registerd APIC device. */

PDMAPIC Apic;

/** The registerd I/O APIC device. */

PDMIOAPIC IoApic;

/** The registered DMAC device. */

R3PTRTYPE(PPDMDMAC) pDmac;

/** The registered RTC device. */

R3PTRTYPE(PPDMRTC) pRtc;

/** The registered USB HUBs. (FIFO) */

R3PTRTYPE(PPDMUSBHUB) pUsbHubs;

/** Queue in which devhlp tasks are queued for R3 execution - HC Ptr. */

R3R0PTRTYPE(PPDMQUEUE) pDevHlpQueueHC;

/** Queue in which devhlp tasks are queued for R3 execution - GC Ptr. */

RCPTRTYPE(PPDMQUEUE) pDevHlpQueueGC;

/** The number of entries in the apQueuedCritSectsLeaves table that's currnetly in use. */

RTUINT cQueuedCritSectLeaves;

/** Critical sections queued in GC/R0 because of contention preventing leave to complete. (R3 Ptrs)

R3PTRTYPE(PPDMCRITSECT) apQueuedCritSectsLeaves[8];

/** Linked list of timer driven PDM queues. */

R3PTRTYPE(struct PDMQUEUE *) pQueuesTimer;

/** Linked list of force action driven PDM queues. */

R3PTRTYPE(struct PDMQUEUE *) pQueuesForced;

/** Pointer to the queue which should be manually flushed - HCPtr.

R3R0PTRTYPE(struct PDMQUEUE *) pQueueFlushHC;

/** Pointer to the queue which should be manually flushed - GCPtr. */

RCPTRTYPE(struct PDMQUEUE *) pQueueFlushGC;

#if HC_ARCH_BITS == 64

uint32_t padding0;

#endif

/** Head of the PDM Thread list. (singly linked) */

R3PTRTYPE(PPDMTHREAD) pThreads;

/** Tail of the PDM Thread list. (singly linked) */

R3PTRTYPE(PPDMTHREAD) pThreadsTail;

/** Head of the asychronous tasks managers. (singly linked) */

R3PTRTYPE(PPDMASYNCCOMPLETIONMANAGER) pAsyncCompletionManagerHead;

/** Head of the templates. (singly linked) */

R3PTRTYPE(PPDMASYNCCOMPLETIONTEMPLATE) pAsyncCompletionTemplates;

/** TEMPORARY HACKS FOR NETWORK POLLING.

RTUINT cPollers;

#if HC_ARCH_BITS == 64

RTUINT padding1;

#endif

R3PTRTYPE(PFNPDMDRVPOLLER) apfnPollers[16];

R3PTRTYPE(PPDMDRVINS) aDrvInsPollers[16];

PTMTIMERR3 pTimerPollers;

/** @} */

/** The PDM lock.

PDMCRITSECT CritSect;

/** Number of times a critical section leave requesed needed to be queued for ring-3 execution. */

STAMCOUNTER StatQueuedCritSectLeaves;

} PDM;

typedef PDM *PPDM;

typedef struct PDMUSERPERVM

{

/** Pointer to list of loaded modules. */

PPDMMOD pModules;

/** @todo move more stuff over here. */

} PDMUSERPERVM;

typedef PDMUSERPERVM *PPDMUSERPERVM;

#ifdef IN_RING3

extern const PDMDRVHLP g_pdmR3DrvHlp;

#endif

#ifdef IN_RING3

int pdmR3CritSectInit(PVM pVM);

int pdmR3CritSectTerm(PVM pVM);

void pdmR3CritSectRelocate(PVM pVM);

int pdmR3CritSectInitDevice(PVM pVM, PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, const char *pszName);

int pdmR3CritSectDeleteDevice(PVM pVM, PPDMDEVINS pDevIns);

int pdmR3DevInit(PVM pVM);

PPDMDEV pdmR3DevLookup(PVM pVM, const char *pszName);

int pdmR3DevFindLun(PVM pVM, const char *pszDevice, unsigned iInstance, unsigned iLun, PPDMLUN *ppLun);

int pdmR3UsbLoadModules(PVM pVM);

int pdmR3UsbInstantiateDevices(PVM pVM);

PPDMUSB pdmR3UsbLookup(PVM pVM, const char *pszName);

int pdmR3UsbFindLun(PVM pVM, const char *pszDevice, unsigned iInstance, unsigned iLun, PPDMLUN *ppLun);

int pdmR3UsbRegisterHub(PVM pVM, PPDMDRVINS pDrvIns, uint32_t fVersions, uint32_t cPorts, PCPDMUSBHUBREG pUsbHubReg, PPCPDMUSBHUBHLP ppUsbHubHlp);

int pdmR3UsbVMInitComplete(PVM pVM);

int pdmR3DrvInit(PVM pVM);

int pdmR3DrvDetach(PPDMDRVINS pDrvIns);

void pdmR3DrvDestroyChain(PPDMDRVINS pDrvIns);

PPDMDRV pdmR3DrvLookup(PVM pVM, const char *pszName);

int pdmR3LdrInitU(PUVM pUVM);

void pdmR3LdrTermU(PUVM pUVM);

char * pdmR3FileR3(const char *pszFile, bool fShared = false);

int pdmR3LoadR3U(PUVM pUVM, const char *pszFilename, const char *pszName);

void pdmR3QueueRelocate(PVM pVM, RTGCINTPTR offDelta);

int pdmR3ThreadCreateDevice(PVM pVM, PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,

PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName);

int pdmR3ThreadCreateUsb(PVM pVM, PPDMDRVINS pUsbIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADUSB pfnThread,

PFNPDMTHREADWAKEUPUSB pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName);

int pdmR3ThreadCreateDriver(PVM pVM, PPDMDRVINS pDrvIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDRV pfnThread,

PFNPDMTHREADWAKEUPDRV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName);

int pdmR3ThreadDestroyDevice(PVM pVM, PPDMDEVINS pDevIns);

int pdmR3ThreadDestroyUsb(PVM pVM, PPDMUSBINS pUsbIns);

int pdmR3ThreadDestroyDriver(PVM pVM, PPDMDRVINS pDrvIns);

void pdmR3ThreadDestroyAll(PVM pVM);

int pdmR3ThreadResumeAll(PVM pVM);

int pdmR3ThreadSuspendAll(PVM pVM);

#ifdef VBOX_WITH_PDM_ASYNC_COMPLETION

int pdmR3AsyncCompletionInit(PVM pVM);

int pdmR3AsyncCompletionTerm(PVM pVM);

#endif

#endif /* IN_RING3 */

void pdmLock(PVM pVM);

int pdmLockEx(PVM pVM, int rc);

void pdmUnlock(PVM pVM);

#endif