3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync

930b5f872e89407f445d4000d4e4aaecaa6a0998vboxsync

930b5f872e89407f445d4000d4e4aaecaa6a0998vboxsync#ifndef ___PDMInternal_h

930b5f872e89407f445d4000d4e4aaecaa6a0998vboxsync#define ___PDMInternal_h

930b5f872e89407f445d4000d4e4aaecaa6a0998vboxsync

930b5f872e89407f445d4000d4e4aaecaa6a0998vboxsync#include <VBox/cdefs.h>

930b5f872e89407f445d4000d4e4aaecaa6a0998vboxsync#include <VBox/types.h>

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync#include <VBox/param.h>

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync#include <VBox/cfgm.h>

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync#include <VBox/stam.h>

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync#include <VBox/vusb.h>

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync#include <VBox/pdmasynccompletion.h>

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync#include <iprt/critsect.h>

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync#ifdef IN_RING3

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync# include <iprt/thread.h>

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync#endif

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsynctypedef struct PDMDEV *PPDMDEV;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsynctypedef PPDMDEV *PPPDMDEV;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsynctypedef struct PDMUSB *PPDMUSB;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsynctypedef PPDMUSB *PPPDMUSB;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsynctypedef struct PDMDRV *PPDMDRV;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsynctypedef PPDMDRV *PPPDMDRV;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsynctypedef struct PDMLUN *PPDMLUN;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsynctypedef PPDMLUN *PPPDMLUN;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsynctypedef struct PDMPCIBUS *PPDMPCIBUS;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsynctypedef struct PDMDMAC *PPDMDMAC;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsynctypedef struct PDMRTC *PPDMRTC;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsynctypedef struct PDMUSBHUB *PPDMUSBHUB;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsynctypedef struct PDMDEVINSINT

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync{

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** Pointer to the next instance (HC Ptr).

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync R3PTRTYPE(PPDMDEVINS) pNextR3;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** Pointer to the next per device instance (HC Ptr).

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync R3PTRTYPE(PPDMDEVINS) pPerDeviceNextR3;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** Pointer to device structure - HC Ptr. */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync R3PTRTYPE(PPDMDEV) pDevR3;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** Pointer to the list of logical units associated with the device. (FIFO) */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync R3PTRTYPE(PPDMLUN) pLunsR3;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** Configuration handle to the instance node. */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync R3PTRTYPE(PCFGMNODE) pCfgHandle;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** R3 pointer to the VM this instance was created for. */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync PVMR3 pVMR3;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** R3 pointer to associated PCI device structure. */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync R3PTRTYPE(struct PCIDevice *) pPciDeviceR3;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** R3 pointer to associated PCI bus structure. */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync R3PTRTYPE(PPDMPCIBUS) pPciBusR3;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** R0 pointer to the VM this instance was created for. */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync PVMR0 pVMR0;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** R0 pointer to associated PCI device structure. */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync R0PTRTYPE(struct PCIDevice *) pPciDeviceR0;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** R0 pointer to associated PCI bus structure. */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync R0PTRTYPE(PPDMPCIBUS) pPciBusR0;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** Alignment padding. */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync RTR0PTR Alignment0;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** RC pointer to the VM this instance was created for. */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync PVMRC pVMRC;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** RC pointer to associated PCI device structure. */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync RCPTRTYPE(struct PCIDevice *) pPciDeviceRC;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** RC pointer to associated PCI bus structure. */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync RCPTRTYPE(PPDMPCIBUS) pPciBusRC;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** Alignment padding. */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync RTRCPTR Alignment1;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync} PDMDEVINSINT;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsynctypedef struct PDMUSBINSINT

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync{

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** The UUID of this instance. */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync RTUUID Uuid;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** Pointer to the next instance.

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync R3PTRTYPE(PPDMUSBINS) pNext;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** Pointer to the next per USB device instance.

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync R3PTRTYPE(PPDMUSBINS) pPerDeviceNext;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** Pointer to device structure. */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync R3PTRTYPE(PPDMUSB) pUsbDev;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** Pointer to the VM this instance was created for. */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync PVMR3 pVM;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** Pointer to the list of logical units associated with the device. (FIFO) */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync R3PTRTYPE(PPDMLUN) pLuns;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** The per instance device configuration. */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync R3PTRTYPE(PCFGMNODE) pCfg;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** Same as pCfg if the configuration should be deleted when detaching the device. */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync R3PTRTYPE(PCFGMNODE) pCfgDelete;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** The global device configuration. */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync R3PTRTYPE(PCFGMNODE) pCfgGlobal;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** Pointer to the USB hub this device is attached to.

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync R3PTRTYPE(PPDMUSBHUB) pHub;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** The port number that we're connected to. */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync uint32_t iPort;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync#if HC_ARCH_BITS == 64

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync uint32_t Alignment0;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync#endif

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync} PDMUSBINSINT;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsynctypedef struct PDMDRVINSINT

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync{

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** Pointer to the driver instance above.

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync PPDMDRVINS pUp;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** Pointer to the driver instance below.

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync PPDMDRVINS pDown;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** Pointer to the logical unit this driver chained on. */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync PPDMLUN pLun;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** Pointer to driver structure from which this was instantiated. */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync PPDMDRV pDrv;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** Pointer to the VM this instance was created for. */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync PVM pVM;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** Flag indicating that the driver is being detached and destroyed.

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync bool fDetaching;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** Configuration handle to the instance node. */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync PCFGMNODE pCfgHandle;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync} PDMDRVINSINT;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsynctypedef struct PDMCRITSECTINT

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync{

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** The critical section core which is shared with IPRT. */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync RTCRITSECT Core;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** Pointer to the next critical section.

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync R3PTRTYPE(struct PDMCRITSECTINT *) pNext;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** Owner identifier.

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync RTR3PTR pvKey;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** Pointer to the VM - R3Ptr. */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync PVMR3 pVMR3;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** Pointer to the VM - R0Ptr. */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync PVMR0 pVMR0;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** Pointer to the VM - GCPtr. */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync PVMRC pVMRC;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync#if HC_ARCH_BITS == 64

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync RTRCPTR padding;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync#endif

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** Event semaphore that is scheduled to be signaled upon leaving the

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync RTSEMEVENT EventToSignal;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** R0/RC lock contention. */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync STAMCOUNTER StatContentionRZLock;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** R0/RC unlock contention. */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync STAMCOUNTER StatContentionRZUnlock;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** R3 lock contention. */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync STAMCOUNTER StatContentionR3;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** Profiling the time the section is locked. */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync STAMPROFILEADV StatLocked;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync} PDMCRITSECTINT;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsynctypedef PDMCRITSECTINT *PPDMCRITSECTINT;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsynctypedef enum

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync{

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** The usual invalid entry. */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync PDMTHREADTYPE_INVALID = 0,

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** Device type. */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync PDMTHREADTYPE_DEVICE,

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** USB Device type. */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync PDMTHREADTYPE_USB,

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** Driver type. */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync PDMTHREADTYPE_DRIVER,

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** Internal type. */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync PDMTHREADTYPE_INTERNAL,

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** External type. */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync PDMTHREADTYPE_EXTERNAL,

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** The usual 32-bit hack. */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync PDMTHREADTYPE_32BIT_HACK = 0x7fffffff

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync} PDMTHREADTYPE;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsynctypedef struct PDMTHREADINT

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync{

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** The VM pointer. */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync PVMR3 pVM;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** The event semaphore the thread blocks on when not running. */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync RTSEMEVENTMULTI BlockEvent;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** The event semaphore the thread sleeps on while running. */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync RTSEMEVENTMULTI SleepEvent;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** Pointer to the next thread. */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync R3PTRTYPE(struct PDMTHREAD *) pNext;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** The thread type. */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync PDMTHREADTYPE enmType;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync} PDMTHREADINT;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync#define PDMDEVINSINT_DECLARED

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync#define PDMUSBINSINT_DECLARED

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync#define PDMDRVINSINT_DECLARED

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync#define PDMCRITSECTINT_DECLARED

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync#define PDMTHREADINT_DECLARED

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync#ifdef ___VBox_pdm_h

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync# error "Invalid header PDM order. Include PDMInternal.h before VBox/pdm.h!"

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync#endif

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync#include <VBox/pdm.h>

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsynctypedef struct PDMLUN

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync{

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** The LUN - The Logical Unit Number. */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync RTUINT iLun;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** Pointer to the next LUN. */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync PPDMLUN pNext;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** Pointer to the top driver in the driver chain. */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync PPDMDRVINS pTop;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** Pointer to the bottom driver in the driver chain. */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync PPDMDRVINS pBottom;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** Pointer to the device instance which the LUN belongs to.

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync PPDMDEVINS pDevIns;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** Pointer to the USB device instance which the LUN belongs to. */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync PPDMUSBINS pUsbIns;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** Pointer to the device base interface. */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync PPDMIBASE pBase;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** Description of this LUN. */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync const char *pszDesc;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync} PDMLUN;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsynctypedef struct PDMDEV

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync{

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** Pointer to the next device (R3 Ptr). */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync R3PTRTYPE(PPDMDEV) pNext;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** Device name length. (search optimization) */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync RTUINT cchName;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** Registration structure. */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync R3PTRTYPE(const struct PDMDEVREG *) pDevReg;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** Number of instances. */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync RTUINT cInstances;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** Pointer to chain of instances (R3 Ptr). */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync PPDMDEVINSR3 pInstances;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync} PDMDEV;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsynctypedef struct PDMUSB

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync{

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** Pointer to the next device (R3 Ptr). */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync R3PTRTYPE(PPDMUSB) pNext;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** Device name length. (search optimization) */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync RTUINT cchName;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** Registration structure. */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync R3PTRTYPE(const struct PDMUSBREG *) pUsbReg;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** Next instance number. */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync RTUINT iNextInstance;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** Pointer to chain of instances (R3 Ptr). */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync R3PTRTYPE(PPDMUSBINS) pInstances;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync} PDMUSB;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsynctypedef struct PDMDRV

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync{

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** Pointer to the next device. */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync PPDMDRV pNext;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** Registration structure. */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync const struct PDMDRVREG * pDrvReg;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** Number of instances. */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync RTUINT cInstances;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync} PDMDRV;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsynctypedef struct PDMPIC

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync{

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** Pointer to the PIC device instance - R3. */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync PPDMDEVINSR3 pDevInsR3;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** @copydoc PDMPICREG::pfnSetIrqR3 */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel));

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** @copydoc PDMPICREG::pfnGetInterruptR3 */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns));

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** Pointer to the PIC device instance - R0. */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync PPDMDEVINSR0 pDevInsR0;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** @copydoc PDMPICREG::pfnSetIrqR3 */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync DECLR0CALLBACKMEMBER(void, pfnSetIrqR0,(PPDMDEVINS pDevIns, int iIrq, int iLevel));

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** @copydoc PDMPICREG::pfnGetInterruptR3 */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync DECLR0CALLBACKMEMBER(int, pfnGetInterruptR0,(PPDMDEVINS pDevIns));

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** Pointer to the PIC device instance - RC. */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync PPDMDEVINSRC pDevInsRC;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** @copydoc PDMPICREG::pfnSetIrqR3 */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync DECLRCCALLBACKMEMBER(void, pfnSetIrqRC,(PPDMDEVINS pDevIns, int iIrq, int iLevel));

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** @copydoc PDMPICREG::pfnGetInterruptR3 */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync DECLRCCALLBACKMEMBER(int, pfnGetInterruptRC,(PPDMDEVINS pDevIns));

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** Alignment padding. */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync RTRCPTR RCPtrPadding;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync} PDMPIC;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsynctypedef struct PDMAPIC

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync{

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** Pointer to the APIC device instance - R3 Ptr. */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync PPDMDEVINSR3 pDevInsR3;

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** @copydoc PDMAPICREG::pfnGetInterruptR3 */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns));

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** @copydoc PDMAPICREG::pfnHasPendingIrqR3 */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync DECLR3CALLBACKMEMBER(bool, pfnHasPendingIrqR3,(PPDMDEVINS pDevIns));

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** @copydoc PDMAPICREG::pfnSetBaseR3 */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync DECLR3CALLBACKMEMBER(void, pfnSetBaseR3,(PPDMDEVINS pDevIns, uint64_t u64Base));

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** @copydoc PDMAPICREG::pfnGetBaseR3 */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync DECLR3CALLBACKMEMBER(uint64_t, pfnGetBaseR3,(PPDMDEVINS pDevIns));

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** @copydoc PDMAPICREG::pfnSetTPRR3 */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync DECLR3CALLBACKMEMBER(void, pfnSetTPRR3,(PPDMDEVINS pDevIns, uint8_t u8TPR));

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** @copydoc PDMAPICREG::pfnGetTPRR3 */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync DECLR3CALLBACKMEMBER(uint8_t, pfnGetTPRR3,(PPDMDEVINS pDevIns));

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** @copydoc PDMAPICREG::pfnWriteMSRR3 */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync DECLR3CALLBACKMEMBER(uint32_t, pfnWriteMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t u64Value));

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** @copydoc PDMAPICREG::pfnReadMSRR3 */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync DECLR3CALLBACKMEMBER(uint32_t, pfnReadMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t *pu64Value));

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync /** @copydoc PDMAPICREG::pfnBusDeliverR3 */

3194da424708abdd288b28d96892b3a5f3f7df0bvboxsync DECLR3CALLBACKMEMBER(void, pfnBusDeliverR3,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,

uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));

/** Pointer to the APIC device instance - R0 Ptr. */

PPDMDEVINSR0 pDevInsR0;

/** @copydoc PDMAPICREG::pfnGetInterruptR3 */

DECLR0CALLBACKMEMBER(int, pfnGetInterruptR0,(PPDMDEVINS pDevIns));

/** @copydoc PDMAPICREG::pfnHasPendingIrqR3 */

DECLR0CALLBACKMEMBER(bool, pfnHasPendingIrqR0,(PPDMDEVINS pDevIns));

/** @copydoc PDMAPICREG::pfnSetBaseR3 */

DECLR0CALLBACKMEMBER(void, pfnSetBaseR0,(PPDMDEVINS pDevIns, uint64_t u64Base));

/** @copydoc PDMAPICREG::pfnGetBaseR3 */

DECLR0CALLBACKMEMBER(uint64_t, pfnGetBaseR0,(PPDMDEVINS pDevIns));

/** @copydoc PDMAPICREG::pfnSetTPRR3 */

DECLR0CALLBACKMEMBER(void, pfnSetTPRR0,(PPDMDEVINS pDevIns, uint8_t u8TPR));

/** @copydoc PDMAPICREG::pfnGetTPRR3 */

DECLR0CALLBACKMEMBER(uint8_t, pfnGetTPRR0,(PPDMDEVINS pDevIns));

/** @copydoc PDMAPICREG::pfnWriteMSRR3 */

DECLR0CALLBACKMEMBER(uint32_t, pfnWriteMSRR0, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t u64Value));

/** @copydoc PDMAPICREG::pfnReadMSRR3 */

DECLR0CALLBACKMEMBER(uint32_t, pfnReadMSRR0, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t *pu64Value));

/** @copydoc PDMAPICREG::pfnBusDeliverR3 */

DECLR0CALLBACKMEMBER(void, pfnBusDeliverR0,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,

uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));

/** Pointer to the APIC device instance - RC Ptr. */

PPDMDEVINSRC pDevInsRC;

/** @copydoc PDMAPICREG::pfnGetInterruptR3 */

DECLRCCALLBACKMEMBER(int, pfnGetInterruptRC,(PPDMDEVINS pDevIns));

/** @copydoc PDMAPICREG::pfnHasPendingIrqR3 */

DECLRCCALLBACKMEMBER(bool, pfnHasPendingIrqRC,(PPDMDEVINS pDevIns));

/** @copydoc PDMAPICREG::pfnSetBaseR3 */

DECLRCCALLBACKMEMBER(void, pfnSetBaseRC,(PPDMDEVINS pDevIns, uint64_t u64Base));

/** @copydoc PDMAPICREG::pfnGetBaseR3 */

DECLRCCALLBACKMEMBER(uint64_t, pfnGetBaseRC,(PPDMDEVINS pDevIns));

/** @copydoc PDMAPICREG::pfnSetTPRR3 */

DECLRCCALLBACKMEMBER(void, pfnSetTPRRC,(PPDMDEVINS pDevIns, uint8_t u8TPR));

/** @copydoc PDMAPICREG::pfnGetTPRR3 */

DECLRCCALLBACKMEMBER(uint8_t, pfnGetTPRRC,(PPDMDEVINS pDevIns));

/** @copydoc PDMAPICREG::pfnWriteMSRR3 */

DECLRCCALLBACKMEMBER(uint32_t, pfnWriteMSRRC, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t u64Value));

/** @copydoc PDMAPICREG::pfnReadMSRR3 */

DECLRCCALLBACKMEMBER(uint32_t, pfnReadMSRRC, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t *pu64Value));

/** @copydoc PDMAPICREG::pfnBusDeliverR3 */

DECLRCCALLBACKMEMBER(void, pfnBusDeliverRC,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,

uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));

} PDMAPIC;

typedef struct PDMIOAPIC

{

/** Pointer to the APIC device instance - R3 Ptr. */

PPDMDEVINSR3 pDevInsR3;

/** @copydoc PDMIOAPICREG::pfnSetIrqR3 */

DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel));

/** Pointer to the PIC device instance - R0. */

PPDMDEVINSR0 pDevInsR0;

/** @copydoc PDMIOAPICREG::pfnSetIrqR3 */

DECLR0CALLBACKMEMBER(void, pfnSetIrqR0,(PPDMDEVINS pDevIns, int iIrq, int iLevel));

/** Pointer to the APIC device instance - RC Ptr. */

PPDMDEVINSRC pDevInsRC;

/** @copydoc PDMIOAPICREG::pfnSetIrqR3 */

DECLRCCALLBACKMEMBER(void, pfnSetIrqRC,(PPDMDEVINS pDevIns, int iIrq, int iLevel));

} PDMIOAPIC;

#define PDM_PCI_BUSSES_MAX 8

typedef struct PDMPCIBUS

{

/** PCI bus number. */

RTUINT iBus;

RTUINT uPadding0; /**< Alignment padding.*/

/** Pointer to PCI Bus device instance. */

PPDMDEVINSR3 pDevInsR3;

/** @copydoc PDMPCIBUSREG::pfnSetIrqR3 */

DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel));

/** @copydoc PDMPCIBUSREG::pfnRegisterR3 */

DECLR3CALLBACKMEMBER(int, pfnRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, const char *pszName, int iDev));

/** @copydoc PDMPCIBUSREG::pfnIORegionRegisterR3 */

DECLR3CALLBACKMEMBER(int, pfnIORegionRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iRegion, uint32_t cbRegion,

PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));

/** @copydoc PDMPCIBUSREG::pfnSetConfigCallbacksR3 */

DECLR3CALLBACKMEMBER(void, pfnSetConfigCallbacksR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead,

PPFNPCICONFIGREAD ppfnReadOld, PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));

/** @copydoc PDMPCIBUSREG::pfnSaveExecR3 */

DECLR3CALLBACKMEMBER(int, pfnSaveExecR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));

/** @copydoc PDMPCIBUSREG::pfnLoadExecR3 */

DECLR3CALLBACKMEMBER(int, pfnLoadExecR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));

/** @copydoc PDMPCIBUSREG::pfnFakePCIBIOSR3 */

DECLR3CALLBACKMEMBER(int, pfnFakePCIBIOSR3,(PPDMDEVINS pDevIns));

/** Pointer to the PIC device instance - R0. */

R0PTRTYPE(PPDMDEVINS) pDevInsR0;

/** @copydoc PDMPCIBUSREG::pfnSetIrqR3 */

DECLR0CALLBACKMEMBER(void, pfnSetIrqR0,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel));

/** Pointer to PCI Bus device instance. */

PPDMDEVINSRC pDevInsRC;

/** @copydoc PDMPCIBUSREG::pfnSetIrqR3 */

DECLRCCALLBACKMEMBER(void, pfnSetIrqRC,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel));

} PDMPCIBUS;

#ifdef IN_RING3

typedef struct PDMDMAC

{

/** Pointer to the DMAC device instance. */

PPDMDEVINSR3 pDevIns;

/** Copy of the registration structure. */

PDMDMACREG Reg;

} PDMDMAC;

typedef struct PDMRTC

{

/** Pointer to the RTC device instance. */

PPDMDEVINSR3 pDevIns;

/** Copy of the registration structure. */

PDMRTCREG Reg;

} PDMRTC;

#endif /* IN_RING3 */

typedef enum PDMMODTYPE

{

/** Raw-mode (RC) context module. */

PDMMOD_TYPE_RC,

/** Ring-0 (host) context module. */

PDMMOD_TYPE_R0,

/** Ring-3 (host) context module. */

PDMMOD_TYPE_R3

} PDMMODTYPE;

#define PDMMOD_NAME_LEN 32

typedef struct PDMMOD

{

/** Module name. This is used for refering to

char szName[PDMMOD_NAME_LEN];

/** Module type. */

PDMMODTYPE eType;

/** Loader module handle. Not used for R0 modules. */

RTLDRMOD hLdrMod;

/** Loaded address.

RTUINTPTR ImageBase;

/** Old loaded address.

RTUINTPTR OldImageBase;

/** Where the R3 HC bits are stored.

void *pvBits;

/** Pointer to next module. */

struct PDMMOD *pNext;

/** Module filename. */

char szFilename[1];

} PDMMOD;

typedef PDMMOD *PPDMMOD;

#define PDMQUEUE_FREE_SLACK 16

typedef enum PDMQUEUETYPE

{

/** Device consumer. */

PDMQUEUETYPE_DEV = 1,

/** Driver consumer. */

PDMQUEUETYPE_DRV,

/** Internal consumer. */

PDMQUEUETYPE_INTERNAL,

/** External consumer. */

PDMQUEUETYPE_EXTERNAL

} PDMQUEUETYPE;

typedef struct PDMQUEUE *PPDMQUEUE;

typedef struct PDMQUEUE

{

/** Pointer to the next queue in the list. */

R3PTRTYPE(PPDMQUEUE) pNext;

/** Type specific data. */

union

{

/** PDMQUEUETYPE_DEV */

struct

{

/** Pointer to consumer function. */

R3PTRTYPE(PFNPDMQUEUEDEV) pfnCallback;

/** Pointer to the device instance owning the queue. */

R3PTRTYPE(PPDMDEVINS) pDevIns;

} Dev;

/** PDMQUEUETYPE_DRV */

struct

{

/** Pointer to consumer function. */

R3PTRTYPE(PFNPDMQUEUEDRV) pfnCallback;

/** Pointer to the driver instance owning the queue. */

R3PTRTYPE(PPDMDRVINS) pDrvIns;

} Drv;

/** PDMQUEUETYPE_INTERNAL */

struct

{

/** Pointer to consumer function. */

R3PTRTYPE(PFNPDMQUEUEINT) pfnCallback;

} Int;

/** PDMQUEUETYPE_EXTERNAL */

struct

{

/** Pointer to consumer function. */

R3PTRTYPE(PFNPDMQUEUEEXT) pfnCallback;

/** Pointer to user argument. */

R3PTRTYPE(void *) pvUser;

} Ext;

} u;

/** Queue type. */

PDMQUEUETYPE enmType;

/** The interval between checking the queue for events.

uint32_t cMilliesInterval;

/** Interval timer. Only used if cMilliesInterval is non-zero. */

PTMTIMERR3 pTimer;

/** Pointer to the VM - R3. */

PVMR3 pVMR3;

/** LIFO of pending items - R3. */

R3PTRTYPE(PPDMQUEUEITEMCORE) volatile pPendingR3;

/** Pointer to the VM - R0. */

PVMR0 pVMR0;

/** LIFO of pending items - R0. */

R0PTRTYPE(PPDMQUEUEITEMCORE) volatile pPendingR0;

/** Pointer to the GC VM and indicator for GC enabled queue.

PVMRC pVMRC;

/** LIFO of pending items - GC. */

RCPTRTYPE(PPDMQUEUEITEMCORE) volatile pPendingRC;

/** Item size (bytes). */

RTUINT cbItem;

/** Number of items in the queue. */

RTUINT cItems;

/** Index to the free head (where we insert). */

uint32_t volatile iFreeHead;

/** Index to the free tail (where we remove). */

uint32_t volatile iFreeTail;

/** Array of pointers to free items. Variable size. */

struct PDMQUEUEFREEITEM

{

/** Pointer to the free item - HC Ptr. */

R3PTRTYPE(PPDMQUEUEITEMCORE) volatile pItemR3;

/** Pointer to the free item - HC Ptr. */

R0PTRTYPE(PPDMQUEUEITEMCORE) volatile pItemR0;

/** Pointer to the free item - GC Ptr. */

RCPTRTYPE(PPDMQUEUEITEMCORE) volatile pItemRC;

#if HC_ARCH_BITS == 64

RTRCPTR Alignment0;

#endif

} aFreeItems[1];

} PDMQUEUE;

typedef enum PDMDEVHLPTASKOP

{

/** The usual invalid 0 entry. */

PDMDEVHLPTASKOP_INVALID = 0,

/** ISASetIrq */

PDMDEVHLPTASKOP_ISA_SET_IRQ,

/** PCISetIrq */

PDMDEVHLPTASKOP_PCI_SET_IRQ,

/** PCISetIrq */

PDMDEVHLPTASKOP_IOAPIC_SET_IRQ,

/** The usual 32-bit hack. */

PDMDEVHLPTASKOP_32BIT_HACK = 0x7fffffff

} PDMDEVHLPTASKOP;

typedef struct PDMDEVHLPTASK

{

/** The queue item core (don't touch). */

PDMQUEUEITEMCORE Core;

/** Pointer to the device instance (R3 Ptr). */

PPDMDEVINSR3 pDevInsR3;

/** This operation to perform. */

PDMDEVHLPTASKOP enmOp;

#if HC_ARCH_BITS == 64

uint32_t Alignment0;

#endif

/** Parameters to the operation. */

union PDMDEVHLPTASKPARAMS

{

/**

struct PDMDEVHLPTASKSETIRQ

{

/** The IRQ */

int iIrq;

/** The new level. */

int iLevel;

} SetIRQ;

} u;

} PDMDEVHLPTASK;

typedef PDMDEVHLPTASK *PPDMDEVHLPTASK;

typedef const PDMDEVHLPTASK *PCPDMDEVHLPTASK;

typedef struct PDMUSBHUB

{

/** The USB versions this hub support.

uint32_t fVersions;

/** The number of ports on the hub. */

uint32_t cPorts;

/** The number of available ports (0..cPorts). */

uint32_t cAvailablePorts;

/** The driver instance of the hub. */

PPDMDRVINS pDrvIns;

/** Copy of the to the registration structure. */

PDMUSBHUBREG Reg;

/** Pointer to the next hub in the list. */

struct PDMUSBHUB *pNext;

} PDMUSBHUB;

typedef const PDMUSBHUB *PCPDMUSBHUB;

typedef struct PDMASYNCCOMPLETIONTEMPLATE *PPDMASYNCCOMPLETIONTEMPLATE;

typedef struct PDMASYNCCOMPLETIONMANAGER *PPDMASYNCCOMPLETIONMANAGER;

#define PDM2VM(pPDM) ( (PVM)((char*)pPDM - pPDM->offVM) )

typedef struct PDM

{

/** Offset to the VM structure.

RTUINT offVM;

RTUINT uPadding0; /**< Alignment padding.*/

/** List of registered devices. (FIFO) */

R3PTRTYPE(PPDMDEV) pDevs;

/** List of devices instances. (FIFO) */

R3PTRTYPE(PPDMDEVINS) pDevInstances;

/** List of registered USB devices. (FIFO) */

R3PTRTYPE(PPDMUSB) pUsbDevs;

/** List of USB devices instances. (FIFO) */

R3PTRTYPE(PPDMUSBINS) pUsbInstances;

/** List of registered drivers. (FIFO) */

R3PTRTYPE(PPDMDRV) pDrvs;

/** List of initialized critical sections. (LIFO) */

R3PTRTYPE(PPDMCRITSECTINT) pCritSects;

/** PCI Buses. */

PDMPCIBUS aPciBuses[PDM_PCI_BUSSES_MAX];

/** The register PIC device. */

PDMPIC Pic;

/** The registerd APIC device. */

PDMAPIC Apic;

/** The registerd I/O APIC device. */

PDMIOAPIC IoApic;

/** The registered DMAC device. */

R3PTRTYPE(PPDMDMAC) pDmac;

/** The registered RTC device. */

R3PTRTYPE(PPDMRTC) pRtc;

/** The registered USB HUBs. (FIFO) */

R3PTRTYPE(PPDMUSBHUB) pUsbHubs;

/** Queue in which devhlp tasks are queued for R3 execution - R3 Ptr. */

R3PTRTYPE(PPDMQUEUE) pDevHlpQueueR3;

/** Queue in which devhlp tasks are queued for R3 execution - R0 Ptr. */

R0PTRTYPE(PPDMQUEUE) pDevHlpQueueR0;

/** Queue in which devhlp tasks are queued for R3 execution - RC Ptr. */

RCPTRTYPE(PPDMQUEUE) pDevHlpQueueRC;

/** The number of entries in the apQueuedCritSectsLeaves table that's currnetly in use. */

RTUINT cQueuedCritSectLeaves;

/** Critical sections queued in RC/R0 because of contention preventing leave to complete. (R3 Ptrs)

R3PTRTYPE(PPDMCRITSECT) apQueuedCritSectsLeaves[8];

/** Linked list of timer driven PDM queues. */

R3PTRTYPE(struct PDMQUEUE *) pQueuesTimer;

/** Linked list of force action driven PDM queues. */

R3PTRTYPE(struct PDMQUEUE *) pQueuesForced;

/** Pointer to the queue which should be manually flushed - R0 Ptr.

R0PTRTYPE(struct PDMQUEUE *) pQueueFlushR0;

/** Pointer to the queue which should be manually flushed - RC Ptr.

RCPTRTYPE(struct PDMQUEUE *) pQueueFlushRC;

#if HC_ARCH_BITS == 64

RTRCPTR padding0;

#endif

/** Head of the PDM Thread list. (singly linked) */

R3PTRTYPE(PPDMTHREAD) pThreads;

/** Tail of the PDM Thread list. (singly linked) */

R3PTRTYPE(PPDMTHREAD) pThreadsTail;

/** Head of the asychronous tasks managers. (singly linked) */

R3PTRTYPE(PPDMASYNCCOMPLETIONMANAGER) pAsyncCompletionManagerHead;

/** Head of the templates. (singly linked) */

R3PTRTYPE(PPDMASYNCCOMPLETIONTEMPLATE) pAsyncCompletionTemplates;

/** @name VMM device heap

/** Pointer to the heap base (MMIO2 ring-3 mapping). NULL if not registered. */

RTR3PTR pvVMMDevHeap;

/** The heap size. */

RTUINT cbVMMDevHeap;

/** Free space. */

RTUINT cbVMMDevHeapLeft;

/** The current mapping. NIL_RTGCPHYS if not mapped or registered. */

RTGCPHYS GCPhysVMMDevHeap;

/** @} */

/** TEMPORARY HACKS FOR NETWORK POLLING.

RTUINT cPollers;

#if HC_ARCH_BITS == 64

RTUINT padding1;

#endif

R3PTRTYPE(PFNPDMDRVPOLLER) apfnPollers[16];

R3PTRTYPE(PPDMDRVINS) aDrvInsPollers[16];

PTMTIMERR3 pTimerPollers;

/** @} */

/** The PDM lock.

PDMCRITSECT CritSect;

/** Number of times a critical section leave requesed needed to be queued for ring-3 execution. */

STAMCOUNTER StatQueuedCritSectLeaves;

} PDM;

typedef PDM *PPDM;

typedef struct PDMUSERPERVM

{

/** Pointer to list of loaded modules. */

PPDMMOD pModules;

/** @todo move more stuff over here. */

} PDMUSERPERVM;

typedef PDMUSERPERVM *PPDMUSERPERVM;

#ifdef IN_RING3

extern const PDMDRVHLP g_pdmR3DrvHlp;

extern const PDMDEVHLPR3 g_pdmR3DevHlpTrusted;

extern const PDMDEVHLPR3 g_pdmR3DevHlpUnTrusted;

extern const PDMPICHLPR3 g_pdmR3DevPicHlp;

extern const PDMAPICHLPR3 g_pdmR3DevApicHlp;

extern const PDMIOAPICHLPR3 g_pdmR3DevIoApicHlp;

extern const PDMPCIHLPR3 g_pdmR3DevPciHlp;

extern const PDMDMACHLP g_pdmR3DevDmacHlp;

extern const PDMRTCHLP g_pdmR3DevRtcHlp;

#endif

#ifdef VBOX_STRICT

# define PDMDEV_ASSERT_DEVINS(pDevIns) \

do { \

AssertPtr(pDevIns); \

Assert(pDevIns->u32Version == PDM_DEVINS_VERSION); \

Assert(pDevIns->CTX_SUFF(pvInstanceData) == (void *)&pDevIns->achInstanceData[0]); \

} while (0)

#else

# define PDMDEV_ASSERT_DEVINS(pDevIns) do { } while (0)

#endif

#ifdef IN_RING3

int pdmR3CritSectInit(PVM pVM);

int pdmR3CritSectTerm(PVM pVM);

void pdmR3CritSectRelocate(PVM pVM);

int pdmR3CritSectInitDevice(PVM pVM, PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, const char *pszName);

int pdmR3CritSectDeleteDevice(PVM pVM, PPDMDEVINS pDevIns);

int pdmR3DevInit(PVM pVM);

PPDMDEV pdmR3DevLookup(PVM pVM, const char *pszName);

int pdmR3DevFindLun(PVM pVM, const char *pszDevice, unsigned iInstance, unsigned iLun, PPDMLUN *ppLun);

DECLCALLBACK(bool) pdmR3DevHlpQueueConsumer(PVM pVM, PPDMQUEUEITEMCORE pItem);

int pdmR3UsbLoadModules(PVM pVM);

int pdmR3UsbInstantiateDevices(PVM pVM);

PPDMUSB pdmR3UsbLookup(PVM pVM, const char *pszName);

int pdmR3UsbFindLun(PVM pVM, const char *pszDevice, unsigned iInstance, unsigned iLun, PPDMLUN *ppLun);

int pdmR3UsbRegisterHub(PVM pVM, PPDMDRVINS pDrvIns, uint32_t fVersions, uint32_t cPorts, PCPDMUSBHUBREG pUsbHubReg, PPCPDMUSBHUBHLP ppUsbHubHlp);

int pdmR3UsbVMInitComplete(PVM pVM);

int pdmR3DrvInit(PVM pVM);

int pdmR3DrvDetach(PPDMDRVINS pDrvIns);

void pdmR3DrvDestroyChain(PPDMDRVINS pDrvIns);

PPDMDRV pdmR3DrvLookup(PVM pVM, const char *pszName);

int pdmR3LdrInitU(PUVM pUVM);

void pdmR3LdrTermU(PUVM pUVM);

char * pdmR3FileR3(const char *pszFile, bool fShared = false);

int pdmR3LoadR3U(PUVM pUVM, const char *pszFilename, const char *pszName);

void pdmR3QueueRelocate(PVM pVM, RTGCINTPTR offDelta);

int pdmR3ThreadCreateDevice(PVM pVM, PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,

PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName);

int pdmR3ThreadCreateUsb(PVM pVM, PPDMDRVINS pUsbIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADUSB pfnThread,

PFNPDMTHREADWAKEUPUSB pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName);

int pdmR3ThreadCreateDriver(PVM pVM, PPDMDRVINS pDrvIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDRV pfnThread,

PFNPDMTHREADWAKEUPDRV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName);

int pdmR3ThreadDestroyDevice(PVM pVM, PPDMDEVINS pDevIns);

int pdmR3ThreadDestroyUsb(PVM pVM, PPDMUSBINS pUsbIns);

int pdmR3ThreadDestroyDriver(PVM pVM, PPDMDRVINS pDrvIns);

void pdmR3ThreadDestroyAll(PVM pVM);

int pdmR3ThreadResumeAll(PVM pVM);

int pdmR3ThreadSuspendAll(PVM pVM);

#ifdef VBOX_WITH_PDM_ASYNC_COMPLETION

int pdmR3AsyncCompletionInit(PVM pVM);

int pdmR3AsyncCompletionTerm(PVM pVM);

#endif

#endif /* IN_RING3 */

void pdmLock(PVM pVM);

int pdmLockEx(PVM pVM, int rc);

void pdmUnlock(PVM pVM);

#endif