PATMAll.cpp revision d4c86e452c164353ab87a2e6455abd365be348a5
/* $Id$ */
/** @file
* PATM - The Patch Manager, all contexts.
*/
/*
* Copyright (C) 2006-2007 Sun Microsystems, Inc.
*
* This file is part of VirtualBox Open Source Edition (OSE), as
* available from http://www.virtualbox.org. This file is free software;
* General Public License (GPL) as published by the Free Software
* Foundation, in version 2 as it comes in the "COPYING" file of the
* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
*
* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
* Clara, CA 95054 USA or visit http://www.sun.com if you need
* additional information or have any questions.
*/
/*******************************************************************************
* Header Files *
*******************************************************************************/
#define LOG_GROUP LOG_GROUP_PATM
#include <VBox/disopcode.h>
#include "PATMInternal.h"
#include "PATMA.h"
/**
* Load virtualized flags.
*
* This function is called from CPUMRawEnter(). It doesn't have to update the
* IF and IOPL eflags bits, the caller will enforce those to set and 0 repectively.
*
* @param pVM VM handle.
* @param pCtxCore The cpu context core.
* @see pg_raw
*/
{
/*
* Currently we don't bother to check whether PATM is enabled or not.
* For all cases where it isn't, IOPL will be safe and IF will be set.
*/
AssertMsg((efl & X86_EFL_IF) || PATMShouldUseRawMode(pVM, (RTRCPTR)pCtxCore->eip), ("X86_EFL_IF is clear and PATM is disabled! (eip=%VGv eflags=%08x fPATM=%d pPATMGC=%VGv-%VGv\n", pCtxCore->eip, pCtxCore->eflags.u32, PATMIsEnabled(pVM), pVM->patm.s.pPatchMemGC, pVM->patm.s.pPatchMemGC + pVM->patm.s.cbPatchMem));
AssertReleaseMsg(CTXSUFF(pVM->patm.s.pGCState)->fPIF || fPatchCode, ("fPIF=%d eip=%VGv\n", CTXSUFF(pVM->patm.s.pGCState)->fPIF, pCtxCore->eip));
efl |= X86_EFL_IF;
#ifdef IN_RING3
#ifdef PATM_EMULATE_SYSENTER
int rc;
/* Check if the sysenter handler has changed. */
if ( rc == VINF_SUCCESS
)
{
{
{
if (rc == VINF_SUCCESS)
{
}
}
else
}
}
else
{
}
#endif
#endif
}
/**
* Restores virtualized flags.
*
* This function is called from CPUMRawLeave(). It will update the eflags register.
*
** @note Only here we are allowed to switch back to guest code (without a special reason such as a trap in patch code)!!
*
* @param pVM VM handle.
* @param pCtxCore The cpu context core.
* @param rawRC Raw mode return code
* @see @ref pg_raw
*/
{
/*
* We will only be called if PATMRawEnter was previously called.
*/
efl = (efl & ~PATM_VIRTUAL_FLAGS_MASK) | (CTXSUFF(pVM->patm.s.pGCState)->uVMFlags & PATM_VIRTUAL_FLAGS_MASK);
AssertReleaseMsg((efl & X86_EFL_IF) || fPatchCode || rawRC == VINF_PATM_PENDING_IRQ_AFTER_IRET || VBOX_FAILURE(rawRC), ("Inconsistent state at %VGv rc=%Vrc\n", pCtxCore->eip, rawRC));
AssertReleaseMsg(CTXSUFF(pVM->patm.s.pGCState)->fPIF || fPatchCode || VBOX_FAILURE(rawRC), ("fPIF=%d eip=%VGv rc=%Vrc\n", CTXSUFF(pVM->patm.s.pGCState)->fPIF, pCtxCore->eip, rawRC));
#ifdef IN_RING3
if ( (efl & X86_EFL_IF)
&& fPatchCode
)
{
if ( rawRC < VINF_PATM_LEAVEGC_FIRST
|| rawRC > VINF_PATM_LEAVEGC_LAST)
{
/*
* Golden rules:
* - Don't interrupt special patch streams that replace special instructions
* - Don't break instruction fusing (sti, pop ss, mov ss)
* - Don't go back to an instruction that has been overwritten by a patch jump
* - Don't interrupt an idt handler on entry (1st instruction); technically incorrect
*
*/
{
if (enmState == PATMTRANS_SAFE)
{
Log(("Switchback from %VGv to %VGv (Psp=%x)\n", pCtxCore->eip, pOrgInstrGC, CTXSUFF(pVM->patm.s.pGCState)->Psp));
fPatchCode = false; /* to reset the stack ptr */
CTXSUFF(pVM->patm.s.pGCState)->GCPtrInhibitInterrupts = 0; /* reset this pointer; safe otherwise the state would be PATMTRANS_INHIBITIRQ */
}
else
{
}
}
else
{
LogFlow(("Patch address %VGv can't be interrupted (fPIF=%d)!\n", pCtxCore->eip, CTXSUFF(pVM->patm.s.pGCState)->fPIF));
}
}
}
#else /* !IN_RING3 */
AssertMsgFailed(("!IN_RING3"));
#endif /* !IN_RING3 */
if (!fPatchCode)
{
{
}
/* Reset the stack pointer to the top of the stack. */
#ifdef DEBUG
{
}
#endif
}
}
/**
* Get the EFLAGS.
* This is a worker for CPUMRawGetEFlags().
*
* @returns The eflags.
* @param pVM The VM handle.
* @param pCtxCore The context core.
*/
{
return efl;
}
/**
* Updates the EFLAGS.
* This is a worker for CPUMRawSetEFlags().
*
* @param pVM The VM handle.
* @param pCtxCore The context core.
* @param efl The new EFLAGS value.
*/
{
efl |= X86_EFL_IF;
}
/**
* Check if we must use raw mode (patch code being executed)
*
* @param pVM VM handle.
* @param pAddrGC Guest context address
*/
{
return ( PATMIsEnabled(pVM)
&& ((pAddrGC >= (RTRCPTR)pVM->patm.s.pPatchMemGC && pAddrGC < (RTRCPTR)((RTRCUINTPTR)pVM->patm.s.pPatchMemGC + pVM->patm.s.cbPatchMem)))) ? true : false;
}
/**
* Returns the guest context pointer and size of the GC context structure
*
* @returns VBox status code.
* @param pVM The VM to operate on.
*/
{
}
/**
* Checks whether the GC address is part of our patch region
*
* @returns VBox status code.
* @param pVM The VM to operate on.
* @param pAddrGC Guest context address
*/
{
return (PATMIsEnabled(pVM) && pAddrGC >= pVM->patm.s.pPatchMemGC && pAddrGC < (RTRCPTR)((RTRCUINTPTR)pVM->patm.s.pPatchMemGC + pVM->patm.s.cbPatchMem)) ? true : false;
}
/**
* Set parameters for pending MMIO patch operation
*
* @returns VBox status code.
* @param pDevIns Device instance.
* @param GCPhys MMIO physical address
* @param pCachedData GC pointer to cached data
*/
{
return VINF_SUCCESS;
}
/**
* Checks if the interrupt flag is enabled or not.
*
* @returns true if it's enabled.
* @returns false if it's diabled.
*
* @param pVM The VM handle.
*/
{
int rc;
}
/**
* Checks if the interrupt flag is enabled or not.
*
* @returns true if it's enabled.
* @returns false if it's diabled.
*
* @param pVM The VM handle.
* @param pCtxCore CPU context
*/
{
if (PATMIsEnabled(pVM))
{
return false;
}
}
/**
* Check if the instruction is patched as a duplicated function
*
* @returns patch record
* @param pVM The VM to operate on.
* @param pInstrGC Guest context point to the instruction
*
*/
{
pRec = (PPATMPATCHREC)RTAvloU32Get(&CTXSUFF(pVM->patm.s.PatchLookupTree)->PatchTree, (AVLOU32KEY)pInstrGC);
if ( pRec
)
return pRec;
return 0;
}
/**
* Checks if the int 3 was caused by a patched instruction
*
* @returns VBox status
*
* @param pVM The VM handle.
* @param pInstrGC Instruction pointer
* @param pOpcode Original instruction opcode (out, optional)
* @param pSize Original instruction size (out, optional)
*/
{
pRec = (PPATMPATCHREC)RTAvloU32Get(&CTXSUFF(pVM->patm.s.PatchLookupTree)->PatchTree, (AVLOU32KEY)pInstrGC);
if ( pRec
)
{
return true;
}
return false;
}
/**
* Emulate sysenter, sysexit and syscall instructions
*
* @returns VBox status
*
* @param pVM The VM handle.
* @param pCtxCore The relevant core context.
* @param pCpu Disassembly context
*/
{
int rc;
{
goto end;
Log2(("PATMSysCall: sysenter from %VGv to %VGv\n", pRegFrame->eip, pVM->patm.s.pfnSysEnterPatchGC));
/** @todo the base and limit are forced to 0 & 4G-1 resp. We assume the selector is wide open here. */
/** @note The Intel manual suggests that the OS is responsible for this. */
/* Turn off interrupts. */
return VINF_SUCCESS;
}
else
{
goto end;
return VINF_SUCCESS;
}
else
{
/** @todo implement syscall */
}
else
{
/** @todo implement sysret */
}
end:
return VINF_EM_RAW_RING_SWITCH;
}
/**
* Adds branch pair to the lookup cache of the particular branch instruction
*
* @returns VBox status
* @param pVM The VM to operate on.
* @param pJumpTableGC Pointer to branch instruction lookup cache
* @param pBranchTarget Original branch target
* @param pRelBranchPatch Relative duplicated function address
*/
PATMDECL(int) PATMAddBranchToLookupCache(PVM pVM, RTRCPTR pJumpTableGC, RTRCPTR pBranchTarget, RTGCUINTPTR pRelBranchPatch)
{
Log(("PATMAddBranchToLookupCache: Adding (%VGv->%VGv (%VGv)) to table %VGv\n", pBranchTarget, pRelBranchPatch + pVM->patm.s.pPatchMemGC, pRelBranchPatch, pJumpTableGC));
#ifdef IN_GC
#else
#endif
{
uint32_t i;
for (i=0;i<pJumpTable->nrSlots;i++)
{
{
/* Relative address - eases relocation */
pJumpTable->cAddresses++;
break;
}
}
#ifdef VBOX_WITH_STATISTICS
#endif
}
else
{
/* Replace an old entry. */
/** @todo replacement strategy isn't really bright. change to something better if required. */
/* Relative address - eases relocation */
}
return VINF_SUCCESS;
}
/**
* Return the name of the patched instruction
*
* @returns instruction name
*
* @param opcode DIS instruction opcode
* @param fPatchFlags Patch flags
*/
{
switch (opcode)
{
case OP_CLI:
pszInstr = "cli";
break;
case OP_PUSHF:
pszInstr = "pushf";
break;
case OP_POPF:
pszInstr = "popf";
break;
case OP_STR:
pszInstr = "str";
break;
case OP_LSL:
pszInstr = "lsl";
break;
case OP_LAR:
pszInstr = "lar";
break;
case OP_SGDT:
pszInstr = "sgdt";
break;
case OP_SLDT:
pszInstr = "sldt";
break;
case OP_SIDT:
pszInstr = "sidt";
break;
case OP_SMSW:
pszInstr = "smsw";
break;
case OP_VERW:
pszInstr = "verw";
break;
case OP_VERR:
pszInstr = "verr";
break;
case OP_CPUID:
pszInstr = "cpuid";
break;
case OP_JMP:
pszInstr = "jmp";
break;
case OP_JO:
pszInstr = "jo";
break;
case OP_JNO:
pszInstr = "jno";
break;
case OP_JC:
pszInstr = "jc";
break;
case OP_JNC:
pszInstr = "jnc";
break;
case OP_JE:
pszInstr = "je";
break;
case OP_JNE:
pszInstr = "jne";
break;
case OP_JBE:
pszInstr = "jbe";
break;
case OP_JNBE:
pszInstr = "jnbe";
break;
case OP_JS:
pszInstr = "js";
break;
case OP_JNS:
pszInstr = "jns";
break;
case OP_JP:
pszInstr = "jp";
break;
case OP_JNP:
pszInstr = "jnp";
break;
case OP_JL:
pszInstr = "jl";
break;
case OP_JNL:
pszInstr = "jnl";
break;
case OP_JLE:
pszInstr = "jle";
break;
case OP_JNLE:
pszInstr = "jnle";
break;
case OP_JECXZ:
pszInstr = "jecxz";
break;
case OP_LOOP:
pszInstr = "loop";
break;
case OP_LOOPNE:
pszInstr = "loopne";
break;
case OP_LOOPE:
pszInstr = "loope";
break;
case OP_MOV:
if (fPatchFlags & PATMFL_IDTHANDLER)
{
}
break;
case OP_SYSENTER:
pszInstr = "sysenter";
break;
case OP_PUSH:
pszInstr = "push (cs)";
break;
case OP_CALL:
pszInstr = "call";
break;
case OP_IRET:
pszInstr = "iret";
break;
}
return pszInstr;
}