HWACCMInternal.h revision d099ccfb66d26601f93e7967e8e73cee4b9c62df
4c221b0da1816acf2ca302b10092df059484468dvboxsync * HWACCM - Internal header file.
4c221b0da1816acf2ca302b10092df059484468dvboxsync * Copyright (C) 2006-2007 Sun Microsystems, Inc.
4c221b0da1816acf2ca302b10092df059484468dvboxsync * This file is part of VirtualBox Open Source Edition (OSE), as
4c221b0da1816acf2ca302b10092df059484468dvboxsync * available from http://www.virtualbox.org. This file is free software;
4c221b0da1816acf2ca302b10092df059484468dvboxsync * you can redistribute it and/or modify it under the terms of the GNU
4c221b0da1816acf2ca302b10092df059484468dvboxsync * General Public License (GPL) as published by the Free Software
4c221b0da1816acf2ca302b10092df059484468dvboxsync * Foundation, in version 2 as it comes in the "COPYING" file of the
4c221b0da1816acf2ca302b10092df059484468dvboxsync * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
4c221b0da1816acf2ca302b10092df059484468dvboxsync * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
4c221b0da1816acf2ca302b10092df059484468dvboxsync * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
4c221b0da1816acf2ca302b10092df059484468dvboxsync * Clara, CA 95054 USA or visit http://www.sun.com if you need
4c221b0da1816acf2ca302b10092df059484468dvboxsync * additional information or have any questions.
4c221b0da1816acf2ca302b10092df059484468dvboxsync#if HC_ARCH_BITS == 64 || defined(VBOX_WITH_HYBRID_32BIT_KERNEL) || defined (VBOX_WITH_64_BITS_GUESTS)
4c221b0da1816acf2ca302b10092df059484468dvboxsync/* Enable 64 bits guest support. */
4c221b0da1816acf2ca302b10092df059484468dvboxsync/* Seeing somewhat random behaviour on my Nehalem system with auto-save of guest MSRs;
4c221b0da1816acf2ca302b10092df059484468dvboxsync * for some strange reason the CPU doesn't save the MSRs during the VM-exit.
4c221b0da1816acf2ca302b10092df059484468dvboxsync * Clearly visible with a dual VCPU configured OpenSolaris 200906 live cd VM.
4c221b0da1816acf2ca302b10092df059484468dvboxsync * Note: change the assembly files when enabling this! (remove the manual auto load/save)
4c221b0da1816acf2ca302b10092df059484468dvboxsync/** @defgroup grp_hwaccm_int Internal
4c221b0da1816acf2ca302b10092df059484468dvboxsync * @ingroup grp_hwaccm
#ifdef VBOX_STRICT
#define HWACCM_VMX_TRAP_MASK RT_BIT(X86_XCPT_DE) | RT_BIT(X86_XCPT_NM) | RT_BIT(X86_XCPT_PF) | RT_BIT(X86_XCPT_UD) | RT_BIT(X86_XCPT_NP) | RT_BIT(X86_XCPT_SS) | RT_BIT(X86_XCPT_GP) | RT_BIT(X86_XCPT_MF)
/* All exceptions have to be intercept in emulated real-mode (minues NM & PF as they are always intercepted. */
#define HWACCM_VMX_TRAP_MASK_REALMODE RT_BIT(X86_XCPT_DE) | RT_BIT(X86_XCPT_DB) | RT_BIT(X86_XCPT_NMI) | RT_BIT(X86_XCPT_BP) | RT_BIT(X86_XCPT_OF) | RT_BIT(X86_XCPT_BR) | RT_BIT(X86_XCPT_UD) | RT_BIT(X86_XCPT_DF) | RT_BIT(X86_XCPT_CO_SEG_OVERRUN) | RT_BIT(X86_XCPT_TS) | RT_BIT(X86_XCPT_NP) | RT_BIT(X86_XCPT_SS) | RT_BIT(X86_XCPT_GP) | RT_BIT(X86_XCPT_MF) | RT_BIT(X86_XCPT_AC) | RT_BIT(X86_XCPT_MC) | RT_BIT(X86_XCPT_XF)
/** Maximum number of page flushes we are willing to remember before considering a full TLB flush. */
#define VBOX_HWACCM_WITH_GUEST_PATCHING
bool fFlushTLB;
bool fConfigured;
bool fIgnoreAMDVInUseError;
volatile bool fInUse;
typedef struct HWACCM
bool fInitialized;
bool fAllowed;
bool fNestedPaging;
bool fAllowNestedPaging;
bool fAllow64BitGuests;
bool fHasIoApic;
bool fTRPPatchingAllowed;
bool fGlobalInit;
bool fTPRPatchingActive;
#if HC_ARCH_BITS == 32 && defined(VBOX_ENABLE_64_BITS_GUESTS) && !defined(VBOX_WITH_HYBRID_32BIT_KERNEL)
bool fSupported;
bool fEnabled;
bool fVPID;
bool fAllowVPID;
bool fUnrestrictedGuest;
/** Virtual address of the identity page table used for real mode and protected mode without paging emulation in EPT mode. */
#ifdef VBOX_WITH_CRASHDUMP_MAGIC
} msr;
} vmx;
bool fSupported;
bool fEnabled;
bool fAlwaysFlushTLB;
bool fIgnoreInUseError;
} svm;
} cpuid;
bool fHWACCMR0Init;
} HWACCM;
typedef struct VMCSCACHE
#ifdef VBOX_WITH_CRASHDUMP_MAGIC
} Write;
} Read;
#ifdef DEBUG
} TestIn;
} TestOut;
} ScratchPad;
} VMCSCACHE;
typedef DECLCALLBACK(int) FNHWACCMVMXSTARTVM(RTHCUINT fResume, PCPUMCTX pCtx, PVMCSCACHE pCache, PVM pVM, PVMCPU pVCpu);
typedef DECLCALLBACK(int) FNHWACCMSVMVMRUN(RTHCPHYS pVMCBHostPhys, RTHCPHYS pVMCBPhys, PCPUMCTX pCtx, PVM pVM, PVMCPU pVCpu);
typedef struct HWACCMCPU
bool fFPUOldStyleOverride;
bool fResumeVM;
bool fForceTLBFlush;
bool fActive;
} RealMode;
} lasterror;
} vmx;
} svm;
} Event;
bool fEnabled;
unsigned uPort;
unsigned uAndVal;
unsigned cbSize;
} Port;
} PendingIO;
unsigned cPages;
} TlbShootdown;
#if HC_ARCH_BITS == 32 && defined(VBOX_ENABLE_64_BITS_GUESTS) && !defined(VBOX_WITH_HYBRID_32BIT_KERNEL)
#ifdef VBOX_WITH_STATISTICS
} HWACCMCPU;
#ifdef IN_RING0
#ifdef VBOX_STRICT
# define HWACCMDumpRegs(a, b ,c) do { } while (0)
# define HWACCMR0DumpDescriptor(a, b, c) do { } while (0)
VMMR0DECL(int) HWACCMR0DummyEnableCpu(PHWACCM_CPUINFO pCpu, PVM pVM, void *pvPageCpu, RTHCPHYS pPageCpuPhys);
VMMR0DECL(int) HWACCMR0DummyDisableCpu(PHWACCM_CPUINFO pCpu, void *pvPageCpu, RTHCPHYS pPageCpuPhys);
# ifdef VBOX_WITH_KERNEL_USING_XMM
DECLASM(int) hwaccmR0VMXStartVMWrapXMM(RTHCUINT fResume, PCPUMCTX pCtx, PVMCSCACHE pCache, PVM pVM, PVMCPU pVCpu, PFNHWACCMVMXSTARTVM pfnStartVM);
DECLASM(int) hwaccmR0SVMRunWrapXMM(RTHCPHYS pVMCBHostPhys, RTHCPHYS pVMCBPhys, PCPUMCTX pCtx, PVM pVM, PVMCPU pVCpu, PFNHWACCMSVMVMRUN pfnVMRun);
# ifdef VBOX_WITH_HYBRID_32BIT_KERNEL