EM.cpp revision be2589a6f7086676e45b18d204bb1064889dc586
/* $Id$ */
/** @file
*/
/*
* Copyright (C) 2006-2007 innotek GmbH
*
* This file is part of VirtualBox Open Source Edition (OSE), as
* available from http://www.virtualbox.org. This file is free software;
* General Public License as published by the Free Software Foundation,
* in version 2 as it comes in the "COPYING" file of the VirtualBox OSE
* distribution. VirtualBox OSE is distributed in the hope that it will
* be useful, but WITHOUT ANY WARRANTY of any kind.
*
* If you received this file as part of a commercial VirtualBox
* distribution, then only the terms of your commercial VirtualBox
* license agreement apply instead of the previous paragraph.
*/
*
* the right kind of execution (Raw, Recompiled, Interpreted,..), and keeping
* the CPU states in sync. The function RMR3ExecuteVM() is the 'main-loop' of
* the VM.
*
*/
/*******************************************************************************
* Header Files *
*******************************************************************************/
#define LOG_GROUP LOG_GROUP_EM
#include "EMInternal.h"
#include <VBox/disopcode.h>
#include <iprt/semaphore.h>
/*******************************************************************************
* Internal Functions *
*******************************************************************************/
/**
* Initializes the EM.
*
* @returns VBox status code.
* @param pVM The VM to operate on.
*/
{
LogFlow(("EMR3Init\n"));
/*
* Assert alignment and sizes.
*/
("%d bytes, padding %d\n", sizeof(pVM->em.s.u.FatalLongJump), sizeof(pVM->em.s.u.achPaddingFatalLongJump)));
/*
* Init the structure.
*/
if (VBOX_FAILURE(rc))
pVM->fRawR3Enabled = true;
if (VBOX_FAILURE(rc))
pVM->fRawR0Enabled = true;
/*
* Saved state.
*/
if (VBOX_FAILURE(rc))
return rc;
/*
* Statistics.
*/
#ifdef VBOX_WITH_STATISTICS
if (VBOX_FAILURE(rc))
return rc;
STAM_REG(pVM, &pStats->StatGCEmulate, STAMTYPE_PROFILE, "/EM/GC/Interpret", STAMUNIT_TICKS_PER_CALL, "Profiling of EMInterpretInstruction.");
STAM_REG(pVM, &pStats->StatHCEmulate, STAMTYPE_PROFILE, "/EM/HC/Interpret", STAMUNIT_TICKS_PER_CALL, "Profiling of EMInterpretInstruction.");
STAM_REG(pVM, &pStats->StatGCInterpretSucceeded, STAMTYPE_COUNTER, "/EM/GC/Interpret/Success", STAMUNIT_OCCURENCES, "The number of times an instruction was successfully interpreted.");
STAM_REG(pVM, &pStats->StatHCInterpretSucceeded, STAMTYPE_COUNTER, "/EM/HC/Interpret/Success", STAMUNIT_OCCURENCES, "The number of times an instruction was successfully interpreted.");
STAM_REG_USED(pVM, &pStats->StatGCAnd, STAMTYPE_COUNTER, "/EM/GC/Interpret/Success/And", STAMUNIT_OCCURENCES, "The number of times AND was successfully interpreted.");
STAM_REG_USED(pVM, &pStats->StatHCAnd, STAMTYPE_COUNTER, "/EM/HC/Interpret/Success/And", STAMUNIT_OCCURENCES, "The number of times AND was successfully interpreted.");
STAM_REG_USED(pVM, &pStats->StatGCAdd, STAMTYPE_COUNTER, "/EM/GC/Interpret/Success/Add", STAMUNIT_OCCURENCES, "The number of times ADD was successfully interpreted.");
STAM_REG_USED(pVM, &pStats->StatHCAdd, STAMTYPE_COUNTER, "/EM/HC/Interpret/Success/Add", STAMUNIT_OCCURENCES, "The number of times ADD was successfully interpreted.");
STAM_REG_USED(pVM, &pStats->StatGCAdc, STAMTYPE_COUNTER, "/EM/GC/Interpret/Success/Adc", STAMUNIT_OCCURENCES, "The number of times ADC was successfully interpreted.");
STAM_REG_USED(pVM, &pStats->StatHCAdc, STAMTYPE_COUNTER, "/EM/HC/Interpret/Success/Adc", STAMUNIT_OCCURENCES, "The number of times ADC was successfully interpreted.");
STAM_REG_USED(pVM, &pStats->StatGCSub, STAMTYPE_COUNTER, "/EM/GC/Interpret/Success/Sub", STAMUNIT_OCCURENCES, "The number of times SUB was successfully interpreted.");
STAM_REG_USED(pVM, &pStats->StatHCSub, STAMTYPE_COUNTER, "/EM/HC/Interpret/Success/Sub", STAMUNIT_OCCURENCES, "The number of times SUB was successfully interpreted.");
STAM_REG_USED(pVM, &pStats->StatGCCpuId, STAMTYPE_COUNTER, "/EM/GC/Interpret/Success/CpuId", STAMUNIT_OCCURENCES, "The number of times CPUID was successfully interpreted.");
STAM_REG_USED(pVM, &pStats->StatHCCpuId, STAMTYPE_COUNTER, "/EM/HC/Interpret/Success/CpuId", STAMUNIT_OCCURENCES, "The number of times CPUID was successfully interpreted.");
STAM_REG_USED(pVM, &pStats->StatGCDec, STAMTYPE_COUNTER, "/EM/GC/Interpret/Success/Dec", STAMUNIT_OCCURENCES, "The number of times DEC was successfully interpreted.");
STAM_REG_USED(pVM, &pStats->StatHCDec, STAMTYPE_COUNTER, "/EM/HC/Interpret/Success/Dec", STAMUNIT_OCCURENCES, "The number of times DEC was successfully interpreted.");
STAM_REG_USED(pVM, &pStats->StatGCHlt, STAMTYPE_COUNTER, "/EM/GC/Interpret/Success/Hlt", STAMUNIT_OCCURENCES, "The number of times HLT was successfully interpreted.");
STAM_REG_USED(pVM, &pStats->StatHCHlt, STAMTYPE_COUNTER, "/EM/HC/Interpret/Success/Hlt", STAMUNIT_OCCURENCES, "The number of times HLT was successfully interpreted.");
STAM_REG_USED(pVM, &pStats->StatGCInc, STAMTYPE_COUNTER, "/EM/GC/Interpret/Success/Inc", STAMUNIT_OCCURENCES, "The number of times INC was successfully interpreted.");
STAM_REG_USED(pVM, &pStats->StatHCInc, STAMTYPE_COUNTER, "/EM/HC/Interpret/Success/Inc", STAMUNIT_OCCURENCES, "The number of times INC was successfully interpreted.");
STAM_REG_USED(pVM, &pStats->StatGCInvlPg, STAMTYPE_COUNTER, "/EM/GC/Interpret/Success/Invlpg", STAMUNIT_OCCURENCES, "The number of times INVLPG was successfully interpreted.");
STAM_REG_USED(pVM, &pStats->StatHCInvlPg, STAMTYPE_COUNTER, "/EM/HC/Interpret/Success/Invlpg", STAMUNIT_OCCURENCES, "The number of times INVLPG was successfully interpreted.");
STAM_REG_USED(pVM, &pStats->StatGCIret, STAMTYPE_COUNTER, "/EM/GC/Interpret/Success/Iret", STAMUNIT_OCCURENCES, "The number of times IRET was successfully interpreted.");
STAM_REG_USED(pVM, &pStats->StatHCIret, STAMTYPE_COUNTER, "/EM/HC/Interpret/Success/Iret", STAMUNIT_OCCURENCES, "The number of times IRET was successfully interpreted.");
STAM_REG_USED(pVM, &pStats->StatGCLLdt, STAMTYPE_COUNTER, "/EM/GC/Interpret/Success/LLdt", STAMUNIT_OCCURENCES, "The number of times LLDT was successfully interpreted.");
STAM_REG_USED(pVM, &pStats->StatHCLLdt, STAMTYPE_COUNTER, "/EM/HC/Interpret/Success/LLdt", STAMUNIT_OCCURENCES, "The number of times LLDT was successfully interpreted.");
STAM_REG_USED(pVM, &pStats->StatGCMov, STAMTYPE_COUNTER, "/EM/GC/Interpret/Success/Mov", STAMUNIT_OCCURENCES, "The number of times MOV was successfully interpreted.");
STAM_REG_USED(pVM, &pStats->StatHCMov, STAMTYPE_COUNTER, "/EM/HC/Interpret/Success/Mov", STAMUNIT_OCCURENCES, "The number of times MOV was successfully interpreted.");
STAM_REG_USED(pVM, &pStats->StatGCMovCRx, STAMTYPE_COUNTER, "/EM/GC/Interpret/Success/MovCRx", STAMUNIT_OCCURENCES, "The number of times MOV CRx was successfully interpreted.");
STAM_REG_USED(pVM, &pStats->StatHCMovCRx, STAMTYPE_COUNTER, "/EM/HC/Interpret/Success/MovCRx", STAMUNIT_OCCURENCES, "The number of times MOV CRx was successfully interpreted.");
STAM_REG_USED(pVM, &pStats->StatGCMovDRx, STAMTYPE_COUNTER, "/EM/GC/Interpret/Success/MovDRx", STAMUNIT_OCCURENCES, "The number of times MOV DRx was successfully interpreted.");
STAM_REG_USED(pVM, &pStats->StatHCMovDRx, STAMTYPE_COUNTER, "/EM/HC/Interpret/Success/MovDRx", STAMUNIT_OCCURENCES, "The number of times MOV DRx was successfully interpreted.");
STAM_REG_USED(pVM, &pStats->StatGCOr, STAMTYPE_COUNTER, "/EM/GC/Interpret/Success/Or", STAMUNIT_OCCURENCES, "The number of times OR was successfully interpreted.");
STAM_REG_USED(pVM, &pStats->StatHCOr, STAMTYPE_COUNTER, "/EM/HC/Interpret/Success/Or", STAMUNIT_OCCURENCES, "The number of times OR was successfully interpreted.");
STAM_REG_USED(pVM, &pStats->StatGCPop, STAMTYPE_COUNTER, "/EM/GC/Interpret/Success/Pop", STAMUNIT_OCCURENCES, "The number of times POP was successfully interpreted.");
STAM_REG_USED(pVM, &pStats->StatHCPop, STAMTYPE_COUNTER, "/EM/HC/Interpret/Success/Pop", STAMUNIT_OCCURENCES, "The number of times POP was successfully interpreted.");
STAM_REG_USED(pVM, &pStats->StatGCRdtsc, STAMTYPE_COUNTER, "/EM/GC/Interpret/Success/Rdtsc", STAMUNIT_OCCURENCES, "The number of times RDTSC was successfully interpreted.");
STAM_REG_USED(pVM, &pStats->StatHCRdtsc, STAMTYPE_COUNTER, "/EM/HC/Interpret/Success/Rdtsc", STAMUNIT_OCCURENCES, "The number of times RDTSC was successfully interpreted.");
STAM_REG_USED(pVM, &pStats->StatGCSti, STAMTYPE_COUNTER, "/EM/GC/Interpret/Success/Sti", STAMUNIT_OCCURENCES, "The number of times STI was successfully interpreted.");
STAM_REG_USED(pVM, &pStats->StatHCSti, STAMTYPE_COUNTER, "/EM/HC/Interpret/Success/Sti", STAMUNIT_OCCURENCES, "The number of times STI was successfully interpreted.");
STAM_REG_USED(pVM, &pStats->StatGCXchg, STAMTYPE_COUNTER, "/EM/GC/Interpret/Success/Xchg", STAMUNIT_OCCURENCES, "The number of times XCHG was successfully interpreted.");
STAM_REG_USED(pVM, &pStats->StatHCXchg, STAMTYPE_COUNTER, "/EM/HC/Interpret/Success/Xchg", STAMUNIT_OCCURENCES, "The number of times XCHG was successfully interpreted.");
STAM_REG_USED(pVM, &pStats->StatGCXor, STAMTYPE_COUNTER, "/EM/GC/Interpret/Success/Xor", STAMUNIT_OCCURENCES, "The number of times XOR was successfully interpreted.");
STAM_REG_USED(pVM, &pStats->StatHCXor, STAMTYPE_COUNTER, "/EM/HC/Interpret/Success/Xor", STAMUNIT_OCCURENCES, "The number of times XOR was successfully interpreted.");
STAM_REG_USED(pVM, &pStats->StatGCMonitor, STAMTYPE_COUNTER, "/EM/GC/Interpret/Success/Monitor", STAMUNIT_OCCURENCES, "The number of times MONITOR was successfully interpreted.");
STAM_REG_USED(pVM, &pStats->StatHCMonitor, STAMTYPE_COUNTER, "/EM/HC/Interpret/Success/Monitor", STAMUNIT_OCCURENCES, "The number of times MONITOR was successfully interpreted.");
STAM_REG_USED(pVM, &pStats->StatGCMWait, STAMTYPE_COUNTER, "/EM/GC/Interpret/Success/MWait", STAMUNIT_OCCURENCES, "The number of times MWAIT was successfully interpreted.");
STAM_REG_USED(pVM, &pStats->StatHCMWait, STAMTYPE_COUNTER, "/EM/HC/Interpret/Success/MWait", STAMUNIT_OCCURENCES, "The number of times MWAIT was successfully interpreted.");
STAM_REG_USED(pVM, &pStats->StatGCBtr, STAMTYPE_COUNTER, "/EM/GC/Interpret/Success/Btr", STAMUNIT_OCCURENCES, "The number of times BTR was successfully interpreted.");
STAM_REG_USED(pVM, &pStats->StatHCBtr, STAMTYPE_COUNTER, "/EM/HC/Interpret/Success/Btr", STAMUNIT_OCCURENCES, "The number of times BTR was successfully interpreted.");
STAM_REG_USED(pVM, &pStats->StatGCBts, STAMTYPE_COUNTER, "/EM/GC/Interpret/Success/Bts", STAMUNIT_OCCURENCES, "The number of times BTS was successfully interpreted.");
STAM_REG_USED(pVM, &pStats->StatHCBts, STAMTYPE_COUNTER, "/EM/HC/Interpret/Success/Bts", STAMUNIT_OCCURENCES, "The number of times BTS was successfully interpreted.");
STAM_REG_USED(pVM, &pStats->StatGCBtc, STAMTYPE_COUNTER, "/EM/GC/Interpret/Success/Btc", STAMUNIT_OCCURENCES, "The number of times BTC was successfully interpreted.");
STAM_REG_USED(pVM, &pStats->StatHCBtc, STAMTYPE_COUNTER, "/EM/HC/Interpret/Success/Btc", STAMUNIT_OCCURENCES, "The number of times BTC was successfully interpreted.");
STAM_REG_USED(pVM, &pStats->StatGCCmpXchg, STAMTYPE_COUNTER, "/EM/GC/Interpret/Success/CmpXchg", STAMUNIT_OCCURENCES, "The number of times CMPXCHG was successfully interpreted.");
STAM_REG_USED(pVM, &pStats->StatHCCmpXchg, STAMTYPE_COUNTER, "/EM/HC/Interpret/Success/CmpXchg", STAMUNIT_OCCURENCES, "The number of times CMPXCHG was successfully interpreted.");
STAM_REG(pVM, &pStats->StatGCInterpretFailed, STAMTYPE_COUNTER, "/EM/GC/Interpret/Failed", STAMUNIT_OCCURENCES, "The number of times an instruction was not interpreted.");
STAM_REG(pVM, &pStats->StatHCInterpretFailed, STAMTYPE_COUNTER, "/EM/HC/Interpret/Failed", STAMUNIT_OCCURENCES, "The number of times an instruction was not interpreted.");
STAM_REG_USED(pVM, &pStats->StatGCFailedAnd, STAMTYPE_COUNTER, "/EM/GC/Interpret/Failed/And", STAMUNIT_OCCURENCES, "The number of times AND was not interpreted.");
STAM_REG_USED(pVM, &pStats->StatHCFailedAnd, STAMTYPE_COUNTER, "/EM/HC/Interpret/Failed/And", STAMUNIT_OCCURENCES, "The number of times AND was not interpreted.");
STAM_REG_USED(pVM, &pStats->StatGCFailedCpuId, STAMTYPE_COUNTER, "/EM/GC/Interpret/Failed/CpuId", STAMUNIT_OCCURENCES, "The number of times CPUID was not interpreted.");
STAM_REG_USED(pVM, &pStats->StatHCFailedCpuId, STAMTYPE_COUNTER, "/EM/HC/Interpret/Failed/CpuId", STAMUNIT_OCCURENCES, "The number of times CPUID was not interpreted.");
STAM_REG_USED(pVM, &pStats->StatGCFailedDec, STAMTYPE_COUNTER, "/EM/GC/Interpret/Failed/Dec", STAMUNIT_OCCURENCES, "The number of times DEC was not interpreted.");
STAM_REG_USED(pVM, &pStats->StatHCFailedDec, STAMTYPE_COUNTER, "/EM/HC/Interpret/Failed/Dec", STAMUNIT_OCCURENCES, "The number of times DEC was not interpreted.");
STAM_REG_USED(pVM, &pStats->StatGCFailedHlt, STAMTYPE_COUNTER, "/EM/GC/Interpret/Failed/Hlt", STAMUNIT_OCCURENCES, "The number of times HLT was not interpreted.");
STAM_REG_USED(pVM, &pStats->StatHCFailedHlt, STAMTYPE_COUNTER, "/EM/HC/Interpret/Failed/Hlt", STAMUNIT_OCCURENCES, "The number of times HLT was not interpreted.");
STAM_REG_USED(pVM, &pStats->StatGCFailedInc, STAMTYPE_COUNTER, "/EM/GC/Interpret/Failed/Inc", STAMUNIT_OCCURENCES, "The number of times INC was not interpreted.");
STAM_REG_USED(pVM, &pStats->StatHCFailedInc, STAMTYPE_COUNTER, "/EM/HC/Interpret/Failed/Inc", STAMUNIT_OCCURENCES, "The number of times INC was not interpreted.");
STAM_REG_USED(pVM, &pStats->StatGCFailedInvlPg, STAMTYPE_COUNTER, "/EM/GC/Interpret/Failed/InvlPg", STAMUNIT_OCCURENCES, "The number of times INVLPG was not interpreted.");
STAM_REG_USED(pVM, &pStats->StatHCFailedInvlPg, STAMTYPE_COUNTER, "/EM/HC/Interpret/Failed/InvlPg", STAMUNIT_OCCURENCES, "The number of times INVLPG was not interpreted.");
STAM_REG_USED(pVM, &pStats->StatGCFailedIret, STAMTYPE_COUNTER, "/EM/GC/Interpret/Failed/Iret", STAMUNIT_OCCURENCES, "The number of times IRET was not interpreted.");
STAM_REG_USED(pVM, &pStats->StatHCFailedIret, STAMTYPE_COUNTER, "/EM/HC/Interpret/Failed/Iret", STAMUNIT_OCCURENCES, "The number of times IRET was not interpreted.");
STAM_REG_USED(pVM, &pStats->StatGCFailedLLdt, STAMTYPE_COUNTER, "/EM/GC/Interpret/Failed/LLdt", STAMUNIT_OCCURENCES, "The number of times LLDT was not interpreted.");
STAM_REG_USED(pVM, &pStats->StatHCFailedLLdt, STAMTYPE_COUNTER, "/EM/HC/Interpret/Failed/LLdt", STAMUNIT_OCCURENCES, "The number of times LLDT was not interpreted.");
STAM_REG_USED(pVM, &pStats->StatGCFailedMov, STAMTYPE_COUNTER, "/EM/GC/Interpret/Failed/Mov", STAMUNIT_OCCURENCES, "The number of times MOV was not interpreted.");
STAM_REG_USED(pVM, &pStats->StatHCFailedMov, STAMTYPE_COUNTER, "/EM/HC/Interpret/Failed/Mov", STAMUNIT_OCCURENCES, "The number of times MOV was not interpreted.");
STAM_REG_USED(pVM, &pStats->StatGCFailedMovCRx, STAMTYPE_COUNTER, "/EM/GC/Interpret/Failed/MovCRx", STAMUNIT_OCCURENCES, "The number of times MOV CRx was not interpreted.");
STAM_REG_USED(pVM, &pStats->StatHCFailedMovCRx, STAMTYPE_COUNTER, "/EM/HC/Interpret/Failed/MovCRx", STAMUNIT_OCCURENCES, "The number of times MOV CRx was not interpreted.");
STAM_REG_USED(pVM, &pStats->StatGCFailedMovDRx, STAMTYPE_COUNTER, "/EM/GC/Interpret/Failed/MovDRx", STAMUNIT_OCCURENCES, "The number of times MOV DRx was not interpreted.");
STAM_REG_USED(pVM, &pStats->StatHCFailedMovDRx, STAMTYPE_COUNTER, "/EM/HC/Interpret/Failed/MovDRx", STAMUNIT_OCCURENCES, "The number of times MOV DRx was not interpreted.");
STAM_REG_USED(pVM, &pStats->StatGCFailedOr, STAMTYPE_COUNTER, "/EM/GC/Interpret/Failed/Or", STAMUNIT_OCCURENCES, "The number of times OR was not interpreted.");
STAM_REG_USED(pVM, &pStats->StatHCFailedOr, STAMTYPE_COUNTER, "/EM/HC/Interpret/Failed/Or", STAMUNIT_OCCURENCES, "The number of times OR was not interpreted.");
STAM_REG_USED(pVM, &pStats->StatGCFailedPop, STAMTYPE_COUNTER, "/EM/GC/Interpret/Failed/Pop", STAMUNIT_OCCURENCES, "The number of times POP was not interpreted.");
STAM_REG_USED(pVM, &pStats->StatHCFailedPop, STAMTYPE_COUNTER, "/EM/HC/Interpret/Failed/Pop", STAMUNIT_OCCURENCES, "The number of times POP was not interpreted.");
STAM_REG_USED(pVM, &pStats->StatGCFailedSti, STAMTYPE_COUNTER, "/EM/GC/Interpret/Failed/Sti", STAMUNIT_OCCURENCES, "The number of times STI was not interpreted.");
STAM_REG_USED(pVM, &pStats->StatHCFailedSti, STAMTYPE_COUNTER, "/EM/HC/Interpret/Failed/Sti", STAMUNIT_OCCURENCES, "The number of times STI was not interpreted.");
STAM_REG_USED(pVM, &pStats->StatGCFailedXchg, STAMTYPE_COUNTER, "/EM/GC/Interpret/Failed/Xchg", STAMUNIT_OCCURENCES, "The number of times XCHG was not interpreted.");
STAM_REG_USED(pVM, &pStats->StatHCFailedXchg, STAMTYPE_COUNTER, "/EM/HC/Interpret/Failed/Xchg", STAMUNIT_OCCURENCES, "The number of times XCHG was not interpreted.");
STAM_REG_USED(pVM, &pStats->StatGCFailedXor, STAMTYPE_COUNTER, "/EM/GC/Interpret/Failed/Xor", STAMUNIT_OCCURENCES, "The number of times XOR was not interpreted.");
STAM_REG_USED(pVM, &pStats->StatHCFailedXor, STAMTYPE_COUNTER, "/EM/HC/Interpret/Failed/Xor", STAMUNIT_OCCURENCES, "The number of times XOR was not interpreted.");
STAM_REG_USED(pVM, &pStats->StatGCFailedMonitor, STAMTYPE_COUNTER, "/EM/GC/Interpret/Failed/Monitor", STAMUNIT_OCCURENCES, "The number of times MONITOR was not interpreted.");
STAM_REG_USED(pVM, &pStats->StatHCFailedMonitor, STAMTYPE_COUNTER, "/EM/HC/Interpret/Failed/Monitor", STAMUNIT_OCCURENCES, "The number of times MONITOR was not interpreted.");
STAM_REG_USED(pVM, &pStats->StatGCFailedMWait, STAMTYPE_COUNTER, "/EM/GC/Interpret/Failed/MWait", STAMUNIT_OCCURENCES, "The number of times MONITOR was not interpreted.");
STAM_REG_USED(pVM, &pStats->StatHCFailedMWait, STAMTYPE_COUNTER, "/EM/HC/Interpret/Failed/MWait", STAMUNIT_OCCURENCES, "The number of times MONITOR was not interpreted.");
STAM_REG_USED(pVM, &pStats->StatGCFailedRdtsc, STAMTYPE_COUNTER, "/EM/GC/Interpret/Failed/Rdtsc", STAMUNIT_OCCURENCES, "The number of times RDTSC was not interpreted.");
STAM_REG_USED(pVM, &pStats->StatHCFailedRdtsc, STAMTYPE_COUNTER, "/EM/HC/Interpret/Failed/Rdtsc", STAMUNIT_OCCURENCES, "The number of times RDTSC was not interpreted.");
STAM_REG_USED(pVM, &pStats->StatGCFailedMisc, STAMTYPE_COUNTER, "/EM/GC/Interpret/Failed/Misc", STAMUNIT_OCCURENCES, "The number of times some misc instruction was encountered.");
STAM_REG_USED(pVM, &pStats->StatHCFailedMisc, STAMTYPE_COUNTER, "/EM/HC/Interpret/Failed/Misc", STAMUNIT_OCCURENCES, "The number of times some misc instruction was encountered.");
STAM_REG_USED(pVM, &pStats->StatGCFailedAdd, STAMTYPE_COUNTER, "/EM/GC/Interpret/Failed/Add", STAMUNIT_OCCURENCES, "The number of times ADD was not interpreted.");
STAM_REG_USED(pVM, &pStats->StatHCFailedAdd, STAMTYPE_COUNTER, "/EM/HC/Interpret/Failed/Add", STAMUNIT_OCCURENCES, "The number of times ADD was not interpreted.");
STAM_REG_USED(pVM, &pStats->StatGCFailedAdc, STAMTYPE_COUNTER, "/EM/GC/Interpret/Failed/Adc", STAMUNIT_OCCURENCES, "The number of times ADC was not interpreted.");
STAM_REG_USED(pVM, &pStats->StatHCFailedAdc, STAMTYPE_COUNTER, "/EM/HC/Interpret/Failed/Adc", STAMUNIT_OCCURENCES, "The number of times ADC was not interpreted.");
STAM_REG_USED(pVM, &pStats->StatGCFailedBtr, STAMTYPE_COUNTER, "/EM/GC/Interpret/Failed/Btr", STAMUNIT_OCCURENCES, "The number of times BTR was not interpreted.");
STAM_REG_USED(pVM, &pStats->StatHCFailedBtr, STAMTYPE_COUNTER, "/EM/HC/Interpret/Failed/Btr", STAMUNIT_OCCURENCES, "The number of times BTR was not interpreted.");
STAM_REG_USED(pVM, &pStats->StatGCFailedBts, STAMTYPE_COUNTER, "/EM/GC/Interpret/Failed/Bts", STAMUNIT_OCCURENCES, "The number of times BTS was not interpreted.");
STAM_REG_USED(pVM, &pStats->StatHCFailedBts, STAMTYPE_COUNTER, "/EM/HC/Interpret/Failed/Bts", STAMUNIT_OCCURENCES, "The number of times BTS was not interpreted.");
STAM_REG_USED(pVM, &pStats->StatGCFailedBtc, STAMTYPE_COUNTER, "/EM/GC/Interpret/Failed/Btc", STAMUNIT_OCCURENCES, "The number of times BTC was not interpreted.");
STAM_REG_USED(pVM, &pStats->StatHCFailedBtc, STAMTYPE_COUNTER, "/EM/HC/Interpret/Failed/Btc", STAMUNIT_OCCURENCES, "The number of times BTC was not interpreted.");
STAM_REG_USED(pVM, &pStats->StatGCFailedCli, STAMTYPE_COUNTER, "/EM/GC/Interpret/Failed/Cli", STAMUNIT_OCCURENCES, "The number of times CLI was not interpreted.");
STAM_REG_USED(pVM, &pStats->StatHCFailedCli, STAMTYPE_COUNTER, "/EM/HC/Interpret/Failed/Cli", STAMUNIT_OCCURENCES, "The number of times CLI was not interpreted.");
STAM_REG_USED(pVM, &pStats->StatGCFailedCmpXchg, STAMTYPE_COUNTER, "/EM/GC/Interpret/Failed/CmpXchg", STAMUNIT_OCCURENCES, "The number of times CMPXCHG was not interpreted.");
STAM_REG_USED(pVM, &pStats->StatHCFailedCmpXchg, STAMTYPE_COUNTER, "/EM/HC/Interpret/Failed/CmpXchg", STAMUNIT_OCCURENCES, "The number of times CMPXCHG was not interpreted.");
STAM_REG_USED(pVM, &pStats->StatGCFailedMovNTPS, STAMTYPE_COUNTER, "/EM/GC/Interpret/Failed/MovNTPS", STAMUNIT_OCCURENCES, "The number of times MOVNTPS was not interpreted.");
STAM_REG_USED(pVM, &pStats->StatHCFailedMovNTPS, STAMTYPE_COUNTER, "/EM/HC/Interpret/Failed/MovNTPS", STAMUNIT_OCCURENCES, "The number of times MOVNTPS was not interpreted.");
STAM_REG_USED(pVM, &pStats->StatGCFailedStosWD, STAMTYPE_COUNTER, "/EM/GC/Interpret/Failed/StosWD", STAMUNIT_OCCURENCES, "The number of times STOSWD was not interpreted.");
STAM_REG_USED(pVM, &pStats->StatHCFailedStosWD, STAMTYPE_COUNTER, "/EM/HC/Interpret/Failed/StosWD", STAMUNIT_OCCURENCES, "The number of times STOSWD was not interpreted.");
STAM_REG_USED(pVM, &pStats->StatGCFailedSub, STAMTYPE_COUNTER, "/EM/GC/Interpret/Failed/Sub", STAMUNIT_OCCURENCES, "The number of times SUB was not interpreted.");
STAM_REG_USED(pVM, &pStats->StatHCFailedSub, STAMTYPE_COUNTER, "/EM/HC/Interpret/Failed/Sub", STAMUNIT_OCCURENCES, "The number of times SUB was not interpreted.");
STAM_REG_USED(pVM, &pStats->StatGCFailedWbInvd, STAMTYPE_COUNTER, "/EM/GC/Interpret/Failed/WbInvd", STAMUNIT_OCCURENCES, "The number of times WBINVD was not interpreted.");
STAM_REG_USED(pVM, &pStats->StatHCFailedWbInvd, STAMTYPE_COUNTER, "/EM/HC/Interpret/Failed/WbInvd", STAMUNIT_OCCURENCES, "The number of times WBINVD was not interpreted.");
STAM_REG_USED(pVM, &pStats->StatGCFailedUserMode, STAMTYPE_COUNTER, "/EM/GC/Interpret/Failed/UserMode", STAMUNIT_OCCURENCES, "The number of rejections because of CPL.");
STAM_REG_USED(pVM, &pStats->StatHCFailedUserMode, STAMTYPE_COUNTER, "/EM/HC/Interpret/Failed/UserMode", STAMUNIT_OCCURENCES, "The number of rejections because of CPL.");
STAM_REG_USED(pVM, &pStats->StatGCFailedPrefix, STAMTYPE_COUNTER, "/EM/GC/Interpret/Failed/Prefix", STAMUNIT_OCCURENCES, "The number of rejections because of prefix .");
STAM_REG_USED(pVM, &pStats->StatHCFailedPrefix, STAMTYPE_COUNTER, "/EM/HC/Interpret/Failed/Prefix", STAMUNIT_OCCURENCES, "The number of rejections because of prefix .");
STAM_REG_USED(pVM, &pStats->StatCli, STAMTYPE_COUNTER, "/EM/HC/PrivInst/Cli", STAMUNIT_OCCURENCES, "Number of cli instructions.");
STAM_REG_USED(pVM, &pStats->StatSti, STAMTYPE_COUNTER, "/EM/HC/PrivInst/Sti", STAMUNIT_OCCURENCES, "Number of sli instructions.");
STAM_REG_USED(pVM, &pStats->StatIn, STAMTYPE_COUNTER, "/EM/HC/PrivInst/In", STAMUNIT_OCCURENCES, "Number of in instructions.");
STAM_REG_USED(pVM, &pStats->StatOut, STAMTYPE_COUNTER, "/EM/HC/PrivInst/Out", STAMUNIT_OCCURENCES, "Number of out instructions.");
STAM_REG_USED(pVM, &pStats->StatHlt, STAMTYPE_COUNTER, "/EM/HC/PrivInst/Hlt", STAMUNIT_OCCURENCES, "Number of hlt instructions not handled in GC because of PATM.");
STAM_REG_USED(pVM, &pStats->StatInvlpg, STAMTYPE_COUNTER, "/EM/HC/PrivInst/Invlpg", STAMUNIT_OCCURENCES, "Number of invlpg instructions.");
STAM_REG_USED(pVM, &pStats->StatMisc, STAMTYPE_COUNTER, "/EM/HC/PrivInst/Misc", STAMUNIT_OCCURENCES, "Number of misc. instructions.");
STAM_REG_USED(pVM, &pStats->StatMovWriteCR[0], STAMTYPE_COUNTER, "/EM/HC/PrivInst/Mov CR0, X", STAMUNIT_OCCURENCES, "Number of mov CR0 read instructions.");
STAM_REG_USED(pVM, &pStats->StatMovWriteCR[1], STAMTYPE_COUNTER, "/EM/HC/PrivInst/Mov CR1, X", STAMUNIT_OCCURENCES, "Number of mov CR1 read instructions.");
STAM_REG_USED(pVM, &pStats->StatMovWriteCR[2], STAMTYPE_COUNTER, "/EM/HC/PrivInst/Mov CR2, X", STAMUNIT_OCCURENCES, "Number of mov CR2 read instructions.");
STAM_REG_USED(pVM, &pStats->StatMovWriteCR[3], STAMTYPE_COUNTER, "/EM/HC/PrivInst/Mov CR3, X", STAMUNIT_OCCURENCES, "Number of mov CR3 read instructions.");
STAM_REG_USED(pVM, &pStats->StatMovWriteCR[4], STAMTYPE_COUNTER, "/EM/HC/PrivInst/Mov CR4, X", STAMUNIT_OCCURENCES, "Number of mov CR4 read instructions.");
STAM_REG_USED(pVM, &pStats->StatMovReadCR[0], STAMTYPE_COUNTER, "/EM/HC/PrivInst/Mov X, CR0", STAMUNIT_OCCURENCES, "Number of mov CR0 write instructions.");
STAM_REG_USED(pVM, &pStats->StatMovReadCR[1], STAMTYPE_COUNTER, "/EM/HC/PrivInst/Mov X, CR1", STAMUNIT_OCCURENCES, "Number of mov CR1 write instructions.");
STAM_REG_USED(pVM, &pStats->StatMovReadCR[2], STAMTYPE_COUNTER, "/EM/HC/PrivInst/Mov X, CR2", STAMUNIT_OCCURENCES, "Number of mov CR2 write instructions.");
STAM_REG_USED(pVM, &pStats->StatMovReadCR[3], STAMTYPE_COUNTER, "/EM/HC/PrivInst/Mov X, CR3", STAMUNIT_OCCURENCES, "Number of mov CR3 write instructions.");
STAM_REG_USED(pVM, &pStats->StatMovReadCR[4], STAMTYPE_COUNTER, "/EM/HC/PrivInst/Mov X, CR4", STAMUNIT_OCCURENCES, "Number of mov CR4 write instructions.");
STAM_REG_USED(pVM, &pStats->StatMovDRx, STAMTYPE_COUNTER, "/EM/HC/PrivInst/MovDRx", STAMUNIT_OCCURENCES, "Number of mov DRx instructions.");
STAM_REG_USED(pVM, &pStats->StatIret, STAMTYPE_COUNTER, "/EM/HC/PrivInst/Iret", STAMUNIT_OCCURENCES, "Number of iret instructions.");
STAM_REG_USED(pVM, &pStats->StatMovLgdt, STAMTYPE_COUNTER, "/EM/HC/PrivInst/Lgdt", STAMUNIT_OCCURENCES, "Number of lgdt instructions.");
STAM_REG_USED(pVM, &pStats->StatMovLidt, STAMTYPE_COUNTER, "/EM/HC/PrivInst/Lidt", STAMUNIT_OCCURENCES, "Number of lidt instructions.");
STAM_REG_USED(pVM, &pStats->StatMovLldt, STAMTYPE_COUNTER, "/EM/HC/PrivInst/Lldt", STAMUNIT_OCCURENCES, "Number of lldt instructions.");
STAM_REG_USED(pVM, &pStats->StatSysEnter, STAMTYPE_COUNTER, "/EM/HC/PrivInst/Sysenter", STAMUNIT_OCCURENCES, "Number of sysenter instructions.");
STAM_REG_USED(pVM, &pStats->StatSysExit, STAMTYPE_COUNTER, "/EM/HC/PrivInst/Sysexit", STAMUNIT_OCCURENCES, "Number of sysexit instructions.");
STAM_REG_USED(pVM, &pStats->StatSysCall, STAMTYPE_COUNTER, "/EM/HC/PrivInst/Syscall", STAMUNIT_OCCURENCES, "Number of syscall instructions.");
STAM_REG_USED(pVM, &pStats->StatSysRet, STAMTYPE_COUNTER, "/EM/HC/PrivInst/Sysret", STAMUNIT_OCCURENCES, "Number of sysret instructions.");
STAM_REG(pVM, &pVM->em.s.StatTotalClis, STAMTYPE_COUNTER, "/EM/Cli/Total", STAMUNIT_OCCURENCES, "Total number of cli instructions executed.");
#endif /* VBOX_WITH_STATISTICS */
/* these should be considered for release statistics. */
STAM_REG(pVM, &pVM->em.s.StatForcedActions, STAMTYPE_PROFILE, "/PROF/EM/ForcedActions", STAMUNIT_TICKS_PER_CALL, "Profiling forced action execution.");
STAM_REL_REG(pVM, &pVM->em.s.StatHalted, STAMTYPE_PROFILE, "/PROF/EM/Halted", STAMUNIT_TICKS_PER_CALL, "Profiling halted state (VMR3WaitHalted).");
STAM_REG(pVM, &pVM->em.s.StatHwAccEntry, STAMTYPE_PROFILE, "/PROF/EM/HwAccEnter", STAMUNIT_TICKS_PER_CALL, "Profiling Hardware Accelerated Mode entry overhead.");
STAM_REG(pVM, &pVM->em.s.StatHwAccExec, STAMTYPE_PROFILE, "/PROF/EM/HwAccExec", STAMUNIT_TICKS_PER_CALL, "Profiling Hardware Accelerated Mode execution.");
STAM_REG(pVM, &pVM->em.s.StatIOEmu, STAMTYPE_PROFILE, "/PROF/EM/Emulation/IO", STAMUNIT_TICKS_PER_CALL, "Profiling of emR3RawExecuteIOInstruction.");
STAM_REG(pVM, &pVM->em.s.StatPrivEmu, STAMTYPE_PROFILE, "/PROF/EM/Emulation/Priv", STAMUNIT_TICKS_PER_CALL, "Profiling of emR3RawPrivileged.");
STAM_REG(pVM, &pVM->em.s.StatMiscEmu, STAMTYPE_PROFILE, "/PROF/EM/Emulation/Misc", STAMUNIT_TICKS_PER_CALL, "Profiling of emR3RawExecuteInstruction.");
STAM_REG(pVM, &pVM->em.s.StatREMEmu, STAMTYPE_PROFILE, "/PROF/EM/REMEmuSingle", STAMUNIT_TICKS_PER_CALL, "Profiling single instruction REM execution.");
STAM_REG(pVM, &pVM->em.s.StatREMExec, STAMTYPE_PROFILE, "/PROF/EM/REMExec", STAMUNIT_TICKS_PER_CALL, "Profiling REM execution.");
STAM_REG(pVM, &pVM->em.s.StatREMSync, STAMTYPE_PROFILE, "/PROF/EM/REMSync", STAMUNIT_TICKS_PER_CALL, "Profiling REM context syncing.");
STAM_REG(pVM, &pVM->em.s.StatREMTotal, STAMTYPE_PROFILE, "/PROF/EM/REMTotal", STAMUNIT_TICKS_PER_CALL, "Profiling emR3RemExecute (excluding FFs).");
STAM_REG(pVM, &pVM->em.s.StatRAWEntry, STAMTYPE_PROFILE, "/PROF/EM/RAWEnter", STAMUNIT_TICKS_PER_CALL, "Profiling Raw Mode entry overhead.");
STAM_REG(pVM, &pVM->em.s.StatRAWExec, STAMTYPE_PROFILE, "/PROF/EM/RAWExec", STAMUNIT_TICKS_PER_CALL, "Profiling Raw Mode execution.");
STAM_REG(pVM, &pVM->em.s.StatRAWTail, STAMTYPE_PROFILE, "/PROF/EM/RAWTail", STAMUNIT_TICKS_PER_CALL, "Profiling Raw Mode tail overhead.");
STAM_REG(pVM, &pVM->em.s.StatRAWTotal, STAMTYPE_PROFILE, "/PROF/EM/RAWTotal", STAMUNIT_TICKS_PER_CALL, "Profiling emR3RawExecute (excluding FFs).");
STAM_REL_REG(pVM, &pVM->em.s.StatTotal, STAMTYPE_PROFILE_ADV, "/PROF/EM/Total", STAMUNIT_TICKS_PER_CALL, "Profiling EMR3ExecuteVM.");
return VINF_SUCCESS;
}
/**
* Applies relocations to data and code managed by this
* component. This function will be called at init and
* whenever the VMM need to relocate it self inside the GC.
*
* @param pVM The VM.
*/
{
LogFlow(("EMR3Relocate\n"));
}
/**
* Reset notification.
*
* @param pVM
*/
{
LogFlow(("EMR3Reset: \n"));
}
/**
* Terminates the EM.
*
* Termination means cleaning up and freeing all resources,
* the VM it self is at this point powered off or suspended.
*
* @returns VBox status code.
* @param pVM The VM to operate on.
*/
{
return VINF_SUCCESS;
}
/**
* Execute state save operation.
*
* @returns VBox status code.
* @param pVM VM Handle.
* @param pSSM SSM operation handle.
*/
{
}
/**
* Execute state load operation.
*
* @returns VBox status code.
* @param pVM VM Handle.
* @param pSSM SSM operation handle.
* @param u32Version Data layout version.
*/
{
/*
* Validate version.
*/
if (u32Version != EM_SAVED_STATE_VERSION)
{
Log(("emR3Load: Invalid version u32Version=%d (current %d)!\n", u32Version, EM_SAVED_STATE_VERSION));
}
/*
* Load the saved state.
*/
if (VBOX_FAILURE(rc))
return rc;
}
/**
* Enables or disables a set of raw-mode execution modes.
*
* @returns VINF_SUCCESS on success.
* @returns VINF_RESCHEDULE if a rescheduling might be required.
* @returns VERR_INVALID_PARAMETER on an invalid enmMode value.
*
* @param pVM The VM to operate on.
* @param enmMode The execution mode change.
* @thread The emulation thread.
*/
{
switch (enmMode)
{
case EMRAW_NONE:
pVM->fRawR3Enabled = false;
pVM->fRawR0Enabled = false;
break;
case EMRAW_RING3_ENABLE:
pVM->fRawR3Enabled = true;
break;
case EMRAW_RING3_DISABLE:
pVM->fRawR3Enabled = false;
break;
case EMRAW_RING0_ENABLE:
pVM->fRawR0Enabled = true;
break;
case EMRAW_RING0_DISABLE:
pVM->fRawR0Enabled = false;
break;
default:
return VERR_INVALID_PARAMETER;
}
Log(("EMR3SetRawMode: fRawR3Enabled=%RTbool fRawR0Enabled=%RTbool pVM->fRawR3Enabled=%RTbool\n",
}
/**
* Raise a fatal error.
*
* Safely terminate the VM with full state report and stuff. This function
* will naturally never return.
*
* @param pVM VM handle.
* @param rc VBox status code.
*/
{
AssertReleaseMsgFailed(("longjmp returned!\n"));
}
/**
* Gets the EM state name.
*
* @returns pointer to read only state name,
* @param enmState The state.
*/
{
switch (enmState)
{
case EMSTATE_RAW: return "EMSTATE_RAW";
case EMSTATE_HWACC: return "EMSTATE_HWACC";
case EMSTATE_REM: return "EMSTATE_REM";
case EMSTATE_HALTED: return "EMSTATE_HALTED";
case EMSTATE_SUSPENDED: return "EMSTATE_SUSPENDED";
case EMSTATE_TERMINATING: return "EMSTATE_TERMINATING";
case EMSTATE_DEBUG_GUEST_RAW: return "EMSTATE_DEBUG_GUEST_RAW";
case EMSTATE_DEBUG_GUEST_REM: return "EMSTATE_DEBUG_GUEST_REM";
case EMSTATE_DEBUG_HYPER: return "EMSTATE_DEBUG_HYPER";
case EMSTATE_GURU_MEDITATION: return "EMSTATE_GURU_MEDITATION";
default: return "Unknown!";
}
}
#ifdef VBOX_WITH_STATISTICS
/**
* Just a braindead function to keep track of cli addresses.
* @param pVM VM handle.
* @param pInstrGC The EIP of the cli instruction.
*/
{
if (!pRec)
{
/* New cli instruction; insert into the tree. */
if (!pRec)
return;
char szCliStatName[32];
STAM_REG(pVM, &pRec->Counter, STAMTYPE_COUNTER, szCliStatName, STAMUNIT_OCCURENCES, "Number of times cli was executed.");
}
}
#endif /* VBOX_WITH_STATISTICS */
/**
* Debug loop.
*
* @returns VBox status code for EM.
* @param pVM VM handle.
* @param rc Current EM VBox status code..
*/
{
for (;;)
{
/*
* Debug related RC.
*/
switch (rc)
{
/*
* Single step an instruction.
*/
case VINF_EM_DBG_STEP:
else
{
}
break;
/*
*/
case VINF_EM_DBG_STEPPED:
break;
case VINF_EM_DBG_BREAKPOINT:
break;
case VINF_EM_DBG_STOP:
break;
break;
break;
RTPrintf("\nVINF_EM_DBG_HYPER_ASSERTION:\n%s%s\n", VMMR3GetGCAssertMsg1(pVM), VMMR3GetGCAssertMsg2(pVM));
rc = DBGFR3EventAssertion(pVM, DBGFEVENT_ASSERTION_HYPER, VMMR3GetGCAssertMsg1(pVM), VMMR3GetGCAssertMsg2(pVM));
break;
/*
* Guru meditation.
*/
default: /** @todo don't use default for guru, but make special errors code! */
break;
}
/*
* Process the result.
*/
do
{
switch (rc)
{
/*
* Continue the debugging loop.
*/
case VINF_EM_DBG_STEP:
case VINF_EM_DBG_STOP:
case VINF_EM_DBG_STEPPED:
case VINF_EM_DBG_BREAKPOINT:
break;
/*
* Resuming execution (in some form) has to be done here if we got
* a hypervisor debug event.
*/
case VINF_SUCCESS:
case VINF_EM_RESUME:
case VINF_EM_SUSPEND:
case VINF_EM_RESCHEDULE:
case VINF_EM_RESCHEDULE_RAW:
case VINF_EM_RESCHEDULE_REM:
case VINF_EM_HALT:
{
continue;
}
if (rc == VINF_SUCCESS)
return rc;
/*
* The debugger isn't attached.
* We'll simply turn the thing off since that's the easiest thing to do.
*/
case VERR_DBGF_NOT_ATTACHED:
switch (rcLast)
{
return rcLast;
}
return VINF_EM_OFF;
/*
* Status codes terminating the VM in one or another sense.
*/
case VINF_EM_TERMINATE:
case VINF_EM_OFF:
case VINF_EM_RESET:
case VINF_EM_RAW_IRET_TRAP:
case VERR_TRPM_PANIC:
case VERR_TRPM_DONT_PANIC:
case VERR_INTERNAL_ERROR:
return rc;
/*
* The rest is unexpected, and will keep us here.
*/
default:
break;
}
} while (false);
} /* debug for ever */
}
/**
* Steps recompiled code.
*
* @returns VBox status code. The most important ones are: VINF_EM_STEP_EVENT,
* VINF_EM_RESCHEDULE, VINF_EM_SUSPEND, VINF_EM_RESET and VINF_EM_TERMINATE.
*
* @param pVM VM handle.
*/
{
/*
* Switch to REM, step instruction, switch back.
*/
if (VBOX_SUCCESS(rc))
{
}
LogFlow(("emR3RemStep: returns %Vrc cs:eip=%04x:%08x\n", rc, CPUMGetGuestCS(pVM), CPUMGetGuestEIP(pVM)));
return rc;
}
/**
* Executes recompiled code.
*
* This function contains the recompiler version of the inner
* execution loop (the outer loop being in EMR3ExecuteVM()).
*
* @returns VBox status code. The most important ones are: VINF_EM_RESCHEDULE,
* VINF_EM_SUSPEND, VINF_EM_RESET and VINF_EM_TERMINATE.
*
* @param pVM VM handle.
* @param pfFFDone Where to store an indicator telling wheter or not
* FFs were done before returning.
*
*/
{
#ifdef LOG_ENABLED
else
Log(("EMR%d: %08X ESP=%08X IF=%d CR0=%x\n", cpl, pCtx->eip, pCtx->esp, pCtx->eflags.Bits.u1IF, pCtx->cr0));
#endif
#if defined(VBOX_STRICT) && defined(DEBUG_bird)
#endif
/*
* Spin till we get a forced action which returns anything but VINF_SUCCESS
* or the REM suggests raw-mode execution.
*/
*pfFFDone = false;
bool fInREMState = false;
int rc = VINF_SUCCESS;
for (;;)
{
/*
* Update REM state if not already in sync.
*/
if (!fInREMState)
{
if (VBOX_FAILURE(rc))
break;
fInREMState = true;
/*
* We might have missed the raising of VMREQ, TIMER and some other
* imporant FFs while we were busy switching the state. So, check again.
*/
if (VM_FF_ISPENDING(pVM, VM_FF_REQUEST | VM_FF_TIMER | VM_FF_PDM_QUEUES | VM_FF_DBGF | VM_FF_TERMINATE | VM_FF_RESET))
{
goto l_REMDoForcedActions;
}
}
/*
* Execute REM.
*/
/*
* Deal with high priority post execution FFs before doing anything else.
*/
/*
* Process the returned status code.
* (Try keep this short! Call functions!)
*/
if (rc != VINF_SUCCESS)
{
break;
if (rc != VINF_REM_INTERRUPED_FF)
{
/*
* Anything which is not known to us means an internal error
* and the termination of the VM!
*/
break;
}
}
/*
* Check and execute forced actions.
* Sync back the VM state before calling any of these.
*/
#ifdef VBOX_HIGH_RES_TIMERS_HACK
#endif
if (VM_FF_ISPENDING(pVM, VM_FF_ALL_BUT_RAW_MASK & ~(VM_FF_CSAM_PENDING_ACTION | VM_FF_CSAM_SCAN_PAGE)))
{
if (fInREMState)
{
fInREMState = false;
}
if ( rc != VINF_SUCCESS
&& rc != VINF_EM_RESCHEDULE_REM)
{
*pfFFDone = true;
break;
}
}
} /* The Inner Loop, recompiled execution mode version. */
/*
* Returning. Sync back the VM state if required.
*/
if (fInREMState)
{
}
return rc;
}
/**
* Resumes executing hypervisor after a debug event.
*
* This is kind of special since our current guest state is
* potentially out of sync.
*
* @returns VBox status code.
* @param pVM The VM handle.
*/
{
int rc;
/*
* Resume execution.
*/
Log(("emR3RawStep: cs:eip=%RTsel:%RGr efl=%RGr - returned from GC with rc=%Vrc\n", pCtx->cs, pCtx->eip, pCtx->eflags, rc));
/*
* Deal with the return code.
*/
return rc;
}
/**
* Steps rawmode.
*
* @returns VBox status code.
* @param pVM The VM handle.
*/
{
int rc;
#ifndef DEBUG_sandervl
Log(("emR3RawStep: cs:eip=%RTsel:%RGr efl=%RGr\n", fGuest ? CPUMGetGuestCS(pVM) : CPUMGetHyperCS(pVM),
fGuest ? CPUMGetGuestEIP(pVM) : CPUMGetHyperEIP(pVM), fGuest ? CPUMGetGuestEFlags(pVM) : CPUMGetHyperEFlags(pVM)));
#endif
if (fGuest)
{
/*
* Check vital forced actions, but ignore pending interrupts and timers.
*/
{
if (VBOX_FAILURE(rc))
return rc;
}
/*
* Set flags for single stepping.
*/
}
else
/*
* Single step.
* We do not start time or anything, if anything we should just do a few nanoseconds.
*/
do
{
else
#ifndef DEBUG_sandervl
Log(("emR3RawStep: cs:eip=%RTsel:%RGr efl=%RGr - GC rc %Vrc\n", fGuest ? CPUMGetGuestCS(pVM) : CPUMGetHyperCS(pVM),
fGuest ? CPUMGetGuestEIP(pVM) : CPUMGetHyperEIP(pVM), fGuest ? CPUMGetGuestEFlags(pVM) : CPUMGetHyperEFlags(pVM), rc));
#endif
} while ( rc == VINF_SUCCESS
|| rc == VINF_EM_RAW_INTERRUPT);
/*
* Make sure the trap flag is cleared.
* (Too bad if the guest is trying to single step too.)
*/
if (fGuest)
else
/*
* Deal with the return codes.
*/
return rc;
}
#ifdef DEBUG
/**
* Steps hardware accelerated mode.
*
* @returns VBox status code.
* @param pVM The VM handle.
*/
{
int rc;
VM_FF_CLEAR(pVM, (VM_FF_SELM_SYNC_GDT | VM_FF_SELM_SYNC_LDT | VM_FF_TRPM_SYNC_IDT | VM_FF_SELM_SYNC_TSS));
/*
* Check vital forced actions, but ignore pending interrupts and timers.
*/
{
if (VBOX_FAILURE(rc))
return rc;
}
/*
* Set flags for single stepping.
*/
/*
* Single step.
* We do not start time or anything, if anything we should just do a few nanoseconds.
*/
do
{
} while ( rc == VINF_SUCCESS
|| rc == VINF_EM_RAW_INTERRUPT);
/*
* Make sure the trap flag is cleared.
* (Too bad if the guest is trying to single step too.)
*/
/*
* Deal with the return codes.
*/
return rc;
}
{
Log(("Single step BEGIN:\n"));
for(uint32_t i=0;i<cIterations;i++)
{
}
Log(("Single step END:\n"));
}
{
Log(("Single step BEGIN:\n"));
for(uint32_t i=0;i<cIterations;i++)
{
}
Log(("Single step END:\n"));
}
{
Log(("Single step BEGIN:\n"));
for(uint32_t i=0;i<cIterations;i++)
{
}
Log(("Single step END:\n"));
}
#endif /* DEBUG */
/**
* Executes one (or perhaps a few more) instruction(s).
*
* @returns VBox status code suitable for EM.
*
* @param pVM VM handle.
* @param rcGC GC return code
* @param pszPrefix Disassembly prefix. If not NULL we'll disassemble the
* instruction and prefix the log output with this text.
*/
#ifdef LOG_ENABLED
#else
#endif
{
int rc;
/*
*
* The simple solution is to use the recompiler.
* The better solution is to disassemble the current instruction and
* try handle as many as possible without using REM.
*
*/
#ifdef LOG_ENABLED
/*
* Disassemble the instruction if requested.
*/
if (pszPrefix)
{
}
#endif /* LOG_ENABLED */
/*
* PATM is making life more interesting.
* We cannot hand anything to REM which has an EIP inside patch code. So, we'll
* tell PATM there is a trap in this code and have it take the appropriate actions
* to allow us execute the code in REM.
*/
{
switch (rc)
{
/*
* It's not very useful to emulate a single instruction and then go back to raw
* mode; just execute the whole block until IF is set again.
*/
case VINF_SUCCESS:
Log(("emR3RawExecuteInstruction: Executing instruction starting at new address %VGv IF=%d VMIF=%x\n",
{
/*
*/
Log(("PATCH: IF=1 -> emulate last instruction as it can't be interrupted!!\n"));
}
else if (rcGC == VINF_PATM_PENDING_IRQ_AFTER_IRET)
{
}
return VINF_EM_RESCHEDULE_REM;
/*
* One instruction.
*/
case VINF_PATCH_EMULATE_INSTR:
Log(("emR3RawExecuteInstruction: Emulate patched instruction at %VGv IF=%d VMIF=%x\n",
/*
* The patch was disabled, hand it to the REM.
*/
case VERR_PATCH_DISABLED:
Log(("emR3RawExecuteInstruction: Disabled patch -> new eip %VGv IF=%d VMIF=%x\n",
{
/*
*/
Log(("PATCH: IF=1 -> emulate last instruction as it can't be interrupted!!\n"));
}
return VINF_EM_RESCHEDULE_REM;
/* Force continued patch exection; usually due to write monitored stack. */
case VINF_PATCH_CONTINUE:
return VINF_SUCCESS;
default:
return VERR_INTERNAL_ERROR;
}
}
#if 0 /// @todo Sander, this breaks the linux image (panics). So, I'm disabling it for now. (OP_MOV triggers it btw.)
if (VBOX_SUCCESS(rc))
{
{
case OP_MOV:
case OP_AND:
case OP_OR:
case OP_XOR:
case OP_POP:
case OP_INC:
case OP_DEC:
case OP_XCHG:
if (VBOX_SUCCESS(rc))
{
return rc;
}
if (rc != VERR_EM_INTERPRETER)
break;
}
}
#endif
return rc;
}
/**
* Executes one (or perhaps a few more) instruction(s).
* This is just a wrapper for discarding pszPrefix in non-logging builds.
*
* @returns VBox status code suitable for EM.
* @param pVM VM handle.
* @param pszPrefix Disassembly prefix. If not NULL we'll disassemble the
* instruction and prefix the log output with this text.
* @param rcGC GC return code
*/
{
#ifdef LOG_ENABLED
#else
#endif
}
/**
* Executes one (or perhaps a few more) IO instruction(s).
*
* @returns VBox status code suitable for EM.
* @param pVM VM handle.
*/
{
int rc;
/** @todo probably we should fall back to the recompiler; otherwise we'll go back and forth between HC & GC
* as io instructions tend to come in packages of more than one
*/
if (VBOX_SUCCESS(rc))
{
{
{
case OP_IN:
{
break;
}
case OP_OUT:
{
break;
}
}
}
{
{
case OP_INSB:
case OP_INSWD:
{
break;
}
case OP_OUTSB:
case OP_OUTSWD:
{
break;
}
}
}
/*
* Handled the I/O return codes.
* (The unhandled cases end up with rc == VINF_EM_RESCHEDULE_REM.)
*/
if (IOM_SUCCESS(rc))
{
return rc;
}
if (rc == VINF_EM_RAW_GUEST_TRAP)
{
return rc;
}
if (VBOX_FAILURE(rc))
{
return rc;
}
}
}
/**
* Handle a guest context trap.
*
* @returns VBox status code suitable for EM.
* @param pVM VM handle.
*/
{
/*
* Get the trap info.
*/
if (VBOX_FAILURE(rc))
{
return rc;
}
/* Traps can be directly forwarded in hardware accelerated mode. */
if (HWACCMR3IsActive(pVM))
{
#ifdef LOGGING_ENABLED
#endif
return VINF_EM_RESCHEDULE_HWACC;
}
/** Scan kernel code that traps; we might not get another chance. */
{
}
{
/* If MONITOR & MWAIT are supported, then interpret them here. */
if ( VBOX_SUCCESS(rc)
{
{
if (VBOX_SUCCESS(rc))
{
return rc;
}
}
}
}
{
{
/*
* We should really check the TSS for the IO bitmap, but it's not like this
* lazy approach really makes things worse.
*/
}
}
#ifdef LOG_ENABLED
/* Get guest page information. */
Log(("emR3RawGuestTrap: cs:eip=%04x:%08x: trap=%02x err=%08x cr2=%08x cr0=%08x%s: Phys=%VGp fFlags=%08llx %s %s %s%s rc2=%d\n",
pCtx->cs, pCtx->eip, u8TrapNo, uErrorCode, uCR2, pCtx->cr0, (enmType == TRPM_SOFTWARE_INT) ? " software" : "", GCPhys, fFlags,
#endif
/*
* #PG has CR2.
* (Because of stuff like above we must set CR2 in a delayed fashion.)
*/
return VINF_EM_RESCHEDULE_REM;
}
/**
* Handle a ring switch trap.
* Need to do statistics and to install patches. The result is going to REM.
*
* @returns VBox status code suitable for EM.
* @param pVM VM handle.
*/
{
int rc;
/*
* sysenter, syscall & callgate
*/
if (VBOX_SUCCESS(rc))
{
{
{
if (VBOX_SUCCESS(rc))
{
return VINF_EM_RESCHEDULE_RAW;
}
}
}
#ifdef VBOX_WITH_STATISTICS
{
case OP_SYSENTER:
break;
case OP_SYSEXIT:
break;
case OP_SYSCALL:
break;
case OP_SYSRET:
break;
}
#endif
}
else
/* go to the REM to emulate a single instruction */
}
/**
* Handle a trap (#PF or #GP) in patch code
*
* @returns VBox status code suitable for EM.
* @param pVM VM handle.
* @param pCtx CPU context
* @param gcret GC return code
*/
{
int rc;
if (gcret == VINF_PATM_PATCH_INT3)
{
u8TrapNo = 3;
uCR2 = 0;
uErrorCode = 0;
}
else
if (gcret == VINF_PATM_PATCH_TRAP_GP)
{
/* No active trap in this case. Kind of ugly. */
uCR2 = 0;
uErrorCode = 0;
}
else
{
if (VBOX_FAILURE(rc))
{
return rc;
}
/* Reset the trap as we'll execute the original instruction again. */
}
/*
* Deal with traps inside patch code.
* (This code won't run outside GC.)
*/
if (u8TrapNo != 1)
{
#ifdef LOG_ENABLED
int rc;
if ( VBOX_SUCCESS(rc)
{
/* Iret crashes are bad as we have already changed the flags on the stack */
if (rc == VINF_SUCCESS)
{
if ( (uEFlags & X86_EFL_VM)
{
if (uEFlags & X86_EFL_VM)
{
if (rc == VINF_SUCCESS)
{
Log(("Patch code: IRET->VM stack frame: return address %04X:%VGv eflags=%08x ss:esp=%04X:%VGv\n", selCS, eip, uEFlags, selSS, esp));
Log(("Patch code: IRET->VM stack frame: DS=%04X ES=%04X FS=%04X GS=%04X\n", selDS, selES, selFS, selGS));
}
}
else
Log(("Patch code: IRET stack frame: return address %04X:%VGv eflags=%08x ss:esp=%04X:%VGv\n", selCS, eip, uEFlags, selSS, esp));
}
else
}
}
#endif
Log(("emR3PatchTrap: in patch: eip=%08x: trap=%02x err=%08x cr2=%08x cr0=%08x\n",
switch (rc)
{
/*
* Execute the faulting instruction.
*/
case VINF_SUCCESS:
{
/** @todo execute a whole block */
Log(("emR3PatchTrap: Virtual IF flag disabled!!\n"));
{
/* Windows XP lets irets fault intentionally and then takes action based on the opcode; an
* int3 patch overwrites it and leads to blue screens. Remove the patch in this case.
*/
if ( u8TrapNo == X86_XCPT_GP
{
/** @todo move to PATMR3HandleTrap */
}
/** @todo Knoppix 5 regression when returning VINF_SUCCESS here and going back to raw mode. */
/** @note possibly because a reschedule is required (e.g. iret to V86 code) */
/* Interrupts are enabled; just go back to the original instruction.
return VINF_SUCCESS; */
}
return VINF_EM_RESCHEDULE_REM;
}
/*
* One instruction.
*/
case VINF_PATCH_EMULATE_INSTR:
Log(("emR3PatchTrap: Emulate patched instruction at %VGv IF=%d VMIF=%x\n",
/*
* The patch was disabled, hand it to the REM.
*/
case VERR_PATCH_DISABLED:
Log(("emR3PatchTrap: Virtual IF flag disabled!!\n"));
{
/*
*/
Log(("PATCH: IF=1 -> emulate last instruction as it can't be interrupted!!\n"));
}
return VINF_EM_RESCHEDULE_REM;
/* Force continued patch exection; usually due to write monitored stack. */
case VINF_PATCH_CONTINUE:
return VINF_SUCCESS;
/*
* Anything else is *fatal*.
*/
default:
return VERR_INTERNAL_ERROR;
}
}
return VINF_SUCCESS;
}
/**
* Handle a privileged instruction.
*
* @returns VBox status code suitable for EM.
* @param pVM VM handle.
*/
{
if (PATMIsEnabled(pVM))
{
/*
* Check if in patch code.
*/
{
#ifdef LOG_ENABLED
#endif
AssertMsgFailed(("FATAL ERROR: executing random instruction inside generated patch jump %08X\n", pCtx->eip));
return VERR_EM_RAW_PATCH_CONFLICT;
}
{
if (VBOX_SUCCESS(rc))
{
#ifdef LOG_ENABLED
#endif
return VINF_SUCCESS;
}
}
}
#ifdef LOG_ENABLED
{
}
#endif
/*
* Instruction statistics and logging.
*/
int rc;
if (VBOX_SUCCESS(rc))
{
#ifdef VBOX_WITH_STATISTICS
{
case OP_INVLPG:
break;
case OP_IRET:
break;
case OP_CLI:
break;
case OP_STI:
break;
case OP_INSB:
case OP_INSWD:
case OP_IN:
case OP_OUTSB:
case OP_OUTSWD:
case OP_OUT:
AssertMsgFailed(("Unexpected privileged exception due to port IO\n"));
break;
case OP_MOV_CR:
{
//read
}
else
{
//write
}
break;
case OP_MOV_DR:
break;
case OP_LLDT:
break;
case OP_LIDT:
break;
case OP_LGDT:
break;
case OP_SYSENTER:
break;
case OP_SYSEXIT:
break;
case OP_SYSCALL:
break;
case OP_SYSRET:
break;
case OP_HLT:
break;
default:
break;
}
#endif
{
{
case OP_CLI:
return VINF_EM_RESCHEDULE_REM; /* must go to the recompiler now! */
case OP_STI:
return VINF_SUCCESS;
case OP_HLT:
{
if (enmState == PATMTRANS_OVERWRITTEN)
{
/* Conflict detected, patch disabled */
}
/* The translation had better be successful. Otherwise we can't recover. */
AssertReleaseMsg(pOrgInstrGC && enmState != PATMTRANS_OVERWRITTEN, ("Unable to translate instruction address at %VGv\n", pCtx->eip));
if (enmState != PATMTRANS_OVERWRITTEN)
}
/* no break; we could just return VINF_EM_HALT here */
case OP_MOV_CR:
case OP_MOV_DR:
#ifdef LOG_ENABLED
{
}
#endif
if (VBOX_SUCCESS(rc))
{
)
{
return VINF_EM_RESCHEDULE;
}
return rc; /* can return VINF_EM_HALT as well. */
}
break; /* fall back to the recompiler */
}
}
}
}
/**
* Update the forced rawmode execution modifier.
*
* This function is called when we're returning from the raw-mode loop(s). If we're
* in patch code, it will set a flag forcing execution to be resumed in raw-mode,
* if not in patch code, the flag will be cleared.
*
* We should never interrupt patch code while it's being executed. Cli patches can
* contain big code blocks, but they are always executed with IF=0. Other patches
* replace single instructions and should be atomic.
*
* @returns Updated rc.
*
* @param pVM The VM handle.
* @param pCtx The guest CPU context.
* @param rc The result code.
*/
{
{
/* ignore reschedule attempts. */
switch (rc)
{
case VINF_EM_RESCHEDULE:
case VINF_EM_RESCHEDULE_REM:
rc = VINF_SUCCESS;
break;
}
}
else
return rc;
}
/**
* Process a subset of the raw-mode return code.
*
* Since we have to share this with raw-mode single stepping, this inline
* function has been created to avoid code duplication.
*
* @returns VINF_SUCCESS if it's ok to continue raw mode.
* @returns VBox status code to return to the EM main loop.
*
* @param pVM The VM handle
* @param rc The return code.
* @param pCtx The guest cpu context.
*/
{
switch (rc)
{
/*
* Common & simple ones.
*/
case VINF_SUCCESS:
break;
case VINF_EM_RESCHEDULE_RAW:
case VINF_EM_RESCHEDULE_HWACC:
case VINF_EM_RAW_INTERRUPT:
case VINF_EM_RAW_TO_R3:
case VINF_EM_PENDING_REQUEST:
rc = VINF_SUCCESS;
break;
/*
* Privileged instruction.
*/
case VINF_PATM_PATCH_TRAP_GP:
break;
/*
* Got a trap which needs dispatching.
*/
case VINF_EM_RAW_GUEST_TRAP:
{
AssertReleaseMsgFailed(("FATAL ERROR: executing random instruction inside generated patch jump %08X\n", CPUMGetGuestEIP(pVM)));
break;
}
if (TRPMHasTrap(pVM))
{
if (uErrorCode != ~0U)
/* If the guest gate is marked unpatched, then we will check again if we can patch it. */
{
Log(("emR3RawHandleRC: recheck gate %x -> valid=%d\n", u8Interrupt, TRPMR3GetGuestTrapHandler(pVM, u8Interrupt) != TRPM_INVALID_HANDLER));
/** If it was successful, then we could go back to raw mode. */
{
/* Must check pending forced actions as our IDT or GDT might be out of sync */
{
return VINF_EM_RESCHEDULE_RAW;
}
}
}
}
break;
/*
* Trap in patch code.
*/
case VINF_PATM_PATCH_TRAP_PF:
case VINF_PATM_PATCH_INT3:
break;
rc = VINF_SUCCESS;
break;
rc = VINF_SUCCESS;
break;
/*
* Patch manager.
*/
break;
/*
* Memory mapped I/O access - attempt to patch the instruction
*/
PATMFL_MMIO_ACCESS | (SELMIsSelector32Bit(pVM, pCtx->eflags, pCtx->cs, &pCtx->csHid) ? PATMFL_CODE32 : 0));
if (VBOX_FAILURE(rc))
break;
AssertFailed(); /* not yet implemented. */
break;
/*
* Conflict or out of page tables.
*
* VM_FF_PGM_SYNC_CR3 is set by the hypervisor and all we need to
* do here is to execute the pending forced actions.
*/
case VINF_PGM_SYNC_CR3:
("VINF_PGM_SYNC_CR3 and no VM_FF_PGM_SYNC_CR3*!\n"));
rc = VINF_SUCCESS;
break;
/*
* Paging mode change.
*/
case VINF_PGM_CHANGE_MODE:
if (VBOX_SUCCESS(rc))
break;
/*
* CSAM wants to perform a task in ring-3. It has set an FF action flag.
*/
case VINF_CSAM_PENDING_ACTION:
rc = VINF_SUCCESS;
break;
/*
* Invoked Interrupt gate - must directly (!) go to the recompiler.
*/
{
if (TRPMHasTrap(pVM))
{
/* If the guest gate is marked unpatched, then we will check again if we can patch it. */
{
Log(("emR3RawHandleRC: recheck gate %x -> valid=%d\n", u8Interrupt, TRPMR3GetGuestTrapHandler(pVM, u8Interrupt) != TRPM_INVALID_HANDLER));
/** @note If it was successful, then we could go back to raw mode, but let's keep things simple for now. */
}
}
break;
}
/*
* Other ring switch types.
*/
case VINF_EM_RAW_RING_SWITCH:
break;
/*
* REMGCNotifyInvalidatePage() failed because of overflow.
*/
break;
/*
* I/O Port access - emulate the instruction.
*/
case VINF_IOM_HC_IOPORT_READ:
case VINF_IOM_HC_IOPORT_WRITE:
break;
/*
* Memory mapped I/O access - emulate the instruction.
*/
case VINF_IOM_HC_MMIO_READ:
case VINF_IOM_HC_MMIO_WRITE:
break;
/*
* Execute instruction.
*/
break;
break;
break;
break;
break;
/** @todo skip instruction and go directly to the halt state. (see REM for implementation details) */
break;
break;
case VINF_PATCH_EMULATE_INSTR:
break;
/*
* Stale selector and iret traps => REM.
*/
case VINF_EM_RAW_IRET_TRAP:
/* We will not go to the recompiler if EIP points to patch code. */
{
}
break;
/*
* Up a level.
*/
case VINF_EM_TERMINATE:
case VINF_EM_OFF:
case VINF_EM_RESET:
case VINF_EM_SUSPEND:
case VINF_EM_HALT:
case VINF_EM_RESUME:
case VINF_EM_RESCHEDULE:
case VINF_EM_RESCHEDULE_REM:
break;
/*
* Up a level and invoke the debugger.
*/
case VINF_EM_DBG_STEPPED:
case VINF_EM_DBG_BREAKPOINT:
case VINF_EM_DBG_STEP:
case VINF_EM_DBG_STOP:
break;
/*
* Up a level, dump and debug.
*/
case VERR_TRPM_DONT_PANIC:
case VERR_TRPM_PANIC:
break;
/*
* Anything which is not known to us means an internal error
* and the termination of the VM!
*/
default:
break;
}
return rc;
}
/**
* Check for pending raw actions
*
* @returns VBox status code.
* @param pVM The VM to operate on.
*/
{
}
/**
* Process raw-mode specific forced actions.
*
* This function is called when any FFs in the VM_FF_HIGH_PRIORITY_PRE_RAW_MASK is pending.
*
* @returns VBox status code.
* @param pVM The VM handle.
* @param pCtx The guest CPUM register context.
*/
{
/*
* Note that the order is *vitally* important!
* Also note that SELMR3UpdateFromCPUM may trigger VM_FF_SELM_SYNC_TSS.
*/
/*
* Sync selector tables.
*/
{
if (VBOX_FAILURE(rc))
return rc;
}
/*
* Sync IDT.
*/
{
if (VBOX_FAILURE(rc))
return rc;
}
/*
* Sync TSS.
*/
{
if (VBOX_FAILURE(rc))
return rc;
}
/*
* Sync page directory.
*/
{
if (VBOX_FAILURE(rc))
return rc;
/* Prefetch pages for EIP and ESP */
/** @todo This is rather expensive. Should investigate if it really helps at all. */
if (rc == VINF_SUCCESS)
if (rc != VINF_SUCCESS)
{
if (rc != VINF_PGM_SYNC_CR3)
return rc;
if (VBOX_FAILURE(rc))
return rc;
}
/** @todo maybe prefetch the supervisor stack page as well */
}
return VINF_SUCCESS;
}
/**
* Executes raw code.
*
* This function contains the raw-mode version of the inner
* execution loop (the outer loop being in EMR3ExecuteVM()).
*
* @returns VBox status code. The most important ones are: VINF_EM_RESCHEDULE,
* VINF_EM_RESCHEDULE_REM, VINF_EM_SUSPEND, VINF_EM_RESET and VINF_EM_TERMINATE.
*
* @param pVM VM handle.
* @param pfFFDone Where to store an indicator telling whether or not
* FFs were done before returning.
*/
{
int rc = VERR_INTERNAL_ERROR;
*pfFFDone = false;
/*
*
* Spin till we get a forced action or raw mode status code resulting in
* in anything but VINF_SUCCESS or VINF_EM_RESCHEDULE_RAW.
*
*/
for (;;)
{
/*
* Check various preconditions.
*/
#ifdef VBOX_STRICT
{
AssertMsgFailed(("We should not get conflicts any longer!!!\n"));
return VERR_INTERNAL_ERROR;
}
#endif /* VBOX_STRICT */
/*
* Process high priority pre-execution raw-mode FFs.
*/
{
if (VBOX_FAILURE(rc))
break;
}
/*
* If we're going to execute ring-0 code, the guest state needs to
* and perhaps EIP) needs to be stored with PATM.
*/
if (rc != VINF_SUCCESS)
{
break;
}
/*
* Scan code before executing it. Don't bother with user mode or V86 code
*/
{
}
#ifdef LOG_ENABLED
/*
* Log important stuff before entering GC.
*/
Log(("RV86: %04X:%08X IF=%d VMFlags=%x\n", pCtx->cs, pCtx->eip, pCtx->eflags.Bits.u1IF, pGCState->uVMFlags));
{
Log(("RR0: %08X ESP=%08X IF=%d VMFlags=%x PIF=%d CPL=%d (Scanned=%d)\n", pCtx->eip, pCtx->esp, pCtx->eflags.Bits.u1IF, pGCState->uVMFlags, pGCState->fPIF, (pCtx->ss & X86_SEL_RPL), fCSAMScanned));
}
Log(("RR3: %08X ESP=%08X IF=%d VMFlags=%x\n", pCtx->eip, pCtx->esp, pCtx->eflags.Bits.u1IF, pGCState->uVMFlags));
#endif /* LOG_ENABLED */
/*
* Execute the code.
*/
LogFlow(("RR0-E: %08X ESP=%08X IF=%d VMFlags=%x PIF=%d CPL=%d\n", pCtx->eip, pCtx->esp, pCtx->eflags.Bits.u1IF, pGCState->uVMFlags, pGCState->fPIF, (pCtx->ss & X86_SEL_RPL)));
/*
* Restore the real CPU state and deal with high priority post
* execution FFs before doing anything else.
*/
#ifdef PGM_CACHE_VERY_STRICT
/*
* Page manager cache checks.
*/
if ( rc == VINF_EM_RAW_INTERRUPT
|| rc == VINF_EM_RAW_GUEST_TRAP
|| rc == VINF_IOM_HC_IOPORT_READ
|| rc == VINF_IOM_HC_IOPORT_WRITE
//|| rc == VINF_PATM_PATCH_INT3
)
#endif
#ifdef VBOX_STRICT
/*
* Assert TSS consistency & rc vs patch code.
*/
if ( !VM_FF_ISPENDING(pVM, VM_FF_SELM_SYNC_TSS | VM_FF_SELM_SYNC_GDT) /* GDT implies TSS at the moment. */
&& EMIsRawRing0Enabled(pVM))
switch (rc)
{
case VINF_SUCCESS:
case VINF_EM_RAW_INTERRUPT:
case VINF_PATM_PATCH_TRAP_PF:
case VINF_PATM_PATCH_TRAP_GP:
case VINF_PATM_PATCH_INT3:
case VINF_EM_RAW_GUEST_TRAP:
case VINF_EM_RESCHEDULE_RAW:
break;
default:
LogIt(NULL, 0, LOG_GROUP_PATM, ("Patch code interrupted at %VGv for reason %Vrc\n", CPUMGetGuestEIP(pVM), rc));
break;
}
/*
* Let's go paranoid!
*/
{
AssertMsgFailed(("We should not get conflicts any longer!!!\n"));
return VERR_INTERNAL_ERROR;
}
#endif /* VBOX_STRICT */
/*
* Process the returned status code.
*/
{
break;
}
if (rc != VINF_SUCCESS)
{
if (rc != VINF_SUCCESS)
{
break;
}
}
/*
* Check and execute forced actions.
*/
#ifdef VBOX_HIGH_RES_TIMERS_HACK
#endif
{
if ( rc != VINF_SUCCESS
&& rc != VINF_EM_RESCHEDULE_RAW)
{
if (rc != VINF_SUCCESS)
{
*pfFFDone = true;
break;
}
}
}
}
/*
* Return to outer loop.
*/
#if defined(LOG_ENABLED) && defined(DEBUG)
#endif
return rc;
}
/**
* Executes hardware accelerated raw code. (Intel VMX & AMD SVM)
*
* This function contains the raw-mode version of the inner
* execution loop (the outer loop being in EMR3ExecuteVM()).
*
* @returns VBox status code. The most important ones are: VINF_EM_RESCHEDULE, VINF_EM_RESCHEDULE_RAW,
* VINF_EM_RESCHEDULE_REM, VINF_EM_SUSPEND, VINF_EM_RESET and VINF_EM_TERMINATE.
*
* @param pVM VM handle.
* @param pfFFDone Where to store an indicator telling whether or not
* FFs were done before returning.
*/
{
int rc = VERR_INTERNAL_ERROR;
*pfFFDone = false;
/*
* Spin till we get a forced action which returns anything but VINF_SUCCESS.
*/
for (;;)
{
/*
* Check various preconditions.
*/
VM_FF_CLEAR(pVM, (VM_FF_SELM_SYNC_GDT | VM_FF_SELM_SYNC_LDT | VM_FF_TRPM_SYNC_IDT | VM_FF_SELM_SYNC_TSS));
/*
* Process high priority pre-execution raw-mode FFs.
*/
{
if (VBOX_FAILURE(rc))
break;
}
#ifdef LOG_ENABLED
if (rc == VINF_SUCCESS)
{
}
/*
* Log important stuff before entering GC.
*/
else
Log(("HWR%d: %08X ESP=%08X IF=%d CR0=%x\n", cpl, pCtx->eip, pCtx->esp, pCtx->eflags.Bits.u1IF, pCtx->cr0));
#endif
/*
* Execute the code.
*/
/*
* Deal with high priority post execution FFs before doing anything else.
*/
/*
* Process the returned status code.
*/
break;
if (rc != VINF_SUCCESS)
break;
/*
* Check and execute forced actions.
*/
#ifdef VBOX_HIGH_RES_TIMERS_HACK
#endif
{
if ( rc != VINF_SUCCESS
&& rc != VINF_EM_RESCHEDULE_HWACC)
{
*pfFFDone = true;
break;
}
}
}
/*
* Return to outer loop.
*/
#if defined(LOG_ENABLED) && defined(DEBUG)
#endif
return rc;
}
/**
* Decides whether to execute RAW, HWACC or REM.
*
* @returns new EM state
* @param pVM The VM.
* @param pCtx The CPU context.
*/
{
/*
* When forcing raw-mode execution, things are simple.
*/
return EMSTATE_RAW;
/* !!! THIS MUST BE IN SYNC WITH remR3CanExecuteRaw !!! */
/* !!! THIS MUST BE IN SYNC WITH remR3CanExecuteRaw !!! */
/* !!! THIS MUST BE IN SYNC WITH remR3CanExecuteRaw !!! */
if (HWACCMIsEnabled(pVM))
{
/* Hardware accelerated raw-mode:
*
* Typically only 32-bits protected mode, with paging enabled, code is allowed here.
*/
return EMSTATE_HWACC;
/** @note Raw mode and hw accelerated mode are incompatible. The latter turns off monitoring features essential for raw mode! */
return EMSTATE_REM;
}
/* Standard raw-mode:
*
* Here we only support 16 & 32 bits protected mode ring 3 code that has no IO privileges
* or 32 bits protected mode ring 0 code
*
* The tests are ordered by the likelyhood of being true during normal execution.
*/
{
return EMSTATE_REM;
}
#ifndef VBOX_RAW_V86
Log2(("raw mode refused: VM_MASK\n"));
return EMSTATE_REM;
}
#endif
/** @todo check up the X86_CR0_AM flag in respect to raw mode!!! We're probably not emulating it right! */
{
//Log2(("raw mode refused: %s%s%s\n", (u32CR0 & X86_CR0_PG) ? "" : " !PG", (u32CR0 & X86_CR0_PE) ? "" : " !PE", (u32CR0 & X86_CR0_AM) ? "" : " !AM"));
return EMSTATE_REM;
}
{
//Log2(("raw mode refused: PAE\n"));
return EMSTATE_REM;
}
{
if (!EMIsRawRing3Enabled(pVM))
return EMSTATE_REM;
{
Log2(("raw mode refused: IF (RawR3)\n"));
return EMSTATE_REM;
}
{
Log2(("raw mode refused: CR0.WP + RawR0\n"));
return EMSTATE_REM;
}
}
else
{
if (!EMIsRawRing0Enabled(pVM))
return EMSTATE_REM;
/* Only ring 0 supervisor code. */
if ((uSS & X86_SEL_RPL) != 0)
{
return EMSTATE_REM;
}
// Let's start with pure 32 bits ring 0 code first
/** @todo What's pure 32-bit mode? flat? */
{
return EMSTATE_REM;
}
/* Write protection muts be turned on, or else the guest can overwrite our hypervisor code and data. */
if (!(u32CR0 & X86_CR0_WP))
{
Log2(("raw r0 mode refused: CR0.WP=0!\n"));
return EMSTATE_REM;
}
{
Log2(("raw r0 mode forced: patch code\n"));
return EMSTATE_RAW;
}
#if !defined(VBOX_ALLOW_IF0) && !defined(VBOX_RUN_INTERRUPT_GATE_HANDLERS)
{
////Log2(("R0: IF=0 VIF=%d %08X\n", eip, pVMeflags));
//Log2(("RR0: Interrupts turned off; fall back to emulation\n"));
return EMSTATE_REM;
}
#endif
/** @todo still necessary??? */
{
return EMSTATE_REM;
}
}
return EMSTATE_RAW;
}
/**
* Executes all high priority post execution force actions.
*
* @returns rc or a fatal status code.
*
* @param pVM VM handle.
* @param rc The current rc.
*/
{
return rc;
}
/**
* Executes all pending forced actions.
*
* Forced actions can cause execution delays and execution
* rescheduling. The first we deal with using action priority, so
* that for instance pending timers aren't scheduled and ran until
* right before execution. The rescheduling we deal with using
* return codes. The same goes for VM termination, only in that case
* we exit everything.
*
* @returns VBox status code of equal or greater importance/severity than rc.
* The most important ones are: VINF_EM_RESCHEDULE,
* VINF_EM_SUSPEND, VINF_EM_RESET and VINF_EM_TERMINATE.
*
* @param pVM VM handle.
* @param rc The current rc.
*
*/
{
#ifdef VBOX_STRICT
int rcIrq = VINF_SUCCESS;
#endif
#define UPDATE_RC() \
do { \
AssertMsg(rc2 <= 0 || (rc2 >= VINF_EM_FIRST && rc2 <= VINF_EM_LAST), ("Invalid FF return code: %Vra\n", rc2)); \
break; \
} while (0)
int rc2;
/*
* Post execution chunk first.
*/
{
/*
* Termination request.
*/
{
Log2(("emR3ForcedActions: returns VINF_EM_TERMINATE\n"));
return VINF_EM_TERMINATE;
}
/*
* Debugger Facility polling.
*/
{
UPDATE_RC();
}
/*
* Postponed reset request.
*/
{
UPDATE_RC();
}
/*
* CSAM page scanning.
*/
{
/** @todo: check for 16 or 32 bits code! (D bit in the code selector) */
Log(("Forced action VM_FF_CSAM_SCAN_PAGE\n"));
}
/* check that we got them all */
Assert(!(VM_FF_NORMAL_PRIORITY_POST_MASK & ~(VM_FF_TERMINATE | VM_FF_DBGF | VM_FF_RESET | VM_FF_CSAM_SCAN_PAGE)));
}
/*
* Normal priority then.
* (Executed in no particular order.)
*/
{
/*
* PDM Queues are pending.
*/
/*
* PDM DMA transfers are pending.
*/
/*
* Requests from other threads.
*/
{
{
return rc2;
}
UPDATE_RC();
}
/* check that we got them all */
}
/*
* Execute polling function ever so often.
* THIS IS A HACK, IT WILL BE *REPLACED* BY PROPER ASYNC NETWORKING SOON!
*/
static unsigned cLast = 0;
if (!((++cLast) % 4))
/*
* High priority pre execution chunk last.
* (Executed in ascending priority order.)
*/
{
/*
* Timers before interrupts.
*/
/*
* The instruction following an emulated STI should *always* be executed!
*/
{
Log(("VM_FF_EMULATED_STI at %VGv successor %VGv\n", CPUMGetGuestEIP(pVM), EMGetInhibitInterruptsPC(pVM)));
{
/** @note we intentionally don't clear VM_FF_INHIBIT_INTERRUPTS here if the eip is the same as the inhibited instr address.
* Before we are able to execute this instruction in raw mode (iret to guest code) an external interrupt might
* force a world switch again. Possibly allowing a guest interrupt to be dispatched in the process. This could
* break the guest. Sounds very unlikely, but such timing sensitive problem are not as rare as you might think.
*/
}
if (HWACCMR3IsActive(pVM))
else
UPDATE_RC();
}
/*
* Interrupts.
*/
&& !TRPMHasTrap(pVM) /* an interrupt could already be scheduled for dispatching in the recompiler. */
&& !HWACCMR3IsEventPending(pVM))
{
{
/** @note it's important to make sure the return code from TRPMR3InjectEvent isn't ignored! */
/** @todo this really isn't nice, should properly handle this */
#ifdef VBOX_STRICT
#endif
UPDATE_RC();
}
/** @todo really ugly; if we entered the hlt state when exiting the recompiler and an interrupt was pending, we previously got stuck in the halted state. */
{
UPDATE_RC();
}
}
/*
* Debugger Facility request.
*/
{
UPDATE_RC();
}
/*
* Termination request.
*/
{
Log2(("emR3ForcedActions: returns VINF_EM_TERMINATE\n"));
return VINF_EM_TERMINATE;
}
#ifdef DEBUG
/*
* Debug, pause the VM.
*/
{
Log(("emR3ForcedActions: returns VINF_EM_SUSPEND\n"));
return VINF_EM_SUSPEND;
}
#endif
/* check that we got them all */
Assert(!(VM_FF_HIGH_PRIORITY_PRE_MASK & ~(VM_FF_TIMER | VM_FF_INTERRUPT_APIC | VM_FF_INTERRUPT_PIC | VM_FF_DBGF | VM_FF_PGM_SYNC_CR3 | VM_FF_PGM_SYNC_CR3_NON_GLOBAL | VM_FF_SELM_SYNC_TSS | VM_FF_TRPM_SYNC_IDT | VM_FF_SELM_SYNC_GDT | VM_FF_SELM_SYNC_LDT | VM_FF_TERMINATE | VM_FF_DEBUG_SUSPEND | VM_FF_INHIBIT_INTERRUPTS)));
}
return rc;
}
/**
* Execute VM.
*
* This function is the main loop of the VM. The emulation thread
* calls this function when the VM has been successfully constructed
* and we're ready for executing the VM.
*
* Returning from this function means that the VM is turned off or
* suspended (state already saved) and deconstruction in next in line.
*
* All interaction from other thread are done using forced actions
* and signaling of the wait object.
*
* @returns VBox status code.
* @param pVM The VM to operate on.
*/
{
LogFlow(("EMR3ExecuteVM: pVM=%p enmVMState=%d enmState=%d (%s) fForceRAW=%d\n", pVM, pVM->enmVMState,
if (rc == 0)
{
/*
* Start the virtual time.
*/
/*
* The Outer Main Loop.
*/
bool fFFDone = false;
for (;;)
{
/*
* Before we can schedule anything (we're here because
* scheduling is required) we must service any pending
* forced actions to avoid any pending action causing
* immidate rescheduling upon entering an inner loop
*
* Do forced actions.
*/
if ( !fFFDone
&& rc != VINF_EM_TERMINATE
&& rc != VINF_EM_OFF
{
if ( ( rc == VINF_EM_RESCHEDULE_REM
|| rc == VINF_EM_RESCHEDULE_HWACC)
}
else if (fFFDone)
fFFDone = false;
/*
* Now what to do?
*/
switch (rc)
{
/*
* Keep doing what we're currently doing.
*/
case VINF_SUCCESS:
break;
/*
* Reschedule - to raw-mode execution.
*/
case VINF_EM_RESCHEDULE_RAW:
Log2(("EMR3ExecuteVM: VINF_EM_RESCHEDULE_RAW: %d -> %d (EMSTATE_RAW)\n", pVM->em.s.enmState, EMSTATE_RAW));
break;
/*
* Reschedule - to hardware accelerated raw-mode execution.
*/
case VINF_EM_RESCHEDULE_HWACC:
Log2(("EMR3ExecuteVM: VINF_EM_RESCHEDULE_HWACC: %d -> %d (EMSTATE_HWACC)\n", pVM->em.s.enmState, EMSTATE_HWACC));
break;
/*
* Reschedule - to recompiled execution.
*/
case VINF_EM_RESCHEDULE_REM:
Log2(("EMR3ExecuteVM: VINF_EM_RESCHEDULE_REM: %d -> %d (EMSTATE_REM)\n", pVM->em.s.enmState, EMSTATE_REM));
break;
/*
* Resume.
*/
case VINF_EM_RESUME:
/* fall through and get scheduled. */
/*
* Reschedule.
*/
case VINF_EM_RESCHEDULE:
{
Log2(("EMR3ExecuteVM: VINF_EM_RESCHEDULE: %d -> %d (%s)\n", pVM->em.s.enmState, enmState, EMR3GetStateName(enmState)));
break;
}
/*
* Halted.
*/
case VINF_EM_HALT:
break;
/*
* Suspend.
*/
case VINF_EM_SUSPEND:
break;
/*
* Reset.
* We might end up doing a double reset for now, we'll have to clean up the mess later.
*/
case VINF_EM_RESET:
break;
/*
* Power Off.
*/
case VINF_EM_OFF:
return rc;
/*
* Terminate the VM.
*/
case VINF_EM_TERMINATE:
Log(("EMR3ExecuteVM returns VINF_EM_TERMINATE (%d -> %d)\n", pVM->em.s.enmState, EMSTATE_TERMINATING));
return rc;
/*
* Guest debug events.
*/
case VINF_EM_DBG_STEPPED:
AssertMsgFailed(("VINF_EM_DBG_STEPPED cannot be here!"));
case VINF_EM_DBG_STOP:
case VINF_EM_DBG_BREAKPOINT:
case VINF_EM_DBG_STEP:
{
}
else
{
}
break;
/*
* Hypervisor debug events.
*/
break;
/*
* Any error code showing up here other than the ones we
* know and process above are considered to be FATAL.
*
* Unknown warnings and informational status codes are also
* included in this.
*/
default:
if (VBOX_SUCCESS(rc))
{
}
break;
}
/*
* Any waiters can now be woken up
*/
/*
* Act on the state.
*/
{
/*
* Execute raw.
*/
case EMSTATE_RAW:
break;
/*
* Execute hardware accelerated raw.
*/
case EMSTATE_HWACC:
break;
/*
* Execute recompiled.
*/
case EMSTATE_REM:
break;
/*
* hlt - execution halted until interrupt.
*/
case EMSTATE_HALTED:
{
break;
}
/*
* Suspended - return to VM.cpp.
*/
case EMSTATE_SUSPENDED:
return VINF_EM_SUSPEND;
/*
* Debugging in the guest.
*/
case EMSTATE_DEBUG_GUEST_REM:
case EMSTATE_DEBUG_GUEST_RAW:
break;
/*
* Debugging in the hypervisor.
*/
case EMSTATE_DEBUG_HYPER:
{
if (rc != VINF_SUCCESS)
{
/* switch to guru meditation mode */
return rc;
}
break;
}
/*
* Guru meditation takes place in the debugger.
*/
case EMSTATE_GURU_MEDITATION:
{
/** @todo this ain't entirely safe. make a better return code check and specify this in DBGF/emR3Debug. */
if (rc2 == VERR_DBGF_NOT_ATTACHED)
{
/** @todo change the VM state! */
return rc;
}
/** @todo we're not doing the right thing in emR3Debug and will cause code to be executed on disconnect and stuff.. */
break;
}
/*
* The states we don't expect here.
*/
case EMSTATE_NONE:
case EMSTATE_TERMINATING:
default:
return VERR_EM_INTERNAL_ERROR;
}
} /* The Outer Main Loop */
}
else
{
/*
* Fatal error.
*/
/** @todo change the VM state! */
return rc;
}
/* (won't ever get here). */
AssertFailed();
}