DBGFReg.cpp revision 4c5ca3a170ec29d6f4b5bfe16ddc7d1845e311b3
/* $Id$ */
/** @file
* DBGF - Debugger Facility, Register Methods.
*/
/*
* Copyright (C) 2010 Oracle Corporation
*
* This file is part of VirtualBox Open Source Edition (OSE), as
* available from http://www.virtualbox.org. This file is free software;
* General Public License (GPL) as published by the Free Software
* Foundation, in version 2 as it comes in the "COPYING" file of the
* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
*/
/*******************************************************************************
* Header Files *
*******************************************************************************/
#define LOG_GROUP LOG_GROUP_DBGF
#include "DBGFInternal.h"
/*******************************************************************************
* Defined Constants And Macros *
*******************************************************************************/
/** @name Register and value sizes used by dbgfR3RegQueryWorker and
* dbgfR3RegSetWorker.
* @{ */
/** @} */
/**
* Wrapper around CPUMQueryGuestMsr.
*
* @retval VINF_SUCCESS
* @retval VERR_DBGF_INVALID_REGISTER
*
* @param pVCpu The current CPU.
* @param pu64 Where to store the register value.
* @param pfRegSizes Where to store the register sizes.
* @param idMsr The MSR to get.
*/
{
*pfRegSizes = R_SZ_64;
if (RT_FAILURE(rc))
{
*pu64 = 0;
}
return VINF_SUCCESS;
}
/**
* Worker for DBGFR3RegQueryU8, DBGFR3RegQueryU16, DBGFR3RegQueryU32 and
* DBGFR3RegQueryU64.
*
* @param pVM The VM handle.
* @param idCpu The target CPU ID.
* @param enmReg The register that's being queried.
* @param pu64 Where to store the register value.
* @param pfRegSizes Where to store the register sizes.
*/
static DECLCALLBACK(int) dbgfR3RegQueryWorker(PVM pVM, VMCPUID idCpu, DBGFREG enmReg, uint64_t *pu64, uint32_t *pfRegSizes)
{
switch (enmReg)
{
case DBGFREG_ST0: return VERR_NOT_IMPLEMENTED;
case DBGFREG_ST1: return VERR_NOT_IMPLEMENTED;
case DBGFREG_ST2: return VERR_NOT_IMPLEMENTED;
case DBGFREG_ST3: return VERR_NOT_IMPLEMENTED;
case DBGFREG_ST4: return VERR_NOT_IMPLEMENTED;
case DBGFREG_ST5: return VERR_NOT_IMPLEMENTED;
case DBGFREG_ST6: return VERR_NOT_IMPLEMENTED;
case DBGFREG_ST7: return VERR_NOT_IMPLEMENTED;
case DBGFREG_MM0: return VERR_NOT_IMPLEMENTED;
case DBGFREG_MM1: return VERR_NOT_IMPLEMENTED;
case DBGFREG_MM2: return VERR_NOT_IMPLEMENTED;
case DBGFREG_MM3: return VERR_NOT_IMPLEMENTED;
case DBGFREG_MM4: return VERR_NOT_IMPLEMENTED;
case DBGFREG_MM5: return VERR_NOT_IMPLEMENTED;
case DBGFREG_MM6: return VERR_NOT_IMPLEMENTED;
case DBGFREG_MM7: return VERR_NOT_IMPLEMENTED;
case DBGFREG_FCW: return VERR_NOT_IMPLEMENTED;
case DBGFREG_FSW: return VERR_NOT_IMPLEMENTED;
case DBGFREG_FTW: return VERR_NOT_IMPLEMENTED;
case DBGFREG_FOP: return VERR_NOT_IMPLEMENTED;
case DBGFREG_FPUIP: return VERR_NOT_IMPLEMENTED;
case DBGFREG_FPUCS: return VERR_NOT_IMPLEMENTED;
case DBGFREG_FPUDP: return VERR_NOT_IMPLEMENTED;
case DBGFREG_FPUDS: return VERR_NOT_IMPLEMENTED;
case DBGFREG_MXCSR: return VERR_NOT_IMPLEMENTED;
case DBGFREG_MXCSR_MASK: return VERR_NOT_IMPLEMENTED;
case DBGFREG_XMM0: return VERR_NOT_IMPLEMENTED;
case DBGFREG_XMM1: return VERR_NOT_IMPLEMENTED;
case DBGFREG_XMM2: return VERR_NOT_IMPLEMENTED;
case DBGFREG_XMM3: return VERR_NOT_IMPLEMENTED;
case DBGFREG_XMM4: return VERR_NOT_IMPLEMENTED;
case DBGFREG_XMM5: return VERR_NOT_IMPLEMENTED;
case DBGFREG_XMM6: return VERR_NOT_IMPLEMENTED;
case DBGFREG_XMM7: return VERR_NOT_IMPLEMENTED;
case DBGFREG_XMM8: return VERR_NOT_IMPLEMENTED;
case DBGFREG_XMM9: return VERR_NOT_IMPLEMENTED;
case DBGFREG_XMM10: return VERR_NOT_IMPLEMENTED;
case DBGFREG_XMM11: return VERR_NOT_IMPLEMENTED;
case DBGFREG_XMM12: return VERR_NOT_IMPLEMENTED;
case DBGFREG_XMM13: return VERR_NOT_IMPLEMENTED;
case DBGFREG_XMM14: return VERR_NOT_IMPLEMENTED;
case DBGFREG_XMM15: return VERR_NOT_IMPLEMENTED;
case DBGFREG_LDTR_LIMIT: *pu64 = pCtx->ldtrHid.u32Limit; *pfRegSizes = R_SZ_32; return VINF_SUCCESS;
case DBGFREG_MSR_IA32_PERF_STATUS: return dbgfR3RegGetMsr(pVCpu, pu64, pfRegSizes, MSR_IA32_PERF_STATUS);
case DBGFREG_MSR_IA32_SYSENTER_CS: return dbgfR3RegGetMsr(pVCpu, pu64, pfRegSizes, MSR_IA32_SYSENTER_CS);
case DBGFREG_MSR_IA32_SYSENTER_EIP: return dbgfR3RegGetMsr(pVCpu, pu64, pfRegSizes, MSR_IA32_SYSENTER_EIP);
case DBGFREG_MSR_IA32_SYSENTER_ESP: return dbgfR3RegGetMsr(pVCpu, pu64, pfRegSizes, MSR_IA32_SYSENTER_ESP);
case DBGFREG_MSR_K8_KERNEL_GS_BASE: return dbgfR3RegGetMsr(pVCpu, pu64, pfRegSizes, MSR_K8_KERNEL_GS_BASE);
case DBGFREG_END:
case DBGFREG_32BIT_HACK:
/* no default! We want GCC warnings. */
break;
}
return VERR_DBGF_INVALID_REGISTER;
}
/**
* Queries a 8-bit register value.
*
* @retval VINF_SUCCESS
* @retval VERR_INVALID_VM_HANDLE
* @retval VERR_INVALID_CPU_ID
* @retval VERR_DBGF_INVALID_REGISTER
* @retval VINF_DBGF_TRUNCATED_REGISTER
*
* @param pVM The VM handle.
* @param idCpu The target CPU ID.
* @param enmReg The register that's being queried.
* @param pu8 Where to store the register value.
*/
{
int rc = VMR3ReqCallWait(pVM, idCpu, (PFNRT)dbgfR3RegQueryWorker, 5, pVM, idCpu, enmReg, &u64Value, &fRegSizes);
if (RT_SUCCESS(rc))
{
rc = VINF_SUCCESS;
else
}
else
*pu8 = 0;
return rc;
}
/**
* Queries a 16-bit register value.
*
* @retval VINF_SUCCESS
* @retval VERR_INVALID_VM_HANDLE
* @retval VERR_INVALID_CPU_ID
* @retval VERR_DBGF_INVALID_REGISTER
* @retval VINF_DBGF_TRUNCATED_REGISTER
* @retval VINF_DBGF_ZERO_EXTENDED_REGISTER
*
* @param pVM The VM handle.
* @param idCpu The target CPU ID.
* @param enmReg The register that's being queried.
* @param pu16 Where to store the register value.
*/
{
int rc = VMR3ReqCallWait(pVM, idCpu, (PFNRT)dbgfR3RegQueryWorker, 5, pVM, idCpu, enmReg, &u64Value, &fRegSizes);
if (RT_SUCCESS(rc))
{
rc = VINF_SUCCESS;
else
}
else
*pu16 = 0;
return rc;
}
/**
* Queries a 32-bit register value.
*
* @retval VINF_SUCCESS
* @retval VERR_INVALID_VM_HANDLE
* @retval VERR_INVALID_CPU_ID
* @retval VERR_DBGF_INVALID_REGISTER
* @retval VINF_DBGF_TRUNCATED_REGISTER
* @retval VINF_DBGF_ZERO_EXTENDED_REGISTER
*
* @param pVM The VM handle.
* @param idCpu The target CPU ID.
* @param enmReg The register that's being queried.
* @param pu32 Where to store the register value.
*/
{
int rc = VMR3ReqCallWait(pVM, idCpu, (PFNRT)dbgfR3RegQueryWorker, 5, pVM, idCpu, enmReg, &u64Value, &fRegSizes);
if (RT_SUCCESS(rc))
{
rc = VINF_SUCCESS;
else
}
else
*pu32 = 0;
return rc;
}
/**
* Queries a 64-bit register value.
*
* @retval VINF_SUCCESS
* @retval VERR_INVALID_VM_HANDLE
* @retval VERR_INVALID_CPU_ID
* @retval VERR_DBGF_INVALID_REGISTER
* @retval VINF_DBGF_TRUNCATED_REGISTER
* @retval VINF_DBGF_ZERO_EXTENDED_REGISTER
*
* @param pVM The VM handle.
* @param idCpu The target CPU ID.
* @param enmReg The register that's being queried.
* @param pu64 Where to store the register value.
*/
{
int rc = VMR3ReqCallWait(pVM, idCpu, (PFNRT)dbgfR3RegQueryWorker, 5, pVM, idCpu, enmReg, &u64Value, &fRegSizes);
if (RT_SUCCESS(rc))
{
rc = VINF_SUCCESS;
else
}
else
*pu64 = 0;
return rc;
}