spinlock-r0drv-freebsd.c revision f0ed7ab5e7f8d2f73b5aa08e46eb3a04cbb31cb2
af062818b47340eef15700d2f0211576ba3506eevboxsync/* $Id$ */
af062818b47340eef15700d2f0211576ba3506eevboxsync/** @file
af062818b47340eef15700d2f0211576ba3506eevboxsync * IPRT - Spinlocks, Ring-0 Driver, FreeBSD.
af062818b47340eef15700d2f0211576ba3506eevboxsync */
af062818b47340eef15700d2f0211576ba3506eevboxsync
af062818b47340eef15700d2f0211576ba3506eevboxsync/*
af062818b47340eef15700d2f0211576ba3506eevboxsync * Copyright (c) 2007 knut st. osmundsen <bird-src-spam@anduin.net>
af062818b47340eef15700d2f0211576ba3506eevboxsync *
af062818b47340eef15700d2f0211576ba3506eevboxsync * Permission is hereby granted, free of charge, to any person
af062818b47340eef15700d2f0211576ba3506eevboxsync * obtaining a copy of this software and associated documentation
af062818b47340eef15700d2f0211576ba3506eevboxsync * files (the "Software"), to deal in the Software without
af062818b47340eef15700d2f0211576ba3506eevboxsync * restriction, including without limitation the rights to use,
af062818b47340eef15700d2f0211576ba3506eevboxsync * copy, modify, merge, publish, distribute, sublicense, and/or sell
af062818b47340eef15700d2f0211576ba3506eevboxsync * copies of the Software, and to permit persons to whom the
af062818b47340eef15700d2f0211576ba3506eevboxsync * Software is furnished to do so, subject to the following
af062818b47340eef15700d2f0211576ba3506eevboxsync * conditions:
af062818b47340eef15700d2f0211576ba3506eevboxsync *
af062818b47340eef15700d2f0211576ba3506eevboxsync * The above copyright notice and this permission notice shall be
589fd26cedb2b4ebbed14f2964cad03cc8ebbca2vboxsync * included in all copies or substantial portions of the Software.
4b9d6701570cb98fd36e209314239d104ec584d3vboxsync *
4b9d6701570cb98fd36e209314239d104ec584d3vboxsync * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
589fd26cedb2b4ebbed14f2964cad03cc8ebbca2vboxsync * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
589fd26cedb2b4ebbed14f2964cad03cc8ebbca2vboxsync * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
589fd26cedb2b4ebbed14f2964cad03cc8ebbca2vboxsync * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
589fd26cedb2b4ebbed14f2964cad03cc8ebbca2vboxsync * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
589fd26cedb2b4ebbed14f2964cad03cc8ebbca2vboxsync * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
589fd26cedb2b4ebbed14f2964cad03cc8ebbca2vboxsync * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
af062818b47340eef15700d2f0211576ba3506eevboxsync * OTHER DEALINGS IN THE SOFTWARE.
af062818b47340eef15700d2f0211576ba3506eevboxsync */
af062818b47340eef15700d2f0211576ba3506eevboxsync
af062818b47340eef15700d2f0211576ba3506eevboxsync/*******************************************************************************
af062818b47340eef15700d2f0211576ba3506eevboxsync* Header Files *
af062818b47340eef15700d2f0211576ba3506eevboxsync*******************************************************************************/
af062818b47340eef15700d2f0211576ba3506eevboxsync#include "the-freebsd-kernel.h"
af062818b47340eef15700d2f0211576ba3506eevboxsync#include "internal/iprt.h"
af062818b47340eef15700d2f0211576ba3506eevboxsync
af062818b47340eef15700d2f0211576ba3506eevboxsync#include <iprt/spinlock.h>
af062818b47340eef15700d2f0211576ba3506eevboxsync#include <iprt/err.h>
af062818b47340eef15700d2f0211576ba3506eevboxsync#include <iprt/alloc.h>
af062818b47340eef15700d2f0211576ba3506eevboxsync#include <iprt/assert.h>
af062818b47340eef15700d2f0211576ba3506eevboxsync#include <iprt/asm.h>
af062818b47340eef15700d2f0211576ba3506eevboxsync#include <iprt/asm-amd64-x86.h>
af062818b47340eef15700d2f0211576ba3506eevboxsync#include <iprt/thread.h>
af062818b47340eef15700d2f0211576ba3506eevboxsync#include <iprt/mp.h>
af062818b47340eef15700d2f0211576ba3506eevboxsync
af062818b47340eef15700d2f0211576ba3506eevboxsync#include "internal/magics.h"
af062818b47340eef15700d2f0211576ba3506eevboxsync
af062818b47340eef15700d2f0211576ba3506eevboxsync
af062818b47340eef15700d2f0211576ba3506eevboxsync/*******************************************************************************
af062818b47340eef15700d2f0211576ba3506eevboxsync* Structures and Typedefs *
af062818b47340eef15700d2f0211576ba3506eevboxsync*******************************************************************************/
af062818b47340eef15700d2f0211576ba3506eevboxsync/**
af062818b47340eef15700d2f0211576ba3506eevboxsync * Wrapper for the struct mtx type.
af062818b47340eef15700d2f0211576ba3506eevboxsync */
af062818b47340eef15700d2f0211576ba3506eevboxsynctypedef struct RTSPINLOCKINTERNAL
af062818b47340eef15700d2f0211576ba3506eevboxsync{
af062818b47340eef15700d2f0211576ba3506eevboxsync /** Spinlock magic value (RTSPINLOCK_MAGIC). */
af062818b47340eef15700d2f0211576ba3506eevboxsync uint32_t volatile u32Magic;
af062818b47340eef15700d2f0211576ba3506eevboxsync /** The spinlock. */
af062818b47340eef15700d2f0211576ba3506eevboxsync uint32_t volatile fLocked;
af062818b47340eef15700d2f0211576ba3506eevboxsync /** Saved interrupt flag. */
af062818b47340eef15700d2f0211576ba3506eevboxsync uint32_t volatile fIntSaved;
af062818b47340eef15700d2f0211576ba3506eevboxsync /** The spinlock creation flags. */
af062818b47340eef15700d2f0211576ba3506eevboxsync uint32_t fFlags;
af062818b47340eef15700d2f0211576ba3506eevboxsync#ifdef RT_MORE_STRICT
af062818b47340eef15700d2f0211576ba3506eevboxsync /** The idAssertCpu variable before acquring the lock for asserting after
af062818b47340eef15700d2f0211576ba3506eevboxsync * releasing the spinlock. */
af062818b47340eef15700d2f0211576ba3506eevboxsync RTCPUID volatile idAssertCpu;
af062818b47340eef15700d2f0211576ba3506eevboxsync /** The CPU that owns the lock. */
af062818b47340eef15700d2f0211576ba3506eevboxsync RTCPUID volatile idCpuOwner;
af062818b47340eef15700d2f0211576ba3506eevboxsync#endif
af062818b47340eef15700d2f0211576ba3506eevboxsync} RTSPINLOCKINTERNAL, *PRTSPINLOCKINTERNAL;
af062818b47340eef15700d2f0211576ba3506eevboxsync
af062818b47340eef15700d2f0211576ba3506eevboxsync
af062818b47340eef15700d2f0211576ba3506eevboxsyncRTDECL(int) RTSpinlockCreate(PRTSPINLOCK pSpinlock, uint32_t fFlags, const char *pszName)
af062818b47340eef15700d2f0211576ba3506eevboxsync{
af062818b47340eef15700d2f0211576ba3506eevboxsync RT_ASSERT_PREEMPTIBLE();
af062818b47340eef15700d2f0211576ba3506eevboxsync AssertReturn(fFlags == RTSPINLOCK_FLAGS_INTERRUPT_SAFE || fFlags == RTSPINLOCK_FLAGS_INTERRUPT_UNSAFE, VERR_INVALID_PARAMETER);
af062818b47340eef15700d2f0211576ba3506eevboxsync
af062818b47340eef15700d2f0211576ba3506eevboxsync /*
af062818b47340eef15700d2f0211576ba3506eevboxsync * Allocate.
af062818b47340eef15700d2f0211576ba3506eevboxsync */
af062818b47340eef15700d2f0211576ba3506eevboxsync AssertCompile(sizeof(RTSPINLOCKINTERNAL) > sizeof(void *));
PRTSPINLOCKINTERNAL pThis = (PRTSPINLOCKINTERNAL)RTMemAllocZ(sizeof(*pThis));
if (!pThis)
return VERR_NO_MEMORY;
/*
* Initialize & return.
*/
pThis->u32Magic = RTSPINLOCK_MAGIC;
pThis->fLocked = 0;
pThis->fFlags = fFlags;
pThis->fIntSaved = 0;
*pSpinlock = pThis;
return VINF_SUCCESS;
}
RTDECL(int) RTSpinlockDestroy(RTSPINLOCK Spinlock)
{
/*
* Validate input.
*/
RT_ASSERT_INTS_ON();
PRTSPINLOCKINTERNAL pThis = (PRTSPINLOCKINTERNAL)Spinlock;
if (!pThis)
return VERR_INVALID_PARAMETER;
AssertMsgReturn(pThis->u32Magic == RTSPINLOCK_MAGIC,
("Invalid spinlock %p magic=%#x\n", pThis, pThis->u32Magic),
VERR_INVALID_PARAMETER);
/*
* Make the lock invalid and release the memory.
*/
ASMAtomicIncU32(&pThis->u32Magic);
RTMemFree(pThis);
return VINF_SUCCESS;
}
RTDECL(void) RTSpinlockAcquire(RTSPINLOCK Spinlock)
{
PRTSPINLOCKINTERNAL pThis = (PRTSPINLOCKINTERNAL)Spinlock;
RT_ASSERT_PREEMPT_CPUID_VAR();
AssertPtr(pThis);
Assert(pThis->u32Magic == RTSPINLOCK_MAGIC);
if (pThis->fFlags & RTSPINLOCK_FLAGS_INTERRUPT_SAFE)
{
for (;;)
{
uint32_t fIntSaved = ASMIntDisableFlags();
critical_enter();
int c = 50;
for (;;)
{
if (ASMAtomicCmpXchgU32(&pThis->fLocked, 1, 0))
{
RT_ASSERT_PREEMPT_CPUID_SPIN_ACQUIRED(pThis);
pThis->fIntSaved = fIntSaved;
return;
}
if (--c <= 0)
break;
cpu_spinwait();
}
/* Enable interrupts while we sleep. */
critical_exit();
ASMSetFlags(fIntSaved);
DELAY(1);
}
}
else
{
for (;;)
{
critical_enter();
int c = 50;
for (;;)
{
if (ASMAtomicCmpXchgU32(&pThis->fLocked, 1, 0))
{
RT_ASSERT_PREEMPT_CPUID_SPIN_ACQUIRED(pThis);
return;
}
if (--c <= 0)
break;
cpu_spinwait();
}
critical_exit();
DELAY(1);
}
}
}
RTDECL(void) RTSpinlockRelease(RTSPINLOCK Spinlock)
{
PRTSPINLOCKINTERNAL pThis = (PRTSPINLOCKINTERNAL)Spinlock;
RT_ASSERT_PREEMPT_CPUID_SPIN_RELEASE_VARS();
AssertPtr(pThis);
Assert(pThis->u32Magic == RTSPINLOCK_MAGIC);
RT_ASSERT_PREEMPT_CPUID_SPIN_RELEASE(pThis);
if (pThis->fFlags & RTSPINLOCK_FLAGS_INTERRUPT_SAFE)
{
uint32_t fIntSaved = pThis->fIntSaved;
pThis->fIntSaved = 0;
if (ASMAtomicCmpXchgU32(&pThis->fLocked, 0, 1))
ASMSetFlags(pThis->fIntSaved);
else
AssertMsgFailed(("Spinlock %p was not locked!\n", pThis));
}
else
{
if (!ASMAtomicCmpXchgU32(&pThis->fLocked, 0, 1))
AssertMsgFailed(("Spinlock %p was not locked!\n", pThis));
}
critical_exit();
}
RTDECL(void) RTSpinlockReleaseNoInts(RTSPINLOCK Spinlock)
{
#if 1
if (RT_UNLIKELY(!(Spinlock->fFlags & RTSPINLOCK_FLAGS_INTERRUPT_SAFE)))
RTAssertMsg2("RTSpinlockReleaseNoInts: %p (magic=%#x)\n", Spinlock, Spinlock->u32Magic);
#else
AssertRelease(Spinlock->fFlags & RTSPINLOCK_FLAGS_INTERRUPT_SAFE);
#endif
RTSpinlockRelease(Spinlock);
}