tstGIP-2.cpp revision a9064b2c635be12f06d446ec409725235f55899d
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc/* $Id$ */
0dc2366f7b9f9f36e10909b1e95edbf2a261c2acVenugopal Iyer/** @file
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc * SUP Testcase - Global Info Page interface (ring 3).
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc */
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc/*
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc * Copyright (C) 2006-2014 Oracle Corporation
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc *
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc * This file is part of VirtualBox Open Source Edition (OSE), as
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc * available from http://www.virtualbox.org. This file is free software;
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc * you can redistribute it and/or modify it under the terms of the GNU
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc * General Public License (GPL) as published by the Free Software
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc * Foundation, in version 2 as it comes in the "COPYING" file of the
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc *
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc * The contents of this file may alternatively be used under the terms
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc * of the Common Development and Distribution License Version 1.0
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc * VirtualBox OSE distribution, in which case the provisions of the
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc * CDDL are applicable instead of those of the GPL.
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc *
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc * You may elect to license modified versions of this file under the
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc * terms and conditions of either the GPL or the CDDL or both.
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc */
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc/*******************************************************************************
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc* Header Files *
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc*******************************************************************************/
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc#include <VBox/sup.h>
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc#include <VBox/err.h>
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc#include <VBox/param.h>
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc#include <iprt/asm.h>
bcb5c89da22515e2ccf139578bad3caebcd716adSowmini Varadhan#include <iprt/assert.h>
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc#include <iprt/alloc.h>
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc#include <iprt/thread.h>
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc#include <iprt/stream.h>
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc#include <iprt/string.h>
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc#include <iprt/initterm.h>
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc#include <iprt/getopt.h>
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc#include <iprt/x86.h>
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng/**
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc * Checks whether the CPU advertises an invariant TSC or not.
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc *
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc * @returns true if invariant, false otherwise.
bcb5c89da22515e2ccf139578bad3caebcd716adSowmini Varadhan */
bcb5c89da22515e2ccf139578bad3caebcd716adSowmini Varadhanbool tstIsInvariantTsc(void)
bcb5c89da22515e2ccf139578bad3caebcd716adSowmini Varadhan{
bcb5c89da22515e2ccf139578bad3caebcd716adSowmini Varadhan if (ASMHasCpuId())
bcb5c89da22515e2ccf139578bad3caebcd716adSowmini Varadhan {
bcb5c89da22515e2ccf139578bad3caebcd716adSowmini Varadhan uint32_t uEax, uEbx, uEcx, uEdx;
bcb5c89da22515e2ccf139578bad3caebcd716adSowmini Varadhan ASMCpuId(0x80000000, &uEax, &uEbx, &uEcx, &uEdx);
bcb5c89da22515e2ccf139578bad3caebcd716adSowmini Varadhan if (uEax >= 0x80000007)
bcb5c89da22515e2ccf139578bad3caebcd716adSowmini Varadhan {
bcb5c89da22515e2ccf139578bad3caebcd716adSowmini Varadhan ASMCpuId(0x80000007, &uEax, &uEbx, &uEcx, &uEdx);
bcb5c89da22515e2ccf139578bad3caebcd716adSowmini Varadhan if (uEdx & X86_CPUID_AMD_ADVPOWER_EDX_TSCINVAR)
bcb5c89da22515e2ccf139578bad3caebcd716adSowmini Varadhan return true;
bcb5c89da22515e2ccf139578bad3caebcd716adSowmini Varadhan }
bcb5c89da22515e2ccf139578bad3caebcd716adSowmini Varadhan }
bcb5c89da22515e2ccf139578bad3caebcd716adSowmini Varadhan return false;
bcb5c89da22515e2ccf139578bad3caebcd716adSowmini Varadhan}
bcb5c89da22515e2ccf139578bad3caebcd716adSowmini Varadhan
bcb5c89da22515e2ccf139578bad3caebcd716adSowmini Varadhan
bcb5c89da22515e2ccf139578bad3caebcd716adSowmini Varadhanint main(int argc, char **argv)
bcb5c89da22515e2ccf139578bad3caebcd716adSowmini Varadhan{
bcb5c89da22515e2ccf139578bad3caebcd716adSowmini Varadhan RTR3InitExe(argc, &argv, 0);
bcb5c89da22515e2ccf139578bad3caebcd716adSowmini Varadhan
bcb5c89da22515e2ccf139578bad3caebcd716adSowmini Varadhan /*
bcb5c89da22515e2ccf139578bad3caebcd716adSowmini Varadhan * Parse args
bcb5c89da22515e2ccf139578bad3caebcd716adSowmini Varadhan */
bcb5c89da22515e2ccf139578bad3caebcd716adSowmini Varadhan static const RTGETOPTDEF g_aOptions[] =
bcb5c89da22515e2ccf139578bad3caebcd716adSowmini Varadhan {
127ac1c2b792d87fda08d45d8b25e5ffe9293b3efei feng - Sun Microsystems - Beijing China { "--iterations", 'i', RTGETOPT_REQ_INT32 },
127ac1c2b792d87fda08d45d8b25e5ffe9293b3efei feng - Sun Microsystems - Beijing China { "--hex", 'h', RTGETOPT_REQ_NOTHING },
bcb5c89da22515e2ccf139578bad3caebcd716adSowmini Varadhan { "--decimal", 'd', RTGETOPT_REQ_NOTHING },
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc { "--spin", 's', RTGETOPT_REQ_NOTHING },
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc { "--reference", 'r', RTGETOPT_REQ_UINT64 }, /* reference value of CpuHz, display the
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc * CpuHz deviation in a separate column. */
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc };
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc uint32_t cIterations = 40;
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc bool fHex = true;
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc bool fSpin = false;
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc int ch;
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc uint64_t uCpuHzRef = 0;
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc uint64_t uCpuHzOverallDeviation = 0;
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc int64_t iCpuHzMaxDeviation = 0;
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc int32_t cCpuHzOverallDevCnt = 0;
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc RTGETOPTUNION ValueUnion;
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc RTGETOPTSTATE GetState;
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc RTGetOptInit(&GetState, argc, argv, g_aOptions, RT_ELEMENTS(g_aOptions), 1, RTGETOPTINIT_FLAGS_NO_STD_OPTS);
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc while ((ch = RTGetOpt(&GetState, &ValueUnion)))
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc {
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc switch (ch)
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc {
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc case 'i':
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc cIterations = ValueUnion.u32;
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc break;
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc case 'd':
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc fHex = false;
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc break;
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc case 'h':
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc fHex = true;
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc break;
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc case 's':
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc fSpin = true;
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc break;
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc case 'r':
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc uCpuHzRef = ValueUnion.u64;
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc break;
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc default:
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc return RTGetOptPrintError(ch, &ValueUnion);
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc }
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc }
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc /*
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc * Init
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc */
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc PSUPDRVSESSION pSession = NIL_RTR0PTR;
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc int rc = SUPR3Init(&pSession);
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc if (RT_SUCCESS(rc))
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc {
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc if (g_pSUPGlobalInfoPage)
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc {
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc RTPrintf("tstGIP-2: cCpus=%d u32UpdateHz=%RU32 u32UpdateIntervalNS=%RU32 u64NanoTSLastUpdateHz=%RX64 u64CpuHz=%RU64 uCpuHzRef=%RU64 u32Mode=%d (%s) u32Version=%#x\n",
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc g_pSUPGlobalInfoPage->cCpus,
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc g_pSUPGlobalInfoPage->u32UpdateHz,
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc g_pSUPGlobalInfoPage->u32UpdateIntervalNS,
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc g_pSUPGlobalInfoPage->u64NanoTSLastUpdateHz,
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc g_pSUPGlobalInfoPage->u64CpuHz,
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc uCpuHzRef,
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc g_pSUPGlobalInfoPage->u32Mode,
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc SUPGetGIPModeName(g_pSUPGlobalInfoPage),
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc g_pSUPGlobalInfoPage->u32Version);
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc RTPrintf(fHex
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc ? "tstGIP-2: it: u64NanoTS delta u64TSC UpIntTSC H TransId CpuHz %sTSC Interval History...\n"
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc : "tstGIP-2: it: u64NanoTS delta u64TSC UpIntTSC H TransId CpuHz %sTSC Interval History...\n",
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc uCpuHzRef ? " CpuHz deviation " : "");
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc static SUPGIPCPU s_aaCPUs[2][256];
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc for (uint32_t i = 0; i < cIterations; i++)
bcb5c89da22515e2ccf139578bad3caebcd716adSowmini Varadhan {
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc /* copy the data */
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc memcpy(&s_aaCPUs[i & 1][0], &g_pSUPGlobalInfoPage->aCPUs[0], g_pSUPGlobalInfoPage->cCpus * sizeof(g_pSUPGlobalInfoPage->aCPUs[0]));
bcb5c89da22515e2ccf139578bad3caebcd716adSowmini Varadhan
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc /* display it & find something to spin on. */
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc uint32_t u32TransactionId = 0;
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc uint32_t volatile *pu32TransactionId = NULL;
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc for (unsigned iCpu = 0; iCpu < g_pSUPGlobalInfoPage->cCpus; iCpu++)
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc if ( g_pSUPGlobalInfoPage->aCPUs[iCpu].u64CpuHz > 0
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc && g_pSUPGlobalInfoPage->aCPUs[iCpu].u64CpuHz != _4G + 1)
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc {
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc char szCpuHzDeviation[32];
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc PSUPGIPCPU pPrevCpu = &s_aaCPUs[!(i & 1)][iCpu];
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc PSUPGIPCPU pCpu = &s_aaCPUs[i & 1][iCpu];
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc if (uCpuHzRef)
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc {
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc int64_t iCpuHzDeviation = pCpu->u64CpuHz - uCpuHzRef;
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc uint64_t uCpuHzDeviation = RT_ABS(iCpuHzDeviation);
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc if (uCpuHzDeviation > 999999999)
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc RTStrPrintf(szCpuHzDeviation, sizeof(szCpuHzDeviation), "%17s ", "?");
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc else
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc {
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc /* Wait until the history validation code takes effect. */
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc if (pCpu->u32TransactionId > 23 + (8 * 2) + 1)
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc {
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc if (RT_ABS(iCpuHzDeviation) > RT_ABS(iCpuHzMaxDeviation))
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc iCpuHzMaxDeviation = iCpuHzDeviation;
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc uCpuHzOverallDeviation += uCpuHzDeviation;
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc cCpuHzOverallDevCnt++;
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc }
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc uint32_t uPct = (uint32_t)(uCpuHzDeviation * 100000 / uCpuHzRef + 5);
bcb5c89da22515e2ccf139578bad3caebcd716adSowmini Varadhan RTStrPrintf(szCpuHzDeviation, sizeof(szCpuHzDeviation), "%10RI64%3d.%02d%% ",
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc iCpuHzDeviation, uPct / 1000, (uPct % 1000) / 10);
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc }
bcb5c89da22515e2ccf139578bad3caebcd716adSowmini Varadhan }
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc else
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc szCpuHzDeviation[0] = '\0';
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc RTPrintf(fHex
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc ? "tstGIP-2: %4d/%d: %016llx %09llx %016llx %08x %d %08x %15llu %s%08x %08x %08x %08x %08x %08x %08x %08x (%d)\n"
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc : "tstGIP-2: %4d/%d: %016llu %09llu %016llu %010u %d %010u %15llu %s%08x %08x %08x %08x %08x %08x %08x %08x (%d)\n",
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc i, iCpu,
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc pCpu->u64NanoTS,
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc i ? pCpu->u64NanoTS - pPrevCpu->u64NanoTS : 0,
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc pCpu->u64TSC,
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc pCpu->u32UpdateIntervalTSC,
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc pCpu->iTSCHistoryHead,
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc pCpu->u32TransactionId,
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc pCpu->u64CpuHz,
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc szCpuHzDeviation,
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc pCpu->au32TSCHistory[0],
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc pCpu->au32TSCHistory[1],
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc pCpu->au32TSCHistory[2],
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc pCpu->au32TSCHistory[3],
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc pCpu->au32TSCHistory[4],
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc pCpu->au32TSCHistory[5],
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc pCpu->au32TSCHistory[6],
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc pCpu->au32TSCHistory[7],
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc pCpu->cErrors);
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc if (!pu32TransactionId)
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc {
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc pu32TransactionId = &g_pSUPGlobalInfoPage->aCPUs[iCpu].u32TransactionId;
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc u32TransactionId = pCpu->u32TransactionId;
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc }
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc }
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc /* wait a bit / spin */
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc if (!fSpin)
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc RTThreadSleep(9);
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc else
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc {
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc if (pu32TransactionId)
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc {
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc uint32_t uTmp;
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc while ( u32TransactionId == (uTmp = *pu32TransactionId)
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc || (uTmp & 1))
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc ASMNopPause();
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc }
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc else
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc RTThreadSleep(1);
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc }
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc }
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc /*
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc * Display TSC deltas.
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc *
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc * First iterative over the APIC ID array to get mostly consistent CPUID to APIC ID mapping.
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc * Then iterate over the offline CPUs. It is possible that there's a race between the online/offline
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc * states between the two iterations, but that cannot be helped from ring-3 anyway and not a biggie.
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc */
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc RTPrintf("tstGIP-2: TSC deltas:\n");
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc RTPrintf("tstGIP-2: idApic: i64TSCDelta\n");
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc for (unsigned i = 0; i < RT_ELEMENTS(g_pSUPGlobalInfoPage->aiCpuFromApicId); i++)
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc {
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc uint16_t iCpu = g_pSUPGlobalInfoPage->aiCpuFromApicId[i];
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc if (iCpu != UINT16_MAX)
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc {
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc RTPrintf("tstGIP-2: %7d: %lld\n", g_pSUPGlobalInfoPage->aCPUs[iCpu].idApic,
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc g_pSUPGlobalInfoPage->aCPUs[iCpu].i64TSCDelta);
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc }
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc }
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc for (unsigned iCpu = 0; iCpu < g_pSUPGlobalInfoPage->cCpus; iCpu++)
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc if (g_pSUPGlobalInfoPage->aCPUs[iCpu].idApic == UINT16_MAX)
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc RTPrintf("tstGIP-2: offline: %lld\n", g_pSUPGlobalInfoPage->aCPUs[iCpu].i64TSCDelta);
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc RTPrintf("fTscDeltasRoughlyInSync: %RTbool\n", g_pSUPGlobalInfoPage->fTscDeltasRoughlyInSync);
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc RTPrintf("CPUID.Invariant-TSC : %RTbool\n", tstIsInvariantTsc());
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc if ( uCpuHzRef
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc && cCpuHzOverallDevCnt)
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc {
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc uint32_t uPct = (uint32_t)(uCpuHzOverallDeviation * 100000 / cCpuHzOverallDevCnt / uCpuHzRef + 5);
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc uint32_t uMaxPct = (uint32_t)(RT_ABS(iCpuHzMaxDeviation) * 100000 / uCpuHzRef + 5);
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc RTPrintf("Average CpuHz deviation: %d.%02d%%\n", uPct / 1000, (uPct % 1000) / 10);
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc RTPrintf("Maximum CpuHz deviation: %d.%02d%% (%RI64 ticks)\n", uMaxPct / 1000, (uMaxPct % 1000) / 10, iCpuHzMaxDeviation);
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc }
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc }
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc else
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc {
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc RTPrintf("tstGIP-2: g_pSUPGlobalInfoPage is NULL\n");
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc rc = -1;
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc }
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc SUPR3Term(false /*fForced*/);
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc }
bcb5c89da22515e2ccf139578bad3caebcd716adSowmini Varadhan else
bcb5c89da22515e2ccf139578bad3caebcd716adSowmini Varadhan RTPrintf("tstGIP-2: SUPR3Init failed: %Rrc\n", rc);
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc return !!rc;
0ba2cbe97e0678a691742f98d2532caed0a2c4aaxc}
bcb5c89da22515e2ccf139578bad3caebcd716adSowmini Varadhan
bcb5c89da22515e2ccf139578bad3caebcd716adSowmini Varadhan