14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * CDDL HEADER START
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * The contents of this file are subject to the terms of the
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * Common Development and Distribution License (the "License").
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * You may not use this file except in compliance with the License.
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * See the License for the specific language governing permissions
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * and limitations under the License.
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * When distributing Covered Code, include this CDDL HEADER in each
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * If applicable, add the following below this CDDL HEADER, with the
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * fields enclosed by brackets "[]" replaced with your own identifying
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * information: Portions Copyright [yyyy] [name of copyright owner]
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * CDDL HEADER END
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * Copyright 2010 Sun Microsystems, Inc. All rights reserved.
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * Use is subject to license terms.
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * DTrace CPU Performance Counter Provider
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * ---------------------------------------
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * The DTrace cpc provider allows DTrace consumers to access the CPU
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * performance counter overflow mechanism of a CPU. The configuration
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * presented in a probe specification is programmed into the performance
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * counter hardware of all available CPUs on a system. Programming the
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * hardware causes a counter on each CPU to begin counting events of the
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * given type. When the specified number of events have occurred, an overflow
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * interrupt will be generated and the probe is fired.
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * The required configuration for the performance counter is encoded into
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * the probe specification and this includes the performance counter event
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * name, processor mode, overflow rate and an optional unit mask.
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * Most processors provide several counters (PICs) which can count all or a
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * subset of the events available for a given CPU. However, when overflow
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * profiling is being used, not all CPUs can detect which counter generated the
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * overflow interrupt. In this case we cannot reliably determine which counter
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * overflowed and we therefore only allow such CPUs to configure one event at
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * a time. Processors that can determine the counter which overflowed are
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * allowed to program as many events at one time as possible (in theory up to
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * the number of instrumentation counters supported by that platform).
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * Therefore, multiple consumers can enable multiple probes at the same time
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * on such platforms. Platforms which cannot determine the source of an
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * overflow interrupt are only allowed to program a single event at one time.
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * The performance counter hardware is made available to consumers on a
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * first-come, first-served basis. Only a finite amount of hardware resource
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * is available and, while we make every attempt to accomodate requests from
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * consumers, we must deny requests when hardware resources have been exhausted.
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * A consumer will fail to enable probes when resources are currently in use.
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * The cpc provider contends for shared hardware resources along with other
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * consumers of the kernel CPU performance counter subsystem (e.g. cpustat(1M)).
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * Only one such consumer can use the performance counters at any one time and
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * counters are made available on a first-come, first-served basis. As with
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * cpustat, the cpc provider has priority over per-LWP libcpc usage (e.g.
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * cputrack(1)). Invoking the cpc provider will cause all existing per-LWP
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * counter contexts to be invalidated.
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync int64_t dcpc_umask; /* umask/emask for this event */
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync int dcpc_picno; /* pic this event is programmed in */
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync int dcpc_disabling; /* probe is currently being disabled */
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync dtrace_id_t dcpc_id; /* probeid this request is enabling */
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync int dcpc_actv_req_idx; /* idx into dcpc_actv_reqs[] */
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * When the dcpc provider is loaded, dcpc_min_overflow is set to either
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * DCPC_MIN_OVF_DEFAULT or the value that dcpc-min-overflow is set to in
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * the dcpc.conf file. Decrease this value to set probes with smaller
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * overflow values. Remember that very small values could render a system
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * unusable with frequently occurring events.
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsyncstatic int dcpc_aframes = 0; /* override for artificial frame setting */
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * Called from the platform overflow interrupt handler. 'bitmap' is a mask
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * which contains the pic(s) that have overflowed.
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * No counter was marked as overflowing. Shout about it and get out.
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync cmn_err(CE_NOTE, "dcpc_fire: no counter overflow found\n");
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * This is the common case of a processor that doesn't support
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * multiple overflow events. Such systems are only allowed a single
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * enabling and therefore we just look for the first entry in
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * the active request array.
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync for (i = 0; i < cpc_ncounters; i++) {
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * This is a processor capable of handling multiple overflow events.
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * Iterate over the array of active requests and locate the counters
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * that overflowed (note: it is possible for more than one counter to
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * have overflowed at the same time).
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync for (i = 0; i < cpc_ncounters; i++) {
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync (bitmap & (1ULL << dcpc_actv_reqs[i]->dcpc_picno))) {
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsyncdcpc_create_probe(dtrace_provider_id_t id, const char *probename,
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync char *eventname, int64_t umask, uint32_t ovfval, char flag)
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync int nr_frames = DCPC_ARTIFICIAL_FRAMES + dtrace_mach_aframes();
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync if (dtrace_probe_lookup(id, NULL, NULL, probename) != 0)
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync pp->dcpc_event_name[sizeof (pp->dcpc_event_name) - 1] = '\0';
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync pp->dcpc_actv_req_idx = pp->dcpc_picno = pp->dcpc_disabling = -1;
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync pp->dcpc_id = dtrace_probe_create(id, NULL, NULL, probename,
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync/*ARGSUSED*/
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsyncdcpc_provide(void *arg, const dtrace_probedesc_t *desc)
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * The format of a probe is:
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * event_name-mode-{optional_umask}-overflow_rate
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * DC_refill_from_system-user-0x1e-50000, or,
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * DC_refill_from_system-all-10000
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * The 'cpc' provider offers no probes by default.
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * We have a poor man's strtok() going on here. Replace any hyphens
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * in the the probe name with NULL characters in order to make it
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * easy to parse the string with regular string functions.
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync for (i = 0; i < len; i++) {
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * The first part of the string must be either a platform event
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * name or a generic event name.
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * The next part of the name is the mode specification. Valid
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * settings are "user", "kernel" or "all".
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * Next we either have a mask specification followed by an overflow
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * rate or just an overflow rate on its own.
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * A unit mask can only be specified if:
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * 1) this performance counter back end supports masks.
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * 2) the specified event is platform specific.
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * 3) a valid hex number is converted.
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * 4) no extraneous characters follow the mask specification.
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync if (dcpc_mask_type != 0 && strncmp(event, "PAPI", 4) != 0 &&
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * This final part must be an overflow value which has to be greater
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * than the minimum permissible overflow rate.
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync if ((ddi_strtol(p, &end, 10, &val) != 0) || end != p + strlen(p) ||
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * Validate the event and create the probe.
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync for (i = 0; i < cpc_ncounters; i++) {
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync for (j = 0; j < llen; j++) {
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync/*ARGSUSED*/
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync/*ARGSUSED*/
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsyncdcpc_usermode(void *arg, dtrace_id_t id, void *parg)
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsyncdcpc_populate_set(cpu_t *c, dcpc_probe_t *pp, kcpc_set_t *set, int reqno)
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync (void) strncpy(set->ks_req[reqno].kr_event, pp->dcpc_event_name,
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * If a unit mask has been specified then detect which attribute
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * the platform needs. For now, it's either "umask" or "emask".
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync (void) strncpy(set->ks_req[reqno].kr_attr->ka_name,
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync (void) strncpy(set->ks_req[reqno].kr_attr->ka_name,
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync set->ks_req[reqno].kr_attr->ka_val = pp->dcpc_umask;
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * If this probe is enabled, obtain its current countdown value
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * and use that. The CPUs cpc context might not exist yet if we
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * are dealing with a CPU that is just coming online.
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync if (pp->dcpc_enabled && (c->cpu_cpc_ctx != NULL)) {
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync set->ks_req[reqno].kr_preset = UINT64_MAX - pp->dcpc_ovfval;
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * Create a fresh request set for the enablings represented in the
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * 'dcpc_actv_reqs' array which contains the probes we want to be
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * in the set. This can be called for several reasons:
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * 1) We are on a single or multi overflow platform and we have no
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * current events so we can just create the set and initialize it.
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * 2) We are on a multi-overflow platform and we already have one or
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * more existing events and we are adding a new enabling. Create a
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * new set and copy old requests in and then add the new request.
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * 3) We are on a multi-overflow platform and we have just removed an
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * enabling but we still have enablings whch are valid. Create a new
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * set and copy in still valid requests.
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * First get a count of the number of currently active requests.
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * Note that dcpc_actv_reqs[] should always reflect which requests
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * we want to be in the set that is to be created. It is the
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * responsibility of the caller of dcpc_create_set() to adjust that
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * array accordingly beforehand.
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync for (i = 0; i < cpc_ncounters; i++) {
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync kmem_zalloc(sizeof (kcpc_request_t) * active_requests, KM_SLEEP);
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync kmem_zalloc(active_requests * sizeof (uint64_t), KM_SLEEP);
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * Look for valid entries in the active requests array and populate
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * the request set for any entries found.
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync for (i = 0; i < cpc_ncounters; i++) {
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync dcpc_populate_set(c, dcpc_actv_reqs[i], set, reqno);
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync for (j = 0; j < cpc_ncounters; j++) {
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * If we already have an active enabling then save the current cpc
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * context away.
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync kmem_free(oset->ks_data, oset->ks_nreqs * sizeof (uint64_t));
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync return (0);
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * We failed to configure this request up so free things up and
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync kmem_free(set->ks_data, set->ks_nreqs * sizeof (uint64_t));
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync return (-1);
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * Leave this CPU alone if it's already offline.
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * Grab CPUs CPC context before kcpc_cpu_stop() stops counters and
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * changes it.
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync kmem_free(set->ks_data, set->ks_nreqs * sizeof (uint64_t));
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * The dcpc_*_interrupts() routines are responsible for manipulating the
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * per-CPU dcpc interrupt state byte. The purpose of the state byte is to
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * synchronize processing of hardware overflow interrupts wth configuration
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * changes made to the CPU performance counter subsystem by the dcpc provider.
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * The dcpc provider claims ownership of the overflow interrupt mechanism
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * by transitioning the state byte from DCPC_INTR_INACTIVE (indicating the
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * dcpc provider is not in use) to DCPC_INTR_FREE (the dcpc provider owns the
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * overflow mechanism and interrupts may be processed). Before modifying
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * a CPUs configuration state the state byte is transitioned from
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * DCPC_INTR_FREE to DCPC_INTR_CONFIG ("configuration in process" state).
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * The hardware overflow handler, kcpc_hw_overflow_intr(), will only process
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * an interrupt when a configuration is not in process (i.e. the state is
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * marked as free). During interrupt processing the state is set to
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * DCPC_INTR_PROCESSING by the overflow handler. When the last dcpc based
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * enabling is removed, the state byte is set to DCPC_INTR_INACTIVE to indicate
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * the dcpc provider is no longer interested in overflow interrupts.
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync ASSERT(cpu_core[c->cpu_id].cpuc_dcpc_intr_state != DCPC_INTR_INACTIVE);
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * Set all CPUs dcpc interrupt state to DCPC_INTR_FREE to indicate that
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * overflow interrupts can be processed safely.
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync ASSERT(cpu_core[c->cpu_id].cpuc_dcpc_intr_state != DCPC_INTR_INACTIVE);
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync cpu_core[c->cpu_id].cpuc_dcpc_intr_state = DCPC_INTR_FREE;
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * Transition all CPUs dcpc interrupt state from DCPC_INTR_INACTIVE to
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * to DCPC_INTR_FREE. This indicates that the dcpc provider is now
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * responsible for handling all overflow interrupt activity. Should only be
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * called before enabling the first dcpc based probe.
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync ASSERT(cpu_core[c->cpu_id].cpuc_dcpc_intr_state == DCPC_INTR_INACTIVE);
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync cpu_core[c->cpu_id].cpuc_dcpc_intr_state = DCPC_INTR_FREE;
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * Set all CPUs dcpc interrupt state to DCPC_INTR_INACTIVE to indicate that
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * the dcpc provider is no longer processing overflow interrupts. Only called
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * during removal of the last dcpc based enabling.
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync ASSERT(cpu_core[c->cpu_id].cpuc_dcpc_intr_state != DCPC_INTR_INACTIVE);
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync cpu_core[c->cpu_id].cpuc_dcpc_intr_state = DCPC_INTR_INACTIVE;
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * dcpc_program_event() can be called owing to a new enabling or if a multi
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * overflow platform has disabled a request but needs to program the requests
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * that are still valid.
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * Every invocation of dcpc_program_event() will create a new kcpc_ctx_t
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * and a new request set which contains the new enabling and any old enablings
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * which are still valid (possible with multi-overflow platforms).
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * Skip CPUs that are currently offline.
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * Stop counters but preserve existing DTrace CPC context
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * if there is one.
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * If we come here when the first event is programmed for a CPU,
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * there should be no DTrace CPC context installed. In this
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * case, kcpc_cpu_stop() will ensure that there is no other
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * context on the CPU.
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * If we add new enabling to the original one, the CPU should
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * have the old DTrace CPC context which we need to keep around
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * since dcpc_program_event() will add to it.
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * If this enabling is being removed (in the case of a multi event
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * capable system with more than one active enabling), we can now
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * update the active request array to reflect the enablings that need
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * to be reprogrammed.
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * Skip CPUs that are currently offline.
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync } while ((c = c->cpu_next) != cpu_list && ret == 0);
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * If dcpc_program_cpu_event() fails then it is because we couldn't
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * configure the requests in the set for the CPU and not because of
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * an error programming the hardware. If we have a failure here then
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * we assume no CPUs have been programmed in the above step as they
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * are all configured identically.
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync if (ret != 0) {
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync return (-1);
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync return (0);
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync/*ARGSUSED*/
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * Bail out if the counters are being used by a libcpc consumer.
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync return (-1);
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * Locate this enabling in the first free entry of the active
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * request array.
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync for (i = 0; i < cpc_ncounters; i++) {
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * If we couldn't find a slot for this probe then there is no
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * room at the inn.
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync return (-1);
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * DTrace is taking over CPC contexts, so stop collecting
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * capacity/utilization data for all CPUs.
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * The following must hold true if we are to (attempt to) enable
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * this request:
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * 1) No enablings currently exist. We allow all platforms to
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * proceed if this is true.
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * 2) If the platform is multi overflow capable and there are
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * less valid enablings than there are counters. There is no
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * guarantee that a platform can accommodate as many events as
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * it has counters for but we will at least try to program
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * up to that many requests.
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * The 'dcpc_enablings' variable is implictly protected by locking
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * provided by the DTrace framework and the cpu management framework.
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * Before attempting to program the first enabling we need to
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * invalidate any lwp-based contexts and lay claim to the
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * overflow interrupt mechanism.
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync return (0);
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * If active enablings existed before we failed to enable this probe
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * on a multi event capable platform then we need to restart counters
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * as they will have been stopped in the attempted configuration. The
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * context should now just contain the request prior to this failed
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * enabling.
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * Skip CPUs that are currently offline.
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * Give up any claim to the overflow interrupt mechanism if no
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * dcpc based enablings exist.
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * If all probes are removed, enable capacity/utilization data
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * collection for every CPU.
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync return (-1);
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * If only one enabling is active then remove the context and free
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * everything up. If there are multiple enablings active then remove this
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * one, its associated meta-data and re-program the hardware.
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync/*ARGSUSED*/
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * This probe didn't actually make it as far as being fully enabled
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * so we needn't do anything with it.
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * If we actually allocated this request a slot in the
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * request array but failed to enabled it then remove the
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * entry in the array.
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * If this is the only enabling then stop all the counters and
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * free up the meta-data.
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * This platform can support multiple overflow events and
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * the enabling being disabled is not the last one. Remove this
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * enabling and re-program the hardware with the new config.
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync pp->dcpc_actv_req_idx = pp->dcpc_picno = pp->dcpc_disabling = -1;
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * If all probes are removed, enable capacity/utilization data
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * collection for every CPU
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync/*ARGSUSED*/
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsyncdcpc_cpu_setup(cpu_setup_t what, processorid_t cpu, void *arg)
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * Offline CPUs are not allowed to take part so remove this
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * CPU if we are actively tracing.
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * Indicate that a configuration is in process in
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * order to stop overflow interrupts being processed
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * on this CPU while we disable it.
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * Reset this CPUs interrupt state as the configuration
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * has ended.
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * This CPU is being initialized or brought online so program
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * it with the current request set if we are actively tracing.
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync return (0);
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync{ DTRACE_STABILITY_EVOLVING, DTRACE_STABILITY_EVOLVING, DTRACE_CLASS_COMMON },
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync{ DTRACE_STABILITY_PRIVATE, DTRACE_STABILITY_PRIVATE, DTRACE_CLASS_UNKNOWN },
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync{ DTRACE_STABILITY_PRIVATE, DTRACE_STABILITY_PRIVATE, DTRACE_CLASS_UNKNOWN },
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync{ DTRACE_STABILITY_EVOLVING, DTRACE_STABILITY_EVOLVING, DTRACE_CLASS_CPU },
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync{ DTRACE_STABILITY_EVOLVING, DTRACE_STABILITY_EVOLVING, DTRACE_CLASS_COMMON },
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync/*ARGSUSED*/
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsyncdcpc_open(dev_t *devp, int flag, int otyp, cred_t *cred_p)
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync return (0);
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync/*ARGSUSED*/
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsyncdcpc_info(dev_info_t *dip, ddi_info_cmd_t infocmd, void *arg, void **result)
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync *result = (void *)0;
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync kmem_free(dcpc_actv_reqs, cpc_ncounters * sizeof (dcpc_probe_t *));
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync cmn_err(CE_NOTE, "!dcpc: Counter Overflow not supported"\
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync " on this processor");
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync if (ddi_create_minor_node(devi, "dcpc", S_IFCHR, 0,
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync dtrace_register("cpc", &dcpc_attr, DTRACE_PRIV_KERNEL,
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * Determine which, if any, mask attribute the back-end can use.
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * The dcpc_actv_reqs array is used to store the requests that
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * we currently have programmed. The order of requests in this
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * array is not necessarily the order that the event appears in
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * the kcpc_request_t array. Once entered into a slot in the array
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * the entry is not moved until it's removed.
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync kmem_zalloc(cpc_ncounters * sizeof (dcpc_probe_t *), KM_SLEEP);
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync dcpc_min_overflow = ddi_prop_get_int(DDI_DEV_T_ANY, devi,
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync DDI_PROP_DONTPASS, "dcpc-min-overflow", DCPC_MIN_OVF_DEFAULT);
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync 0, /* streamtab */
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync 0, /* refcnt */
14ea49401f3c8c61422aefbda43809e275f60c6cvboxsync * Module linkage information for the kernel.