DisasmReg.cpp revision 8e2451f7a9a8e6e722d2065fe0eeb5df93799c7a
2b80aa00cbee106b9ec709660eadb6f59f4ca121vboxsync * VBox disassembler- Register Info Helpers.
2b80aa00cbee106b9ec709660eadb6f59f4ca121vboxsync * Copyright (C) 2006-2012 Oracle Corporation
2b80aa00cbee106b9ec709660eadb6f59f4ca121vboxsync * This file is part of VirtualBox Open Source Edition (OSE), as
2b80aa00cbee106b9ec709660eadb6f59f4ca121vboxsync * available from http://www.virtualbox.org. This file is free software;
2b80aa00cbee106b9ec709660eadb6f59f4ca121vboxsync * you can redistribute it and/or modify it under the terms of the GNU
2b80aa00cbee106b9ec709660eadb6f59f4ca121vboxsync * General Public License (GPL) as published by the Free Software
2b80aa00cbee106b9ec709660eadb6f59f4ca121vboxsync * Foundation, in version 2 as it comes in the "COPYING" file of the
2b80aa00cbee106b9ec709660eadb6f59f4ca121vboxsync * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
2b80aa00cbee106b9ec709660eadb6f59f4ca121vboxsync * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
2b80aa00cbee106b9ec709660eadb6f59f4ca121vboxsync/*******************************************************************************
2b80aa00cbee106b9ec709660eadb6f59f4ca121vboxsync* Header Files *
2b80aa00cbee106b9ec709660eadb6f59f4ca121vboxsync*******************************************************************************/
2b80aa00cbee106b9ec709660eadb6f59f4ca121vboxsync/*******************************************************************************
2b80aa00cbee106b9ec709660eadb6f59f4ca121vboxsync* Global Variables *
2b80aa00cbee106b9ec709660eadb6f59f4ca121vboxsync*******************************************************************************/
2b80aa00cbee106b9ec709660eadb6f59f4ca121vboxsync * Array for accessing 64-bit general registers in VMMREGFRAME structure
2b80aa00cbee106b9ec709660eadb6f59f4ca121vboxsync * by register's index from disasm.
2b80aa00cbee106b9ec709660eadb6f59f4ca121vboxsyncstatic const unsigned g_aReg64Index[] =
static const unsigned g_aReg32Index[] =
#define DIS_WRITE_REG32(p, idx, val) (*(uint64_t *)((char *)(p) + g_aReg32Index[idx]) = (uint32_t)val)
static const unsigned g_aReg16Index[] =
static const unsigned g_aReg8Index[] =
static const unsigned g_aRegSegIndex[] =
static const unsigned g_aRegHidSegIndex[] =
case DISCPUMODE_32BIT:
case DISCPUMODE_64BIT:
case DISCPUMODE_16BIT:
switch(subtype)
case OP_PARM_b:
case OP_PARM_w:
case OP_PARM_d:
case OP_PARM_q:
case OP_PARM_dq:
return DIS_SELREG_SS;
return DIS_SELREG_DS;
case DIS_SELREG_ES:
case DIS_SELREG_CS:
case DIS_SELREG_SS:
case DIS_SELREG_DS:
case DIS_SELREG_FS:
case DIS_SELREG_GS:
AssertFailed();
return VINF_SUCCESS;
return VINF_SUCCESS;
return VINF_SUCCESS;
return VINF_SUCCESS;
return VINF_SUCCESS;
return VINF_SUCCESS;
return VINF_SUCCESS;
return VINF_SUCCESS;
return VINF_SUCCESS;
* Returns the value of the specified segment register including a pointer to the hidden register in the supplied cpu context
DISDECL(int) DISFetchRegSegEx(PCCPUMCTXCORE pCtx, DIS_SELREG sel, RTSEL *pVal, CPUMSELREGHID **ppSelHidReg)
return VINF_SUCCESS;
return VINF_SUCCESS;
return VINF_SUCCESS;
return VINF_SUCCESS;
return VINF_SUCCESS;
return VINF_SUCCESS;
DISDECL(int) DISQueryParamVal(PCPUMCTXCORE pCtx, PDISCPUSTATE pCpu, POP_PARAMETER pParam, POP_PARAMVAL pParamVal, PARAM_TYPE parmtype)
if (RT_FAILURE(DISFetchReg8(pCtx, pParam->base.reg_gen, &pParamVal->val.val8))) return VERR_INVALID_PARAMETER;
if (RT_FAILURE(DISFetchReg16(pCtx, pParam->base.reg_gen, &pParamVal->val.val16))) return VERR_INVALID_PARAMETER;
if (RT_FAILURE(DISFetchReg32(pCtx, pParam->base.reg_gen, &pParamVal->val.val32))) return VERR_INVALID_PARAMETER;
if (RT_FAILURE(DISFetchReg64(pCtx, pParam->base.reg_gen, &pParamVal->val.val64))) return VERR_INVALID_PARAMETER;
AssertFailed();
return VERR_INVALID_PARAMETER;
AssertFailed();
return VINF_SUCCESS;
if (pParam->fUse & (DISUSE_REG_GEN8|DISUSE_REG_GEN16|DISUSE_REG_GEN32|DISUSE_REG_GEN64|DISUSE_REG_FP|DISUSE_REG_MMX|DISUSE_REG_XMM|DISUSE_REG_CR|DISUSE_REG_DBG|DISUSE_REG_SEG|DISUSE_REG_TEST))
// Caller needs to interpret the register according to the instruction (source/target, special value etc)
return VINF_SUCCESS;
if (RT_FAILURE(DISFetchReg8(pCtx, pParam->base.reg_gen, &pParamVal->val.val8))) return VERR_INVALID_PARAMETER;
if (RT_FAILURE(DISFetchReg16(pCtx, pParam->base.reg_gen, &pParamVal->val.val16))) return VERR_INVALID_PARAMETER;
if (RT_FAILURE(DISFetchReg32(pCtx, pParam->base.reg_gen, &pParamVal->val.val32))) return VERR_INVALID_PARAMETER;
if (RT_FAILURE(DISFetchReg64(pCtx, pParam->base.reg_gen, &pParamVal->val.val64))) return VERR_INVALID_PARAMETER;
// Caller needs to interpret the register according to the instruction (source/target, special value etc)
return VINF_SUCCESS;
if (pParam->fUse & (DISUSE_IMMEDIATE16|DISUSE_IMMEDIATE16_REL|DISUSE_IMMEDIATE_ADDR_0_16|DISUSE_IMMEDIATE16_SX8))
AssertMsg(pParamVal->size == pParam->cb || ((pParam->cb == 1) && (pParam->fUse & DISUSE_IMMEDIATE16_SX8)), ("pParamVal->size %d vs %d EIP=%RX32\n", pParamVal->size, pParam->cb, pCtx->eip) );
if (pParam->fUse & (DISUSE_IMMEDIATE32|DISUSE_IMMEDIATE32_REL|DISUSE_IMMEDIATE_ADDR_0_32|DISUSE_IMMEDIATE32_SX8))
Assert(pParamVal->size == pParam->cb || ((pParam->cb == 1) && (pParam->fUse & DISUSE_IMMEDIATE32_SX8)) );
Assert(pParamVal->size == pParam->cb || ((pParam->cb == 1) && (pParam->fUse & DISUSE_IMMEDIATE64_SX8)) );
return VINF_SUCCESS;
DISDECL(int) DISQueryParamRegPtr(PCPUMCTXCORE pCtx, PDISCPUSTATE pCpu, POP_PARAMETER pParam, void **ppReg, size_t *pcbSize)
if (pParam->fUse & (DISUSE_REG_GEN8|DISUSE_REG_GEN16|DISUSE_REG_GEN32|DISUSE_REG_FP|DISUSE_REG_MMX|DISUSE_REG_XMM|DISUSE_REG_CR|DISUSE_REG_DBG|DISUSE_REG_SEG|DISUSE_REG_TEST))
return VINF_SUCCESS;
return VINF_SUCCESS;
return VINF_SUCCESS;
return VINF_SUCCESS;
return VERR_INVALID_PARAMETER;