Virtio.cpp revision 7c324fdbe6f4ff55fd17bb0c8c5fba58e1ad02f3
b6517c5cc3b7a38889416706905a3cf2fd010785vboxsync * Virtio - Virtio Common Functions (VRing, VQueue, Virtio PCI)
c90d31f80888da118a5d230aabab08ad5c23c00dvboxsync * Copyright (C) 2009-2012 Oracle Corporation
b6517c5cc3b7a38889416706905a3cf2fd010785vboxsync * This file is part of VirtualBox Open Source Edition (OSE), as
b6517c5cc3b7a38889416706905a3cf2fd010785vboxsync * available from http://www.virtualbox.org. This file is free software;
b6517c5cc3b7a38889416706905a3cf2fd010785vboxsync * you can redistribute it and/or modify it under the terms of the GNU
b6517c5cc3b7a38889416706905a3cf2fd010785vboxsync * General Public License (GPL) as published by the Free Software
b6517c5cc3b7a38889416706905a3cf2fd010785vboxsync * Foundation, in version 2 as it comes in the "COPYING" file of the
b6517c5cc3b7a38889416706905a3cf2fd010785vboxsync * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
b6517c5cc3b7a38889416706905a3cf2fd010785vboxsync * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
b6517c5cc3b7a38889416706905a3cf2fd010785vboxsync/*******************************************************************************
b6517c5cc3b7a38889416706905a3cf2fd010785vboxsync* Header Files *
b6517c5cc3b7a38889416706905a3cf2fd010785vboxsync*******************************************************************************/
b6517c5cc3b7a38889416706905a3cf2fd010785vboxsync#define IFACE_TO_STATE(pIface, ifaceName) ((VPCISTATE *)((char*)pIface - RT_OFFSETOF(VPCISTATE, ifaceName)))
b6517c5cc3b7a38889416706905a3cf2fd010785vboxsync#endif /* DEBUG */
2f827df539da232220444c27f2b207a707a045b0vboxsync//RT_C_DECLS_BEGIN
2f827df539da232220444c27f2b207a707a045b0vboxsync//RT_C_DECLS_END
7cca5a9aeb06913531b982bf772508d09b4c2f0bvboxsyncstatic void vqueueInit(PVQUEUE pQueue, uint32_t uPageNumber)
581bb0c43dececce2fbba05cfb77d9a59c88a078vboxsync pQueue->VRing.addrDescriptors = (uint64_t)uPageNumber << PAGE_SHIFT;
4bb5cfa1f4d9e95d7d34b5d6ede18d9f4d433bc6vboxsync pQueue->VRing.addrAvail = pQueue->VRing.addrDescriptors
581bb0c43dececce2fbba05cfb77d9a59c88a078vboxsync pQueue->VRing.addrAvail + RT_OFFSETOF(VRINGAVAIL, auRing[pQueue->VRing.uSize]),
2f827df539da232220444c27f2b207a707a045b0vboxsync PAGE_SIZE); /* The used ring must start from the next page. */
b6517c5cc3b7a38889416706905a3cf2fd010785vboxsync// void vqueueElemFree(PVQUEUEELEM pElem)
b6517c5cc3b7a38889416706905a3cf2fd010785vboxsyncvoid vringReadDesc(PVPCISTATE pState, PVRING pVRing, uint32_t uIndex, PVRINGDESC pDesc)
b6517c5cc3b7a38889416706905a3cf2fd010785vboxsync //Log(("%s vringReadDesc: ring=%p idx=%u\n", INSTANCE(pState), pVRing, uIndex));
b6517c5cc3b7a38889416706905a3cf2fd010785vboxsync pVRing->addrDescriptors + sizeof(VRINGDESC) * (uIndex % pVRing->uSize),
b6517c5cc3b7a38889416706905a3cf2fd010785vboxsyncuint16_t vringReadAvail(PVPCISTATE pState, PVRING pVRing, uint32_t uIndex)
b6517c5cc3b7a38889416706905a3cf2fd010785vboxsync pVRing->addrAvail + RT_OFFSETOF(VRINGAVAIL, auRing[uIndex % pVRing->uSize]),
b6517c5cc3b7a38889416706905a3cf2fd010785vboxsyncuint16_t vringReadAvailFlags(PVPCISTATE pState, PVRING pVRing)
b6517c5cc3b7a38889416706905a3cf2fd010785vboxsync pVRing->addrAvail + RT_OFFSETOF(VRINGAVAIL, uFlags),
6f045c8e519b0f50a4c2eb2906e5f5e2c4679fa8vboxsyncvoid vringSetNotification(PVPCISTATE pState, PVRING pVRing, bool fEnabled)
b6517c5cc3b7a38889416706905a3cf2fd010785vboxsync return false;
7f9e93577d96c7f2a6977229c1baab57d5ec94e4vboxsync Log2(("%s vqueueSkip: %s avail_idx=%u\n", INSTANCE(pState),
2f827df539da232220444c27f2b207a707a045b0vboxsync QUEUENAME(pState, pQueue), pQueue->uNextAvailIndex));
b6517c5cc3b7a38889416706905a3cf2fd010785vboxsync return true;
56f538fa476fdbd9cc3d60438083a3f0d5f3ff7fvboxsyncbool vqueueGet(PVPCISTATE pState, PVQUEUE pQueue, PVQUEUEELEM pElem, bool fRemove)
56f538fa476fdbd9cc3d60438083a3f0d5f3ff7fvboxsync return false;
2cb52dd865592ea8e27b588beb22898d189646b1vboxsync Log2(("%s vqueueGet: %s avail_idx=%u\n", INSTANCE(pState),
2cb52dd865592ea8e27b588beb22898d189646b1vboxsync QUEUENAME(pState, pQueue), pQueue->uNextAvailIndex));
581bb0c43dececce2fbba05cfb77d9a59c88a078vboxsync uint16_t idx = vringReadAvail(pState, &pQueue->VRing, pQueue->uNextAvailIndex);
2cb52dd865592ea8e27b588beb22898d189646b1vboxsync Log2(("%s vqueueGet: %s IN seg=%u desc_idx=%u addr=%p cb=%u\n", INSTANCE(pState),
2cb52dd865592ea8e27b588beb22898d189646b1vboxsync QUEUENAME(pState, pQueue), pElem->nIn, idx, desc.u64Addr, desc.uLen));
56f538fa476fdbd9cc3d60438083a3f0d5f3ff7fvboxsync Log2(("%s vqueueGet: %s OUT seg=%u desc_idx=%u addr=%p cb=%u\n", INSTANCE(pState),
581bb0c43dececce2fbba05cfb77d9a59c88a078vboxsync QUEUENAME(pState, pQueue), pElem->nOut, idx, desc.u64Addr, desc.uLen));
56f538fa476fdbd9cc3d60438083a3f0d5f3ff7fvboxsync Log2(("%s vqueueGet: %s head_desc_idx=%u nIn=%u nOut=%u\n", INSTANCE(pState),
2f827df539da232220444c27f2b207a707a045b0vboxsync QUEUENAME(pState, pQueue), pElem->uIndex, pElem->nIn, pElem->nOut));
2f827df539da232220444c27f2b207a707a045b0vboxsync return true;
2cb52dd865592ea8e27b588beb22898d189646b1vboxsyncuint16_t vringReadUsedIndex(PVPCISTATE pState, PVRING pVRing)
56f538fa476fdbd9cc3d60438083a3f0d5f3ff7fvboxsyncvoid vringWriteUsedIndex(PVPCISTATE pState, PVRING pVRing, uint16_t u16Value)
56f538fa476fdbd9cc3d60438083a3f0d5f3ff7fvboxsyncvoid vringWriteUsedElem(PVPCISTATE pState, PVRING pVRing, uint32_t uIndex, uint32_t uId, uint32_t uLen)
56f538fa476fdbd9cc3d60438083a3f0d5f3ff7fvboxsync pVRing->addrUsed + RT_OFFSETOF(VRINGUSED, aRing[uIndex % pVRing->uSize]),
f46e7db81f80ea09725c6cc048fa0cad86573dc2vboxsyncvoid vqueuePut(PVPCISTATE pState, PVQUEUE pQueue, PVQUEUEELEM pElem, uint32_t uLen, uint32_t uReserved)
56f538fa476fdbd9cc3d60438083a3f0d5f3ff7fvboxsync Log2(("%s vqueuePut: %s desc_idx=%u acb=%u\n", INSTANCE(pState),
56f538fa476fdbd9cc3d60438083a3f0d5f3ff7fvboxsync for (i = uOffset = 0; i < pElem->nIn && uOffset < uLen - uReserved; i++)
56f538fa476fdbd9cc3d60438083a3f0d5f3ff7fvboxsync uint32_t cbSegLen = RT_MIN(uLen - cbReserved - uOffset, pElem->aSegsIn[i].cb - cbReserved);
b6517c5cc3b7a38889416706905a3cf2fd010785vboxsync Log2(("%s vqueuePut: %s used_idx=%u seg=%u addr=%p pv=%p cb=%u acb=%u\n", INSTANCE(pState),
523f2a6676210ab8601d3fdb2fdabe7dcdea7d4cvboxsync QUEUENAME(pState, pQueue), pQueue->uNextUsedIndex, i, pElem->aSegsIn[i].addr, pElem->aSegsIn[i].pv, pElem->aSegsIn[i].cb, cbSegLen));
f46e7db81f80ea09725c6cc048fa0cad86573dc2vboxsync PDMDevHlpPhysWrite(pState->CTX_SUFF(pDevIns), pElem->aSegsIn[i].addr + cbReserved,
6f045c8e519b0f50a4c2eb2906e5f5e2c4679fa8vboxsync Assert((uReserved + uOffset) == uLen || pElem->nIn == 0);
a2410ed6c0ce63f29ac7132882e4e46d921f239dvboxsync Log2(("%s vqueuePut: %s used_idx=%u guest_used_idx=%u id=%u len=%u\n", INSTANCE(pState),
a2410ed6c0ce63f29ac7132882e4e46d921f239dvboxsync QUEUENAME(pState, pQueue), pQueue->uNextUsedIndex, vringReadUsedIndex(pState, &pQueue->VRing), pElem->uIndex, uLen));
a2410ed6c0ce63f29ac7132882e4e46d921f239dvboxsync vringWriteUsedElem(pState, &pQueue->VRing, pQueue->uNextUsedIndex++, pElem->uIndex, uLen);
a2410ed6c0ce63f29ac7132882e4e46d921f239dvboxsyncvoid vqueueNotify(PVPCISTATE pState, PVQUEUE pQueue)
f46e7db81f80ea09725c6cc048fa0cad86573dc2vboxsync LogFlow(("%s vqueueNotify: %s availFlags=%x guestFeatures=%x vqueue is %sempty\n",
b6517c5cc3b7a38889416706905a3cf2fd010785vboxsync pState->uGuestFeatures, vqueueIsEmpty(pState, pQueue)?"":"not "));
b6517c5cc3b7a38889416706905a3cf2fd010785vboxsync if (!(vringReadAvailFlags(pState, &pQueue->VRing) & VRINGAVAIL_F_NO_INTERRUPT)
56f538fa476fdbd9cc3d60438083a3f0d5f3ff7fvboxsync || ((pState->uGuestFeatures & VPCI_F_NOTIFY_ON_EMPTY) && vqueueIsEmpty(pState, pQueue)))
f46e7db81f80ea09725c6cc048fa0cad86573dc2vboxsync int rc = vpciRaiseInterrupt(pState, VERR_INTERNAL_ERROR, VPCI_ISR_QUEUE);
f46e7db81f80ea09725c6cc048fa0cad86573dc2vboxsync Log(("%s vqueueNotify: Failed to raise an interrupt (%Rrc).\n", INSTANCE(pState), rc));
56f538fa476fdbd9cc3d60438083a3f0d5f3ff7fvboxsync Log2(("%s vqueueSync: %s old_used_idx=%u new_used_idx=%u\n", INSTANCE(pState),
56f538fa476fdbd9cc3d60438083a3f0d5f3ff7fvboxsync QUEUENAME(pState, pQueue), vringReadUsedIndex(pState, &pQueue->VRing), pQueue->uNextUsedIndex));
56f538fa476fdbd9cc3d60438083a3f0d5f3ff7fvboxsync vringWriteUsedIndex(pState, &pQueue->VRing, pQueue->uNextUsedIndex);
3adea7c30ebc76f2e5975ad9052a40c174f588f3vboxsync * Raise interrupt.
f46e7db81f80ea09725c6cc048fa0cad86573dc2vboxsync * @param pState The device state structure.
f46e7db81f80ea09725c6cc048fa0cad86573dc2vboxsync * @param rcBusy Status code to return when the critical section is busy.
3adea7c30ebc76f2e5975ad9052a40c174f588f3vboxsync * @param u8IntCause Interrupt cause bit mask to set in PCI ISR port.
f46e7db81f80ea09725c6cc048fa0cad86573dc2vboxsyncint vpciRaiseInterrupt(VPCISTATE *pState, int rcBusy, uint8_t u8IntCause)
3adea7c30ebc76f2e5975ad9052a40c174f588f3vboxsync // int rc = vpciCsEnter(pState, rcBusy);
3adea7c30ebc76f2e5975ad9052a40c174f588f3vboxsync // if (RT_UNLIKELY(rc != VINF_SUCCESS))
f46e7db81f80ea09725c6cc048fa0cad86573dc2vboxsync // return rc;
f46e7db81f80ea09725c6cc048fa0cad86573dc2vboxsync PDMDevHlpPCISetIrq(pState->CTX_SUFF(pDevIns), 0, 1);
f46e7db81f80ea09725c6cc048fa0cad86573dc2vboxsync // vpciCsLeave(pState);
f46e7db81f80ea09725c6cc048fa0cad86573dc2vboxsync * Lower interrupt.
f46e7db81f80ea09725c6cc048fa0cad86573dc2vboxsync * @param pState The device state structure.
f46e7db81f80ea09725c6cc048fa0cad86573dc2vboxsync LogFlow(("%s vpciLowerInterrupt\n", INSTANCE(pState)));
f46e7db81f80ea09725c6cc048fa0cad86573dc2vboxsync PDMDevHlpPCISetIrq(pState->CTX_SUFF(pDevIns), 0, 0);
f46e7db81f80ea09725c6cc048fa0cad86573dc2vboxsyncDECLINLINE(uint32_t) vpciGetHostFeatures(PVPCISTATE pState,
f46e7db81f80ea09725c6cc048fa0cad86573dc2vboxsync * Port I/O Handler for IN operations.
f46e7db81f80ea09725c6cc048fa0cad86573dc2vboxsync * @returns VBox status code.
f46e7db81f80ea09725c6cc048fa0cad86573dc2vboxsync * @param pDevIns The device instance.
f46e7db81f80ea09725c6cc048fa0cad86573dc2vboxsync * @param pvUser Pointer to the device state structure.
f46e7db81f80ea09725c6cc048fa0cad86573dc2vboxsync * @param Port Port number used for the IN operation.
f46e7db81f80ea09725c6cc048fa0cad86573dc2vboxsync * @param pu32 Where to store the result.
b6517c5cc3b7a38889416706905a3cf2fd010785vboxsync * @param cb Number of bytes read.
f46e7db81f80ea09725c6cc048fa0cad86573dc2vboxsync * @thread EMT
f46e7db81f80ea09725c6cc048fa0cad86573dc2vboxsync VPCISTATE *pState = PDMINS_2_DATA(pDevIns, VPCISTATE *);
b6517c5cc3b7a38889416706905a3cf2fd010785vboxsync STAM_PROFILE_ADV_START(&pState->CTXSUFF(StatIORead), a);
f46e7db81f80ea09725c6cc048fa0cad86573dc2vboxsync * We probably do not need to enter critical section when reading registers
b6517c5cc3b7a38889416706905a3cf2fd010785vboxsync * as the most of them are either constant or being changed during
f46e7db81f80ea09725c6cc048fa0cad86573dc2vboxsync * initialization only, the exception being ISR which can be raced by all
75e8721fd1fe3ee8c1dd3e8404381def8ae5ca53vboxsync * threads but I see no big harm in it. It also happens to be the most read
75e8721fd1fe3ee8c1dd3e8404381def8ae5ca53vboxsync * register as it gets read in interrupt handler. By dropping cs protection
f46e7db81f80ea09725c6cc048fa0cad86573dc2vboxsync * here we gain the ability to deliver RX packets to the guest while TX is
f46e7db81f80ea09725c6cc048fa0cad86573dc2vboxsync * holding cs transmitting queued packets.
f46e7db81f80ea09725c6cc048fa0cad86573dc2vboxsync rc = vpciCsEnter(pState, VINF_IOM_R3_IOPORT_READ);
f46e7db81f80ea09725c6cc048fa0cad86573dc2vboxsync if (RT_UNLIKELY(rc != VINF_SUCCESS))
b6517c5cc3b7a38889416706905a3cf2fd010785vboxsync STAM_PROFILE_ADV_STOP(&pState->CTXSUFF(StatIORead), a);
f46e7db81f80ea09725c6cc048fa0cad86573dc2vboxsync /* Tell the guest what features we support. */
f46e7db81f80ea09725c6cc048fa0cad86573dc2vboxsync *pu32 = vpciGetHostFeatures(pState, pfnGetHostFeatures)
f46e7db81f80ea09725c6cc048fa0cad86573dc2vboxsync *pu32 = pState->Queues[pState->uQueueSelector].uPageNumber;
f46e7db81f80ea09725c6cc048fa0cad86573dc2vboxsync *(uint16_t*)pu32 = pState->Queues[pState->uQueueSelector].VRing.uSize;
56f538fa476fdbd9cc3d60438083a3f0d5f3ff7fvboxsync rc = pfnGetConfig(pState, Port - VPCI_CONFIG, cb, pu32);
56f538fa476fdbd9cc3d60438083a3f0d5f3ff7fvboxsync rc = PDMDevHlpDBGFStop(pDevIns, RT_SRC_POS, "%s vpciIOPortIn: no valid port at offset port=%RTiop cb=%08x\n",
56f538fa476fdbd9cc3d60438083a3f0d5f3ff7fvboxsync Log3(("%s vpciIOPortIn: At %RTiop in %0*x\n", INSTANCE(pState), Port, cb*2, *pu32));
56f538fa476fdbd9cc3d60438083a3f0d5f3ff7fvboxsync STAM_PROFILE_ADV_STOP(&pState->CTXSUFF(StatIORead), a);
2f827df539da232220444c27f2b207a707a045b0vboxsync //vpciCsLeave(pState);
56f538fa476fdbd9cc3d60438083a3f0d5f3ff7fvboxsync * Port I/O Handler for OUT operations.
b6517c5cc3b7a38889416706905a3cf2fd010785vboxsync * @returns VBox status code.
4bb5cfa1f4d9e95d7d34b5d6ede18d9f4d433bc6vboxsync * @param pDevIns The device instance.
4bb5cfa1f4d9e95d7d34b5d6ede18d9f4d433bc6vboxsync * @param pvUser User argument.
4bb5cfa1f4d9e95d7d34b5d6ede18d9f4d433bc6vboxsync * @param Port Port number used for the IN operation.
4bb5cfa1f4d9e95d7d34b5d6ede18d9f4d433bc6vboxsync * @param u32 The value to output.
4bb5cfa1f4d9e95d7d34b5d6ede18d9f4d433bc6vboxsync * @param cb The value size in bytes.
4bb5cfa1f4d9e95d7d34b5d6ede18d9f4d433bc6vboxsync * @todo r=bird: Use a callback table instead of passing 6 function pointers
4bb5cfa1f4d9e95d7d34b5d6ede18d9f4d433bc6vboxsync * for potential operations with each I/O port write.
4bb5cfa1f4d9e95d7d34b5d6ede18d9f4d433bc6vboxsync * @thread EMT
4bb5cfa1f4d9e95d7d34b5d6ede18d9f4d433bc6vboxsync PFNGETHOSTMINIMALFEATURES pfnGetHostMinimalFeatures,
4bb5cfa1f4d9e95d7d34b5d6ede18d9f4d433bc6vboxsync VPCISTATE *pState = PDMINS_2_DATA(pDevIns, VPCISTATE *);
4bb5cfa1f4d9e95d7d34b5d6ede18d9f4d433bc6vboxsync STAM_PROFILE_ADV_START(&pState->CTXSUFF(StatIOWrite), a);
4bb5cfa1f4d9e95d7d34b5d6ede18d9f4d433bc6vboxsync Log3(("%s virtioIOPortOut: At %RTiop out %0*x\n", INSTANCE(pState), Port, cb*2, u32));
4bb5cfa1f4d9e95d7d34b5d6ede18d9f4d433bc6vboxsync /* Check if the guest negotiates properly, fall back to basics if it does not. */
4bb5cfa1f4d9e95d7d34b5d6ede18d9f4d433bc6vboxsync Log(("%s WARNING! Guest failed to negotiate properly (guest=%x)\n",
4bb5cfa1f4d9e95d7d34b5d6ede18d9f4d433bc6vboxsync pState->uGuestFeatures = pfnGetHostMinimalFeatures(pState);
4bb5cfa1f4d9e95d7d34b5d6ede18d9f4d433bc6vboxsync /* The guest may potentially desire features we don't support! */
4bb5cfa1f4d9e95d7d34b5d6ede18d9f4d433bc6vboxsync else if (~vpciGetHostFeatures(pState, pfnGetHostFeatures) & u32)
4bb5cfa1f4d9e95d7d34b5d6ede18d9f4d433bc6vboxsync Log(("%s Guest asked for features host does not support! (host=%x guest=%x)\n",
4bb5cfa1f4d9e95d7d34b5d6ede18d9f4d433bc6vboxsync vpciGetHostFeatures(pState, pfnGetHostFeatures), u32));
4bb5cfa1f4d9e95d7d34b5d6ede18d9f4d433bc6vboxsync pfnSetHostFeatures(pState, pState->uGuestFeatures);
4bb5cfa1f4d9e95d7d34b5d6ede18d9f4d433bc6vboxsync * The guest is responsible for allocating the pages for queues,
4bb5cfa1f4d9e95d7d34b5d6ede18d9f4d433bc6vboxsync * here it provides us with the page number of descriptor table.
4bb5cfa1f4d9e95d7d34b5d6ede18d9f4d433bc6vboxsync * Note that we provide the size of the queue to the guest via
4bb5cfa1f4d9e95d7d34b5d6ede18d9f4d433bc6vboxsync * VIRTIO_PCI_QUEUE_NUM.
4bb5cfa1f4d9e95d7d34b5d6ede18d9f4d433bc6vboxsync pState->Queues[pState->uQueueSelector].uPageNumber = u32;
4bb5cfa1f4d9e95d7d34b5d6ede18d9f4d433bc6vboxsync vqueueInit(&pState->Queues[pState->uQueueSelector], u32);
b6517c5cc3b7a38889416706905a3cf2fd010785vboxsync Log3(("%s vpciIOPortOut: Invalid queue selector %08x\n", INSTANCE(pState), u32));
6f045c8e519b0f50a4c2eb2906e5f5e2c4679fa8vboxsync // rc = vpciCsEnter(pState, VERR_SEM_BUSY);
6f045c8e519b0f50a4c2eb2906e5f5e2c4679fa8vboxsync // if (RT_LIKELY(rc == VINF_SUCCESS))
6f045c8e519b0f50a4c2eb2906e5f5e2c4679fa8vboxsync pState->Queues[u32].pfnCallback(pState, &pState->Queues[u32]);
6f045c8e519b0f50a4c2eb2906e5f5e2c4679fa8vboxsync // vpciCsLeave(pState);
6f045c8e519b0f50a4c2eb2906e5f5e2c4679fa8vboxsync Log(("%s The queue (#%d) being notified has not been initialized.\n",
6f045c8e519b0f50a4c2eb2906e5f5e2c4679fa8vboxsync Log(("%s Invalid queue number (%d)\n", INSTANCE(pState), u32));
6f045c8e519b0f50a4c2eb2906e5f5e2c4679fa8vboxsync fHasBecomeReady = !(pState->uStatus & VPCI_STATUS_DRV_OK) && (u32 & VPCI_STATUS_DRV_OK);
6f045c8e519b0f50a4c2eb2906e5f5e2c4679fa8vboxsync /* Writing 0 to the status port triggers device reset. */
7753dc7a3bcd14c9ec9d969cbc1a0155b0673c06vboxsync rc = pfnSetConfig(pState, Port - VPCI_CONFIG, cb, &u32);
6f045c8e519b0f50a4c2eb2906e5f5e2c4679fa8vboxsync rc = PDMDevHlpDBGFStop(pDevIns, RT_SRC_POS, "%s vpciIOPortOut: no valid port at offset Port=%RTiop cb=%08x\n",
6f045c8e519b0f50a4c2eb2906e5f5e2c4679fa8vboxsync STAM_PROFILE_ADV_STOP(&pState->CTXSUFF(StatIOWrite), a);
b6517c5cc3b7a38889416706905a3cf2fd010785vboxsync * @interface_method_impl{PDMIBASE,pfnQueryInterface}
1313e5cbe01a41e7ccb1499d2d73c455a2495955vboxsyncvoid *vpciQueryInterface(struct PDMIBASE *pInterface, const char *pszIID)
1313e5cbe01a41e7ccb1499d2d73c455a2495955vboxsync VPCISTATE *pThis = IFACE_TO_STATE(pInterface, IBase);
1313e5cbe01a41e7ccb1499d2d73c455a2495955vboxsync PDMIBASE_RETURN_INTERFACE(pszIID, PDMIBASE, &pThis->IBase);
1313e5cbe01a41e7ccb1499d2d73c455a2495955vboxsync PDMIBASE_RETURN_INTERFACE(pszIID, PDMILEDPORTS, &pThis->ILeds);
1313e5cbe01a41e7ccb1499d2d73c455a2495955vboxsync * Gets the pointer to the status LED of a unit.
1313e5cbe01a41e7ccb1499d2d73c455a2495955vboxsync * @returns VBox status code.
1313e5cbe01a41e7ccb1499d2d73c455a2495955vboxsync * @param pInterface Pointer to the interface structure.
1313e5cbe01a41e7ccb1499d2d73c455a2495955vboxsync * @param iLUN The unit which status LED we desire.
1313e5cbe01a41e7ccb1499d2d73c455a2495955vboxsync * @param ppLed Where to store the LED pointer.
1313e5cbe01a41e7ccb1499d2d73c455a2495955vboxsync * @thread EMT
1313e5cbe01a41e7ccb1499d2d73c455a2495955vboxsyncstatic DECLCALLBACK(int) vpciQueryStatusLed(PPDMILEDPORTS pInterface, unsigned iLUN, PPDMLED *ppLed)
1313e5cbe01a41e7ccb1499d2d73c455a2495955vboxsync VPCISTATE *pState = IFACE_TO_STATE(pInterface, ILeds);
6f045c8e519b0f50a4c2eb2906e5f5e2c4679fa8vboxsync * Turns on/off the write status LED.
6f045c8e519b0f50a4c2eb2906e5f5e2c4679fa8vboxsync * @returns VBox status code.
6f045c8e519b0f50a4c2eb2906e5f5e2c4679fa8vboxsync * @param pState Pointer to the device state structure.
6f045c8e519b0f50a4c2eb2906e5f5e2c4679fa8vboxsync * @param fOn New LED state.
6f045c8e519b0f50a4c2eb2906e5f5e2c4679fa8vboxsync LogFlow(("%s vpciSetWriteLed: %s\n", INSTANCE(pState), fOn?"on":"off"));
b6517c5cc3b7a38889416706905a3cf2fd010785vboxsync pState->led.Asserted.s.fWriting = pState->led.Actual.s.fWriting = 1;
6f045c8e519b0f50a4c2eb2906e5f5e2c4679fa8vboxsync * Turns on/off the read status LED.
6f045c8e519b0f50a4c2eb2906e5f5e2c4679fa8vboxsync * @returns VBox status code.
6f045c8e519b0f50a4c2eb2906e5f5e2c4679fa8vboxsync * @param pState Pointer to the device state structure.
6f045c8e519b0f50a4c2eb2906e5f5e2c4679fa8vboxsync * @param fOn New LED state.
b6517c5cc3b7a38889416706905a3cf2fd010785vboxsync LogFlow(("%s vpciSetReadLed: %s\n", INSTANCE(pState), fOn?"on":"off"));
b6517c5cc3b7a38889416706905a3cf2fd010785vboxsync pState->led.Asserted.s.fReading = pState->led.Actual.s.fReading = 1;
b6517c5cc3b7a38889416706905a3cf2fd010785vboxsync * Sets 8-bit register in PCI configuration space.
b6517c5cc3b7a38889416706905a3cf2fd010785vboxsync * @param refPciDev The PCI device.
b6517c5cc3b7a38889416706905a3cf2fd010785vboxsync * @param uOffset The register offset.
b6517c5cc3b7a38889416706905a3cf2fd010785vboxsync * @param u16Value The value to store in the register.
b6517c5cc3b7a38889416706905a3cf2fd010785vboxsync * @thread EMT
b6517c5cc3b7a38889416706905a3cf2fd010785vboxsyncDECLINLINE(void) vpciCfgSetU8(PCIDEVICE& refPciDev, uint32_t uOffset, uint8_t u8Value)
b6517c5cc3b7a38889416706905a3cf2fd010785vboxsync * Sets 16-bit register in PCI configuration space.
b6517c5cc3b7a38889416706905a3cf2fd010785vboxsync * @param refPciDev The PCI device.
#ifdef DEBUG
# define vpciDumpState(x, s) do {} while (0)
int rc;
return VINF_SUCCESS;
int vpciLoadExec(PVPCISTATE pState, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass, uint32_t nQueues)
int rc;
return VINF_SUCCESS;
#ifdef VBOX_WITH_MSI_DEVICES
const char *pszCounter)
return g_szCounterName;
return rc;
return rc;
#ifdef VBOX_WITH_MSI_DEVICES
#if defined(VBOX_WITH_STATISTICS)
PDMDevHlpSTAMRegisterF(pDevIns, &pState->StatIOReadGC, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_CALL, "Profiling IO reads in GC", vpciCounter(pcszNameFmt, "IO/ReadGC"), iInstance);
PDMDevHlpSTAMRegisterF(pDevIns, &pState->StatIOReadHC, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_CALL, "Profiling IO reads in HC", vpciCounter(pcszNameFmt, "IO/ReadHC"), iInstance);
PDMDevHlpSTAMRegisterF(pDevIns, &pState->StatIOWriteGC, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_CALL, "Profiling IO writes in GC", vpciCounter(pcszNameFmt, "IO/WriteGC"), iInstance);
PDMDevHlpSTAMRegisterF(pDevIns, &pState->StatIOWriteHC, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_CALL, "Profiling IO writes in HC", vpciCounter(pcszNameFmt, "IO/WriteHC"), iInstance);
PDMDevHlpSTAMRegisterF(pDevIns, &pState->StatIntsRaised, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of raised interrupts", vpciCounter(pcszNameFmt, "Interrupts/Raised"), iInstance);
PDMDevHlpSTAMRegisterF(pDevIns, &pState->StatIntsSkipped, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of skipped interrupts", vpciCounter(pcszNameFmt, "Interrupts/Skipped"), iInstance);
PDMDevHlpSTAMRegisterF(pDevIns, &pState->StatCsGC, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_CALL, "Profiling CS wait in GC", vpciCounter(pcszNameFmt, "Cs/CsGC"), iInstance);
PDMDevHlpSTAMRegisterF(pDevIns, &pState->StatCsHC, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_CALL, "Profiling CS wait in HC", vpciCounter(pcszNameFmt, "Cs/CsHC"), iInstance);
return rc;
return VINF_SUCCESS;
const char *pcszName)
if (!pQueue)
return pQueue;