DevLsiLogicSCSI.h revision 171f7694ec7932516e3b96aafac975853e3fe754
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync/* $Id$ */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync/** @file
248c89033c87fed7229aa29bbbc4f4698fb13687vboxsync * VBox storage devices: LsiLogic LSI53c1030 SCSI controller - Defines and structures.
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync/*
248c89033c87fed7229aa29bbbc4f4698fb13687vboxsync * Copyright (C) 2006-2009 Sun Microsystems, Inc.
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync *
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync * This file is part of VirtualBox Open Source Edition (OSE), as
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync * available from http://www.virtualbox.org. This file is free software;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync * you can redistribute it and/or modify it under the terms of the GNU
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync * General Public License (GPL) as published by the Free Software
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync * Foundation, in version 2 as it comes in the "COPYING" file of the
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync *
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync * Clara, CA 95054 USA or visit http://www.sun.com if you need
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync * additional information or have any questions.
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#ifndef __DEVLSILOGICSCSI_H__
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#define __DEVLSILOGICSCSI_H__
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#include <iprt/stdint.h>
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync/*
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync * I/O port registered in the ISA compatible range to let the BIOS access
750df3fe104e01cadbc3d5bd20243055d283d4e5vboxsync * the controller.
750df3fe104e01cadbc3d5bd20243055d283d4e5vboxsync */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#define LSILOGIC_ISA_IO_PORT 0x340
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#define LSILOGICSCSI_REQUEST_QUEUE_DEPTH_DEFAULT 1024
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#define LSILOGICSCSI_REPLY_QUEUE_DEPTH_DEFAULT 128
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#define LSILOGICSCSI_MAXIMUM_CHAIN_DEPTH 3
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync
c10a6f0c7041e4d1ee50ad38425aab9d43c55522vboxsync#define LSILOGIC_NR_OF_ALLOWED_BIGGER_LISTS 100
c10a6f0c7041e4d1ee50ad38425aab9d43c55522vboxsync
c10a6f0c7041e4d1ee50ad38425aab9d43c55522vboxsync/** Equal for all devices */
c10a6f0c7041e4d1ee50ad38425aab9d43c55522vboxsync#define LSILOGICSCSI_PCI_VENDOR_ID (0x1000)
c10a6f0c7041e4d1ee50ad38425aab9d43c55522vboxsync
c10a6f0c7041e4d1ee50ad38425aab9d43c55522vboxsync/** SPI SCSI controller (LSI53C1030) */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#define LSILOGICSCSI_PCI_SPI_CTRLNAME "LSI53C1030"
750df3fe104e01cadbc3d5bd20243055d283d4e5vboxsync#define LSILOGICSCSI_PCI_SPI_DEVICE_ID (0x0030)
750df3fe104e01cadbc3d5bd20243055d283d4e5vboxsync#define LSILOGICSCSI_PCI_SPI_REVISION_ID (0x00)
750df3fe104e01cadbc3d5bd20243055d283d4e5vboxsync#define LSILOGICSCSI_PCI_SPI_CLASS_CODE (0x01)
750df3fe104e01cadbc3d5bd20243055d283d4e5vboxsync#define LSILOGICSCSI_PCI_SPI_SUBSYSTEM_VENDOR_ID (0x1000)
750df3fe104e01cadbc3d5bd20243055d283d4e5vboxsync#define LSILOGICSCSI_PCI_SPI_SUBSYSTEM_ID (0x8000)
750df3fe104e01cadbc3d5bd20243055d283d4e5vboxsync#define LSILOGICSCSI_PCI_SPI_PORTS_MAX 1
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#define LSILOGICSCSI_PCI_SPI_BUSES_MAX 1
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync#define LSILOGICSCSI_PCI_SPI_DEVICES_PER_BUS_MAX 16
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync#define LSILOGICSCSI_PCI_SPI_DEVICES_MAX (LSILOGICSCSI_PCI_SPI_BUSES_MAX*LSILOGICSCSI_PCI_SPI_DEVICES_PER_BUS_MAX)
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync/** SAS SCSI controller (SAS1068 PCI-X Fusion-MPT SAS) */
750df3fe104e01cadbc3d5bd20243055d283d4e5vboxsync#define LSILOGICSCSI_PCI_SAS_CTRLNAME "SAS1068"
750df3fe104e01cadbc3d5bd20243055d283d4e5vboxsync#define LSILOGICSCSI_PCI_SAS_DEVICE_ID (0x0054)
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync#define LSILOGICSCSI_PCI_SAS_REVISION_ID (0x00)
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync#define LSILOGICSCSI_PCI_SAS_CLASS_CODE (0x00)
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync#define LSILOGICSCSI_PCI_SAS_SUBSYSTEM_VENDOR_ID (0x1000)
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync#define LSILOGICSCSI_PCI_SAS_SUBSYSTEM_ID (0x8000)
750df3fe104e01cadbc3d5bd20243055d283d4e5vboxsync#define LSILOGICSCSI_PCI_SAS_PORTS_MAX 256
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#define LSILOGICSCSI_PCI_SAS_PORTS_DEFAULT 8
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#define LSILOGICSCSI_PCI_SAS_DEVICES_PER_PORT_MAX 1
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#define LSILOGICSCSI_PCI_SAS_DEVICES_MAX (LSILOGICSCSI_PCI_SAS_PORTS_MAX * LSILOGICSCSI_PCI_SAS_DEVICES_PER_PORT_MAX)
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync/**
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync * A SAS address.
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#pragma pack(1)
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsynctypedef union SASADDRESS
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync{
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** 64bit view. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint64_t u64Address;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** 32bit view. */
750df3fe104e01cadbc3d5bd20243055d283d4e5vboxsync uint32_t u32Address[2];
750df3fe104e01cadbc3d5bd20243055d283d4e5vboxsync /** 16bit view. */
750df3fe104e01cadbc3d5bd20243055d283d4e5vboxsync uint16_t u16Address[4];
750df3fe104e01cadbc3d5bd20243055d283d4e5vboxsync /** Byte view. */
750df3fe104e01cadbc3d5bd20243055d283d4e5vboxsync uint8_t u8Address[8];
750df3fe104e01cadbc3d5bd20243055d283d4e5vboxsync} SASADDRESS, *PSASADDRESS;
750df3fe104e01cadbc3d5bd20243055d283d4e5vboxsync#pragma pack()
750df3fe104e01cadbc3d5bd20243055d283d4e5vboxsyncAssertCompileSize(SASADDRESS, 8);
750df3fe104e01cadbc3d5bd20243055d283d4e5vboxsync
750df3fe104e01cadbc3d5bd20243055d283d4e5vboxsync/**
750df3fe104e01cadbc3d5bd20243055d283d4e5vboxsync * Possible device types we support.
750df3fe104e01cadbc3d5bd20243055d283d4e5vboxsync */
750df3fe104e01cadbc3d5bd20243055d283d4e5vboxsynctypedef enum LSILOGICCTRLTYPE
750df3fe104e01cadbc3d5bd20243055d283d4e5vboxsync{
750df3fe104e01cadbc3d5bd20243055d283d4e5vboxsync /** SPI SCSI controller (PCI dev id 0x0030) */
750df3fe104e01cadbc3d5bd20243055d283d4e5vboxsync LSILOGICCTRLTYPE_SCSI_SPI = 0,
750df3fe104e01cadbc3d5bd20243055d283d4e5vboxsync /** SAS SCSI controller (PCI dev id 0x0054) */
750df3fe104e01cadbc3d5bd20243055d283d4e5vboxsync LSILOGICCTRLTYPE_SCSI_SAS = 1,
750df3fe104e01cadbc3d5bd20243055d283d4e5vboxsync /** 32bit hack */
750df3fe104e01cadbc3d5bd20243055d283d4e5vboxsync LSILOGICCTRLTYPE_32BIT_HACK = 0x7fffffff
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync} LSILOGICCTRLTYPE, *PLSILOGICCTRLTYPE;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync/**
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync * A simple SG element for a 64bit adress.
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#pragma pack(1)
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsynctypedef struct MptSGEntrySimple64
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync{
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Length of the buffer this entry describes. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync unsigned u24Length: 24;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Flag whether this element is the end of the list. */
ffb50166c9adb4ae583b914d405197035cf890advboxsync unsigned fEndOfList: 1;
ffb50166c9adb4ae583b914d405197035cf890advboxsync /** Flag whether the address is 32bit or 64bits wide. */
ffb50166c9adb4ae583b914d405197035cf890advboxsync unsigned f64BitAddress: 1;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Flag whether this buffer contains data to be transfered or is the destination. */
ffb50166c9adb4ae583b914d405197035cf890advboxsync unsigned fBufferContainsData: 1;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Flag whether this is a local address or a system address. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync unsigned fLocalAddress: 1;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Element type. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync unsigned u2ElementType: 2;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Flag whether this is the last element of the buffer. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync unsigned fEndOfBuffer: 1;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Flag whether this is the last element of the current segment. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync unsigned fLastElement: 1;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Lower 32bits of the address of the data buffer. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync unsigned u32DataBufferAddressLow: 32;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Upper 32bits of the address of the data buffer. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync unsigned u32DataBufferAddressHigh: 32;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync} MptSGEntrySimple64, *PMptSGEntrySimple64;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#pragma pack()
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsyncAssertCompileSize(MptSGEntrySimple64, 12);
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync/**
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync * A simple SG element for a 32bit adress.
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#pragma pack(1)
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsynctypedef struct MptSGEntrySimple32
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync{
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Length of the buffer this entry describes. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync unsigned u24Length: 24;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Flag whether this element is the end of the list. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync unsigned fEndOfList: 1;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Flag whether the address is 32bit or 64bits wide. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync unsigned f64BitAddress: 1;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Flag whether this buffer contains data to be transfered or is the destination. */
248c89033c87fed7229aa29bbbc4f4698fb13687vboxsync unsigned fBufferContainsData: 1;
248c89033c87fed7229aa29bbbc4f4698fb13687vboxsync /** Flag whether this is a local address or a system address. */
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsync unsigned fLocalAddress: 1;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Element type. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync unsigned u2ElementType: 2;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Flag whether this is the last element of the buffer. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync unsigned fEndOfBuffer: 1;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Flag whether this is the last element of the current segment. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync unsigned fLastElement: 1;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Lower 32bits of the address of the data buffer. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync unsigned u32DataBufferAddressLow: 32;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync} MptSGEntrySimple32, *PMptSGEntrySimple32;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#pragma pack()
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsyncAssertCompileSize(MptSGEntrySimple32, 8);
b4d7b4dbcc45b8bde7502aa129440d92d7ffd038vboxsync
b4d7b4dbcc45b8bde7502aa129440d92d7ffd038vboxsync/**
b4d7b4dbcc45b8bde7502aa129440d92d7ffd038vboxsync * A chain SG element.
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#pragma pack(1)
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsynctypedef struct MptSGEntryChain
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync{
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Size of the segment. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync unsigned u16Length: 16;
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsync /** Offset in 32bit words of the next chain element in the segment
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsync * identified by this element. */
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsync unsigned u8NextChainOffset: 8;
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsync /** Reserved. */
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsync unsigned fReserved0: 1;
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsync /** Flag whether the address is 32bit or 64bits wide. */
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsync unsigned f64BitAddress: 1;
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsync /** Reserved. */
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsync unsigned fReserved1: 1;
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsync /** Flag whether this is a local address or a system address. */
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsync unsigned fLocalAddress: 1;
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsync /** Element type. */
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsync unsigned u2ElementType: 2;
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsync /** Flag whether this is the last element of the buffer. */
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsync unsigned u2Reserved2: 2;
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync /** Lower 32bits of the address of the data buffer. */
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsync unsigned u32SegmentAddressLow: 32;
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsync /** Upper 32bits of the address of the data buffer. */
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsync unsigned u32SegmentAddressHigh: 32;
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsync} MptSGEntryChain, *PMptSGEntryChain;
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsync#pragma pack()
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsyncAssertCompileSize(MptSGEntryChain, 12);
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsync
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsynctypedef union MptSGEntryUnion
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsync{
9bff17fe6983cfda2ddd98f1979841bcb48e78e7vboxsync MptSGEntrySimple64 Simple64;
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsync MptSGEntrySimple32 Simple32;
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsync MptSGEntryChain Chain;
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsync} MptSGEntryUnion, *PMptSGEntryUnion;
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsync
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsync/**
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsync * MPT Fusion message header - Common for all message frames.
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsync * This is filled in by the guest.
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsync */
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsync#pragma pack(1)
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsynctypedef struct MptMessageHdr
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsync{
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsync /** Function dependent data. */
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsync uint16_t u16FunctionDependent;
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsync /** Chain offset. */
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsync uint8_t u8ChainOffset;
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsync /** The function code. */
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsync uint8_t u8Function;
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsync /** Function dependent data. */
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsync uint8_t au8FunctionDependent[3];
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsync /** Message flags. */
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsync uint8_t u8MessageFlags;
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsync /** Message context - Unique ID from the guest unmodified by the device. */
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsync uint32_t u32MessageContext;
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsync} MptMessageHdr, *PMptMessageHdr;
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsync#pragma pack()
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsyncAssertCompileSize(MptMessageHdr, 12);
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsync
3fb3de312d1ff675e0f7cc62a7d46cbb1d5d9353vboxsync/** Defined function codes found in the message header. */
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsync#define MPT_MESSAGE_HDR_FUNCTION_SCSI_IO_REQUEST (0x00)
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsync#define MPT_MESSAGE_HDR_FUNCTION_SCSI_TASK_MGMT (0x01)
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#define MPT_MESSAGE_HDR_FUNCTION_IOC_INIT (0x02)
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#define MPT_MESSAGE_HDR_FUNCTION_IOC_FACTS (0x03)
11b175175a0ed424b8e8354acda681ad0adde0f8vboxsync#define MPT_MESSAGE_HDR_FUNCTION_CONFIG (0x04)
11b175175a0ed424b8e8354acda681ad0adde0f8vboxsync#define MPT_MESSAGE_HDR_FUNCTION_PORT_FACTS (0x05)
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#define MPT_MESSAGE_HDR_FUNCTION_PORT_ENABLE (0x06)
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#define MPT_MESSAGE_HDR_FUNCTION_EVENT_NOTIFICATION (0x07)
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#define MPT_MESSAGE_HDR_FUNCTION_EVENT_ACK (0x08)
11b175175a0ed424b8e8354acda681ad0adde0f8vboxsync#define MPT_MESSAGE_HDR_FUNCTION_FW_DOWNLOAD (0x09)
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#define MPT_MESSAGE_HDR_FUNCTION_TARGET_CMD_BUFFER_POST (0x0A)
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#define MPT_MESSAGE_HDR_FUNCTION_TARGET_ASSIST (0x0B)
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#define MPT_MESSAGE_HDR_FUNCTION_TARGET_STATUS_SEND (0x0C)
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#define MPT_MESSAGE_HDR_FUNCTION_TARGET_MODE_ABORT (0x0D)
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#ifdef DEBUG
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync/**
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync * Function names
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsyncstatic const char * const g_apszMPTFunctionNames[] =
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync{
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync "SCSI I/O Request",
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync "SCSI Task Management",
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync "IOC Init",
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync "IOC Facts",
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync "Config",
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync "Port Facts",
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync "Port Enable",
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync "Event Notification",
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync "Event Ack",
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync "Firmware Download"
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync};
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#endif
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync/**
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync * Default reply message.
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync * Send from the device to the guest upon completion of a request.
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync #pragma pack(1)
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsynctypedef struct MptDefaultReplyMessage
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync{
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Function dependent data. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint16_t u16FunctionDependent;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Length of the message in 32bit DWords. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8MessageLength;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Function which completed. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8Function;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Function dependent. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t au8FunctionDependent[3];
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Message flags. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8MessageFlags;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Message context given in the request. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint32_t u32MessageContext;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Function dependent status code. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint16_t u16FunctionDependentStatus;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Status of the IOC. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint16_t u16IOCStatus;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Additional log info. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint32_t u32IOCLogInfo;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync} MptDefaultReplyMessage, *PMptDefaultReplyMessage;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#pragma pack()
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsyncAssertCompileSize(MptDefaultReplyMessage, 20);
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync/**
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync * IO controller init request.
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#pragma pack(1)
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsynctypedef struct MptIOCInitRequest
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync{
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Which system send this init request. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8WhoInit;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Reserved */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8Reserved;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Chain offset in the SG list. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8ChainOffset;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Function to execute. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8Function;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Flags */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8Flags;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Maximum number of devices the driver can handle. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8MaxDevices;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Maximum number of buses the driver can handle. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8MaxBuses;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Message flags. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8MessageFlags;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Message context ID. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint32_t u32MessageContext;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Reply frame size. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint16_t u16ReplyFrameSize;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Reserved */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint16_t u16Reserved;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Upper 32bit part of the 64bit address the message frames are in.
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync * That means all frames must be in the same 4GB segment. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint32_t u32HostMfaHighAddr;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Upper 32bit of the sense buffer. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint32_t u32SenseBufferHighAddr;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync} MptIOCInitRequest, *PMptIOCInitRequest;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#pragma pack()
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsyncAssertCompileSize(MptIOCInitRequest, 24);
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync/**
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync * IO controller init reply.
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#pragma pack(1)
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsynctypedef struct MptIOCInitReply
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync{
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Which subsystem send this init request. */
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync uint8_t u8WhoInit;
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync /** Reserved */
b8bb9c9f6b8ebfd0a7d6df0c0289f9fe80241750vboxsync uint8_t u8Reserved;
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync /** Message length */
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync uint8_t u8MessageLength;
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync /** Function. */
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync uint8_t u8Function;
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync /** Flags */
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync uint8_t u8Flags;
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync /** Maximum number of devices the driver can handle. */
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync uint8_t u8MaxDevices;
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync /** Maximum number of busses the driver can handle. */
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync uint8_t u8MaxBuses;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Message flags. */
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync uint8_t u8MessageFlags;
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync /** Message context ID */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint32_t u32MessageContext;
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync /** Reserved */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint16_t u16Reserved;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** IO controller status. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint16_t u16IOCStatus;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** IO controller log information. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint32_t u32IOCLogInfo;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync} MptIOCInitReply, *PMptIOCInitReply;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#pragma pack()
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsyncAssertCompileSize(MptIOCInitReply, 20);
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync/**
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync * IO controller facts request.
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync */
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync#pragma pack(1)
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsynctypedef struct MptIOCFactsRequest
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync{
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Reserved. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint16_t u16Reserved;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Chain offset in SG list. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8ChainOffset;
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync /** Function number. */
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync uint8_t u8Function;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Reserved */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8Reserved[3];
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Message flags. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8MessageFlags;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Message context ID. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint32_t u32MessageContext;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync} MptIOCFactsRequest, *PMptIOCFactsRequest;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#pragma pack()
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsyncAssertCompileSize(MptIOCFactsRequest, 12);
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync/**
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync * IO controller facts reply.
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#pragma pack(1)
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsynctypedef struct MptIOCFactsReply
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync{
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Message version. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint16_t u16MessageVersion;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Message length. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8MessageLength;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Function number. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8Function;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Reserved */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint16_t u16Reserved1;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** IO controller number */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8IOCNumber;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Message flags. */
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync uint8_t u8MessageFlags;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Message context ID. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint32_t u32MessageContext;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** IO controller exceptions */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint16_t u16IOCExceptions;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** IO controller status. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint16_t u16IOCStatus;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** IO controller log information. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint32_t u32IOCLogInfo;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Maximum chain depth. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8MaxChainDepth;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** The current value of the WhoInit field. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8WhoInit;
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync /** Block size. */
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync uint8_t u8BlockSize;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Flags. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8Flags;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Depth of the reply queue. */
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync uint16_t u16ReplyQueueDepth;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Size of a request frame. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint16_t u16RequestFrameSize;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Reserved */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint16_t u16Reserved2;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Product ID. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint16_t u16ProductID;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Current value of the high 32bit MFA address. */
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync uint32_t u32CurrentHostMFAHighAddr;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Global credits - Number of entries allocated to queues */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint16_t u16GlobalCredits;
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync /** Number of ports on the IO controller */
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync uint8_t u8NumberOfPorts;
b8bb9c9f6b8ebfd0a7d6df0c0289f9fe80241750vboxsync /** Event state. */
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync uint8_t u8EventState;
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync /** Current value of the high 32bit sense buffer address. */
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync uint32_t u32CurrentSenseBufferHighAddr;
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync /** Current reply frame size. */
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync uint16_t u16CurReplyFrameSize;
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync /** Maximum number of devices. */
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync uint8_t u8MaxDevices;
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync /** Maximum number of buses. */
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync uint8_t u8MaxBuses;
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync /** Size of the firmware image. */
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync uint32_t u32FwImageSize;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Reserved. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint32_t u32Reserved;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Firmware version */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint32_t u32FWVersion;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync} MptIOCFactsReply, *PMptIOCFactsReply;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#pragma pack()
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsyncAssertCompileSize(MptIOCFactsReply, 60);
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync/**
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync * Port facts request
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync */
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync#pragma pack(1)
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsynctypedef struct MptPortFactsRequest
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync{
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Reserved */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint16_t u16Reserved1;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Message length. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8MessageLength;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Function number. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8Function;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Reserved */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint16_t u16Reserved2;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Port number to get facts for. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8PortNumber;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Message flags. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8MessageFlags;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Message context ID. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint32_t u32MessageContext;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync} MptPortFactsRequest, *PMptPortFactsRequest;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#pragma pack()
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsyncAssertCompileSize(MptPortFactsRequest, 12);
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync/**
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync * Port facts reply.
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#pragma pack(1)
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsynctypedef struct MptPortFactsReply
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync{
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Reserved. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint16_t u16Reserved1;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Message length. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8MessageLength;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Function number. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8Function;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Reserved */
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync uint16_t u16Reserved2;
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync /** Port number the facts are for. */
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync uint8_t u8PortNumber;
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync /** Message flags. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8MessageFlags;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Message context ID. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint32_t u32MessageContext;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Reserved. */
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync uint16_t u16Reserved3;
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync /** IO controller status. */
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync uint16_t u16IOCStatus;
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync /** IO controller log information. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint32_t u32IOCLogInfo;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Reserved */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8Reserved;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Port type */
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync uint8_t u8PortType;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Maximum number of devices on this port. */
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync uint16_t u16MaxDevices;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** SCSI ID of this port on the attached bus. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint16_t u16PortSCSIID;
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync /** Protocol flags. */
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync uint16_t u16ProtocolFlags;
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync /** Maxmimum number of target command buffers which can be posted to this port at a time. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint16_t u16MaxPostedCmdBuffers;
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync /** Maximum number of target IDs that remain persistent between power/reset cycles. */
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync uint16_t u16MaxPersistentIDs;
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync /** Maximum number of LAN buckets. */
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync uint16_t u16MaxLANBuckets;
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync /** Reserved. */
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync uint16_t u16Reserved4;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Reserved. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint32_t u32Reserved;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync} MptPortFactsReply, *PMptPortFactsReply;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#pragma pack()
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsyncAssertCompileSize(MptPortFactsReply, 40);
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync/**
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync * Port Enable request.
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#pragma pack(1)
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsynctypedef struct MptPortEnableRequest
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync{
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync /** Reserved. */
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync uint16_t u16Reserved1;
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync /** Message length. */
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync uint8_t u8MessageLength;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Function number. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8Function;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Reserved. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint16_t u16Reserved2;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Port number to enable. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8PortNumber;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Message flags. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8MessageFlags;
c10a6f0c7041e4d1ee50ad38425aab9d43c55522vboxsync /** Message context ID. */
c10a6f0c7041e4d1ee50ad38425aab9d43c55522vboxsync uint32_t u32MessageContext;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync} MptPortEnableRequest, *PMptPortEnableRequest;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#pragma pack()
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsyncAssertCompileSize(MptPortEnableRequest, 12);
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync/**
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync * Port enable reply.
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#pragma pack(1)
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsynctypedef struct MptPortEnableReply
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync{
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Reserved. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint16_t u16Reserved1;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Message length. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8MessageLength;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Function number. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8Function;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Reserved */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint16_t u16Reserved2;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Port number which was enabled. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8PortNumber;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Message flags. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8MessageFlags;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Message context ID. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint32_t u32MessageContext;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Reserved. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint16_t u16Reserved3;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** IO controller status */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint16_t u16IOCStatus;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** IO controller log information. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint32_t u32IOCLogInfo;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync} MptPortEnableReply, *PMptPortEnableReply;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#pragma pack()
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsyncAssertCompileSize(MptPortEnableReply, 20);
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync/**
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync * Event notification request.
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#pragma pack(1)
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsynctypedef struct MptEventNotificationRequest
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync{
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Switch - Turns event notification on and off. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8Switch;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Reserved. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8Reserved1;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Chain offset. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8ChainOffset;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Function number. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8Function;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Reserved. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8reserved2[3];
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Message flags. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8MessageFlags;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Message context ID. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint32_t u32MessageContext;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync} MptEventNotificationRequest, *PMptEventNotificationRequest;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#pragma pack()
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsyncAssertCompileSize(MptEventNotificationRequest, 12);
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync/**
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync * Event notification reply.
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#pragma pack(1)
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsynctypedef struct MptEventNotificationReply
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync{
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync /** Event data length. */
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync uint16_t u16EventDataLength;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Message length. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8MessageLength;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Function number. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8Function;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Reserved. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint16_t u16Reserved1;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Ack required. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8AckRequired;
c99b597540585068d22dde4c9f74730305f24097vboxsync /** Message flags. */
c99b597540585068d22dde4c9f74730305f24097vboxsync uint8_t u8MessageFlags;
c99b597540585068d22dde4c9f74730305f24097vboxsync /** Message context ID. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint32_t u32MessageContext;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Reserved. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint16_t u16Reserved2;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** IO controller status. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint16_t u16IOCStatus;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** IO controller log information. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint32_t u32IOCLogInfo;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Notification event. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint32_t u32Event;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Event context. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint32_t u32EventContext;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Event data. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint32_t u32EventData;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync} MptEventNotificationReply, *PMptEventNotificationReply;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#pragma pack()
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsyncAssertCompileSize(MptEventNotificationReply, 32);
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#define MPT_EVENT_EVENT_CHANGE (0x0000000a)
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync/**
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync * SCSI IO Request
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#pragma pack(1)
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsynctypedef struct MptSCSIIORequest
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync{
c99b597540585068d22dde4c9f74730305f24097vboxsync /** Target ID */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8TargetID;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Bus number */
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync uint8_t u8Bus;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Chain offset */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8ChainOffset;
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync /** Function number. */
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync uint8_t u8Function;
b8bb9c9f6b8ebfd0a7d6df0c0289f9fe80241750vboxsync /** CDB length. */
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync uint8_t u8CDBLength;
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync /** Sense buffer length. */
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync uint8_t u8SenseBufferLength;
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync /** Rserved */
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync uint8_t u8Reserved;
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync /** Message flags. */
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync uint8_t u8MessageFlags;
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync /** Message context ID. */
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync uint32_t u32MessageContext;
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync /** LUN */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t au8LUN[8];
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Control values. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint32_t u32Control;
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync /** The CDB. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t au8CDB[16];
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Data length. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint32_t u32DataLength;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Sense buffer low 32bit address. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint32_t u32SenseBufferLowAddress;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync} MptSCSIIORequest, *PMptSCSIIORequest;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#pragma pack()
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsyncAssertCompileSize(MptSCSIIORequest, 48);
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync#define MPT_SCSIIO_REQUEST_CONTROL_TXDIR_GET(x) (((x) & 0x3000000) >> 24)
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync#define MPT_SCSIIO_REQUEST_CONTROL_TXDIR_NONE (0x0)
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync#define MPT_SCSIIO_REQUEST_CONTROL_TXDIR_WRITE (0x1)
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync#define MPT_SCSIIO_REQUEST_CONTROL_TXDIR_READ (0x2)
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync
b8bb9c9f6b8ebfd0a7d6df0c0289f9fe80241750vboxsync/**
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync * SCSI IO error reply.
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync */
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync#pragma pack(1)
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsynctypedef struct MptSCSIIOErrorReply
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync{
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync /** Target ID */
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync uint8_t u8TargetID;
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync /** Bus number */
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync uint8_t u8Bus;
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync /** Message length. */
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync uint8_t u8MessageLength;
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync /** Function number. */
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync uint8_t u8Function;
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync /** CDB length */
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync uint8_t u8CDBLength;
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync /** Sense buffer length */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8SenseBufferLength;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Reserved */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8Reserved;
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync /** Message flags */
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync uint8_t u8MessageFlags;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Message context ID */
bd331bd19103fa6f1c3d34bd69217d09b6fcd25dvboxsync uint32_t u32MessageContext;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** SCSI status. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8SCSIStatus;
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync /** SCSI state */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8SCSIState;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** IO controller status */
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync uint16_t u16IOCStatus;
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync /** IO controller log information */
b8bb9c9f6b8ebfd0a7d6df0c0289f9fe80241750vboxsync uint32_t u32IOCLogInfo;
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync /** Transfer count */
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync uint32_t u32TransferCount;
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync /** Sense count */
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync uint32_t u32SenseCount;
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync /** Response information */
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync uint32_t u32ResponseInfo;
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync} MptSCSIIOErrorReply, *PMptSCSIIOErrorReply;
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync#pragma pack()
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsyncAssertCompileSize(MptSCSIIOErrorReply, 32);
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync#define MPT_SCSI_IO_ERROR_SCSI_STATE_AUTOSENSE_VALID (0x01)
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#define MPT_SCSI_IO_ERROR_SCSI_STATE_TERMINATED (0x08)
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync/**
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync * IOC status codes sepcific to the SCSI I/O error reply.
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#define MPT_SCSI_IO_ERROR_IOCSTATUS_INVALID_BUS (0x0041)
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#define MPT_SCSI_IO_ERROR_IOCSTATUS_INVALID_TARGETID (0x0042)
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#define MPT_SCSI_IO_ERROR_IOCSTATUS_DEVICE_NOT_THERE (0x0043)
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync/**
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync * SCSI task management request.
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#pragma pack(1)
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsynctypedef struct MptSCSITaskManagementRequest
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync{
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Target ID */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8TargetID;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Bus number */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8Bus;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Chain offset */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8ChainOffset;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Function number */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8Function;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Reserved */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8Reserved1;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Task type */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8TaskType;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Reserved */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8Reserved2;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Message flags */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8MessageFlags;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Message context ID */
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync uint32_t u32MessageContext;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** LUN */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t au8LUN[8];
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Reserved */
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync uint8_t auReserved[28];
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Task message context ID. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint32_t u32TaskMessageContext;
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync} MptSCSITaskManagementRequest, *PMptSCSITaskManagementRequest;
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync#pragma pack()
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsyncAssertCompileSize(MptSCSITaskManagementRequest, 52);
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync/**
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync * SCSI task management reply.
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#pragma pack(1)
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsynctypedef struct MptSCSITaskManagementReply
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync{
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Target ID */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8TargetID;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Bus number */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8Bus;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Message length */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8MessageLength;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Function number */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8Function;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Reserved */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8Reserved1;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Task type */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8TaskType;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Reserved */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8Reserved2;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Message flags */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8MessageFlags;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Message context ID */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint32_t u32MessageContext;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Reserved */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint16_t u16Reserved;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** IO controller status */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint16_t u16IOCStatus;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** IO controller log information */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint32_t u32IOCLogInfo;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Termination count */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint32_t u32TerminationCount;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync} MptSCSITaskManagementReply, *PMptSCSITaskManagementReply;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#pragma pack()
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsyncAssertCompileSize(MptSCSITaskManagementReply, 24);
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync/**
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync * Page address for SAS expander page types.
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#pragma pack(1)
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsynctypedef union MptConfigurationPageAddressSASExpander
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync{
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync struct
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync {
c10a6f0c7041e4d1ee50ad38425aab9d43c55522vboxsync uint16_t u16Handle;
c10a6f0c7041e4d1ee50ad38425aab9d43c55522vboxsync uint16_t u16Reserved;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync } Form0And2;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync struct
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync {
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint16_t u16Handle;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8PhyNum;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8Reserved;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync } Form1;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync} MptConfigurationPageAddressSASExpander, *PMptConfigurationPageAddressSASExpander;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#pragma pack()
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync/**
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync * Page address for SAS device page types.
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#pragma pack(1)
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsynctypedef union MptConfigurationPageAddressSASDevice
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync{
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync struct
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync {
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint16_t u16Handle;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint16_t u16Reserved;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync } Form0And2;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync struct
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync {
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8TargetID;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8Bus;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8Reserved;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync } Form1;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync} MptConfigurationPageAddressSASDevice, *PMptConfigurationPageAddressSASDevice;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#pragma pack()
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync/**
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync * Page address for SAS PHY page types.
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#pragma pack(1)
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsynctypedef union MptConfigurationPageAddressSASPHY
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync{
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync struct
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync {
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8PhyNumber;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8Reserved[3];
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync } Form0;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync struct
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync {
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint16_t u16Index;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint16_t u16Reserved;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync } Form1;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync} MptConfigurationPageAddressSASPHY, *PMptConfigurationPageAddressSASPHY;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#pragma pack()
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync/**
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync * Page address for SAS Enclosure page types.
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#pragma pack(1)
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsynctypedef struct MptConfigurationPageAddressSASEnclosure
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync{
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint16_t u16Handle;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint16_t u16Reserved;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync} MptConfigurationPageAddressSASEnclosure, *PMptConfigurationPageAddressSASEnclosure;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#pragma pack()
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync/**
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync * Union of all possible address types.
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#pragma pack(1)
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsynctypedef union MptConfigurationPageAddress
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync{
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** 32bit view. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint32_t u32PageAddress;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync struct
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync {
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Port number to get the configuration page for. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8PortNumber;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Reserved. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8Reserved[3];
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync } MPIPortNumber;
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsync struct
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsync {
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Target ID to get the configuration page for. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8TargetID;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Bus number to get the configuration page for. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8Bus;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Reserved. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8Reserved[2];
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync } BusAndTargetId;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync MptConfigurationPageAddressSASExpander SASExpander;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync MptConfigurationPageAddressSASDevice SASDevice;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync MptConfigurationPageAddressSASPHY SASPHY;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync MptConfigurationPageAddressSASEnclosure SASEnclosure;
750df3fe104e01cadbc3d5bd20243055d283d4e5vboxsync} MptConfigurationPageAddress, *PMptConfigurationPageAddress;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#pragma pack()
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsyncAssertCompileSize(MptConfigurationPageAddress, 4);
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#define MPT_CONFIGURATION_PAGE_ADDRESS_GET_SAS_FORM(x) (((x).u32PageAddress >> 28) & 0x0f)
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync/**
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync * Configuration request
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#pragma pack(1)
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsynctypedef struct MptConfigurationRequest
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync{
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Action code. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8Action;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Reserved. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8Reserved1;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Chain offset. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8ChainOffset;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Function number. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8Function;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Extended page length. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint16_t u16ExtPageLength;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Extended page type */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8ExtPageType;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Message flags. */
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsync uint8_t u8MessageFlags;
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsync /** Message context ID. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint32_t u32MessageContext;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Reserved. */
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync uint8_t u8Reserved2[8];
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync /** Version number of the page. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8PageVersion;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Length of the page in 32bit Dwords. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8PageLength;
ffb50166c9adb4ae583b914d405197035cf890advboxsync /** Page number to access. */
ffb50166c9adb4ae583b914d405197035cf890advboxsync uint8_t u8PageNumber;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Type of the page beeing accessed. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8PageType;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Page type dependent address. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync MptConfigurationPageAddress PageAddress;
750df3fe104e01cadbc3d5bd20243055d283d4e5vboxsync /** Simple SG element describing the buffer. */
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsync MptSGEntrySimple64 SimpleSGElement;
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsync} MptConfigurationRequest, *PMptConfigurationRequest;
750df3fe104e01cadbc3d5bd20243055d283d4e5vboxsync#pragma pack()
750df3fe104e01cadbc3d5bd20243055d283d4e5vboxsyncAssertCompileSize(MptConfigurationRequest, 40);
750df3fe104e01cadbc3d5bd20243055d283d4e5vboxsync
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync/** Possible action codes. */
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync#define MPT_CONFIGURATION_REQUEST_ACTION_HEADER (0x00)
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync#define MPT_CONFIGURATION_REQUEST_ACTION_READ_CURRENT (0x01)
b8bb9c9f6b8ebfd0a7d6df0c0289f9fe80241750vboxsync#define MPT_CONFIGURATION_REQUEST_ACTION_WRITE_CURRENT (0x02)
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync#define MPT_CONFIGURATION_REQUEST_ACTION_READ_DEFAULT (0x03)
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync#define MPT_CONFIGURATION_REQUEST_ACTION_DEFAULT (0x04)
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync#define MPT_CONFIGURATION_REQUEST_ACTION_READ_NVRAM (0x05)
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync#define MPT_CONFIGURATION_REQUEST_ACTION_WRITE_NVRAM (0x06)
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync/** Page type codes. */
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync#define MPT_CONFIGURATION_REQUEST_PAGE_TYPE_IO_UNIT (0x00)
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync#define MPT_CONFIGURATION_REQUEST_PAGE_TYPE_IOC (0x01)
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync#define MPT_CONFIGURATION_REQUEST_PAGE_TYPE_BIOS (0x02)
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync#define MPT_CONFIGURATION_REQUEST_PAGE_TYPE_SCSI_PORT (0x03)
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync#define MPT_CONFIGURATION_REQUEST_PAGE_TYPE_EXTENDED (0x0F)
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync/**
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync * Configuration reply.
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#pragma pack(1)
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsynctypedef struct MptConfigurationReply
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync{
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Action code. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8Action;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Reserved. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8Reserved;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Message length. */
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync uint8_t u8MessageLength;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Function number. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8Function;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Extended page length. */
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync uint16_t u16ExtPageLength;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Extended page type */
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync uint8_t u8ExtPageType;
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync /** Message flags. */
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync uint8_t u8MessageFlags;
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync /** Message context ID. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint32_t u32MessageContext;
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync /** Reserved. */
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync uint16_t u16Reserved;
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync /** I/O controller status. */
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync uint16_t u16IOCStatus;
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync /** I/O controller log information. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint32_t u32IOCLogInfo;
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync /** Version number of the page. */
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync uint8_t u8PageVersion;
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync /** Length of the page in 32bit Dwords. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8PageLength;
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync /** Page number to access. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8PageNumber;
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync /** Type of the page beeing accessed. */
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync uint8_t u8PageType;
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync} MptConfigurationReply, *PMptConfigurationReply;
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync#pragma pack()
b8bb9c9f6b8ebfd0a7d6df0c0289f9fe80241750vboxsyncAssertCompileSize(MptConfigurationReply, 24);
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync
d3b1b01528fe21777281edf167f8deca06f86e39vboxsync/** Additional I/O controller status codes for the configuration reply. */
d3b1b01528fe21777281edf167f8deca06f86e39vboxsync#define MPT_IOCSTATUS_CONFIG_INVALID_ACTION (0x0020)
d3b1b01528fe21777281edf167f8deca06f86e39vboxsync#define MPT_IOCSTATUS_CONFIG_INVALID_TYPE (0x0021)
d3b1b01528fe21777281edf167f8deca06f86e39vboxsync#define MPT_IOCSTATUS_CONFIG_INVALID_PAGE (0x0022)
d3b1b01528fe21777281edf167f8deca06f86e39vboxsync#define MPT_IOCSTATUS_CONFIG_INVALID_DATA (0x0023)
d3b1b01528fe21777281edf167f8deca06f86e39vboxsync#define MPT_IOCSTATUS_CONFIG_NO_DEFAULTS (0x0024)
d3b1b01528fe21777281edf167f8deca06f86e39vboxsync#define MPT_IOCSTATUS_CONFIG_CANT_COMMIT (0x0025)
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync/**
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync * Union of all possible request messages.
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync */
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsynctypedef union MptRequestUnion
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync{
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync MptMessageHdr Header;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync MptIOCInitRequest IOCInit;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync MptIOCFactsRequest IOCFacts;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync MptPortFactsRequest PortFacts;
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync MptPortEnableRequest PortEnable;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync MptEventNotificationRequest EventNotification;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync MptSCSIIORequest SCSIIO;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync MptSCSITaskManagementRequest SCSITaskManagement;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync MptConfigurationRequest Configuration;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync} MptRequestUnion, *PMptRequestUnion;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync/**
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync * Union of all possible reply messages.
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsynctypedef union MptReplyUnion
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync{
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** 16bit view. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint16_t au16Reply[30];
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync MptDefaultReplyMessage Header;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync MptIOCInitReply IOCInit;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync MptIOCFactsReply IOCFacts;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync MptPortFactsReply PortFacts;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync MptPortEnableReply PortEnable;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync MptEventNotificationReply EventNotification;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync MptSCSIIOErrorReply SCSIIOError;
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync MptSCSITaskManagementReply SCSITaskManagement;
0dd3967035b8a02985920baa57f948dc542b9388vboxsync MptConfigurationReply Configuration;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync} MptReplyUnion, *PMptReplyUnion;
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync/**
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync * Configuration Page attributes.
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync */
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync#define MPT_CONFIGURATION_PAGE_ATTRIBUTE_READONLY (0x00)
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync#define MPT_CONFIGURATION_PAGE_ATTRIBUTE_CHANGEABLE (0x10)
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#define MPT_CONFIGURATION_PAGE_ATTRIBUTE_PERSISTENT (0x20)
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync#define MPT_CONFIGURATION_PAGE_ATTRIBUTE_PERSISTENT_READONLY (0x30)
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync#define MPT_CONFIGURATION_PAGE_ATTRIBUTE_GET(u8PageType) ((u8PageType) & 0xf0)
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync/**
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync * Configuration Page types.
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#define MPT_CONFIGURATION_PAGE_TYPE_IO_UNIT (0x00)
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync#define MPT_CONFIGURATION_PAGE_TYPE_IOC (0x01)
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync#define MPT_CONFIGURATION_PAGE_TYPE_BIOS (0x02)
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync#define MPT_CONFIGURATION_PAGE_TYPE_SCSI_SPI_PORT (0x03)
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync#define MPT_CONFIGURATION_PAGE_TYPE_SCSI_SPI_DEVICE (0x04)
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync#define MPT_CONFIGURATION_PAGE_TYPE_MANUFACTURING (0x09)
0dd3967035b8a02985920baa57f948dc542b9388vboxsync#define MPT_CONFIGURATION_PAGE_TYPE_EXTENDED (0x0F)
0dd3967035b8a02985920baa57f948dc542b9388vboxsync
0dd3967035b8a02985920baa57f948dc542b9388vboxsync#define MPT_CONFIGURATION_PAGE_TYPE_GET(u8PageType) ((u8PageType) & 0x0f)
0dd3967035b8a02985920baa57f948dc542b9388vboxsync
0dd3967035b8a02985920baa57f948dc542b9388vboxsync/**
0dd3967035b8a02985920baa57f948dc542b9388vboxsync * Extented page types.
6475559a7e0e52892efbab4fbdedc879f6866109vboxsync */
0dd3967035b8a02985920baa57f948dc542b9388vboxsync#define MPT_CONFIGURATION_PAGE_TYPE_EXTENDED_SASIOUNIT (0x10)
0dd3967035b8a02985920baa57f948dc542b9388vboxsync#define MPT_CONFIGURATION_PAGE_TYPE_EXTENDED_SASEXPANDER (0x11)
0dd3967035b8a02985920baa57f948dc542b9388vboxsync#define MPT_CONFIGURATION_PAGE_TYPE_EXTENDED_SASDEVICE (0x12)
6475559a7e0e52892efbab4fbdedc879f6866109vboxsync#define MPT_CONFIGURATION_PAGE_TYPE_EXTENDED_SASPHYS (0x13)
6475559a7e0e52892efbab4fbdedc879f6866109vboxsync#define MPT_CONFIGURATION_PAGE_TYPE_EXTENDED_LOG (0x14)
6475559a7e0e52892efbab4fbdedc879f6866109vboxsync#define MPT_CONFIGURATION_PAGE_TYPE_EXTENDED_ENCLOSURE (0x15)
6475559a7e0e52892efbab4fbdedc879f6866109vboxsync
6475559a7e0e52892efbab4fbdedc879f6866109vboxsync/**
6475559a7e0e52892efbab4fbdedc879f6866109vboxsync * Configuration Page header - Common to all pages.
0dd3967035b8a02985920baa57f948dc542b9388vboxsync */
0dd3967035b8a02985920baa57f948dc542b9388vboxsync#pragma pack(1)
0dd3967035b8a02985920baa57f948dc542b9388vboxsynctypedef struct MptConfigurationPageHeader
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync{
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync /** Version of the page. */
750df3fe104e01cadbc3d5bd20243055d283d4e5vboxsync uint8_t u8PageVersion;
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync /** The length of the page in 32bit D-Words. */
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync uint8_t u8PageLength;
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync /** Number of the page. */
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync uint8_t u8PageNumber;
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync /** Type of the page. */
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync uint8_t u8PageType;
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync} MptConfigurationPageHeader, *PMptConfigurationPageHeader;
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync#pragma pack()
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsyncAssertCompileSize(MptConfigurationPageHeader, 4);
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync/**
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync * Extended configuration page header - Common to all extended pages.
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync */
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync#pragma pack(1)
0dd3967035b8a02985920baa57f948dc542b9388vboxsynctypedef struct MptExtendedConfigurationPageHeader
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync{
f75c6db919d277952ca03b7acf643e5e3ac96cafvboxsync /** Version of the page. */
02651f98b4320e70a300ba1ebe95270096ebfd4dvboxsync uint8_t u8PageVersion;
0dd3967035b8a02985920baa57f948dc542b9388vboxsync /** Reserved. */
0dd3967035b8a02985920baa57f948dc542b9388vboxsync uint8_t u8Reserved1;
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync /** Number of the page. */
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync uint8_t u8PageNumber;
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync /** Type of the page. */
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync uint8_t u8PageType;
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync /** Extended page length. */
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync uint16_t u16ExtPageLength;
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync /** Extended page type. */
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync uint8_t u8ExtPageType;
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync /** Reserved */
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync uint8_t u8Reserved2;
3c6306a66deef467e3c13483dd6529e1e1c6b822vboxsync} MptExtendedConfigurationPageHeader, *PMptExtendedConfigurationPageHeader;
f75c6db919d277952ca03b7acf643e5e3ac96cafvboxsync#pragma pack()
f75c6db919d277952ca03b7acf643e5e3ac96cafvboxsyncAssertCompileSize(MptExtendedConfigurationPageHeader, 8);
f75c6db919d277952ca03b7acf643e5e3ac96cafvboxsync
f75c6db919d277952ca03b7acf643e5e3ac96cafvboxsync/**
f75c6db919d277952ca03b7acf643e5e3ac96cafvboxsync * Manufacturing page 0. - Readonly.
f75c6db919d277952ca03b7acf643e5e3ac96cafvboxsync */
f75c6db919d277952ca03b7acf643e5e3ac96cafvboxsync#pragma pack(1)
f75c6db919d277952ca03b7acf643e5e3ac96cafvboxsynctypedef struct MptConfigurationPageManufacturing0
f75c6db919d277952ca03b7acf643e5e3ac96cafvboxsync{
f75c6db919d277952ca03b7acf643e5e3ac96cafvboxsync /** Union. */
f75c6db919d277952ca03b7acf643e5e3ac96cafvboxsync union
f75c6db919d277952ca03b7acf643e5e3ac96cafvboxsync {
f75c6db919d277952ca03b7acf643e5e3ac96cafvboxsync /** Byte view. */
f75c6db919d277952ca03b7acf643e5e3ac96cafvboxsync uint8_t abPageData[76];
0c80e8c5ac4249337af378ff41c60033c9fff59fvboxsync /** Field view. */
f75c6db919d277952ca03b7acf643e5e3ac96cafvboxsync struct
805a319b88bdf29b369da48402c58897a5e8b65dvboxsync {
f75c6db919d277952ca03b7acf643e5e3ac96cafvboxsync /** The omnipresent header. */
805a319b88bdf29b369da48402c58897a5e8b65dvboxsync MptConfigurationPageHeader Header;
805a319b88bdf29b369da48402c58897a5e8b65dvboxsync /** Name of the chip. */
0c80e8c5ac4249337af378ff41c60033c9fff59fvboxsync uint8_t abChipName[16];
805a319b88bdf29b369da48402c58897a5e8b65dvboxsync /** Chip revision. */
805a319b88bdf29b369da48402c58897a5e8b65dvboxsync uint8_t abChipRevision[8];
805a319b88bdf29b369da48402c58897a5e8b65dvboxsync /** Board name. */
805a319b88bdf29b369da48402c58897a5e8b65dvboxsync uint8_t abBoardName[16];
805a319b88bdf29b369da48402c58897a5e8b65dvboxsync /** Board assembly. */
805a319b88bdf29b369da48402c58897a5e8b65dvboxsync uint8_t abBoardAssembly[16];
805a319b88bdf29b369da48402c58897a5e8b65dvboxsync /** Board tracer number. */
805a319b88bdf29b369da48402c58897a5e8b65dvboxsync uint8_t abBoardTracerNumber[16];
805a319b88bdf29b369da48402c58897a5e8b65dvboxsync } fields;
805a319b88bdf29b369da48402c58897a5e8b65dvboxsync } u;
0c80e8c5ac4249337af378ff41c60033c9fff59fvboxsync} MptConfigurationPageManufacturing0, *PMptConfigurationPageManufacturing0;
f75c6db919d277952ca03b7acf643e5e3ac96cafvboxsync#pragma pack()
805a319b88bdf29b369da48402c58897a5e8b65dvboxsyncAssertCompileSize(MptConfigurationPageManufacturing0, 76);
805a319b88bdf29b369da48402c58897a5e8b65dvboxsync
805a319b88bdf29b369da48402c58897a5e8b65dvboxsync/**
805a319b88bdf29b369da48402c58897a5e8b65dvboxsync * Manufacturing page 1. - Readonly Persistent.
805a319b88bdf29b369da48402c58897a5e8b65dvboxsync */
805a319b88bdf29b369da48402c58897a5e8b65dvboxsync#pragma pack(1)
805a319b88bdf29b369da48402c58897a5e8b65dvboxsynctypedef struct MptConfigurationPageManufacturing1
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync{
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync /** Union */
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync union
3c6306a66deef467e3c13483dd6529e1e1c6b822vboxsync {
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync /** Byte view */
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync uint8_t abPageData[260];
3c6306a66deef467e3c13483dd6529e1e1c6b822vboxsync /** Field view */
750df3fe104e01cadbc3d5bd20243055d283d4e5vboxsync struct
750df3fe104e01cadbc3d5bd20243055d283d4e5vboxsync {
805a319b88bdf29b369da48402c58897a5e8b65dvboxsync /** The omnipresent header. */
805a319b88bdf29b369da48402c58897a5e8b65dvboxsync MptConfigurationPageHeader Header;
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync /** VPD info - don't know what belongs here so all zero. */
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync uint8_t abVPDInfo[256];
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync } fields;
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync } u;
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync} MptConfigurationPageManufacturing1, *PMptConfigurationPageManufacturing1;
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync#pragma pack()
750df3fe104e01cadbc3d5bd20243055d283d4e5vboxsyncAssertCompileSize(MptConfigurationPageManufacturing1, 260);
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync/**
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync * Manufacturing page 2. - Readonly.
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#pragma pack(1)
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsynctypedef struct MptConfigurationPageManufacturing2
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync{
750df3fe104e01cadbc3d5bd20243055d283d4e5vboxsync /** Union. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync union
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync {
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Byte view. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t abPageData[8];
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Field view. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync struct
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync {
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** The omnipresent header. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync MptConfigurationPageHeader Header;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** PCI Device ID. */
750df3fe104e01cadbc3d5bd20243055d283d4e5vboxsync uint16_t u16PCIDeviceID;
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync /** PCI Revision ID. */
3c6306a66deef467e3c13483dd6529e1e1c6b822vboxsync uint8_t u8PCIRevisionID;
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync /** Reserved. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t u8Reserved;
750df3fe104e01cadbc3d5bd20243055d283d4e5vboxsync /** Hardware specific settings... */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync } fields;
750df3fe104e01cadbc3d5bd20243055d283d4e5vboxsync } u;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync} MptConfigurationPageManufacturing2, *PMptConfigurationPageManufacturing2;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#pragma pack()
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsyncAssertCompileSize(MptConfigurationPageManufacturing2, 8);
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync/**
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync * Manufacturing page 3. - Readonly.
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync */
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync#pragma pack(1)
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsynctypedef struct MptConfigurationPageManufacturing3
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync{
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync /** Union. */
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync union
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync {
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync /** Byte view. */
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync uint8_t abPageData[8];
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync /** Field view. */
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync struct
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync {
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync /** The omnipresent header. */
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync MptConfigurationPageHeader Header;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** PCI Device ID. */
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync uint16_t u16PCIDeviceID;
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync /** PCI Revision ID. */
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync uint8_t u8PCIRevisionID;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Reserved. */
3c6306a66deef467e3c13483dd6529e1e1c6b822vboxsync uint8_t u8Reserved;
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync /** Chip specific settings... */
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync } fields;
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync } u;
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync} MptConfigurationPageManufacturing3, *PMptConfigurationPageManufacturing3;
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync#pragma pack()
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsyncAssertCompileSize(MptConfigurationPageManufacturing3, 8);
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync/**
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync * Manufacturing page 4. - Readonly.
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync */
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync#pragma pack(1)
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsynctypedef struct MptConfigurationPageManufacturing4
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync{
750df3fe104e01cadbc3d5bd20243055d283d4e5vboxsync /** Union. */
ffb50166c9adb4ae583b914d405197035cf890advboxsync union
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync {
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync /** Byte view. */
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync uint8_t abPageData[84];
ffb50166c9adb4ae583b914d405197035cf890advboxsync /** Field view. */
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync struct
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync {
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync /** The omnipresent header. */
b8bb9c9f6b8ebfd0a7d6df0c0289f9fe80241750vboxsync MptConfigurationPageHeader Header;
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsync /** Reserved. */
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsync uint32_t u32Reserved;
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync /** InfoOffset0. */
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync uint8_t u8InfoOffset0;
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync /** Info size. */
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsync uint8_t u8InfoSize0;
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsync /** InfoOffset1. */
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsync uint8_t u8InfoOffset1;
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync /** Info size. */
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync uint8_t u8InfoSize1;
5050fc8de0b121eab1b738d7c1007cde4903284dvboxsync /** Size of the inquiry data. */
ffb50166c9adb4ae583b914d405197035cf890advboxsync uint8_t u8InquirySize;
ffb50166c9adb4ae583b914d405197035cf890advboxsync /** Reserved. */
ffb50166c9adb4ae583b914d405197035cf890advboxsync uint8_t abReserved[3];
ffb50166c9adb4ae583b914d405197035cf890advboxsync /** Inquiry data. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t abInquiryData[56];
ffb50166c9adb4ae583b914d405197035cf890advboxsync /** IS volume settings. */
ffb50166c9adb4ae583b914d405197035cf890advboxsync uint32_t u32ISVolumeSettings;
3c6306a66deef467e3c13483dd6529e1e1c6b822vboxsync /** IME volume settings. */
750df3fe104e01cadbc3d5bd20243055d283d4e5vboxsync uint32_t u32IMEVolumeSettings;
ffb50166c9adb4ae583b914d405197035cf890advboxsync /** IM volume settings. */
ffb50166c9adb4ae583b914d405197035cf890advboxsync uint32_t u32IMVolumeSettings;
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync } fields;
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync } u;
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync} MptConfigurationPageManufacturing4, *PMptConfigurationPageManufacturing4;
f75c6db919d277952ca03b7acf643e5e3ac96cafvboxsync#pragma pack()
f75c6db919d277952ca03b7acf643e5e3ac96cafvboxsyncAssertCompileSize(MptConfigurationPageManufacturing4, 84);
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync/**
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync * Manufacturing page 5 - Readonly.
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync */
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync#pragma pack(1)
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsynctypedef struct MptConfigurationPageManufacturing5
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync{
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync /** Union. */
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync union
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync {
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync /** Byte view. */
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync uint8_t abPageData[88];
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync /** Field view. */
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync struct
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync {
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync /** The omnipresent header. */
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync MptConfigurationPageHeader Header;
0dd3967035b8a02985920baa57f948dc542b9388vboxsync /** Base WWID. */
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync uint64_t u64BaseWWID;
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync /** Flags */
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync uint8_t u8Flags;
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync /** Number of ForceWWID fields in this page. */
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync uint8_t u8NumForceWWID;
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync /** Reserved */
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync uint16_t u16Reserved;
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync /** Reserved */
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync uint32_t au32Reserved[2];
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync /** ForceWWID entries Maximum of 8 because the SAS controller doesn't has more */
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync uint64_t au64ForceWWID[8];
0dd3967035b8a02985920baa57f948dc542b9388vboxsync } fields;
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync } u;
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync} MptConfigurationPageManufacturing5, *PMptConfigurationPageManufacturing5;
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync#pragma pack()
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsyncAssertCompileSize(MptConfigurationPageManufacturing5, 24+64);
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync/**
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync * Manufacturing page 6 - Readonly.
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync */
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync#pragma pack(1)
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsynctypedef struct MptConfigurationPageManufacturing6
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync{
ffb50166c9adb4ae583b914d405197035cf890advboxsync /** Union. */
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync union
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync {
ffb50166c9adb4ae583b914d405197035cf890advboxsync /** Byte view. */
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync uint8_t abPageData[4];
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync /** Field view. */
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync struct
ffb50166c9adb4ae583b914d405197035cf890advboxsync {
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync /** The omnipresent header. */
b4d7b4dbcc45b8bde7502aa129440d92d7ffd038vboxsync MptConfigurationPageHeader Header;
b4d7b4dbcc45b8bde7502aa129440d92d7ffd038vboxsync /** Product specific data - 0 for now */
b4d7b4dbcc45b8bde7502aa129440d92d7ffd038vboxsync } fields;
ffb50166c9adb4ae583b914d405197035cf890advboxsync } u;
ffb50166c9adb4ae583b914d405197035cf890advboxsync} MptConfigurationPageManufacturing6, *PMptConfigurationPageManufacturing6;
ffb50166c9adb4ae583b914d405197035cf890advboxsync#pragma pack()
ffb50166c9adb4ae583b914d405197035cf890advboxsyncAssertCompileSize(MptConfigurationPageManufacturing6, 4);
ffb50166c9adb4ae583b914d405197035cf890advboxsync
ffb50166c9adb4ae583b914d405197035cf890advboxsync/**
ffb50166c9adb4ae583b914d405197035cf890advboxsync * Manufacutring page 7 - PHY element.
ffb50166c9adb4ae583b914d405197035cf890advboxsync */
ffb50166c9adb4ae583b914d405197035cf890advboxsync#pragma pack(1)
ffb50166c9adb4ae583b914d405197035cf890advboxsynctypedef struct MptConfigurationPageManufacturing7PHY
ffb50166c9adb4ae583b914d405197035cf890advboxsync{
ffb50166c9adb4ae583b914d405197035cf890advboxsync /** Pinout */
ffb50166c9adb4ae583b914d405197035cf890advboxsync uint32_t u32Pinout;
ffb50166c9adb4ae583b914d405197035cf890advboxsync /** Connector name */
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync uint8_t szConnector[16];
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync /** Location */
ffb50166c9adb4ae583b914d405197035cf890advboxsync uint8_t u8Location;
ffb50166c9adb4ae583b914d405197035cf890advboxsync /** reserved */
ffb50166c9adb4ae583b914d405197035cf890advboxsync uint8_t u8Reserved;
ffb50166c9adb4ae583b914d405197035cf890advboxsync /** Slot */
ffb50166c9adb4ae583b914d405197035cf890advboxsync uint16_t u16Slot;
ffb50166c9adb4ae583b914d405197035cf890advboxsync} MptConfigurationPageManufacturing7PHY, *PMptConfigurationPageManufacturing7PHY;
ffb50166c9adb4ae583b914d405197035cf890advboxsync#pragma pack()
ffb50166c9adb4ae583b914d405197035cf890advboxsyncAssertCompileSize(MptConfigurationPageManufacturing7PHY, 24);
ffb50166c9adb4ae583b914d405197035cf890advboxsync
3c6306a66deef467e3c13483dd6529e1e1c6b822vboxsync/**
ffb50166c9adb4ae583b914d405197035cf890advboxsync * Manufacturing page 7 - Readonly.
750df3fe104e01cadbc3d5bd20243055d283d4e5vboxsync */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#pragma pack(1)
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsynctypedef struct MptConfigurationPageManufacturing7
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync{
750df3fe104e01cadbc3d5bd20243055d283d4e5vboxsync /** Union. */
ffb50166c9adb4ae583b914d405197035cf890advboxsync union
ffb50166c9adb4ae583b914d405197035cf890advboxsync {
ffb50166c9adb4ae583b914d405197035cf890advboxsync /** Byte view. */
ffb50166c9adb4ae583b914d405197035cf890advboxsync uint8_t abPageData[1];
ffb50166c9adb4ae583b914d405197035cf890advboxsync /** Field view. */
ffb50166c9adb4ae583b914d405197035cf890advboxsync struct
ffb50166c9adb4ae583b914d405197035cf890advboxsync {
750df3fe104e01cadbc3d5bd20243055d283d4e5vboxsync /** The omnipresent header. */
750df3fe104e01cadbc3d5bd20243055d283d4e5vboxsync MptConfigurationPageHeader Header;
750df3fe104e01cadbc3d5bd20243055d283d4e5vboxsync /** Reserved */
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync uint32_t au32Reserved[2];
750df3fe104e01cadbc3d5bd20243055d283d4e5vboxsync /** Flags */
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync uint32_t u32Flags;
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync /** Enclosure name */
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync uint8_t szEnclosureName[16];
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync /** Nummber of PHYs */
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync uint8_t u8NumPhys;
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync /** Reserved */
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync uint8_t au8Reserved[3];
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync /** PHY list for the SAS controller - variable depending on the number of ports */
b4d7b4dbcc45b8bde7502aa129440d92d7ffd038vboxsync MptConfigurationPageManufacturing7PHY aPHY[1];
b4d7b4dbcc45b8bde7502aa129440d92d7ffd038vboxsync } fields;
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync } u;
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync} MptConfigurationPageManufacturing7, *PMptConfigurationPageManufacturing7;
750df3fe104e01cadbc3d5bd20243055d283d4e5vboxsync#pragma pack()
ffb50166c9adb4ae583b914d405197035cf890advboxsyncAssertCompileSize(MptConfigurationPageManufacturing7, 36+sizeof(MptConfigurationPageManufacturing7PHY));
ffb50166c9adb4ae583b914d405197035cf890advboxsync
ffb50166c9adb4ae583b914d405197035cf890advboxsync#define LSILOGICSCSI_MANUFACTURING7_GET_SIZE(ports) (sizeof(MptConfigurationPageManufacturing7) + ((ports) - 1) * sizeof(MptConfigurationPageManufacturing7PHY))
ffb50166c9adb4ae583b914d405197035cf890advboxsync
ffb50166c9adb4ae583b914d405197035cf890advboxsync/** Flags for the flags field */
ffb50166c9adb4ae583b914d405197035cf890advboxsync#define LSILOGICSCSI_MANUFACTURING7_FLAGS_USE_PROVIDED_INFORMATION RT_BIT(0)
750df3fe104e01cadbc3d5bd20243055d283d4e5vboxsync
750df3fe104e01cadbc3d5bd20243055d283d4e5vboxsync/** Flags for the pinout field */
750df3fe104e01cadbc3d5bd20243055d283d4e5vboxsync#define LSILOGICSCSI_MANUFACTURING7_PINOUT_UNKNOWN RT_BIT(0)
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#define LSILOGICSCSI_MANUFACTURING7_PINOUT_SFF8482 RT_BIT(1)
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync#define LSILOGICSCSI_MANUFACTURING7_PINOUT_SFF8470_LANE1 RT_BIT(8)
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync#define LSILOGICSCSI_MANUFACTURING7_PINOUT_SFF8470_LANE2 RT_BIT(9)
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync#define LSILOGICSCSI_MANUFACTURING7_PINOUT_SFF8470_LANE3 RT_BIT(10)
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#define LSILOGICSCSI_MANUFACTURING7_PINOUT_SFF8470_LANE4 RT_BIT(11)
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#define LSILOGICSCSI_MANUFACTURING7_PINOUT_SFF8484_LANE1 RT_BIT(16)
ffb50166c9adb4ae583b914d405197035cf890advboxsync#define LSILOGICSCSI_MANUFACTURING7_PINOUT_SFF8484_LANE2 RT_BIT(17)
ffb50166c9adb4ae583b914d405197035cf890advboxsync#define LSILOGICSCSI_MANUFACTURING7_PINOUT_SFF8484_LANE3 RT_BIT(18)
ffb50166c9adb4ae583b914d405197035cf890advboxsync#define LSILOGICSCSI_MANUFACTURING7_PINOUT_SFF8484_LANE4 RT_BIT(19)
ffb50166c9adb4ae583b914d405197035cf890advboxsync
ffb50166c9adb4ae583b914d405197035cf890advboxsync/** Flags for the location field */
ffb50166c9adb4ae583b914d405197035cf890advboxsync#define LSILOGICSCSI_MANUFACTURING7_LOCATION_UNKNOWN 0x01
ffb50166c9adb4ae583b914d405197035cf890advboxsync#define LSILOGICSCSI_MANUFACTURING7_LOCATION_INTERNAL 0x02
750df3fe104e01cadbc3d5bd20243055d283d4e5vboxsync#define LSILOGICSCSI_MANUFACTURING7_LOCATION_EXTERNAL 0x04
750df3fe104e01cadbc3d5bd20243055d283d4e5vboxsync#define LSILOGICSCSI_MANUFACTURING7_LOCATION_SWITCHABLE 0x08
750df3fe104e01cadbc3d5bd20243055d283d4e5vboxsync#define LSILOGICSCSI_MANUFACTURING7_LOCATION_AUTO 0x10
ffb50166c9adb4ae583b914d405197035cf890advboxsync#define LSILOGICSCSI_MANUFACTURING7_LOCATION_NOT_PRESENT 0x20
750df3fe104e01cadbc3d5bd20243055d283d4e5vboxsync#define LSILOGICSCSI_MANUFACTURING7_LOCATION_NOT_CONNECTED 0x80
c89333d3e41e439ed9e74768000edc399d3e72e6vboxsync
ffb50166c9adb4ae583b914d405197035cf890advboxsync/**
ffb50166c9adb4ae583b914d405197035cf890advboxsync * Manufacturing page 8 - Readonly.
750df3fe104e01cadbc3d5bd20243055d283d4e5vboxsync */
ffb50166c9adb4ae583b914d405197035cf890advboxsync#pragma pack(1)
ffb50166c9adb4ae583b914d405197035cf890advboxsynctypedef struct MptConfigurationPageManufacturing8
ffb50166c9adb4ae583b914d405197035cf890advboxsync{
ffb50166c9adb4ae583b914d405197035cf890advboxsync /** Union. */
ffb50166c9adb4ae583b914d405197035cf890advboxsync union
ffb50166c9adb4ae583b914d405197035cf890advboxsync {
750df3fe104e01cadbc3d5bd20243055d283d4e5vboxsync /** Byte view. */
750df3fe104e01cadbc3d5bd20243055d283d4e5vboxsync uint8_t abPageData[4];
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Field view. */
750df3fe104e01cadbc3d5bd20243055d283d4e5vboxsync struct
750df3fe104e01cadbc3d5bd20243055d283d4e5vboxsync {
ffb50166c9adb4ae583b914d405197035cf890advboxsync /** The omnipresent header. */
ffb50166c9adb4ae583b914d405197035cf890advboxsync MptConfigurationPageHeader Header;
ffb50166c9adb4ae583b914d405197035cf890advboxsync /** Product specific information */
ffb50166c9adb4ae583b914d405197035cf890advboxsync } fields;
6475559a7e0e52892efbab4fbdedc879f6866109vboxsync } u;
6475559a7e0e52892efbab4fbdedc879f6866109vboxsync} MptConfigurationPageManufacturing8, *PMptConfigurationPageManufacturing8;
6475559a7e0e52892efbab4fbdedc879f6866109vboxsync#pragma pack()
6475559a7e0e52892efbab4fbdedc879f6866109vboxsyncAssertCompileSize(MptConfigurationPageManufacturing8, 4);
6475559a7e0e52892efbab4fbdedc879f6866109vboxsync
6475559a7e0e52892efbab4fbdedc879f6866109vboxsync/**
6475559a7e0e52892efbab4fbdedc879f6866109vboxsync * Manufacturing page 9 - Readonly.
6475559a7e0e52892efbab4fbdedc879f6866109vboxsync */
6475559a7e0e52892efbab4fbdedc879f6866109vboxsync#pragma pack(1)
6475559a7e0e52892efbab4fbdedc879f6866109vboxsynctypedef struct MptConfigurationPageManufacturing9
6475559a7e0e52892efbab4fbdedc879f6866109vboxsync{
6475559a7e0e52892efbab4fbdedc879f6866109vboxsync /** Union. */
6475559a7e0e52892efbab4fbdedc879f6866109vboxsync union
6475559a7e0e52892efbab4fbdedc879f6866109vboxsync {
6475559a7e0e52892efbab4fbdedc879f6866109vboxsync /** Byte view. */
6475559a7e0e52892efbab4fbdedc879f6866109vboxsync uint8_t abPageData[4];
ffb50166c9adb4ae583b914d405197035cf890advboxsync /** Field view. */
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsync struct
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsync {
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsync /** The omnipresent header. */
ffb50166c9adb4ae583b914d405197035cf890advboxsync MptConfigurationPageHeader Header;
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsync /** Product specific information */
ffb50166c9adb4ae583b914d405197035cf890advboxsync } fields;
ffb50166c9adb4ae583b914d405197035cf890advboxsync } u;
6475559a7e0e52892efbab4fbdedc879f6866109vboxsync} MptConfigurationPageManufacturing9, *PMptConfigurationPageManufacturing9;
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsync#pragma pack()
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsyncAssertCompileSize(MptConfigurationPageManufacturing9, 4);
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync
6475559a7e0e52892efbab4fbdedc879f6866109vboxsync/**
6475559a7e0e52892efbab4fbdedc879f6866109vboxsync * Manufacturing page 10 - Readonly.
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#pragma pack(1)
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsynctypedef struct MptConfigurationPageManufacturing10
462e60a19d02a99b2b1a5c08dff74bb0808d707cvboxsync{
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Union. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync union
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync {
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Byte view. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t abPageData[4];
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Field view. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync struct
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync {
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** The omnipresent header. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync MptConfigurationPageHeader Header;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Product specific information */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync } fields;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync } u;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync} MptConfigurationPageManufacturing10, *PMptConfigurationPageManufacturing10;
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#pragma pack()
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsyncAssertCompileSize(MptConfigurationPageManufacturing10, 4);
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync/**
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync * IO Unit page 0. - Readonly.
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync#pragma pack(1)
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsynctypedef struct MptConfigurationPageIOUnit0
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync{
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Union. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync union
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync {
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Byte view. */
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync uint8_t abPageData[12];
553a2f0d8ef91a6dad8de4eef206ff093af53a5dvboxsync /** Field view. */
struct
{
/** The omnipresent header. */
MptConfigurationPageHeader Header;
/** A unique identifier. */
uint64_t u64UniqueIdentifier;
} fields;
} u;
} MptConfigurationPageIOUnit0, *PMptConfigurationPageIOUnit0;
#pragma pack()
AssertCompileSize(MptConfigurationPageIOUnit0, 12);
/**
* IO Unit page 1. - Read/Write.
*/
#pragma pack(1)
typedef struct MptConfigurationPageIOUnit1
{
/** Union. */
union
{
/** Byte view. */
uint8_t abPageData[8];
/** Field view. */
struct
{
/** The omnipresent header. */
MptConfigurationPageHeader Header;
/** Flag whether this is a single function PCI device. */
unsigned fSingleFunction: 1;
/** Flag whether all possible paths to a device are mapped. */
unsigned fAllPathsMapped: 1;
/** Reserved. */
unsigned u4Reserved: 4;
/** Flag whether all RAID functionality is disabled. */
unsigned fIntegratedRAIDDisabled: 1;
/** Flag whether 32bit PCI accesses are forced. */
unsigned f32BitAccessForced: 1;
/** Reserved. */
unsigned abReserved: 24;
} fields;
} u;
} MptConfigurationPageIOUnit1, *PMptConfigurationPageIOUnit1;
#pragma pack()
AssertCompileSize(MptConfigurationPageIOUnit1, 8);
/**
* Adapter Ordering.
*/
#pragma pack(1)
typedef struct MptConfigurationPageIOUnit2AdapterOrdering
{
/** PCI bus number. */
unsigned u8PCIBusNumber: 8;
/** PCI device and function number. */
unsigned u8PCIDevFn: 8;
/** Flag whether the adapter is embedded. */
unsigned fAdapterEmbedded: 1;
/** Flag whether the adapter is enabled. */
unsigned fAdapterEnabled: 1;
/** Reserved. */
unsigned u6Reserved: 6;
/** Reserved. */
unsigned u8Reserved: 8;
} MptConfigurationPageIOUnit2AdapterOrdering, *PMptConfigurationPageIOUnit2AdapterOrdering;
#pragma pack()
AssertCompileSize(MptConfigurationPageIOUnit2AdapterOrdering, 4);
/**
* IO Unit page 2. - Read/Write.
*/
#pragma pack(1)
typedef struct MptConfigurationPageIOUnit2
{
/** Union. */
union
{
/** Byte view. */
uint8_t abPageData[28];
/** Field view. */
struct
{
/** The omnipresent header. */
MptConfigurationPageHeader Header;
/** Reserved. */
unsigned fReserved: 1;
/** Flag whether Pause on error is enabled. */
unsigned fPauseOnError: 1;
/** Flag whether verbose mode is enabled. */
unsigned fVerboseModeEnabled: 1;
/** Set to disable color video. */
unsigned fDisableColorVideo: 1;
/** Flag whether int 40h is hooked. */
unsigned fNotHookInt40h: 1;
/** Reserved. */
unsigned u3Reserved: 3;
/** Reserved. */
unsigned abReserved: 24;
/** BIOS version. */
uint32_t u32BIOSVersion;
/** Adapter ordering. */
MptConfigurationPageIOUnit2AdapterOrdering aAdapterOrder[4];
} fields;
} u;
} MptConfigurationPageIOUnit2, *PMptConfigurationPageIOUnit2;
#pragma pack()
AssertCompileSize(MptConfigurationPageIOUnit2, 28);
/*
* IO Unit page 3. - Read/Write.
*/
#pragma pack(1)
typedef struct MptConfigurationPageIOUnit3
{
/** Union. */
union
{
/** Byte view. */
uint8_t abPageData[8];
/** Field view. */
struct
{
/** The omnipresent header. */
MptConfigurationPageHeader Header;
/** Number of GPIO values. */
uint8_t u8GPIOCount;
/** Reserved. */
uint8_t abReserved[3];
} fields;
} u;
} MptConfigurationPageIOUnit3, *PMptConfigurationPageIOUnit3;
#pragma pack()
AssertCompileSize(MptConfigurationPageIOUnit3, 8);
/*
* IO Unit page 4. - Readonly for everyone except the BIOS.
*/
#pragma pack(1)
typedef struct MptConfigurationPageIOUnit4
{
/** Union. */
union
{
/** Byte view. */
uint8_t abPageData[20];
/** Field view. */
struct
{
/** The omnipresent header. */
MptConfigurationPageHeader Header;
/** Reserved */
uint32_t u32Reserved;
/** SG entry describing the Firmware location. */
MptSGEntrySimple64 FWImageSGE;
} fields;
} u;
} MptConfigurationPageIOUnit4, *PMptConfigurationPageIOUnit4;
#pragma pack()
AssertCompileSize(MptConfigurationPageIOUnit4, 20);
/**
* IOC page 0. - Readonly
*/
#pragma pack(1)
typedef struct MptConfigurationPageIOC0
{
/** Union. */
union
{
/** Byte view. */
uint8_t abPageData[28];
/** Field view. */
struct
{
/** The omnipresent header. */
MptConfigurationPageHeader Header;
/** Total ammount of NV memory in bytes. */
uint32_t u32TotalNVStore;
/** Number of free bytes in the NV store. */
uint32_t u32FreeNVStore;
/** PCI vendor ID. */
uint16_t u16VendorId;
/** PCI device ID. */
uint16_t u16DeviceId;
/** PCI revision ID. */
uint8_t u8RevisionId;
/** Reserved. */
uint8_t abReserved[3];
/** PCI class code. */
uint32_t u32ClassCode;
/** Subsystem vendor Id. */
uint16_t u16SubsystemVendorId;
/** Subsystem Id. */
uint16_t u16SubsystemId;
} fields;
} u;
} MptConfigurationPageIOC0, *PMptConfigurationPageIOC0;
#pragma pack()
AssertCompileSize(MptConfigurationPageIOC0, 28);
/**
* IOC page 1. - Read/Write
*/
#pragma pack(1)
typedef struct MptConfigurationPageIOC1
{
/** Union. */
union
{
/** Byte view. */
uint8_t abPageData[16];
/** Field view. */
struct
{
/** The omnipresent header. */
MptConfigurationPageHeader Header;
/** Flag whether reply coalescing is enabled. */
unsigned fReplyCoalescingEnabled: 1;
/** Reserved. */
unsigned u31Reserved: 31;
/** Coalescing Timeout in microseconds. */
unsigned u32CoalescingTimeout: 32;
/** Coalescing depth. */
unsigned u8CoalescingDepth: 8;
/** Reserved. */
unsigned u8Reserved0: 8;
unsigned u8Reserved1: 8;
unsigned u8Reserved2: 8;
} fields;
} u;
} MptConfigurationPageIOC1, *PMptConfigurationPageIOC1;
#pragma pack()
AssertCompileSize(MptConfigurationPageIOC1, 16);
/**
* IOC page 2. - Readonly
*/
#pragma pack(1)
typedef struct MptConfigurationPageIOC2
{
/** Union. */
union
{
/** Byte view. */
uint8_t abPageData[12];
/** Field view. */
struct
{
/** The omnipresent header. */
MptConfigurationPageHeader Header;
/** Flag whether striping is supported. */
unsigned fStripingSupported: 1;
/** Flag whether enhanced mirroring is supported. */
unsigned fEnhancedMirroringSupported: 1;
/** Flag whether mirroring is supported. */
unsigned fMirroringSupported: 1;
/** Reserved. */
unsigned u26Reserved: 26;
/** Flag whether SES is supported. */
unsigned fSESSupported: 1;
/** Flag whether SAF-TE is supported. */
unsigned fSAFTESupported: 1;
/** Flag whether cross channel volumes are supported. */
unsigned fCrossChannelVolumesSupported: 1;
/** Number of active integrated RAID volumes. */
unsigned u8NumActiveVolumes: 8;
/** Maximum number of integrated RAID volumes supported. */
unsigned u8MaxVolumes: 8;
/** Number of active integrated RAID physical disks. */
unsigned u8NumActivePhysDisks: 8;
/** Maximum number of integrated RAID physical disks supported. */
unsigned u8MaxPhysDisks: 8;
/** RAID volumes... - not supported. */
} fields;
} u;
} MptConfigurationPageIOC2, *PMptConfigurationPageIOC2;
#pragma pack()
AssertCompileSize(MptConfigurationPageIOC2, 12);
/**
* IOC page 3. - Readonly
*/
#pragma pack(1)
typedef struct MptConfigurationPageIOC3
{
/** Union. */
union
{
/** Byte view. */
uint8_t abPageData[8];
/** Field view. */
struct
{
/** The omnipresent header. */
MptConfigurationPageHeader Header;
/** Number of active integrated RAID physical disks. */
uint8_t u8NumPhysDisks;
/** Reserved. */
uint8_t abReserved[3];
} fields;
} u;
} MptConfigurationPageIOC3, *PMptConfigurationPageIOC3;
#pragma pack()
AssertCompileSize(MptConfigurationPageIOC3, 8);
/**
* IOC page 4. - Read/Write
*/
#pragma pack(1)
typedef struct MptConfigurationPageIOC4
{
/** Union. */
union
{
/** Byte view. */
uint8_t abPageData[8];
/** Field view. */
struct
{
/** The omnipresent header. */
MptConfigurationPageHeader Header;
/** Number of SEP entries in this page. */
uint8_t u8ActiveSEP;
/** Maximum number of SEp entries supported. */
uint8_t u8MaxSEP;
/** Reserved. */
uint16_t u16Reserved;
/** SEP entries... - not supported. */
} fields;
} u;
} MptConfigurationPageIOC4, *PMptConfigurationPageIOC4;
#pragma pack()
AssertCompileSize(MptConfigurationPageIOC4, 8);
/**
* IOC page 6. - Read/Write
*/
#pragma pack(1)
typedef struct MptConfigurationPageIOC6
{
/** Union. */
union
{
/** Byte view. */
uint8_t abPageData[60];
/** Field view. */
struct
{
/** The omnipresent header. */
MptConfigurationPageHeader Header;
uint32_t u32CapabilitiesFlags;
uint8_t u8MaxDrivesIS;
uint8_t u8MaxDrivesIM;
uint8_t u8MaxDrivesIME;
uint8_t u8Reserved1;
uint8_t u8MinDrivesIS;
uint8_t u8MinDrivesIM;
uint8_t u8MinDrivesIME;
uint8_t u8Reserved2;
uint8_t u8MaxGlobalHotSpares;
uint8_t u8Reserved3;
uint16_t u16Reserved4;
uint32_t u32Reserved5;
uint32_t u32SupportedStripeSizeMapIS;
uint32_t u32SupportedStripeSizeMapIME;
uint32_t u32Reserved6;
uint8_t u8MetadataSize;
uint8_t u8Reserved7;
uint16_t u16Reserved8;
uint16_t u16MaxBadBlockTableEntries;
uint16_t u16Reserved9;
uint16_t u16IRNvsramUsage;
uint16_t u16Reserved10;
uint32_t u32IRNvsramVersion;
uint32_t u32Reserved11;
} fields;
} u;
} MptConfigurationPageIOC6, *PMptConfigurationPageIOC6;
#pragma pack()
AssertCompileSize(MptConfigurationPageIOC6, 60);
/**
* BIOS page 1 - Read/write.
*/
#pragma pack(1)
typedef struct MptConfigurationPageBIOS1
{
/** Union. */
union
{
/** Byte view. */
uint8_t abPageData[48];
/** Field view. */
struct
{
/** The omnipresent header. */
MptConfigurationPageHeader Header;
/** BIOS options */
uint32_t u32BiosOptions;
/** IOC settings */
uint32_t u32IOCSettings;
/** Reserved */
uint32_t u32Reserved;
/** Device settings */
uint32_t u32DeviceSettings;
/** Number of devices */
uint16_t u16NumberOfDevices;
/** Expander spinup */
uint8_t u8ExpanderSpinup;
/** Reserved */
uint8_t u8Reserved;
/** I/O timeout of block devices without removable media */
uint16_t u16IOTimeoutBlockDevicesNonRM;
/** I/O timeout sequential */
uint16_t u16IOTimeoutSequential;
/** I/O timeout other */
uint16_t u16IOTimeoutOther;
/** I/O timeout of block devices with removable media */
uint16_t u16IOTimeoutBlockDevicesRM;
} fields;
} u;
} MptConfigurationPageBIOS1, *PMptConfigurationPageBIOS1;
#pragma pack()
AssertCompileSize(MptConfigurationPageBIOS1, 48);
#define LSILOGICSCSI_BIOS1_BIOSOPTIONS_BIOS_DISABLE RT_BIT(0)
#define LSILOGICSCSI_BIOS1_BIOSOPTIONS_SCAN_FROM_HIGH_TO_LOW RT_BIT(1)
#define LSILOGICSCSI_BIOS1_BIOSOPTIONS_BIOS_EXTENDED_SAS_SUPPORT RT_BIT(8)
#define LSILOGICSCSI_BIOS1_BIOSOPTIONS_BIOS_EXTENDED_FC_SUPPORT RT_BIT(9)
#define LSILOGICSCSI_BIOS1_BIOSOPTIONS_BIOS_EXTENDED_SPI_SUPPORT RT_BIT(10)
#define LSILOGICSCSI_BIOS1_IOCSETTINGS_ALTERNATE_CHS RT_BIT(3)
#define LSILOGICSCSI_BIOS1_IOCSETTINGS_ADAPTER_SUPPORT_SET(x) ((x) << 4)
#define LSILOGICSCSI_BIOS1_IOCSETTINGS_ADAPTER_SUPPORT_DISABLED 0x00
#define LSILOGICSCSI_BIOS1_IOCSETTINGS_ADAPTER_SUPPORT_BIOS_ONLY 0x01
#define LSILOGICSCSI_BIOS1_IOCSETTINGS_ADAPTER_SUPPORT_OS_ONLY 0x02
#define LSILOGICSCSI_BIOS1_IOCSETTINGS_ADAPTER_SUPPORT_BOT 0x03
#define LSILOGICSCSI_BIOS1_IOCSETTINGS_REMOVABLE_MEDIA_SET(x) ((x) << 6)
#define LSILOGICSCSI_BIOS1_IOCSETTINGS_REMOVABLE_MEDIA_NO_INT13H 0x00
#define LSILOGICSCSI_BIOS1_IOCSETTINGS_REMOVABLE_BOOT_MEDIA_INT13H 0x01
#define LSILOGICSCSI_BIOS1_IOCSETTINGS_REMOVABLE_MEDIA_INT13H 0x02
#define LSILOGICSCSI_BIOS1_IOCSETTINGS_SPINUP_DELAY_SET(x) ((x & 0xF) << 8)
#define LSILOGICSCSI_BIOS1_IOCSETTINGS_SPINUP_DELAY_GET(x) ((x >> 8) & 0x0F)
#define LSILOGICSCSI_BIOS1_IOCSETTINGS_MAX_TARGET_SPINUP_SET(x) ((x & 0xF) << 12)
#define LSILOGICSCSI_BIOS1_IOCSETTINGS_MAX_TARGET_SPINUP_GET(x) ((x >> 12) & 0x0F)
#define LSILOGICSCSI_BIOS1_IOCSETTINGS_BOOT_PREFERENCE_SET(x) (((x) & 0x3) << 16)
#define LSILOGICSCSI_BIOS1_IOCSETTINGS_BOOT_PREFERENCE_ENCLOSURE 0x0
#define LSILOGICSCSI_BIOS1_IOCSETTINGS_BOOT_PREFERENCE_SAS_ADDRESS 0x1
#define LSILOGICSCSI_BIOS1_IOCSETTINGS_DIRECT_ATTACH_SPINUP_MODE_ALL RT_BIT(18)
#define LSILOGICSCSI_BIOS1_IOCSETTINGS_AUTO_PORT_ENABLE RT_BIT(19)
#define LSILOGICSCSI_BIOS1_IOCSETTINGS_PORT_ENABLE_REPLY_DELAY_SET(x) (((x) & 0xF) << 20)
#define LSILOGICSCSI_BIOS1_IOCSETTINGS_PORT_ENABLE_REPLY_DELAY_GET(x) ((x >> 20) & 0x0F)
#define LSILOGICSCSI_BIOS1_IOCSETTINGS_PORT_ENABLE_SPINUP_DELAY_SET(x) (((x) & 0xF) << 24)
#define LSILOGICSCSI_BIOS1_IOCSETTINGS_PORT_ENABLE_SPINUP_DELAY_GET(x) ((x >> 24) & 0x0F)
#define LSILOGICSCSI_BIOS1_DEVICESETTINGS_DISABLE_LUN_SCANS RT_BIT(0)
#define LSILOGICSCSI_BIOS1_DEVICESETTINGS_DISABLE_LUN_SCANS_FOR_NON_REMOVABLE_DEVICES RT_BIT(1)
#define LSILOGICSCSI_BIOS1_DEVICESETTINGS_DISABLE_LUN_SCANS_FOR_REMOVABLE_DEVICES RT_BIT(2)
#define LSILOGICSCSI_BIOS1_DEVICESETTINGS_DISABLE_LUN_SCANS2 RT_BIT(3)
#define LSILOGICSCSI_BIOS1_DEVICESETTINGS_DISABLE_SMART_POLLING RT_BIT(4)
#define LSILOGICSCSI_BIOS1_EXPANDERSPINUP_SPINUP_DELAY_SET(x) ((x) & 0x0F)
#define LSILOGICSCSI_BIOS1_EXPANDERSPINUP_SPINUP_DELAY_GET(x) ((x) & 0x0F)
#define LSILOGICSCSI_BIOS1_EXPANDERSPINUP_MAX_SPINUP_DELAY_SET(x) (((x) & 0x0F) << 4)
#define LSILOGICSCSI_BIOS1_EXPANDERSPINUP_MAX_SPINUP_DELAY_GET(x) ((x >> 4) & 0x0F)
/**
* BIOS page 2 - Read/write.
*/
#pragma pack(1)
typedef struct MptConfigurationPageBIOS2
{
/** Union. */
union
{
/** Byte view. */
uint8_t abPageData[384];
/** Field view. */
struct
{
/** The omnipresent header. */
MptConfigurationPageHeader Header;
/** Reserved */
uint32_t au32Reserved[6];
/** Format of the boot device field. */
uint8_t u8BootDeviceForm;
/** Previous format of the boot device field. */
uint8_t u8PrevBootDeviceForm;
/** Reserved */
uint16_t u16Reserved;
/** Boot device fields - dependent on the format */
union
{
/** Device for AdapterNumber:Bus:Target:LUN */
struct
{
/** Target ID */
uint8_t u8TargetID;
/** Bus */
uint8_t u8Bus;
/** Adapter Number */
uint8_t u8AdapterNumber;
/** Reserved */
uint8_t u8Reserved;
/** Reserved */
uint32_t au32Reserved[3];
/** LUN */
uint32_t aLUN[5];
/** Reserved */
uint32_t au32Reserved2[56];
} AdapterNumberBusTargetLUN;
/** Device for PCIAddress:Bus:Target:LUN */
struct
{
/** Target ID */
uint8_t u8TargetID;
/** Bus */
uint8_t u8Bus;
/** Adapter Number */
uint16_t u16PCIAddress;
/** Reserved */
uint32_t au32Reserved[3];
/** LUN */
uint32_t aLUN[5];
/** Reserved */
uint32_t au32Reserved2[56];
} PCIAddressBusTargetLUN;
/** Device for PCISlotNo:Bus:Target:LUN */
struct
{
/** Target ID */
uint8_t u8TargetID;
/** Bus */
uint8_t u8Bus;
/** PCI Slot Number */
uint8_t u16PCISlotNo;
/** Reserved */
uint32_t au32Reserved[3];
/** LUN */
uint32_t aLUN[5];
/** Reserved */
uint32_t au32Reserved2[56];
} PCIAddressBusSlotLUN;
/** Device for FC channel world wide name */
struct
{
/** World wide port name low */
uint32_t u32WorldWidePortNameLow;
/** World wide port name high */
uint32_t u32WorldWidePortNameHigh;
/** Reserved */
uint32_t au32Reserved[3];
/** LUN */
uint32_t aLUN[5];
/** Reserved */
uint32_t au32Reserved2[56];
} FCWorldWideName;
/** Device for FC channel world wide name */
struct
{
/** SAS address */
SASADDRESS SASAddress;
/** Reserved */
uint32_t au32Reserved[3];
/** LUN */
uint32_t aLUN[5];
/** Reserved */
uint32_t au32Reserved2[56];
} SASWorldWideName;
/** Device for Enclosure/Slot */
struct
{
/** Enclosure logical ID */
uint64_t u64EnclosureLogicalID;
/** Reserved */
uint32_t au32Reserved[3];
/** LUN */
uint32_t aLUN[5];
/** Reserved */
uint32_t au32Reserved2[56];
} EnclosureSlot;
} BootDevice;
} fields;
} u;
} MptConfigurationPageBIOS2, *PMptConfigurationPageBIOS2;
#pragma pack()
AssertCompileSize(MptConfigurationPageBIOS2, 384);
#define LSILOGICSCSI_BIOS2_BOOT_DEVICE_FORM_SET(x) ((x) & 0x0F)
#define LSILOGICSCSI_BIOS2_BOOT_DEVICE_FORM_FIRST 0x0
#define LSILOGICSCSI_BIOS2_BOOT_DEVICE_FORM_ADAPTER_BUS_TARGET_LUN 0x1
#define LSILOGICSCSI_BIOS2_BOOT_DEVICE_FORM_PCIADDR_BUS_TARGET_LUN 0x2
#define LSILOGICSCSI_BIOS2_BOOT_DEVICE_FORM_PCISLOT_BUS_TARGET_LUN 0x3
#define LSILOGICSCSI_BIOS2_BOOT_DEVICE_FORM_FC_WWN 0x4
#define LSILOGICSCSI_BIOS2_BOOT_DEVICE_FORM_SAS_WWN 0x5
#define LSILOGICSCSI_BIOS2_BOOT_DEVICE_FORM_ENCLOSURE_SLOT 0x6
/**
* BIOS page 4 - Read/Write (Where is 3? - not defined in the spec)
*/
#pragma pack(1)
typedef struct MptConfigurationPageBIOS4
{
/** Union. */
union
{
/** Byte view. */
uint8_t abPageData[12];
/** Field view. */
struct
{
/** The omnipresent header. */
MptConfigurationPageHeader Header;
/** Reassignment Base WWID */
uint64_t u64ReassignmentBaseWWID;
} fields;
} u;
} MptConfigurationPageBIOS4, *PMptConfigurationPageBIOS4;
#pragma pack()
AssertCompileSize(MptConfigurationPageBIOS4, 12);
/**
* SCSI-SPI port page 0. - Readonly
*/
#pragma pack(1)
typedef struct MptConfigurationPageSCSISPIPort0
{
/** Union. */
union
{
/** Byte view. */
uint8_t abPageData[12];
/** Field view. */
struct
{
/** The omnipresent header. */
MptConfigurationPageHeader Header;
/** Flag whether this port is information unit trnafsers capable. */
unsigned fInformationUnitTransfersCapable: 1;
/** Flag whether the port is DT (Dual Transfer) capable. */
unsigned fDTCapable: 1;
/** Flag whether the port is QAS (Quick Arbitrate and Select) capable. */
unsigned fQASCapable: 1;
/** Reserved. */
unsigned u5Reserved1: 5;
/** Minimum Synchronous transfer period. */
unsigned u8MinimumSynchronousTransferPeriod: 8;
/** Maximum synchronous offset. */
unsigned u8MaximumSynchronousOffset: 8;
/** Reserved. */
unsigned u5Reserved2: 5;
/** Flag whether indicating the width of the bus - 0 narrow and 1 for wide. */
unsigned fWide: 1;
/** Reserved */
unsigned fReserved: 1;
/** Flag whether the port is AIP (Asynchronous Information Protection) capable. */
unsigned fAIPCapable: 1;
/** Signaling Type. */
unsigned u2SignalingType: 2;
/** Reserved. */
unsigned u30Reserved: 30;
} fields;
} u;
} MptConfigurationPageSCSISPIPort0, *PMptConfigurationPageSCSISPIPort0;
#pragma pack()
AssertCompileSize(MptConfigurationPageSCSISPIPort0, 12);
/**
* SCSI-SPI port page 1. - Read/Write
*/
#pragma pack(1)
typedef struct MptConfigurationPageSCSISPIPort1
{
/** Union. */
union
{
/** Byte view. */
uint8_t abPageData[12];
/** Field view. */
struct
{
/** The omnipresent header. */
MptConfigurationPageHeader Header;
/** The SCSI ID of the port. */
uint8_t u8SCSIID;
/** Reserved. */
uint8_t u8Reserved;
/** Port response IDs Bit mask field. */
uint16_t u16PortResponseIDsBitmask;
/** Value for the on BUS timer. */
uint32_t u32OnBusTimerValue;
} fields;
} u;
} MptConfigurationPageSCSISPIPort1, *PMptConfigurationPageSCSISPIPort1;
#pragma pack()
AssertCompileSize(MptConfigurationPageSCSISPIPort1, 12);
/**
* Device settings for one device.
*/
#pragma pack(1)
typedef struct MptDeviceSettings
{
/** Timeout for I/O in seconds. */
unsigned u8Timeout: 8;
/** Minimum synchronous factor. */
unsigned u8SyncFactor: 8;
/** Flag whether disconnect is enabled. */
unsigned fDisconnectEnable: 1;
/** Flag whether Scan ID is enabled. */
unsigned fScanIDEnable: 1;
/** Flag whether Scan LUNs is enabled. */
unsigned fScanLUNEnable: 1;
/** Flag whether tagged queuing is enabled. */
unsigned fTaggedQueuingEnabled: 1;
/** Flag whether wide is enabled. */
unsigned fWideDisable: 1;
/** Flag whether this device is bootable. */
unsigned fBootChoice: 1;
/** Reserved. */
unsigned u10Reserved: 10;
} MptDeviceSettings, *PMptDeviceSettings;
#pragma pack()
AssertCompileSize(MptDeviceSettings, 4);
/**
* SCSI-SPI port page 2. - Read/Write for the BIOS
*/
#pragma pack(1)
typedef struct MptConfigurationPageSCSISPIPort2
{
/** Union. */
union
{
/** Byte view. */
uint8_t abPageData[76];
/** Field view. */
struct
{
/** The omnipresent header. */
MptConfigurationPageHeader Header;
/** Flag indicating the bus scan order. */
unsigned fBusScanOrderHighToLow: 1;
/** Reserved. */
unsigned fReserved: 1;
/** Flag whether SCSI Bus resets are avoided. */
unsigned fAvoidSCSIBusResets: 1;
/** Flag whether alternate CHS is used. */
unsigned fAlternateCHS: 1;
/** Flag whether termination is disabled. */
unsigned fTerminationDisabled: 1;
/** Reserved. */
unsigned u27Reserved: 27;
/** Host SCSI ID. */
unsigned u4HostSCSIID: 4;
/** Initialize HBA. */
unsigned u2InitializeHBA: 2;
/** Removeable media setting. */
unsigned u2RemovableMediaSetting: 2;
/** Spinup delay. */
unsigned u4SpinupDelay: 4;
/** Negotiating settings. */
unsigned u2NegotitatingSettings: 2;
/** Reserved. */
unsigned u18Reserved: 18;
/** Device Settings. */
MptDeviceSettings aDeviceSettings[16];
} fields;
} u;
} MptConfigurationPageSCSISPIPort2, *PMptConfigurationPageSCSISPIPort2;
#pragma pack()
AssertCompileSize(MptConfigurationPageSCSISPIPort2, 76);
/**
* SCSI-SPI device page 0. - Readonly
*/
#pragma pack(1)
typedef struct MptConfigurationPageSCSISPIDevice0
{
/** Union. */
union
{
/** Byte view. */
uint8_t abPageData[12];
/** Field view. */
struct
{
/** The omnipresent header. */
MptConfigurationPageHeader Header;
/** Negotiated Parameters. */
/** Information Units enabled. */
unsigned fInformationUnitsEnabled: 1;
/** Dual Transfers Enabled. */
unsigned fDTEnabled: 1;
/** QAS enabled. */
unsigned fQASEnabled: 1;
/** Reserved. */
unsigned u5Reserved1: 5;
/** Synchronous Transfer period. */
unsigned u8NegotiatedSynchronousTransferPeriod: 8;
/** Synchronous offset. */
unsigned u8NegotiatedSynchronousOffset: 8;
/** Reserved. */
unsigned u5Reserved2: 5;
/** Width - 0 for narrow and 1 for wide. */
unsigned fWide: 1;
/** Reserved. */
unsigned fReserved: 1;
/** AIP enabled. */
unsigned fAIPEnabled: 1;
/** Flag whether negotiation occurred. */
unsigned fNegotationOccured: 1;
/** Flag whether a SDTR message was rejected. */
unsigned fSDTRRejected: 1;
/** Flag whether a WDTR message was rejected. */
unsigned fWDTRRejected: 1;
/** Flag whether a PPR message was rejected. */
unsigned fPPRRejected: 1;
/** Reserved. */
unsigned u28Reserved: 28;
} fields;
} u;
} MptConfigurationPageSCSISPIDevice0, *PMptConfigurationPageSCSISPIDevice0;
#pragma pack()
AssertCompileSize(MptConfigurationPageSCSISPIDevice0, 12);
/**
* SCSI-SPI device page 1. - Read/Write
*/
#pragma pack(1)
typedef struct MptConfigurationPageSCSISPIDevice1
{
/** Union. */
union
{
/** Byte view. */
uint8_t abPageData[16];
/** Field view. */
struct
{
/** The omnipresent header. */
MptConfigurationPageHeader Header;
/** Requested Parameters. */
/** Information Units enable. */
bool fInformationUnitsEnable: 1;
/** Dual Transfers Enable. */
bool fDTEnable: 1;
/** QAS enable. */
bool fQASEnable: 1;
/** Reserved. */
unsigned u5Reserved1: 5;
/** Synchronous Transfer period. */
unsigned u8NegotiatedSynchronousTransferPeriod: 8;
/** Synchronous offset. */
unsigned u8NegotiatedSynchronousOffset: 8;
/** Reserved. */
unsigned u5Reserved2: 5;
/** Width - 0 for narrow and 1 for wide. */
bool fWide: 1;
/** Reserved. */
bool fReserved1: 1;
/** AIP enable. */
bool fAIPEnable: 1;
/** Reserved. */
bool fReserved2: 1;
/** WDTR disallowed. */
bool fWDTRDisallowed: 1;
/** SDTR disallowed. */
bool fSDTRDisallowed: 1;
/** Reserved. */
unsigned u29Reserved: 29;
} fields;
} u;
} MptConfigurationPageSCSISPIDevice1, *PMptConfigurationPageSCSISPIDevice1;
#pragma pack()
AssertCompileSize(MptConfigurationPageSCSISPIDevice1, 16);
/**
* SCSI-SPI device page 2. - Read/Write
*/
#pragma pack(1)
typedef struct MptConfigurationPageSCSISPIDevice2
{
/** Union. */
union
{
/** Byte view. */
uint8_t abPageData[16];
/** Field view. */
struct
{
/** The omnipresent header. */
MptConfigurationPageHeader Header;
/** Reserved. */
unsigned u4Reserved: 4;
/** ISI enable. */
unsigned fISIEnable: 1;
/** Secondary driver enable. */
unsigned fSecondaryDriverEnable: 1;
/** Reserved. */
unsigned fReserved: 1;
/** Slew reate controler. */
unsigned u3SlewRateControler: 3;
/** Primary drive strength controler. */
unsigned u3PrimaryDriveStrengthControl: 3;
/** Secondary drive strength controler. */
unsigned u3SecondaryDriveStrengthControl: 3;
/** Reserved. */
unsigned u12Reserved: 12;
/** XCLKH_ST. */
unsigned fXCLKH_ST: 1;
/** XCLKS_ST. */
unsigned fXCLKS_ST: 1;
/** XCLKH_DT. */
unsigned fXCLKH_DT: 1;
/** XCLKS_DT. */
unsigned fXCLKS_DT: 1;
/** Parity pipe select. */
unsigned u2ParityPipeSelect: 2;
/** Reserved. */
unsigned u30Reserved: 30;
/** Data bit pipeline select. */
unsigned u32DataPipelineSelect: 32;
} fields;
} u;
} MptConfigurationPageSCSISPIDevice2, *PMptConfigurationPageSCSISPIDevice2;
#pragma pack()
AssertCompileSize(MptConfigurationPageSCSISPIDevice2, 16);
/**
* SCSI-SPI device page 3 (Revision G). - Readonly
*/
#pragma pack(1)
typedef struct MptConfigurationPageSCSISPIDevice3
{
/** Union. */
union
{
/** Byte view. */
uint8_t abPageData[1];
/** Field view. */
struct
{
/** The omnipresent header. */
MptConfigurationPageHeader Header;
/** Number of times the IOC rejected a message because it doesn't support the operation. */
uint16_t u16MsgRejectCount;
/** Number of times the SCSI bus entered an invalid operation state. */
uint16_t u16PhaseErrorCount;
/** Number of parity errors. */
uint16_t u16ParityCount;
/** Reserved. */
uint16_t u16Reserved;
} fields;
} u;
} MptConfigurationPageSCSISPIDevice3, *PMptConfigurationPageSCSISPIDevice3;
#pragma pack()
AssertCompileSize(MptConfigurationPageSCSISPIDevice3, 12);
/**
* PHY entry for the SAS I/O unit page 0
*/
#pragma pack(1)
typedef struct MptConfigurationPageSASIOUnit0PHY
{
/** Port number */
uint8_t u8Port;
/** Port flags */
uint8_t u8PortFlags;
/** Phy flags */
uint8_t u8PhyFlags;
/** negotiated link rate */
uint8_t u8NegotiatedLinkRate;
/** Controller phy device info */
uint32_t u32ControllerPhyDeviceInfo;
/** Attached device handle */
uint16_t u16AttachedDevHandle;
/** Controller device handle */
uint16_t u16ControllerDevHandle;
/** Discovery status */
uint32_t u32DiscoveryStatus;
} MptConfigurationPageSASIOUnit0PHY, *PMptConfigurationPageSASIOUnit0PHY;
#pragma pack()
AssertCompileSize(MptConfigurationPageSASIOUnit0PHY, 16);
/**
* SAS I/O Unit page 0 - Readonly
*/
#pragma pack(1)
typedef struct MptConfigurationPageSASIOUnit0
{
/** Union. */
union
{
/** Byte view - variable. */
uint8_t abPageData[1];
/** Field view. */
struct
{
/** The omnipresent header. */
MptExtendedConfigurationPageHeader ExtHeader;
/** Nvdata version default */
uint16_t u16NvdataVersionDefault;
/** Nvdata version persisent */
uint16_t u16NvdataVersionPersistent;
/** Number of physical ports */
uint8_t u8NumPhys;
/** Reserved */
uint8_t au8Reserved[3];
/** Content for each physical port - variable depending on the amount of ports. */
MptConfigurationPageSASIOUnit0PHY aPHY[1];
} fields;
} u;
} MptConfigurationPageSASIOUnit0, *PMptConfigurationPageSASIOUnit0;
#pragma pack()
AssertCompileSize(MptConfigurationPageSASIOUnit0, 8+2+2+1+3+sizeof(MptConfigurationPageSASIOUnit0PHY));
#define LSILOGICSCSI_SASIOUNIT0_GET_SIZE(ports) (sizeof(MptConfigurationPageSASIOUnit0) + ((ports) - 1) * sizeof(MptConfigurationPageSASIOUnit0PHY))
#define LSILOGICSCSI_SASIOUNIT0_PORT_CONFIGURATION_AUTO RT_BIT(0)
#define LSILOGICSCSI_SASIOUNIT0_PORT_TARGET_IOC RT_BIT(2)
#define LSILOGICSCSI_SASIOUNIT0_PORT_DISCOVERY_IN_STATUS RT_BIT(3)
#define LSILOGICSCSI_SASIOUNIT0_PHY_RX_INVERTED RT_BIT(0)
#define LSILOGICSCSI_SASIOUNIT0_PHY_TX_INVERTED RT_BIT(1)
#define LSILOGICSCSI_SASIOUNIT0_PHY_DISABLED RT_BIT(2)
#define LSILOGICSCSI_SASIOUNIT0_NEGOTIATED_RATE_SET(x) ((x) & 0x0F)
#define LSILOGICSCSI_SASIOUNIT0_NEGOTIATED_RATE_GET(x) ((x) & 0x0F)
#define LSILOGICSCSI_SASIOUNIT0_NEGOTIATED_RATE_UNKNOWN 0x00
#define LSILOGICSCSI_SASIOUNIT0_NEGOTIATED_RATE_DISABLED 0x01
#define LSILOGICSCSI_SASIOUNIT0_NEGOTIATED_RATE_FAILED 0x02
#define LSILOGICSCSI_SASIOUNIT0_NEGOTIATED_RATE_SATA_OOB 0x03
#define LSILOGICSCSI_SASIOUNIT0_NEGOTIATED_RATE_15GB 0x08
#define LSILOGICSCSI_SASIOUNIT0_NEGOTIATED_RATE_30GB 0x09
#define LSILOGICSCSI_SASIOUNIT0_DEVICE_TYPE_SET(x) ((x) & 0x3)
#define LSILOGICSCSI_SASIOUNIT0_DEVICE_TYPE_NO 0x0
#define LSILOGICSCSI_SASIOUNIT0_DEVICE_TYPE_END 0x1
#define LSILOGICSCSI_SASIOUNIT0_DEVICE_TYPE_EDGE_EXPANDER 0x2
#define LSILOGICSCSI_SASIOUNIT0_DEVICE_TYPE_FANOUT_EXPANDER 0x3
#define LSILOGICSCSI_SASIOUNIT0_DEVICE_SATA_HOST RT_BIT(3)
#define LSILOGICSCSI_SASIOUNIT0_DEVICE_SMP_INITIATOR RT_BIT(4)
#define LSILOGICSCSI_SASIOUNIT0_DEVICE_STP_INITIATOR RT_BIT(5)
#define LSILOGICSCSI_SASIOUNIT0_DEVICE_SSP_INITIATOR RT_BIT(6)
#define LSILOGICSCSI_SASIOUNIT0_DEVICE_SATA RT_BIT(7)
#define LSILOGICSCSI_SASIOUNIT0_DEVICE_SMP_TARGET RT_BIT(8)
#define LSILOGICSCSI_SASIOUNIT0_DEVICE_STP_TARGET RT_BIT(9)
#define LSILOGICSCSI_SASIOUNIT0_DEVICE_SSP_TARGET RT_BIT(10)
#define LSILOGICSCSI_SASIOUNIT0_DEVICE_DIRECT_ATTACHED RT_BIT(11)
#define LSILOGICSCSI_SASIOUNIT0_DEVICE_LSI RT_BIT(12)
#define LSILOGICSCSI_SASIOUNIT0_DEVICE_ATAPI_DEVICE RT_BIT(13)
#define LSILOGICSCSI_SASIOUNIT0_DEVICE_SEP_DEVICE RT_BIT(14)
#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_LOOP RT_BIT(0)
#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_UNADDRESSABLE RT_BIT(1)
#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_SAME_SAS_ADDR RT_BIT(2)
#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_EXPANDER_ERROR RT_BIT(3)
#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_SMP_TIMEOUT RT_BIT(4)
#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_EXP_ROUTE_OOE RT_BIT(5)
#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_EXP_ROUTE_IDX RT_BIT(6)
#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_SMP_FUNC_FAILED RT_BIT(7)
#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_SMP_CRC_ERROR RT_BIT(8)
#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_SUBTRSCTIVE_LNK RT_BIT(9)
#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_TBL_LNK RT_BIT(10)
#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_UNSUPPORTED_DEV RT_BIT(11)
#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_MAX_SATA_TGTS RT_BIT(12)
#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_MULT_CTRLS RT_BIT(13)
/**
* PHY entry for the SAS I/O unit page 1
*/
#pragma pack(1)
typedef struct MptConfigurationPageSASIOUnit1PHY
{
/** Port number */
uint8_t u8Port;
/** Port flags */
uint8_t u8PortFlags;
/** Phy flags */
uint8_t u8PhyFlags;
/** Max link rate */
uint8_t u8MaxMinLinkRate;
/** Controller phy device info */
uint32_t u32ControllerPhyDeviceInfo;
/** Maximum target port connect time */
uint16_t u16MaxTargetPortConnectTime;
/** Reserved */
uint16_t u16Reserved;
} MptConfigurationPageSASIOUnit1PHY, *PMptConfigurationPageSASIOUnit1PHY;
#pragma pack()
AssertCompileSize(MptConfigurationPageSASIOUnit1PHY, 12);
/**
* SAS I/O Unit page 1 - Read/Write
*/
#pragma pack(1)
typedef struct MptConfigurationPageSASIOUnit1
{
/** Union. */
union
{
/** Byte view - variable. */
uint8_t abPageData[1];
/** Field view. */
struct
{
/** The omnipresent header. */
MptExtendedConfigurationPageHeader ExtHeader;
/** Control flags */
uint16_t u16ControlFlags;
/** maximum number of SATA targets */
uint16_t u16MaxNumSATATargets;
/** additional control flags */
uint16_t u16AdditionalControlFlags;
/** Reserved */
uint16_t u16Reserved;
/** Number of PHYs */
uint8_t u8NumPhys;
/** maximum SATA queue depth */
uint8_t u8SATAMaxQDepth;
/** Delay for reporting missing devices. */
uint8_t u8ReportDeviceMissingDelay;
/** I/O device missing delay */
uint8_t u8IODeviceMissingDelay;
/** Content for each physical port - variable depending on the number of ports */
MptConfigurationPageSASIOUnit1PHY aPHY[1];
} fields;
} u;
} MptConfigurationPageSASIOUnit1, *PMptConfigurationPageSASIOUnit1;
#pragma pack()
AssertCompileSize(MptConfigurationPageSASIOUnit1, 8+12+sizeof(MptConfigurationPageSASIOUnit1PHY));
#define LSILOGICSCSI_SASIOUNIT1_GET_SIZE(ports) (sizeof(MptConfigurationPageSASIOUnit1) + ((ports) - 1) * sizeof(MptConfigurationPageSASIOUnit1PHY))
#define LSILOGICSCSI_SASIOUNIT1_CONTROL_CLEAR_SATA_AFFILIATION RT_BIT(0)
#define LSILOGICSCSI_SASIOUNIT1_CONTROL_FIRST_LEVEL_DISCOVERY_ONLY RT_BIT(1)
#define LSILOGICSCSI_SASIOUNIT1_CONTROL_SUBTRACTIVE_LNK_ILLEGAL RT_BIT(2)
#define LSILOGICSCSI_SASIOUNIT1_CONTROL_IOC_ENABLE_HIGH_PHY RT_BIT(3)
#define LSILOGICSCSI_SASIOUNIT1_CONTROL_SATA_FUA_REQUIRED RT_BIT(4)
#define LSILOGICSCSI_SASIOUNIT1_CONTROL_SATA_NCQ_REQUIRED RT_BIT(5)
#define LSILOGICSCSI_SASIOUNIT1_CONTROL_SATA_SMART_REQUIRED RT_BIT(6)
#define LSILOGICSCSI_SASIOUNIT1_CONTROL_SATA_LBA48_REQUIRED RT_BIT(7)
#define LSILOGICSCSI_SASIOUNIT1_CONTROL_SATA_INIT_POSTPONED RT_BIT(8)
#define LSILOGICSCSI_SASIOUNIT1_CONTROL_DEVICE_SUPPORT_SET(x) (((x) & 0x3) << 9)
#define LSILOGICSCSI_SASIOUNIT1_CONTROL_DEVICE_SUPPORT_GET(x) (((x) >> 9) & 0x3)
#define LSILOGICSCSI_SASIOUNIT1_CONTROL_DEVICE_SUPPORT_SAS_AND_SATA 0x00
#define LSILOGICSCSI_SASIOUNIT1_CONTROL_DEVICE_SUPPORT_SAS 0x01
#define LSILOGICSCSI_SASIOUNIT1_CONTROL_DEVICE_SUPPORT_SATA 0x02
#define LSILOGICSCSI_SASIOUNIT1_CONTROL_SATA_EXP_ADDR RT_BIT(11)
#define LSILOGICSCSI_SASIOUNIT1_CONTROL_SATA_SETTINGS_PRESERV_REQUIRED RT_BIT(12)
#define LSILOGICSCSI_SASIOUNIT1_CONTROL_SATA_LIMIT_RATE_15GB RT_BIT(13)
#define LSILOGICSCSI_SASIOUNIT1_CONTROL_SATA_LIMIT_RATE_30GB RT_BIT(14)
#define LSILOGICSCSI_SASIOUNIT1_CONTROL_SAS_SELF_TEST_ENABLED RT_BIT(15)
#define LSILOGICSCSI_SASIOUNIT1_ADDITIONAL_CONTROL_TBL_LNKS_ALLOW RT_BIT(0)
#define LSILOGICSCSI_SASIOUNIT1_ADDITIONAL_CONTROL_SATA_RST_NO_AFFIL RT_BIT(1)
#define LSILOGICSCSI_SASIOUNIT1_ADDITIONAL_CONTROL_SATA_RST_SELF_AFFIL RT_BIT(2)
#define LSILOGICSCSI_SASIOUNIT1_ADDITIONAL_CONTROL_SATA_RST_OTHER_AFFIL RT_BIT(3)
#define LSILOGICSCSI_SASIOUNIT1_ADDITIONAL_CONTROL_SATA_RST_PORT_EN_ONLY RT_BIT(4)
#define LSILOGICSCSI_SASIOUNIT1_ADDITIONAL_CONTROL_HIDE_NON_ZERO_PHYS RT_BIT(5)
#define LSILOGICSCSI_SASIOUNIT1_ADDITIONAL_CONTROL_SATA_ASYNC_NOTIF RT_BIT(6)
#define LSILOGICSCSI_SASIOUNIT1_ADDITIONAL_CONTROL_MULT_PORTS_ILL_SAME_DOMAIN RT_BIT(7)
#define LSILOGICSCSI_SASIOUNIT1_MISSING_DEVICE_DELAY_UNITS_16_SEC RT_BIT(7)
#define LSILOGICSCSI_SASIOUNIT1_MISSING_DEVICE_DELAY_SET(x) ((x) & 0x7F)
#define LSILOGICSCSI_SASIOUNIT1_MISSING_DEVICE_DELAY_GET(x) ((x) & 0x7F)
#define LSILOGICSCSI_SASIOUNIT1_PORT_CONFIGURATION_AUTO RT_BIT(0)
#define LSILOGICSCSI_SASIOUNIT1_PORT_CONFIGURATION_IOC1 RT_BIT(2)
#define LSILOGICSCSI_SASIOUNIT1_PHY_RX_INVERT RT_BIT(0)
#define LSILOGICSCSI_SASIOUNIT1_PHY_TX_INVERT RT_BIT(1)
#define LSILOGICSCSI_SASIOUNIT1_PHY_DISABLE RT_BIT(2)
#define LSILOGICSCSI_SASIOUNIT1_LINK_RATE_MIN_SET(x) ((x) & 0x0F)
#define LSILOGICSCSI_SASIOUNIT1_LINK_RATE_MIN_GET(x) ((x) & 0x0F)
#define LSILOGICSCSI_SASIOUNIT1_LINK_RATE_MAX_SET(x) (((x) & 0x0F) << 4)
#define LSILOGICSCSI_SASIOUNIT1_LINK_RATE_MAX_GET(x) ((x >> 4) & 0x0F)
#define LSILOGICSCSI_SASIOUNIT1_LINK_RATE_15GB 0x8
#define LSILOGICSCSI_SASIOUNIT1_LINK_RATE_30GB 0x9
#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_TYPE_SET(x) ((x) & 0x3)
#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_TYPE_GET(x) ((x) & 0x3)
#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_TYPE_NO 0x0
#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_TYPE_END 0x1
#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_TYPE_EDGE_EXPANDER 0x2
#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_TYPE_FANOUT_EXPANDER 0x3
#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_SMP_INITIATOR RT_BIT(4)
#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_STP_INITIATOR RT_BIT(5)
#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_SSP_INITIATOR RT_BIT(6)
#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_SMP_TARGET RT_BIT(8)
#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_STP_TARGET RT_BIT(9)
#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_SSP_TARGET RT_BIT(10)
#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_DIRECT_ATTACHED RT_BIT(11)
#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_LSI RT_BIT(12)
#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_ATAPI RT_BIT(13)
#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_SEP RT_BIT(14)
/**
* SAS I/O unit page 2 - Read/Write
*/
#pragma pack(1)
typedef struct MptConfigurationPageSASIOUnit2
{
/** Union. */
union
{
/** Byte view - variable. */
uint8_t abPageData[1];
/** Field view. */
struct
{
/** The omnipresent header. */
MptExtendedConfigurationPageHeader ExtHeader;
/** Device numbers per enclosure */
uint8_t u8NumDevsPerEnclosure;
/** Boot device wait time */
uint8_t u8BootDeviceWaitTime;
/** Reserved */
uint16_t u16Reserved;
/** Maximum number of persistent Bus and target ID mappings */
uint16_t u16MaxPersistentIDs;
/** Number of persistent IDs used */
uint16_t u16NumPersistentIDsUsed;
/** Status */
uint8_t u8Status;
/** Flags */
uint8_t u8Flags;
/** Maximum number of physical mapped IDs */
uint16_t u16MaxNumPhysicalMappedIDs;
} fields;
} u;
} MptConfigurationPageSASIOUnit2, *PMptConfigurationPageSASIOUnit2;
#pragma pack()
AssertCompileSize(MptConfigurationPageSASIOUnit2, 20);
#define LSILOGICSCSI_SASIOUNIT2_STATUS_PERSISTENT_MAP_TBL_FULL RT_BIT(0)
#define LSILOGICSCSI_SASIOUNIT2_STATUS_PERSISTENT_MAP_DISABLED RT_BIT(1)
#define LSILOGICSCSI_SASIOUNIT2_STATUS_PERSISTENT_ENC_DEV_UNMAPPED RT_BIT(2)
#define LSILOGICSCSI_SASIOUNIT2_STATUS_PERSISTENT_DEV_LIMIT_EXCEEDED RT_BIT(3)
#define LSILOGICSCSI_SASIOUNIT2_FLAGS_PERSISTENT_MAP_DISABLE RT_BIT(0)
#define LSILOGICSCSI_SASIOUNIT2_FLAGS_PERSISTENT_PHYS_MAP_MODE_SET(x) ((x & 0x7) << 1)
#define LSILOGICSCSI_SASIOUNIT2_FLAGS_PERSISTENT_PHYS_MAP_MODE_GET(x) ((x >> 1) & 0x7)
#define LSILOGICSCSI_SASIOUNIT2_FLAGS_PERSISTENT_PHYS_MAP_MODE_NO 0x0
#define LSILOGICSCSI_SASIOUNIT2_FLAGS_PERSISTENT_PHYS_MAP_MODE_DIRECT_ATTACHED 0x1
#define LSILOGICSCSI_SASIOUNIT2_FLAGS_PERSISTENT_PHYS_MAP_MODE_ENC 0x2
#define LSILOGICSCSI_SASIOUNIT2_FLAGS_PERSISTENT_PHYS_MAP_MODE_HOST 0x7
#define LSILOGICSCSI_SASIOUNIT2_FLAGS_RESERVE_TARGET_ID_ZERO RT_BIT(4)
#define LSILOGICSCSI_SASIOUNIT2_FLAGS_START_SLOT_NUMBER_ONE RT_BIT(5)
/**
* SAS I/O unit page 3 - Read/Write
*/
#pragma pack(1)
typedef struct MptConfigurationPageSASIOUnit3
{
/** Union. */
union
{
/** Byte view - variable. */
uint8_t abPageData[1];
/** Field view. */
struct
{
/** The omnipresent header. */
MptExtendedConfigurationPageHeader ExtHeader;
/** Reserved */
uint32_t u32Reserved;
uint32_t u32MaxInvalidDwordCount;
uint32_t u32InvalidDwordCountTime;
uint32_t u32MaxRunningDisparityErrorCount;
uint32_t u32RunningDisparityErrorTime;
uint32_t u32MaxLossDwordSynchCount;
uint32_t u32LossDwordSynchCountTime;
uint32_t u32MaxPhysResetProblemCount;
uint32_t u32PhyResetProblemTime;
} fields;
} u;
} MptConfigurationPageSASIOUnit3, *PMptConfigurationPageSASIOUnit3;
#pragma pack()
AssertCompileSize(MptConfigurationPageSASIOUnit3, 44);
/**
* SAS PHY page 0 - Readonly
*/
#pragma pack(1)
typedef struct MptConfigurationPageSASPHY0
{
/** Union. */
union
{
/** Byte view - variable. */
uint8_t abPageData[1];
/** Field view. */
struct
{
/** The omnipresent header. */
MptExtendedConfigurationPageHeader ExtHeader;
/** Owner dev handle. */
uint16_t u16OwnerDevHandle;
/** Reserved */
uint16_t u16Reserved0;
/** SAS address */
SASADDRESS SASAddress;
/** Attached device handle */
uint16_t u16AttachedDevHandle;
/** Attached phy identifier */
uint8_t u8AttachedPhyIdentifier;
/** Reserved */
uint8_t u8Reserved1;
/** Attached device information */
uint32_t u32AttachedDeviceInfo;
/** Programmed link rate */
uint8_t u8ProgrammedLinkRate;
/** Hardware link rate */
uint8_t u8HwLinkRate;
/** Change count */
uint8_t u8ChangeCount;
/** Flags */
uint8_t u8Flags;
/** Phy information */
uint32_t u32PhyInfo;
} fields;
} u;
} MptConfigurationPageSASPHY0, *PMptConfigurationPageSASPHY0;
#pragma pack()
AssertCompileSize(MptConfigurationPageSASPHY0, 36);
#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_TYPE_SET(x) ((x) & 0x3)
#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_TYPE_GET(x) ((x) & 0x3)
#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_TYPE_NO 0x0
#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_TYPE_END 0x1
#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_TYPE_EDGE_EXPANDER 0x2
#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_TYPE_FANOUT_EXPANDER 0x3
#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_SMP_INITIATOR RT_BIT(4)
#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_STP_INITIATOR RT_BIT(5)
#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_SSP_INITIATOR RT_BIT(6)
#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_SMP_TARGET RT_BIT(8)
#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_STP_TARGET RT_BIT(9)
#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_SSP_TARGET RT_BIT(10)
#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_DIRECT_ATTACHED RT_BIT(11)
#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_LSI RT_BIT(12)
#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_ATAPI RT_BIT(13)
#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_SEP RT_BIT(14)
/**
* SAS PHY page 1 - Readonly
*/
#pragma pack(1)
typedef struct MptConfigurationPageSASPHY1
{
/** Union. */
union
{
/** Byte view - variable. */
uint8_t abPageData[1];
/** Field view. */
struct
{
/** The omnipresent header. */
MptExtendedConfigurationPageHeader ExtHeader;
/** Reserved */
uint32_t u32Reserved0;
uint32_t u32InvalidDwordCound;
uint32_t u32RunningDisparityErrorCount;
uint32_t u32LossDwordSynchCount;
uint32_t u32PhyResetProblemCount;
} fields;
} u;
} MptConfigurationPageSASPHY1, *PMptConfigurationPageSASPHY1;
#pragma pack()
AssertCompileSize(MptConfigurationPageSASPHY1, 28);
/**
* SAS Device page 0 - Readonly
*/
#pragma pack(1)
typedef struct MptConfigurationPageSASDevice0
{
/** Union. */
union
{
/** Byte view - variable. */
uint8_t abPageData[1];
/** Field view. */
struct
{
/** The omnipresent header. */
MptExtendedConfigurationPageHeader ExtHeader;
/** Slot number */
uint16_t u16Slot;
/** Enclosure handle. */
uint16_t u16EnclosureHandle;
/** SAS address */
SASADDRESS SASAddress;
/** Parent device handle */
uint16_t u16ParentDevHandle;
/** Phy number */
uint8_t u8PhyNum;
/** Access status */
uint8_t u8AccessStatus;
/** Device handle */
uint16_t u16DevHandle;
/** Target ID */
uint8_t u8TargetID;
/** Bus */
uint8_t u8Bus;
/** Device info */
uint32_t u32DeviceInfo;
/** Flags */
uint16_t u16Flags;
/** Physical port */
uint8_t u8PhysicalPort;
/** Reserved */
uint8_t u8Reserved0;
} fields;
} u;
} MptConfigurationPageSASDevice0, *PMptConfigurationPageSASDevice0;
#pragma pack()
AssertCompileSize(MptConfigurationPageSASDevice0, 36);
#define LSILOGICSCSI_SASDEVICE0_STATUS_NO_ERRORS (0x00)
#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_TYPE_SET(x) ((x) & 0x3)
#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_TYPE_GET(x) ((x) & 0x3)
#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_TYPE_NO 0x0
#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_TYPE_END 0x1
#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_TYPE_EDGE_EXPANDER 0x2
#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_TYPE_FANOUT_EXPANDER 0x3
#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_SMP_INITIATOR RT_BIT(4)
#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_STP_INITIATOR RT_BIT(5)
#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_SSP_INITIATOR RT_BIT(6)
#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_SMP_TARGET RT_BIT(8)
#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_STP_TARGET RT_BIT(9)
#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_SSP_TARGET RT_BIT(10)
#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_DIRECT_ATTACHED RT_BIT(11)
#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_LSI RT_BIT(12)
#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_ATAPI RT_BIT(13)
#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_SEP RT_BIT(14)
#define LSILOGICSCSI_SASDEVICE0_FLAGS_DEVICE_PRESENT (RT_BIT(0))
#define LSILOGICSCSI_SASDEVICE0_FLAGS_DEVICE_MAPPED_TO_BUS_AND_TARGET_ID (RT_BIT(1))
#define LSILOGICSCSI_SASDEVICE0_FLAGS_DEVICE_MAPPING_PERSISTENT (RT_BIT(2))
/**
* SAS Device page 1 - Readonly
*/
#pragma pack(1)
typedef struct MptConfigurationPageSASDevice1
{
/** Union. */
union
{
/** Byte view - variable. */
uint8_t abPageData[1];
/** Field view. */
struct
{
/** The omnipresent header. */
MptExtendedConfigurationPageHeader ExtHeader;
/** Reserved */
uint32_t u32Reserved0;
/** SAS address */
SASADDRESS SASAddress;
/** Reserved */
uint32_t u32Reserved;
/** Device handle */
uint16_t u16DevHandle;
/** Target ID */
uint8_t u8TargetID;
/** Bus */
uint8_t u8Bus;
/** Initial REgister device FIS */
uint32_t au32InitialRegDeviceFIS[5];
} fields;
} u;
} MptConfigurationPageSASDevice1, *PMptConfigurationPageSASDevice1;
#pragma pack()
AssertCompileSize(MptConfigurationPageSASDevice1, 48);
/**
* SAS Device page 2 - Read/Write persistent
*/
#pragma pack(1)
typedef struct MptConfigurationPageSASDevice2
{
/** Union. */
union
{
/** Byte view - variable. */
uint8_t abPageData[1];
/** Field view. */
struct
{
/** The omnipresent header. */
MptExtendedConfigurationPageHeader ExtHeader;
/** Physical identifier */
SASADDRESS SASAddress;
/** Enclosure mapping */
uint32_t u32EnclosureMapping;
} fields;
} u;
} MptConfigurationPageSASDevice2, *PMptConfigurationPageSASDevice2;
#pragma pack()
AssertCompileSize(MptConfigurationPageSASDevice2, 20);
/**
* A device entitiy containing all pages.
*/
typedef struct MptSASDevice
{
/** Pointer to the next device if any. */
struct MptSASDevice *pNext;
/** Pointer to the previous device if any. */
struct MptSASDevice *pPrev;
MptConfigurationPageSASDevice0 SASDevicePage0;
MptConfigurationPageSASDevice1 SASDevicePage1;
MptConfigurationPageSASDevice2 SASDevicePage2;
} MptSASDevice, *PMptSASDevice;
/**
* SAS Expander page 0 - Readonly
*/
#pragma pack(1)
typedef struct MptConfigurationPageSASExpander0
{
/** Union. */
union
{
/** Byte view - variable. */
uint8_t abPageData[1];
/** Field view. */
struct
{
/** The omnipresent header. */
MptExtendedConfigurationPageHeader ExtHeader;
/** Physical port */
uint8_t u8PhysicalPort;
/** Reserved */
uint8_t u8Reserved0;
/** Enclosure handle */
uint16_t u16EnclosureHandle;
/** SAS address */
SASADDRESS SASAddress;
/** Discovery status */
uint32_t u32DiscoveryStatus;
/** Device handle. */
uint16_t u16DevHandle;
/** Parent device handle */
uint16_t u16ParentDevHandle;
/** Expander change count */
uint16_t u16ExpanderChangeCount;
/** Expander route indexes */
uint16_t u16ExpanderRouteIndexes;
/** Number of PHys in this expander */
uint8_t u8NumPhys;
/** SAS level */
uint8_t u8SASLevel;
/** Flags */
uint8_t u8Flags;
/** Reserved */
uint8_t u8Reserved1;
} fields;
} u;
} MptConfigurationPageSASExpander0, *PMptConfigurationPageSASExpander0;
#pragma pack()
AssertCompileSize(MptConfigurationPageSASExpander0, 36);
/**
* SAS Expander page 1 - Readonly
*/
#pragma pack(1)
typedef struct MptConfigurationPageSASExpander1
{
/** Union. */
union
{
/** Byte view - variable. */
uint8_t abPageData[1];
/** Field view. */
struct
{
/** The omnipresent header. */
MptExtendedConfigurationPageHeader ExtHeader;
/** Physical port */
uint8_t u8PhysicalPort;
/** Reserved */
uint8_t u8Reserved0[3];
/** Number of PHYs */
uint8_t u8NumPhys;
/** Number of the Phy the information in this page is for. */
uint8_t u8Phy;
/** Number of routing table entries */
uint16_t u16NumTableEntriesProgrammed;
/** Programmed link rate */
uint8_t u8ProgrammedLinkRate;
/** Hardware link rate */
uint8_t u8HwLinkRate;
/** Attached device handle */
uint16_t u16AttachedDevHandle;
/** Phy information */
uint32_t u32PhyInfo;
/** Attached device information */
uint32_t u32AttachedDeviceInfo;
/** Owner device handle. */
uint16_t u16OwnerDevHandle;
/** Change count */
uint8_t u8ChangeCount;
/** Negotiated link rate */
uint8_t u8NegotiatedLinkRate;
/** Phy identifier */
uint8_t u8PhyIdentifier;
/** Attached phy identifier */
uint8_t u8AttachedPhyIdentifier;
/** Reserved */
uint8_t u8Reserved1;
/** Discovery information */
uint8_t u8DiscoveryInfo;
/** Reserved */
uint32_t u32Reserved;
} fields;
} u;
} MptConfigurationPageSASExpander1, *PMptConfigurationPageSASExpander1;
#pragma pack()
AssertCompileSize(MptConfigurationPageSASExpander1, 40);
/**
* Structure of all supported pages for the SCSI SPI controller.
* Used to load the device state from older versions.
*/
typedef struct MptConfigurationPagesSupported_SSM_V2
{
MptConfigurationPageManufacturing0 ManufacturingPage0;
MptConfigurationPageManufacturing1 ManufacturingPage1;
MptConfigurationPageManufacturing2 ManufacturingPage2;
MptConfigurationPageManufacturing3 ManufacturingPage3;
MptConfigurationPageManufacturing4 ManufacturingPage4;
MptConfigurationPageIOUnit0 IOUnitPage0;
MptConfigurationPageIOUnit1 IOUnitPage1;
MptConfigurationPageIOUnit2 IOUnitPage2;
MptConfigurationPageIOUnit3 IOUnitPage3;
MptConfigurationPageIOC0 IOCPage0;
MptConfigurationPageIOC1 IOCPage1;
MptConfigurationPageIOC2 IOCPage2;
MptConfigurationPageIOC3 IOCPage3;
MptConfigurationPageIOC4 IOCPage4;
MptConfigurationPageIOC6 IOCPage6;
struct
{
MptConfigurationPageSCSISPIPort0 SCSISPIPortPage0;
MptConfigurationPageSCSISPIPort1 SCSISPIPortPage1;
MptConfigurationPageSCSISPIPort2 SCSISPIPortPage2;
} aPortPages[1]; /* Currently only one port supported. */
struct
{
struct
{
MptConfigurationPageSCSISPIDevice0 SCSISPIDevicePage0;
MptConfigurationPageSCSISPIDevice1 SCSISPIDevicePage1;
MptConfigurationPageSCSISPIDevice2 SCSISPIDevicePage2;
MptConfigurationPageSCSISPIDevice3 SCSISPIDevicePage3;
} aDevicePages[LSILOGICSCSI_PCI_SPI_DEVICES_MAX];
} aBuses[1]; /* Only one bus at the moment. */
} MptConfigurationPagesSupported_SSM_V2, *PMptConfigurationPagesSupported_SSM_V2;
typedef struct MptConfigurationPagesSpi
{
struct
{
MptConfigurationPageSCSISPIPort0 SCSISPIPortPage0;
MptConfigurationPageSCSISPIPort1 SCSISPIPortPage1;
MptConfigurationPageSCSISPIPort2 SCSISPIPortPage2;
} aPortPages[1]; /* Currently only one port supported. */
struct
{
struct
{
MptConfigurationPageSCSISPIDevice0 SCSISPIDevicePage0;
MptConfigurationPageSCSISPIDevice1 SCSISPIDevicePage1;
MptConfigurationPageSCSISPIDevice2 SCSISPIDevicePage2;
MptConfigurationPageSCSISPIDevice3 SCSISPIDevicePage3;
} aDevicePages[LSILOGICSCSI_PCI_SPI_DEVICES_MAX];
} aBuses[1]; /* Only one bus at the moment. */
} MptConfigurationPagesSpi, *PMptConfigurationPagesSpi;
typedef struct MptPHY
{
MptConfigurationPageSASPHY0 SASPHYPage0;
MptConfigurationPageSASPHY1 SASPHYPage1;
} MptPHY, *PMptPHY;
#pragma pack(1)
typedef struct MptConfigurationPagesSas
{
/** Size of the manufacturing page 7 */
uint32_t cbManufacturingPage7;
/** Pointer to the manufacturing page 7 */
PMptConfigurationPageManufacturing7 pManufacturingPage7;
/** Size of the I/O unit page 0 */
uint32_t cbSASIOUnitPage0;
/** Pointer to the I/O unit page 0 */
PMptConfigurationPageSASIOUnit0 pSASIOUnitPage0;
/** Size of the I/O unit page 1 */
uint32_t cbSASIOUnitPage1;
/** Pointer to the I/O unit page 1 */
PMptConfigurationPageSASIOUnit1 pSASIOUnitPage1;
/** I/O unit page 2 */
MptConfigurationPageSASIOUnit2 SASIOUnitPage2;
/** I/O unit page 3 */
MptConfigurationPageSASIOUnit3 SASIOUnitPage3;
/** Number of PHYs in the array. */
uint32_t cPHYs;
/** Pointer to an array of per PHYS pages. */
R3PTRTYPE(PMptPHY) paPHYs;
/** Number of devices detected. */
uint32_t cDevices;
/** Pointer to the first SAS device. */
R3PTRTYPE(PMptSASDevice) pSASDeviceHead;
/** Pointer to the last SAS device. */
R3PTRTYPE(PMptSASDevice) pSASDeviceTail;
} MptConfigurationPagesSas, *PMptConfigurationPagesSas;
#pragma pack()
/**
* Structure of all supported pages for both controllers.
*/
typedef struct MptConfigurationPagesSupported
{
MptConfigurationPageManufacturing0 ManufacturingPage0;
MptConfigurationPageManufacturing1 ManufacturingPage1;
MptConfigurationPageManufacturing2 ManufacturingPage2;
MptConfigurationPageManufacturing3 ManufacturingPage3;
MptConfigurationPageManufacturing4 ManufacturingPage4;
MptConfigurationPageManufacturing5 ManufacturingPage5;
MptConfigurationPageManufacturing6 ManufacturingPage6;
MptConfigurationPageManufacturing8 ManufacturingPage8;
MptConfigurationPageManufacturing9 ManufacturingPage9;
MptConfigurationPageManufacturing10 ManufacturingPage10;
MptConfigurationPageIOUnit0 IOUnitPage0;
MptConfigurationPageIOUnit1 IOUnitPage1;
MptConfigurationPageIOUnit2 IOUnitPage2;
MptConfigurationPageIOUnit3 IOUnitPage3;
MptConfigurationPageIOUnit4 IOUnitPage4;
MptConfigurationPageIOC0 IOCPage0;
MptConfigurationPageIOC1 IOCPage1;
MptConfigurationPageIOC2 IOCPage2;
MptConfigurationPageIOC3 IOCPage3;
MptConfigurationPageIOC4 IOCPage4;
MptConfigurationPageIOC6 IOCPage6;
/* BIOS page 0 is not described */
MptConfigurationPageBIOS1 BIOSPage1;
MptConfigurationPageBIOS2 BIOSPage2;
/* BIOS page 3 is not described */
MptConfigurationPageBIOS4 BIOSPage4;
/** Controller dependent data. */
union
{
MptConfigurationPagesSpi SpiPages;
MptConfigurationPagesSas SasPages;
} u;
} MptConfigurationPagesSupported, *PMptConfigurationPagesSupported;
/**
* Initializes a page header.
*/
#define MPT_CONFIG_PAGE_HEADER_INIT(pg, type, nr, flags) \
(pg)->u.fields.Header.u8PageType = flags; \
(pg)->u.fields.Header.u8PageNumber = nr; \
(pg)->u.fields.Header.u8PageLength = sizeof(type) / 4
#define MPT_CONFIG_PAGE_HEADER_INIT_MANUFACTURING(pg, type, nr, flags) \
MPT_CONFIG_PAGE_HEADER_INIT(pg, type, nr, flags | MPT_CONFIGURATION_PAGE_TYPE_MANUFACTURING)
#define MPT_CONFIG_PAGE_HEADER_INIT_IO_UNIT(pg, type, nr, flags) \
MPT_CONFIG_PAGE_HEADER_INIT(pg, type, nr, flags | MPT_CONFIGURATION_PAGE_TYPE_IO_UNIT)
#define MPT_CONFIG_PAGE_HEADER_INIT_IOC(pg, type, nr, flags) \
MPT_CONFIG_PAGE_HEADER_INIT(pg, type, nr, flags | MPT_CONFIGURATION_PAGE_TYPE_IOC)
#define MPT_CONFIG_PAGE_HEADER_INIT_BIOS(pg, type, nr, flags) \
MPT_CONFIG_PAGE_HEADER_INIT(pg, type, nr, flags | MPT_CONFIGURATION_PAGE_TYPE_BIOS)
/**
* Initializes a extended page header.
*/
#define MPT_CONFIG_EXTENDED_PAGE_HEADER_INIT(pg, cb, nr, flags, exttype) \
(pg)->u.fields.ExtHeader.u8PageType = flags | MPT_CONFIGURATION_PAGE_TYPE_EXTENDED; \
(pg)->u.fields.ExtHeader.u8PageNumber = nr; \
(pg)->u.fields.ExtHeader.u8ExtPageType = exttype; \
(pg)->u.fields.ExtHeader.u16ExtPageLength = cb / 4
/**
* Possible SG element types.
*/
enum MPTSGENTRYTYPE
{
MPTSGENTRYTYPE_TRANSACTION_CONTEXT = 0x00,
MPTSGENTRYTYPE_SIMPLE = 0x01,
MPTSGENTRYTYPE_CHAIN = 0x03
};
/**
* Register interface.
*/
/**
* Defined states that the SCSI controller can have.
*/
typedef enum LSILOGICSTATE
{
/** Reset state. */
LSILOGICSTATE_RESET = 0x00,
/** Ready state. */
LSILOGICSTATE_READY = 0x01,
/** Operational state. */
LSILOGICSTATE_OPERATIONAL = 0x02,
/** Fault state. */
LSILOGICSTATE_FAULT = 0x04,
/** 32bit size hack */
LSILOGICSTATE_32BIT_HACK = 0x7fffffff
} LSILOGICSTATE;
/**
* Which entity needs to initialize the controller
* to get into the operational state.
*/
typedef enum LSILOGICWHOINIT
{
/** Not initialized. */
LSILOGICWHOINIT_NOT_INITIALIZED = 0x00,
/** System BIOS. */
LSILOGICWHOINIT_SYSTEM_BIOS = 0x01,
/** ROM Bios. */
LSILOGICWHOINIT_ROM_BIOS = 0x02,
/** PCI Peer. */
LSILOGICWHOINIT_PCI_PEER = 0x03,
/** Host driver. */
LSILOGICWHOINIT_HOST_DRIVER = 0x04,
/** Manufacturing. */
LSILOGICWHOINIT_MANUFACTURING = 0x05,
/** 32bit size hack. */
LSILOGICWHOINIT_32BIT_HACK = 0x7fffffff
} LSILOGICWHOINIT;
/**
* IOC status codes.
*/
#define LSILOGIC_IOCSTATUS_SUCCESS 0x0000
#define LSILOGIC_IOCSTATUS_INVALID_FUNCTION 0x0001
#define LSILOGIC_IOCSTATUS_BUSY 0x0002
#define LSILOGIC_IOCSTATUS_INVALID_SGL 0x0003
#define LSILOGIC_IOCSTATUS_INTERNAL_ERROR 0x0004
#define LSILOGIC_IOCSTATUS_RESERVED 0x0005
#define LSILOGIC_IOCSTATUS_INSUFFICIENT_RESOURCES 0x0006
#define LSILOGIC_IOCSTATUS_INVALID_FIELD 0x0007
#define LSILOGIC_IOCSTATUS_INVALID_STATE 0x0008
#define LSILOGIC_IOCSTATUS_OP_STATE_NOT_SUPPOTED 0x0009
/**
* Size of the I/O and MMIO space.
*/
#define LSILOGIC_PCI_SPACE_IO_SIZE 256
#define LSILOGIC_PCI_SPACE_MEM_SIZE 128 * _1K
/**
* Doorbell register - Used to get the status of the controller and
* initialise it.
*/
#define LSILOGIC_REG_DOORBELL 0x00
# define LSILOGIC_REG_DOORBELL_SET_STATE(enmState) (((enmState) & 0x0f) << 28)
# define LSILOGIC_REG_DOORBELL_SET_USED(fUsed) (((fUsed) ? 1 : 0) << 27)
# define LSILOGIC_REG_DOORBELL_SET_WHOINIT(enmWhoInit) (((enmWhoInit) & 0x07) << 24)
# define LSILOGIC_REG_DOORBELL_SET_FAULT_CODE(u16Code) (u16Code)
# define LSILOGIC_REG_DOORBELL_GET_FUNCTION(x) (((x) & 0xff000000) >> 24)
# define LSILOGIC_REG_DOORBELL_GET_SIZE(x) (((x) & 0x00ff0000) >> 16)
/**
* Functions which can be passed through the system doorbell.
*/
#define LSILOGIC_DOORBELL_FUNCTION_IOC_MSG_UNIT_RESET 0x40
#define LSILOGIC_DOORBELL_FUNCTION_IO_UNIT_RESET 0x41
#define LSILOGIC_DOORBELL_FUNCTION_HANDSHAKE 0x42
#define LSILOGIC_DOORBELL_FUNCTION_REPLY_FRAME_REMOVAL 0x43
/**
* Write sequence register for the diagnostic register.
*/
#define LSILOGIC_REG_WRITE_SEQUENCE 0x04
/**
* Diagnostic register - used to reset the controller.
*/
#define LSILOGIC_REG_HOST_DIAGNOSTIC 0x08
# define LSILOGIC_REG_HOST_DIAGNOSTIC_DIAG_MEM_ENABLE (RT_BIT(0))
# define LSILOGIC_REG_HOST_DIAGNOSTIC_DISABLE_ARM (RT_BIT(1))
# define LSILOGIC_REG_HOST_DIAGNOSTIC_RESET_ADAPTER (RT_BIT(2))
# define LSILOGIC_REG_HOST_DIAGNOSTIC_DIAG_RW_ENABLE (RT_BIT(4))
# define LSILOGIC_REG_HOST_DIAGNOSTIC_RESET_HISTORY (RT_BIT(5))
# define LSILOGIC_REG_HOST_DIAGNOSTIC_FLASH_BAD_SIG (RT_BIT(6))
# define LSILOGIC_REG_HOST_DIAGNOSTIC_DRWE (RT_BIT(7))
# define LSILOGIC_REG_HOST_DIAGNOSTIC_PREVENT_IOC_BOOT (RT_BIT(9))
# define LSILOGIC_REG_HOST_DIAGNOSTIC_CLEAR_FLASH_BAD_SIG (RT_BIT(10))
#define LSILOGIC_REG_TEST_BASE_ADDRESS 0x0c
#define LSILOGIC_REG_DIAG_RW_DATA 0x10
#define LSILOGIC_REG_DIAG_RW_ADDRESS 0x14
/**
* Interrupt status register.
*/
#define LSILOGIC_REG_HOST_INTR_STATUS 0x30
# define LSILOGIC_REG_HOST_INTR_STATUS_W_MASK (RT_BIT(3))
# define LSILOGIC_REG_HOST_INTR_STATUS_DOORBELL_STS (RT_BIT(31))
# define LSILOGIC_REG_HOST_INTR_STATUS_REPLY_INTR (RT_BIT(3))
# define LSILOGIC_REG_HOST_INTR_STATUS_SYSTEM_DOORBELL (RT_BIT(0))
/**
* Interrupt mask register.
*/
#define LSILOGIC_REG_HOST_INTR_MASK 0x34
# define LSILOGIC_REG_HOST_INTR_MASK_W_MASK (RT_BIT(0) | RT_BIT(3) | RT_BIT(8) | RT_BIT(9))
# define LSILOGIC_REG_HOST_INTR_MASK_IRQ_ROUTING (RT_BIT(8) | RT_BIT(9))
# define LSILOGIC_REG_HOST_INTR_MASK_DOORBELL RT_BIT(0)
# define LSILOGIC_REG_HOST_INTR_MASK_REPLY RT_BIT(3)
/**
* Queue registers.
*/
#define LSILOGIC_REG_REQUEST_QUEUE 0x40
#define LSILOGIC_REG_REPLY_QUEUE 0x44
#endif /* __DEVLSILOGICSCSI_H__ */