DevATA.cpp revision 41119dda686637ba0f50076069dd2a04e0b270f7
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync * VBox storage devices: ATA/ATAPI controller device (disk and cdrom).
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync * Copyright (C) 2006-2011 Oracle Corporation
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync * This file is part of VirtualBox Open Source Edition (OSE), as
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync * available from http://www.virtualbox.org. This file is free software;
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync * you can redistribute it and/or modify it under the terms of the GNU
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync * General Public License (GPL) as published by the Free Software
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync * Foundation, in version 2 as it comes in the "COPYING" file of the
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync/*******************************************************************************
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync* Defined Constants And Macros *
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync*******************************************************************************/
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync/** Temporary instrumentation for tracking down potential virtual disk
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync * write performance issues. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync/** @name The SSM saved state versions.
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync/** The current saved state version. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync/** The saved state version used by VirtualBox 3.0.
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync * This lacks the config part and has the type at the and. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync#define ATA_SAVED_STATE_VERSION_WITHOUT_FULL_SENSE 16
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync#define ATA_SAVED_STATE_VERSION_WITHOUT_EVENT_STATUS 17
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync/*******************************************************************************
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync* Header Files *
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync*******************************************************************************/
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync#endif /* IN_RING3 */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync/*******************************************************************************
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync* Defined Constants And Macros *
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync*******************************************************************************/
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync * Maximum number of sectors to transfer in a READ/WRITE MULTIPLE request.
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync * Set to 1 to disable multi-sector read support. According to the ATA
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync * specification this must be a power of 2 and it must fit in an 8 bit
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync * value. Thus the only valid values are 1, 2, 4, 8, 16, 32, 64 and 128.
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync * Fastest PIO mode supported by the drive.
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync * Fastest MDMA mode supported by the drive.
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync * Fastest UDMA mode supported by the drive.
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync/** ATAPI sense info size. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync/** The maximum number of release log entries per device. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync/* MediaEventStatus */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync#define ATA_EVENT_STATUS_UNCHANGED 0 /**< medium event status not changed */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync#define ATA_EVENT_STATUS_MEDIA_NEW 1 /**< new medium inserted */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync#define ATA_EVENT_STATUS_MEDIA_REMOVED 2 /**< medium removed */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync#define ATA_EVENT_STATUS_MEDIA_CHANGED 3 /**< medium was removed + new medium was inserted */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync#define ATA_EVENT_STATUS_MEDIA_EJECT_REQUESTED 4 /**< medium eject requested (eject button pressed) */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync/* Media track type */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync#define ATA_MEDIA_TYPE_UNKNOWN 0 /**< unknown CD type */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync#define ATA_MEDIA_TYPE_CDDA 2 /**< CD-DA (audio) CD type */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync#define ATA_MEDIA_NO_DISC 0x70 /**< Door closed, no medium */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync/*******************************************************************************
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync* Structures and Typedefs *
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync*******************************************************************************/
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync * The state of an ATA device.
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync * @implements PDMIBASE
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync * @implements PDMIBLOCKPORT
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync * @implements PDMIMOUNTNOTIFY
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsynctypedef struct ATADevState
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** Flag indicating whether the current command uses LBA48 mode. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** Flag indicating whether this drive implements the ATAPI command set. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** Set if this interface has asserted the IRQ. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** Currently configured number of sectors in a multi-sector transfer. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** PCHS disk geometry. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** Total number of sectors on this disk. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** Number of sectors to transfer per IRQ. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** ATA/ATAPI register 1: feature (write-only). */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** ATA/ATAPI register 1: feature, high order byte. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** ATA/ATAPI register 1: error (read-only). */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** ATA/ATAPI register 2: sector count (read/write). */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** ATA/ATAPI register 2: sector count, high order byte. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** ATA/ATAPI register 3: sector, high order byte. */
25747178cb66800d8386c20b8ffd87f78f24f4e5vboxsync /** ATA/ATAPI register 4: cylinder low (read/write). */
25747178cb66800d8386c20b8ffd87f78f24f4e5vboxsync /** ATA/ATAPI register 4: cylinder low, high order byte. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** ATA/ATAPI register 5: cylinder high (read/write). */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** ATA/ATAPI register 5: cylinder high, high order byte. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** ATA/ATAPI register 6: select drive/head (read/write). */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** ATA/ATAPI register 7: status (read-only). */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** ATA/ATAPI register 7: command (write-only). */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** ATA/ATAPI drive control register (write-only). */
25747178cb66800d8386c20b8ffd87f78f24f4e5vboxsync /** Currently active transfer mode (MDMA/UDMA) and speed. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** Current transfer direction. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** Index of callback for begin transfer. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** Index of callback for source/sink of data. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** Flag indicating whether the current command transfers data in DMA mode. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** Set to indicate that ATAPI transfer semantics must be used. */
25747178cb66800d8386c20b8ffd87f78f24f4e5vboxsync /** Total ATA/ATAPI transfer size, shared PIO/DMA. */
25747178cb66800d8386c20b8ffd87f78f24f4e5vboxsync /** Elementary ATA/ATAPI transfer size, shared PIO/DMA. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** Current read/write buffer position, shared PIO/DMA. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** First element beyond end of valid buffer content, shared PIO/DMA. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** ATA/ATAPI current PIO read/write transfer position. Not shared with DMA for safety reasons. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** ATA/ATAPI current PIO read/write transfer end. Not shared with DMA for safety reasons. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** ATAPI current LBA position. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** ATAPI current sector size. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** ATAPI current command. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** ATAPI sense data. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** HACK: Countdown till we report a newly unmounted drive as mounted. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** The same for GET_EVENT_STATUS for mechanism */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** Media type if known. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** The status LED state for this drive. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** Size of I/O buffer. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** Pointer to the I/O buffer. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** Pointer to the I/O buffer. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** Pointer to the I/O buffer. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync RTRCPTR Aligmnent1; /**< Align the statistics at an 8-byte boundary. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync * No data that is part of the saved state after this point!!!!!
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /* Release statistics: number of ATA DMA commands. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /* Release statistics: number of ATA PIO commands. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /* Release statistics: number of ATAPI PIO commands. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /* Release statistics: number of ATAPI PIO commands. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /* Release statistics: number of DMA sector writes and the time spent. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** Statistics: number of read operations and the time spent reading. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** Statistics: number of bytes read. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** Statistics: number of write operations and the time spent writing. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** Statistics: number of bytes written. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** Statistics: number of flush operations and the time spend flushing. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** Mark the drive as having a non-rotational medium (i.e. as a SSD). */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** Enable passing through commands directly to the ATAPI drive. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** Flag whether to overwrite inquiry data in passthrough mode. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** Number of errors we've reported to the release log.
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync * This is to prevent flooding caused by something going horribly wrong.
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync * this value against MAX_LOG_REL_ERRORS in places likely to cause floods
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync * like the ones we currently seeing on the linux smoke tests (2006-11-10). */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** Timestamp of last started command. 0 if no command pending. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** Pointer to the attached driver's base interface. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** Pointer to the attached driver's block interface. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** Pointer to the attached driver's block bios interface. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** Pointer to the attached driver's mount interface.
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync * This is NULL if the driver isn't a removable unit. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** The base interface. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** The block port interface. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** The mount notify interface. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** The LUN #. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync RTUINT Alignment2; /**< Align pDevInsR3 correctly. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** Pointer to device instance. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** Pointer to controller instance. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** Pointer to device instance. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** Pointer to controller instance. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** Pointer to device instance. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** Pointer to controller instance. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** The serial number to use for IDENTIFY DEVICE commands. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** The firmware revision to use for IDENTIFY DEVICE commands. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync char szFirmwareRevision[ATA_FIRMWARE_REVISION_LENGTH+1];
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** The model number to use for IDENTIFY DEVICE commands. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** The vendor identification string for SCSI INQUIRY commands. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync char szInquiryVendorId[ATAPI_INQUIRY_VENDOR_ID_LENGTH+1];
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** The product identification string for SCSI INQUIRY commands. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync char szInquiryProductId[ATAPI_INQUIRY_PRODUCT_ID_LENGTH+1];
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** The revision string for SCSI INQUIRY commands. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync char szInquiryRevision[ATAPI_INQUIRY_REVISION_LENGTH+1];
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** Size of the current CUE sheet in bytes. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** Align pbCueSheet correctly. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** The current CUE Sheet if passthrough is used. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsyncAssertCompileMemberAlignment(ATADevState, cTotalSectors, 8);
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsyncAssertCompileMemberAlignment(ATADevState, StatATADMA, 8);
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsyncAssertCompileMemberAlignment(ATADevState, u64CmdTS, 8);
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsyncAssertCompileMemberAlignment(ATADevState, pDevInsR3, 8);
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsyncAssertCompileMemberAlignment(ATADevState, szSerialNumber, 8);
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsynctypedef enum
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** Begin a new transfer. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** Continue a DMA transfer. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** Continue a PIO transfer. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** Reset the drives on current controller, stop all transfer activity. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** Reset the drives on current controller, resume operation. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** Abort the current transfer of a particular drive. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsynctypedef struct ATARequest
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** The base of the first I/O Port range. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** The base of the second I/O Port range. (0 if none) */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** The assigned IRQ. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** Access critical section */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** Selected drive. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** The interface on which to handle async I/O. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** The state of the async I/O thread. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** Flag indicating whether the next transfer is part of the current command. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** Set when the reset processing is currently active on this controller. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** Flag whether the current transfer needs to be redone. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** Flag whether the redo suspend has been finished. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** Flag whether the DMA operation to be redone is the final transfer. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** The BusMaster DMA state. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** Pointer to first DMA descriptor. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** Pointer to last DMA descriptor. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** Pointer to current DMA buffer (for redo operations). */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** Size of current DMA buffer (for redo operations). */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** The ATA/ATAPI interfaces of this controller. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** Pointer to device instance. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** Pointer to device instance. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** Pointer to device instance. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** Set when the destroying the device instance and the thread must exit. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** The async I/O thread handle. NIL_RTTHREAD if no thread. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** The event semaphore the thread is waiting on for requests. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** The request queue for the AIO thread. One element is always unused. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** The position at which to insert a new request for the AIO thread. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** The position at which to get a new request for the AIO thread. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** Whether to call PDMDevHlpAsyncNotificationCompleted when idle. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync bool volatile fSignalIdle;
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync uint8_t Alignment3[1]; /**< Explicit padding of the 1 byte gap. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** Magic delay before triggering interrupts in DMA mode. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** The mutex protecting the request queue. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** The event semaphore the thread is waiting on during suspended I/O. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync#if 0 /*HC_ARCH_BITS == 32*/
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** Timestamp we started the reset. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /* Statistics */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsyncAssertCompileMemberAlignment(ATACONTROLLER, lock, 8);
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsyncAssertCompileMemberAlignment(ATACONTROLLER, aIfs, 8);
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsyncAssertCompileMemberAlignment(ATACONTROLLER, u64ResetTime, 8);
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsyncAssertCompileMemberAlignment(ATACONTROLLER, StatAsyncOps, 8);
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** PIIX3 chipset, must be 0 for saved state compatibility */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** PIIX4 chipset, must be 1 for saved state compatibility */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** ICH6 chipset */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync * The state of the ATA PCI device.
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync * @extends PCIDEVICE
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync * @implements PDMILEDPORTS
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsynctypedef struct PCIATAState
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** The controllers. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** Pointer to device instance. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** Status LUN: Base interface. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** Status LUN: Leds interface. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** Status LUN: Partner of ILeds. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** Status LUN: Media Notify. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** Flag whether GC is enabled. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** Flag whether R0 is enabled. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /** Flag indicating chipset being emulated. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync bool Alignment0[HC_ARCH_BITS == 64 ? 5 : 1 ]; /**< Align the struct size. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync#define PDMIBASE_2_PCIATASTATE(pInterface) ( (PCIATAState *)((uintptr_t)(pInterface) - RT_OFFSETOF(PCIATAState, IBase)) )
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync#define PDMILEDPORTS_2_PCIATASTATE(pInterface) ( (PCIATAState *)((uintptr_t)(pInterface) - RT_OFFSETOF(PCIATAState, ILeds)) )
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync#define PDMIBLOCKPORT_2_ATASTATE(pInterface) ( (ATADevState *)((uintptr_t)(pInterface) - RT_OFFSETOF(ATADevState, IPort)) )
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync#define PDMIMOUNT_2_ATASTATE(pInterface) ( (ATADevState *)((uintptr_t)(pInterface) - RT_OFFSETOF(ATADevState, IMount)) )
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync#define PDMIMOUNTNOTIFY_2_ATASTATE(pInterface) ( (ATADevState *)((uintptr_t)(pInterface) - RT_OFFSETOF(ATADevState, IMountNotify)) )
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync#define PCIDEV_2_PCIATASTATE(pPciDev) ( (PCIATAState *)(pPciDev) )
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync#define ATACONTROLLER_IDX(pController) ( (pController) - PDMINS_2_DATA(CONTROLLER_2_DEVINS(pController), PCIATAState *)->aCts )
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync#define ATADEVSTATE_2_CONTROLLER(pIf) ( (pIf)->CTX_SUFF(pController) )
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync#define ATADEVSTATE_2_DEVINS(pIf) ( (pIf)->CTX_SUFF(pDevIns) )
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync#define CONTROLLER_2_DEVINS(pController) ( (pController)->CTX_SUFF(pDevIns) )
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync#define PDMIBASE_2_ATASTATE(pInterface) ( (ATADevState *)((uintptr_t)(pInterface) - RT_OFFSETOF(ATADevState, IBase)) )
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync#define PDMIBLOCKPORT_2_ATASTATE(pInterface) ( (ATADevState *)((uintptr_t)(pInterface) - RT_OFFSETOF(ATADevState, IPort)) )
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync/*******************************************************************************
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync * Internal Functions *
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync ******************************************************************************/
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsyncPDMBOTHCBDECL(int) ataIOPortWrite1(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb);
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsyncPDMBOTHCBDECL(int) ataIOPortRead1(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *u32, unsigned cb);
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsyncPDMBOTHCBDECL(int) ataIOPortWriteStr1(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, RTGCPTR *pGCPtrSrc, PRTGCUINTREG pcTransfer, unsigned cb);
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsyncPDMBOTHCBDECL(int) ataIOPortReadStr1(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, RTGCPTR *pGCPtrDst, PRTGCUINTREG pcTransfer, unsigned cb);
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsyncPDMBOTHCBDECL(int) ataIOPortWrite2(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb);
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsyncPDMBOTHCBDECL(int) ataIOPortRead2(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *u32, unsigned cb);
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsyncPDMBOTHCBDECL(int) ataBMDMAIOPortWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb);
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsyncPDMBOTHCBDECL(int) ataBMDMAIOPortRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb);
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsyncDECLINLINE(void) ataSetStatusValue(ATADevState *s, uint8_t stat)
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /* Freeze status register contents while processing RESET. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync Log2(("%s: LUN#%d status %#04x\n", __FUNCTION__, s->iLUN, s->uATARegStatus));
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsyncDECLINLINE(void) ataSetStatus(ATADevState *s, uint8_t stat)
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /* Freeze status register contents while processing RESET. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync Log2(("%s: LUN#%d status %#04x\n", __FUNCTION__, s->iLUN, s->uATARegStatus));
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsyncDECLINLINE(void) ataUnsetStatus(ATADevState *s, uint8_t stat)
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync /* Freeze status register contents while processing RESET. */
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync Log2(("%s: LUN#%d status %#04x\n", __FUNCTION__, s->iLUN, s->uATARegStatus));
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsyncstatic bool ataExecuteDeviceDiagnosticSS(ATADevState *);
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsyncstatic bool atapiGetEventStatusNotificationSS(ATADevState *);
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsyncstatic bool atapiModeSenseErrorRecoverySS(ATADevState *);
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsyncstatic bool atapiModeSenseCDStatusSS(ATADevState *);
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsyncstatic bool atapiReadDiscInformationSS(ATADevState *);
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsyncstatic bool atapiReadTrackInformationSS(ATADevState *);
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync * Begin of transfer function indexes for g_apfnBeginTransFuncs.
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync * Array of end transfer functions, the index is ATAFNET.
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync * Make sure ATAFNET and this array match!
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsyncstatic const PBeginTransferFunc g_apfnBeginTransFuncs[ATAFN_BT_MAX] =
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync * Source/sink function indexes for g_apfnSourceSinkFuncs.
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync * Array of source/sink functions, the index is ATAFNSS.
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync * Make sure ATAFNSS and this array match!
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsyncstatic const PSourceSinkFunc g_apfnSourceSinkFuncs[ATAFN_SS_MAX] =
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsyncstatic const ATARequest g_ataDMARequest = { ATA_AIO_DMA, { { 0, 0, 0, 0, 0 } } };
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsyncstatic const ATARequest g_ataPIORequest = { ATA_AIO_PIO, { { 0, 0, 0, 0, 0 } } };
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsyncstatic const ATARequest g_ataResetARequest = { ATA_AIO_RESET_ASSERTED, { { 0, 0, 0, 0, 0 } } };
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsyncstatic const ATARequest g_ataResetCRequest = { ATA_AIO_RESET_CLEARED, { { 0, 0, 0, 0, 0 } } };
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsyncstatic void ataAsyncIOClearRequests(PATACONTROLLER pCtl)
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync rc = RTSemMutexRequest(pCtl->AsyncIORequestMutex, RT_INDEFINITE_WAIT);
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsyncstatic void ataAsyncIOPutRequest(PATACONTROLLER pCtl, const ATARequest *pReq)
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync rc = RTSemMutexRequest(pCtl->AsyncIORequestMutex, RT_INDEFINITE_WAIT);
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync Assert((pCtl->AsyncIOReqHead + 1) % RT_ELEMENTS(pCtl->aAsyncIORequests) != pCtl->AsyncIOReqTail);
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync memcpy(&pCtl->aAsyncIORequests[pCtl->AsyncIOReqHead], pReq, sizeof(*pReq));
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync pCtl->AsyncIOReqHead %= RT_ELEMENTS(pCtl->aAsyncIORequests);
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync rc = PDMR3CritSectScheduleExitEvent(&pCtl->lock, pCtl->AsyncIOSem);
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsyncstatic const ATARequest *ataAsyncIOGetCurrentRequest(PATACONTROLLER pCtl)
24ab761b2beb5af0393c6f2585b6351d8b3085f0vboxsync rc = RTSemMutexRequest(pCtl->AsyncIORequestMutex, RT_INDEFINITE_WAIT);
return pReq;
int rc;
if (pCtl->AsyncIOReqHead != pCtl->AsyncIOReqTail && pCtl->aAsyncIORequests[pCtl->AsyncIOReqTail].ReqType == ReqType)
int rc;
case ATA_AIO_NEW:
LogRel(("new transfer request, iIf=%d iBeginTransfer=%d iSourceSink=%d cbTotalTransfer=%d uTxDir=%d\n", pCtl->aAsyncIORequests[curr].u.t.iIf, pCtl->aAsyncIORequests[curr].u.t.iBeginTransfer, pCtl->aAsyncIORequests[curr].u.t.iSourceSink, pCtl->aAsyncIORequests[curr].u.t.cbTotalTransfer, pCtl->aAsyncIORequests[curr].u.t.uTxDir));
case ATA_AIO_DMA:
case ATA_AIO_PIO:
case ATA_AIO_RESET_ASSERTED:
case ATA_AIO_RESET_CLEARED:
case ATA_AIO_ABORT:
LogRel(("abort request, iIf=%d fResetDrive=%d\n", pCtl->aAsyncIORequests[curr].u.a.iIf, pCtl->aAsyncIORequests[curr].u.a.fResetDrive));
int rc;
bool fIdle;
if (!fIdle)
if (fStrict)
return fIdle;
static void ataStartTransfer(ATADevState *s, uint32_t cbTotalTransfer, uint8_t uTxDir, ATAFNBT iBeginTransfer, ATAFNSS iSourceSink, bool fChainedTransfer)
Log2(("%s: Ctl#%d: suppressed new request as RESET is active\n", __FUNCTION__, ATACONTROLLER_IDX(pCtl)));
Log(("%s: Ctl#%d: ignored command %#04x, controller state %d\n", __FUNCTION__, ATACONTROLLER_IDX(pCtl), s->uATARegCommand, pCtl->uAsyncIOState));
if (fChainedTransfer)
Log2(("%s: Ctl#%d: message to async I/O thread, new request\n", __FUNCTION__, ATACONTROLLER_IDX(pCtl)));
Log2(("%s: Ctl#%d: suppressed aborting command as RESET is active\n", __FUNCTION__, ATACONTROLLER_IDX(pCtl)));
Log2(("%s: Ctl#%d: message to async I/O thread, abort command on LUN#%d\n", __FUNCTION__, ATACONTROLLER_IDX(pCtl), s->iLUN));
if (!s->fIrqPending)
s->fIrqPending = true;
s->fIrqPending = false;
#ifdef IN_RING3
if (s->fATAPITransfer)
ataSetIRQ(s);
s->fATAPITransfer = false;
s->cbTotalTransfer = 0;
s->cbElementaryTransfer = 0;
s->iIOBufferPIODataStart = 0;
s->iIOBufferPIODataEnd = 0;
if (cbLimit == 0)
cbLimit--;
cbLimit--;
if (s->fLBA48)
if (!s->uATARegNSector)
return s->uATARegNSector;
if (*pbSrc)
if (*pbSrc)
int iRes = 0;
return iRes;
if (s->pbCueSheet)
if (pbCueSheetEntry)
cbATAPISector = 0;
return cbATAPISector;
s->cbTotalTransfer = 0;
s->cbElementaryTransfer = 0;
s->iIOBufferCur = 0;
s->iIOBufferEnd = 0;
size_t i;
for (i = 0; i < count; i++)
u8Sum += *p++;
uint16_t *p;
ataPadString((uint8_t *)(p + 23), s->szFirmwareRevision, ATA_FIRMWARE_REVISION_LENGTH); /* firmware version */
if (s->cMultSectors)
p[63] = RT_H2LE_U16(ATA_TRANSFER_ID(ATA_MODE_MDMA, ATA_MDMA_MODE_MAX, s->uATATransferMode)); /* MDMA modes supported / mode enabled */
p[64] = RT_H2LE_U16(ATA_PIO_MODE_MAX > 2 ? (1 << (ATA_PIO_MODE_MAX - 2)) - 1 : 0); /* PIO modes beyond PIO2 supported */
p[82] = RT_H2LE_U16(1 << 3 | 1 << 5 | 1 << 6); /* supports power management, write cache and look-ahead */
p[83] = RT_H2LE_U16(1 << 14 | 1 << 10 | 1 << 12 | 1 << 13); /* supports LBA48, FLUSH CACHE and FLUSH CACHE EXT */
p[85] = RT_H2LE_U16(1 << 3 | 1 << 5 | 1 << 6); /* enabled power management, write cache and look-ahead */
p[86] = RT_H2LE_U16(1 << 10 | 1 << 12 | 1 << 13); /* enabled LBA48, FLUSH CACHE and FLUSH CACHE EXT */
p[88] = RT_H2LE_U16(ATA_TRANSFER_ID(ATA_MODE_UDMA, ATA_UDMA_MODE_MAX, s->uATATransferMode)); /* UDMA modes supported / mode enabled */
if (s->pDrvBlock->pfnDiscard) /** @todo: Set bit 14 in word 69 too? (Deterministic read after TRIM). */
if (s->fNonRotational)
int rc;
ataCmdOK(s, 0);
uint16_t *p;
ataPadString((uint8_t *)(p + 23), s->szFirmwareRevision, ATA_FIRMWARE_REVISION_LENGTH); /* firmware version */
p[63] = RT_H2LE_U16(ATA_TRANSFER_ID(ATA_MODE_MDMA, ATA_MDMA_MODE_MAX, s->uATATransferMode)); /* MDMA modes supported / mode enabled */
p[64] = RT_H2LE_U16(ATA_PIO_MODE_MAX > 2 ? (1 << (ATA_PIO_MODE_MAX - 2)) - 1 : 0); /* PIO modes beyond PIO2 supported */
p[88] = RT_H2LE_U16(ATA_TRANSFER_ID(ATA_MODE_UDMA, ATA_UDMA_MODE_MAX, s->uATATransferMode)); /* UDMA modes supported / mode enabled */
if (s->fATAPI)
else if (s->pDrvBlock)
s->uATARegLCyl = 0;
s->uATARegHCyl = 0;
if (s->fLBA48)
s->uATARegSector;
iLBA = ((s->uATARegHCyl << 8) | s->uATARegLCyl) * s->PCHSGeometry.cHeads * s->PCHSGeometry.cSectors +
return iLBA;
if (s->fLBA48)
int rc;
rc = PDMDevHlpVMSetRuntimeError(pDevIns, VMSETRTERR_FLAGS_SUSPEND | VMSETRTERR_FLAGS_NO_WAIT, "DevATA_DISKFULL",
N_("Host system reported disk full. VM execution is suspended. You can resume after freeing some space"));
int rc;
rc = PDMDevHlpVMSetRuntimeError(pDevIns, VMSETRTERR_FLAGS_SUSPEND | VMSETRTERR_FLAGS_NO_WAIT, "DevATA_FILETOOBIG",
N_("Host system reported that the file size limit of the host file system has been exceeded. VM execution is suspended. You need to move your virtual hard disk to a filesystem which allows bigger files"));
int rc;
rc = PDMDevHlpVMSetRuntimeError(pDevIns, VMSETRTERR_FLAGS_SUSPEND | VMSETRTERR_FLAGS_NO_WAIT, "DevATA_ISCSIDOWN",
N_("The iSCSI target has stopped responding. VM execution is suspended. You can resume when it is available again"));
int rc;
*pfRedo = false;
return rc;
int rc;
#ifdef VBOX_INSTRUMENT_DMA_WRITES
if (s->fDMA)
#ifdef VBOX_INSTRUMENT_DMA_WRITES
if (s->fDMA)
*pfRedo = false;
return rc;
ataCmdOK(s, 0);
int rc;
bool fRedo;
if (fRedo)
return fRedo;
int rc;
bool fRedo;
if (!s->cbTotalTransfer)
if (fRedo)
return fRedo;
s->uATARegError = 0;
Log(("%s: sense=%#x (%s) asc=%#x ascq=%#x (%s)\n", __FUNCTION__, pabATAPISense[2] & 0x0f, SCSISenseText(pabATAPISense[2] & 0x0f),
s->cbTotalTransfer = 0;
s->cbElementaryTransfer = 0;
s->iIOBufferCur = 0;
s->iIOBufferEnd = 0;
s->fATAPITransfer = true;
atapiCmdOK(s);
int rc;
rc = s->pDrvBlock->pfnSendCmd(s->pDrvBlock, aModeSenseCmd, PDMBLOCKTXDIR_FROM_DEVICE, aModeSenseResult, &cbTransfer, &uDummySense, 500);
s->cbATAPISector = 0;
if (s->cbTotalTransfer == 0)
atapiCmdBT(s);
switch (s->cbATAPISector)
rc = s->pDrvBlock->pfnRead(s->pDrvBlock, (uint64_t)s->iATAPILBA * s->cbATAPISector, s->CTX_SUFF(pbIOBuffer), s->cbATAPISector * cSectors);
atapiCmdOK(s);
LogRel(("PIIX3 ATA: LUN#%d: CD-ROM read error, %d sectors at LBA %d\n", s->iLUN, cSectors, s->iATAPILBA));
#if defined(LOG_ENABLED)
switch (s->aATAPICmd[0])
case SCSI_MODE_SELECT_10:
case SCSI_SEND_CUE_SHEET:
switch (s->aATAPICmd[0])
case SCSI_READ_10:
case SCSI_WRITE_10:
case SCSI_WRITE_AND_VERIFY_10:
case SCSI_READ_12:
case SCSI_WRITE_12:
case SCSI_READ_CD:
case SCSI_READ_CD_MSF:
cReqSectors = 0;
cReqSectors = i;
switch (s->aATAPICmd[0])
case SCSI_READ_10:
case SCSI_WRITE_10:
case SCSI_WRITE_AND_VERIFY_10:
case SCSI_READ_12:
case SCSI_WRITE_12:
case SCSI_READ_CD:
case SCSI_READ_CD_MSF:
rc = s->pDrvBlock->pfnSendCmd(s->pDrvBlock, aATAPICmd, (PDMBLOCKTXDIR)s->uTxDir, pbBuf, &cbCurrTX, abATAPISense, sizeof(abATAPISense), 30000 /**< @todo timeout */);
switch (s->aATAPICmd[0])
case SCSI_READ_10:
case SCSI_WRITE_10:
case SCSI_WRITE_AND_VERIFY_10:
case SCSI_READ_12:
case SCSI_WRITE_12:
case SCSI_READ_CD:
case SCSI_READ_CD_MSF:
rc = s->pDrvBlock->pfnSendCmd(s->pDrvBlock, s->aATAPICmd, (PDMBLOCKTXDIR)s->uTxDir, s->CTX_SUFF(pbIOBuffer), &cbTransfer, abATAPISense, sizeof(abATAPISense), 30000 /**< @todo timeout */);
switch (s->aATAPICmd[0])
case SCSI_SEND_CUE_SHEET:
if (s->pbCueSheet)
s->cbCueSheet = 0;
if (s->pbCueSheet)
case SCSI_SYNCHRONIZE_CACHE:
if (s->pbCueSheet)
s->cbCueSheet = 0;
&& s->fOverwriteInquiry)
Log3(("ATAPI PT inquiry data before (%d): %.*Rhxs\n", cbTransfer, cbTransfer, s->CTX_SUFF(pbIOBuffer)));
s->iLUN,
if (cbTransfer)
atapiCmdOK(s);
s->cErrors++;
switch (format) {
if (media == 0)
switch (format)
if (layer != 0)
if (total_sectors == 0)
if (uASC < 0)
atapiCmdOK(s);
static bool atapiReadSectors(ATADevState *s, uint32_t iATAPILBA, uint32_t cSectors, uint32_t cbSector)
ataStartTransfer(s, cSectors * cbSector, PDMBLOCKTXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_READ, true);
atapiCmdOK(s);
pbBuf[7] = (0 << 7) | (0 << 6) | (1 << 5) | (0 << 2) | (0 << 0); /* disc id not valid, disc bar code not valid, unrestricted use, not dirty, not RW medium */
atapiCmdOK(s);
pbBuf[6] = (0 << 7) | (0 << 6) | (0 << 5) | (0 << 6) | (1 << 0); /* not reserved track, not blank, not packet writing, not fixed packet, data mode 1 */
pbBuf[7] = (0 << 1) | (0 << 0); /* last recorded address not valid, next recordable address not valid */
atapiCmdOK(s);
static size_t atapiGetConfigurationFillFeatureListProfiles(ATADevState *s, uint8_t *pbBuf, size_t cbBuf)
static size_t atapiGetConfigurationFillFeatureMorphing(ATADevState *s, uint8_t *pbBuf, size_t cbBuf)
static size_t atapiGetConfigurationFillFeatureRemovableMedium(ATADevState *s, uint8_t *pbBuf, size_t cbBuf)
static size_t atapiGetConfigurationFillFeatureRandomReadable(ATADevState *s, uint8_t *pbBuf, size_t cbBuf)
static size_t atapiGetConfigurationFillFeaturePowerManagement(ATADevState *s, uint8_t *pbBuf, size_t cbBuf)
if (s->cTotalSectors)
atapiCmdOK(s);
switch (OldStatus)
atapiCmdOK(s);
atapiCmdOK(s);
atapiCmdOK(s);
pbBuf[14] = (1 << 0) | (1 << 3) | (1 << 5); /* lock supported, eject supported, tray type loading mechanism */
pbBuf[15] = 0; /* no subchannel reads supported, no separate audio volume control, no changer etc. */
atapiCmdOK(s);
atapiCmdOK(s);
atapiCmdOK(s);
bool fMSF;
if (fMSF)
ataLBA2MSF(q, 0);
ataH2BE_U32(q, 0);
if (fMSF)
atapiCmdOK(s);
bool fMSF;
/** @todo double-check this stuff against what a real drive says for a CD-ROM (not a CD-R) with only a single data session. Maybe solve the problem with "cdrdao read-toc" not being able to figure out whether numbers are in BCD or hex. */
if (fMSF)
atapiCmdOK(s);
bool fMSF;
if (fMSF)
if (fMSF)
ataLBA2MSF(q, 0);
ataH2BE_U32(q, 0);
atapiCmdOK(s);
switch (pbPacket[0])
case SCSI_TEST_UNIT_READY:
if (s->cNotifiedMediaChange > 0)
atapiCmdErrorSimple(s, SCSI_SENSE_UNIT_ATTENTION, SCSI_ASC_MEDIUM_MAY_HAVE_CHANGED); /* media changed */
atapiCmdOK(s);
ataStartTransfer(s, RT_MIN(cbMax, 8), PDMBLOCKTXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_GET_EVENT_STATUS_NOTIFICATION, true);
case SCSI_MODE_SENSE_10:
switch (uPageControl)
case SCSI_PAGECONTROL_CURRENT:
switch (uPageCode)
ataStartTransfer(s, RT_MIN(cbMax, 16), PDMBLOCKTXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_MODE_SENSE_ERROR_RECOVERY, true);
case SCSI_MODEPAGE_CD_STATUS:
ataStartTransfer(s, RT_MIN(cbMax, 40), PDMBLOCKTXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_MODE_SENSE_CD_STATUS, true);
goto error_cmd;
goto error_cmd;
case SCSI_PAGECONTROL_DEFAULT:
goto error_cmd;
case SCSI_PAGECONTROL_SAVED:
case SCSI_REQUEST_SENSE:
ataStartTransfer(s, RT_MIN(cbMax, 18), PDMBLOCKTXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_REQUEST_SENSE, true);
atapiCmdOK(s);
case SCSI_READ_10:
case SCSI_READ_12:
if (s->cNotifiedMediaChange > 0)
s->cNotifiedMediaChange-- ;
atapiCmdErrorSimple(s, SCSI_SENSE_UNIT_ATTENTION, SCSI_ASC_MEDIUM_MAY_HAVE_CHANGED); /* media changed */
if (cSectors == 0)
atapiCmdOK(s);
LogRel(("PIIX3 ATA: LUN#%d: CD-ROM block number %Ld invalid (READ)\n", s->iLUN, (uint64_t)iATAPILBA + cSectors));
case SCSI_READ_CD:
if (s->cNotifiedMediaChange > 0)
s->cNotifiedMediaChange-- ;
atapiCmdErrorSimple(s, SCSI_SENSE_UNIT_ATTENTION, SCSI_ASC_MEDIUM_MAY_HAVE_CHANGED); /* media changed */
if (cSectors == 0)
atapiCmdOK(s);
LogRel(("PIIX3 ATA: LUN#%d: CD-ROM block number %Ld invalid (READ CD)\n", s->iLUN, (uint64_t)iATAPILBA + cSectors));
atapiCmdOK(s);
LogRel(("PIIX3 ATA: LUN#%d: CD-ROM sector format not supported (%#x)\n", s->iLUN, pbPacket[9] & 0xf8));
case SCSI_SEEK_10:
if (s->cNotifiedMediaChange > 0)
s->cNotifiedMediaChange-- ;
atapiCmdErrorSimple(s, SCSI_SENSE_UNIT_ATTENTION, SCSI_ASC_MEDIUM_MAY_HAVE_CHANGED); /* media changed */
LogRel(("PIIX3 ATA: LUN#%d: CD-ROM block number %Ld invalid (SEEK)\n", s->iLUN, (uint64_t)iATAPILBA));
atapiCmdOK(s);
case SCSI_START_STOP_UNIT:
atapiCmdOK(s);
case SCSI_MECHANISM_STATUS:
ataStartTransfer(s, RT_MIN(cbMax, 8), PDMBLOCKTXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_MECHANISM_STATUS, true);
case SCSI_READ_TOC_PMA_ATIP:
if (s->cNotifiedMediaChange > 0)
s->cNotifiedMediaChange-- ;
atapiCmdErrorSimple(s, SCSI_SENSE_UNIT_ATTENTION, SCSI_ASC_MEDIUM_MAY_HAVE_CHANGED); /* media changed */
switch (format)
ataStartTransfer(s, cbMax, PDMBLOCKTXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_READ_TOC_NORMAL, true);
ataStartTransfer(s, RT_MIN(cbMax, 12), PDMBLOCKTXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_READ_TOC_MULTI, true);
ataStartTransfer(s, cbMax, PDMBLOCKTXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_READ_TOC_RAW, true);
case SCSI_READ_CAPACITY:
if (s->cNotifiedMediaChange > 0)
s->cNotifiedMediaChange-- ;
atapiCmdErrorSimple(s, SCSI_SENSE_UNIT_ATTENTION, SCSI_ASC_MEDIUM_MAY_HAVE_CHANGED); /* media changed */
ataStartTransfer(s, 8, PDMBLOCKTXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_READ_CAPACITY, true);
if (s->cNotifiedMediaChange > 0)
s->cNotifiedMediaChange-- ;
atapiCmdErrorSimple(s, SCSI_SENSE_UNIT_ATTENTION, SCSI_ASC_MEDIUM_MAY_HAVE_CHANGED); /* media changed */
ataStartTransfer(s, RT_MIN(cbMax, 34), PDMBLOCKTXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_READ_DISC_INFORMATION, true);
if (s->cNotifiedMediaChange > 0)
s->cNotifiedMediaChange-- ;
atapiCmdErrorSimple(s, SCSI_SENSE_UNIT_ATTENTION, SCSI_ASC_MEDIUM_MAY_HAVE_CHANGED); /* media changed */
ataStartTransfer(s, RT_MIN(cbMax, 36), PDMBLOCKTXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_READ_TRACK_INFORMATION, true);
case SCSI_GET_CONFIGURATION:
ataStartTransfer(s, RT_MIN(cbMax, 80), PDMBLOCKTXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_GET_CONFIGURATION, true);
case SCSI_INQUIRY:
ataStartTransfer(s, RT_MIN(cbMax, 36), PDMBLOCKTXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_INQUIRY, true);
case SCSI_READ_DVD_STRUCTURE:
ataStartTransfer(s, RT_MIN(cbMax, 4), PDMBLOCKTXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_READ_DVD_STRUCTURE, true);
switch (pbPacket[0])
case SCSI_BLANK:
goto sendcmd;
case SCSI_CLOSE_TRACK_SESSION:
goto sendcmd;
case SCSI_ERASE_10:
goto sendcmd;
case SCSI_FORMAT_UNIT:
goto sendcmd;
case SCSI_GET_CONFIGURATION:
goto sendcmd;
ataStartTransfer(s, RT_MIN(cbTransfer, 8), PDMBLOCKTXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_GET_EVENT_STATUS_NOTIFICATION, true);
goto sendcmd;
case SCSI_GET_PERFORMANCE:
goto sendcmd;
case SCSI_INQUIRY:
goto sendcmd;
case SCSI_LOAD_UNLOAD_MEDIUM:
goto sendcmd;
case SCSI_MECHANISM_STATUS:
goto sendcmd;
case SCSI_MODE_SELECT_10:
goto sendcmd;
case SCSI_MODE_SENSE_10:
goto sendcmd;
case SCSI_PAUSE_RESUME:
goto sendcmd;
case SCSI_PLAY_AUDIO_10:
goto sendcmd;
case SCSI_PLAY_AUDIO_12:
goto sendcmd;
case SCSI_PLAY_AUDIO_MSF:
goto sendcmd;
goto sendcmd;
case SCSI_READ_10:
goto sendcmd;
case SCSI_READ_12:
goto sendcmd;
case SCSI_READ_BUFFER:
goto sendcmd;
goto sendcmd;
case SCSI_READ_CAPACITY:
goto sendcmd;
case SCSI_READ_CD:
case SCSI_READ_CD_MSF:
cSectors = 32; /* Limit transfer size to 64~74K. Safety first. In any case this can only harm software doing CDDA extraction. */
goto sendcmd;
goto sendcmd;
case SCSI_READ_DVD_STRUCTURE:
goto sendcmd;
goto sendcmd;
case SCSI_READ_SUBCHANNEL:
goto sendcmd;
case SCSI_READ_TOC_PMA_ATIP:
goto sendcmd;
goto sendcmd;
case SCSI_REPAIR_TRACK:
goto sendcmd;
case SCSI_REPORT_KEY:
goto sendcmd;
case SCSI_REQUEST_SENSE:
ataStartTransfer(s, RT_MIN(cbTransfer, 18), PDMBLOCKTXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_REQUEST_SENSE, true);
goto sendcmd;
case SCSI_RESERVE_TRACK:
goto sendcmd;
case SCSI_SCAN:
goto sendcmd;
case SCSI_SEEK_10:
goto sendcmd;
case SCSI_SEND_CUE_SHEET:
goto sendcmd;
case SCSI_SEND_DVD_STRUCTURE:
goto sendcmd;
case SCSI_SEND_EVENT:
goto sendcmd;
case SCSI_SEND_KEY:
goto sendcmd;
goto sendcmd;
case SCSI_SET_CD_SPEED:
goto sendcmd;
case SCSI_SET_READ_AHEAD:
goto sendcmd;
case SCSI_SET_STREAMING:
goto sendcmd;
case SCSI_START_STOP_UNIT:
goto sendcmd;
case SCSI_STOP_PLAY_SCAN:
goto sendcmd;
case SCSI_SYNCHRONIZE_CACHE:
goto sendcmd;
case SCSI_TEST_UNIT_READY:
goto sendcmd;
case SCSI_VERIFY_10:
goto sendcmd;
case SCSI_WRITE_10:
case SCSI_WRITE_AND_VERIFY_10:
goto sendcmd;
case SCSI_WRITE_12:
goto sendcmd;
case SCSI_WRITE_BUFFER:
LogRel(("PIIX3 ATA: LUN#%d: CD-ROM passthrough command attempted to update firmware, blocked\n", s->iLUN));
goto sendcmd;
goto sendcmd;
case SCSI_REZERO_UNIT:
if (cbTransfer == 0)
ataStartTransfer(s, cbTransfer, uTxDir, ATAFN_BT_ATAPI_PASSTHROUGH_CMD, ATAFN_SS_ATAPI_PASSTHROUGH, true);
#ifdef DEBUG
Log(("%s: LUN#%d DMA=%d CMD=%#04x \"%s\"\n", __FUNCTION__, s->iLUN, s->fDMA, pbPacket[0], SCSICmdText(pbPacket[0])));
Log2(("%s: limit=%#x packet: %.*Rhxs\n", __FUNCTION__, s->uATARegLCyl | (s->uATARegHCyl << 8), ATAPI_PACKET_SIZE, pbPacket));
if (s->fATAPIPassthrough)
s->cbTotalTransfer = 0;
s->cbElementaryTransfer = 0;
atapiParseCmd(s);
switch (OldStatus)
LogRel(("PIIX3 ATA: LUN#%d: CD/DVD, total number of sectors %Ld, passthrough unchanged\n", pIf->iLUN, pIf->cTotalSectors));
s->cNotifiedMediaChange = 0;
ataUnsetIRQ(s);
ataSetSignature(s);
s->cbTotalTransfer = 0;
s->cbElementaryTransfer = 0;
s->iIOBufferPIODataStart = 0;
s->iIOBufferPIODataEnd = 0;
s->fDMA = false;
s->fATAPITransfer = false;
s->uATARegFeature = 0;
ataSetSignature(s);
if (s->fATAPI)
bool *pfRedo)
int rc;
*pfRedo = false;
return rc;
bool fRedo = false;
while (cRangesMax-- > 0)
pu64Range++;
if (fRedo)
return fRedo;
#ifdef DEBUG
s->fLBA48 = false;
s->fDMA = false;
if (s->u64CmdTS)
switch (cmd)
case ATA_IDENTIFY_DEVICE:
if (s->fATAPI)
ataSetSignature(s);
case ATA_RECALIBRATE:
if (s->fATAPI)
goto abort_cmd;
case ATA_SET_MULTIPLE_MODE:
if ( s->uATARegNSector != 0
ataCmdOK(s, 0);
s->fLBA48 = true;
case ATA_READ_VERIFY_SECTORS:
case ATA_READ_SECTORS_EXT:
s->fLBA48 = true;
case ATA_READ_SECTORS:
goto abort_cmd;
ataStartTransfer(s, ataGetNSectors(s) * 512, PDMBLOCKTXDIR_FROM_DEVICE, ATAFN_BT_READ_WRITE_SECTORS, ATAFN_SS_READ_SECTORS, false);
case ATA_WRITE_SECTORS_EXT:
s->fLBA48 = true;
case ATA_WRITE_SECTORS:
goto abort_cmd;
ataStartTransfer(s, ataGetNSectors(s) * 512, PDMBLOCKTXDIR_TO_DEVICE, ATAFN_BT_READ_WRITE_SECTORS, ATAFN_SS_WRITE_SECTORS, false);
case ATA_READ_MULTIPLE_EXT:
s->fLBA48 = true;
case ATA_READ_MULTIPLE:
goto abort_cmd;
ataStartTransfer(s, ataGetNSectors(s) * 512, PDMBLOCKTXDIR_FROM_DEVICE, ATAFN_BT_READ_WRITE_SECTORS, ATAFN_SS_READ_SECTORS, false);
case ATA_WRITE_MULTIPLE_EXT:
s->fLBA48 = true;
case ATA_WRITE_MULTIPLE:
goto abort_cmd;
ataStartTransfer(s, ataGetNSectors(s) * 512, PDMBLOCKTXDIR_TO_DEVICE, ATAFN_BT_READ_WRITE_SECTORS, ATAFN_SS_WRITE_SECTORS, false);
case ATA_READ_DMA_EXT:
s->fLBA48 = true;
case ATA_READ_DMA:
goto abort_cmd;
s->fDMA = true;
ataStartTransfer(s, ataGetNSectors(s) * 512, PDMBLOCKTXDIR_FROM_DEVICE, ATAFN_BT_READ_WRITE_SECTORS, ATAFN_SS_READ_SECTORS, false);
case ATA_WRITE_DMA_EXT:
s->fLBA48 = true;
case ATA_WRITE_DMA:
goto abort_cmd;
s->fDMA = true;
ataStartTransfer(s, ataGetNSectors(s) * 512, PDMBLOCKTXDIR_TO_DEVICE, ATAFN_BT_READ_WRITE_SECTORS, ATAFN_SS_WRITE_SECTORS, false);
s->fLBA48 = true;
ataCmdOK(s, 0);
ataCmdOK(s, 0);
ataCmdOK(s, 0);
case ATA_CHECK_POWER_MODE:
ataCmdOK(s, 0);
case ATA_SET_FEATURES:
if (!s->pDrvBlock)
goto abort_cmd;
switch (s->uATARegFeature)
s->uATATransferMode = (s->uATARegNSector & 0xf8) | RT_MIN(s->uATARegNSector & 0x07, ATA_MDMA_MODE_MAX);
s->uATATransferMode = (s->uATARegNSector & 0xf8) | RT_MIN(s->uATARegNSector & 0x07, ATA_UDMA_MODE_MAX);
goto abort_cmd;
goto abort_cmd;
s->uATARegFeature = 0;
case ATA_FLUSH_CACHE_EXT:
case ATA_FLUSH_CACHE:
goto abort_cmd;
case ATA_STANDBY_IMMEDIATE:
ataCmdOK(s, 0);
case ATA_IDLE_IMMEDIATE:
ataAbortCurrentCommand(s, false);
case ATA_SLEEP:
ataCmdOK(s, 0);
ataSetIRQ(s);
if (s->fATAPI)
ataStartTransfer(s, 0, PDMBLOCKTXDIR_NONE, ATAFN_BT_NULL, ATAFN_SS_EXECUTE_DEVICE_DIAGNOSTIC, false);
case ATA_DEVICE_RESET:
if (!s->fATAPI)
goto abort_cmd;
ataAbortCurrentCommand(s, true);
case ATA_PACKET:
if (!s->fATAPI)
goto abort_cmd;
goto abort_cmd;
ataStartTransfer(s, ATAPI_PACKET_SIZE, PDMBLOCKTXDIR_TO_DEVICE, ATAFN_BT_PACKET, ATAFN_SS_PACKET, false);
case ATA_DATA_SET_MANAGEMENT:
goto abort_cmd;
goto abort_cmd;
s->fDMA = true;
ataStartTransfer(s, (s->uATARegNSectorHOB << 8 | s->uATARegNSector) * 512, PDMBLOCKTXDIR_TO_DEVICE, ATAFN_BT_NULL, ATAFN_SS_TRIM, false);
if (s->fATAPI)
Log2(("%s: LUN#%d write addr=%#x val=%#04x\n", __FUNCTION__, pCtl->aIfs[pCtl->iSelectedIf].iLUN, addr, val));
switch (addr)
Log2(("%s: LUN#%d asserting IRQ (drive select change)\n", __FUNCTION__, pCtl->aIfs[pCtl->iSelectedIf].iLUN));
Log2(("%s: LUN#%d deasserting IRQ (drive select change)\n", __FUNCTION__, pCtl->aIfs[pCtl->iSelectedIf].iLUN));
#ifndef IN_RING3
return VINF_IOM_R3_IOPORT_WRITE;
return VINF_SUCCESS;
bool fHOB;
if (!s->pDrvBlock)
return VERR_IOM_IOPORT_UNUSED;
*pu32 = 0;
return VINF_SUCCESS;
return VERR_IOM_IOPORT_UNUSED;
if (!s->pDrvBlock)
val = 0;
if (fHOB)
if (fHOB)
if (fHOB)
if (fHOB)
val = 0;
static unsigned cBusy = 0;
if (!s->pDrvBlock)
val = 0;
#ifdef IN_RING3
cBusy = 0;
#ifndef RT_OS_WINDOWS
cBusy = 0;
return VINF_IOM_R3_IOPORT_READ;
cBusy = 0;
ataUnsetIRQ(s);
return VINF_SUCCESS;
val = 0;
return val;
#ifndef IN_RING3
#ifdef IN_RING3
LogRel(("PIIX3 ATA: Ctl#%d: RESET, DevSel=%d AIOIf=%d CmdIf0=%#04x (%d usec ago) CmdIf1=%#04x (%d usec ago)\n",
#ifdef IN_RING3
Log2(("%s: LUN#%d asserting IRQ (interrupt disable change)\n", __FUNCTION__, pCtl->aIfs[pCtl->iSelectedIf].iLUN));
Log2(("%s: LUN#%d deasserting IRQ (interrupt disable change)\n", __FUNCTION__, pCtl->aIfs[pCtl->iSelectedIf].iLUN));
return VINF_SUCCESS;
#ifdef IN_RING3
ATADevState *s;
LogRel(("PIIX3 ATA: LUN#%d: %s data in the middle of a PIO transfer - VERY SLOW\n", s->iLUN, s->uTxDir == PDMBLOCKTXDIR_FROM_DEVICE ? "loading" : "storing"));
bool fRedo;
s->iIOBufferCur = 0;
if (s->cbTotalTransfer)
if (s->fATAPITransfer)
Log2(("%s: Ctl#%d: suppressed continuing PIO transfer as RESET is active\n", __FUNCTION__, ATACONTROLLER_IDX(pCtl)));
Log2(("%s: Ctl#%d: message to async I/O thread, continuing PIO transfer\n", __FUNCTION__, ATACONTROLLER_IDX(pCtl)));
if (s->cbTotalTransfer)
ataSetIRQ(s);
Log2(("%s: Ctl#%d: skipping message to async I/O thread, ending PIO transfer\n", __FUNCTION__, ATACONTROLLER_IDX(pCtl)));
uint8_t *p;
#ifndef IN_RING3
return VINF_IOM_R3_IOPORT_WRITE;
return VINF_SUCCESS;
uint8_t *p;
#ifndef IN_RING3
return VINF_IOM_R3_IOPORT_READ;
return VINF_SUCCESS;
#ifdef IN_RING3
s->cbTotalTransfer = 0;
s->cbElementaryTransfer = 0;
bool fRedo;
bool fLastDesc = false;
if (cbBuffer == 0)
iIOBufferCur = 0;
LogRel(("PIIX3 ATA: Ctl#%d: ABORT DMA%s\n", ATACONTROLLER_IDX(pCtl), pCtl->fReset ? " due to RESET" : ""));
if (fLastDesc)
ATADevState *s;
Log2(("%s: Ctl#%d: state=%d, req=%d\n", __FUNCTION__, ATACONTROLLER_IDX(pCtl), pCtl->uAsyncIOState, ReqType));
AssertReleaseMsg(ReqType == ATA_AIO_RESET_ASSERTED || ReqType == ATA_AIO_RESET_CLEARED || ReqType == ATA_AIO_ABORT || pCtl->uAsyncIOState == ReqType, ("I/O state inconsistent: state=%d request=%d\n", pCtl->uAsyncIOState, ReqType));
switch (ReqType)
case ATA_AIO_NEW:
s->iIOBufferEnd = 0;
if (s->fATAPI)
if (s->fDMA)
if (s->fDMA)
s->iIOBufferCur = 0;
bool fRedo;
ataCmdOK(s, 0);
if (s->fDMA)
if (s->cbTotalTransfer)
Log2(("%s: Ctl#%d: message to async I/O thread, continuing DMA transfer immediately\n", __FUNCTION__, ATACONTROLLER_IDX(pCtl)));
Assert(s->uTxDir == PDMBLOCKTXDIR_NONE); /* Any transfer which has an initial transfer size of 0 must be marked as such. */
ataSetIRQ(s);
if (s->cbTotalTransfer)
ataSetIRQ(s);
Assert(s->uTxDir == PDMBLOCKTXDIR_NONE); /* Any transfer which has an initial transfer size of 0 must be marked as such. */
if (!s->fATAPITransfer)
ataSetIRQ(s);
case ATA_AIO_DMA:
s = &pCtl->aIfs[pCtl->iAIOIf]; /* Do not remove or there's an instant crash after loading the saved state */
ATAFNSS iOriginalSourceSink = (ATAFNSS)s->iSourceSink; /* Used by the hack below, but gets reset by then. */
&& s->cbTotalTransfer == 0
if (s->fATAPITransfer)
Log2(("%s: Ctl#%d: interrupt reason %#04x\n", __FUNCTION__, ATACONTROLLER_IDX(pCtl), s->uATARegNSector));
s->fATAPITransfer = false;
ataSetIRQ(s);
case ATA_AIO_PIO:
s = &pCtl->aIfs[pCtl->iAIOIf]; /* Do not remove or there's an instant crash after loading the saved state */
bool fRedo;
s->iIOBufferCur = 0;
if (s->cbTotalTransfer)
ataSetIRQ(s);
&& !s->fATAPITransfer
ataSetIRQ(s);
case ATA_AIO_RESET_ASSERTED:
case ATA_AIO_RESET_CLEARED:
case ATA_AIO_ABORT:
ataResetDevice(s);
s->fDMA = false;
ataSetIRQ(s);
Log(("%s: Ctl#%d: LUN#%d finished I/O transaction in %d microseconds\n", __FUNCTION__, ATACONTROLLER_IDX(pCtl), pCtl->aIfs[pCtl->iAIOIf].iLUN, (uint32_t)(uWait)));
LogRel(("PIIX3 ATA: execution time for ATA command %#04x was %d seconds\n", pCtl->aIfs[pCtl->iAIOIf].uATARegCommand, uWait / (1000 * 1000)));
LogRel(("PIIX3 ATA: execution time for ATAPI command %#04x was %d seconds\n", pCtl->aIfs[pCtl->iAIOIf].aATAPICmd[0], uWait / (1000 * 1000)));
return rc;
return val;
#ifdef IN_RING3
Log2(("%s: Ctl#%d: suppressed continuing DMA transfer as RESET is active\n", __FUNCTION__, ATACONTROLLER_IDX(pCtl)));
Log2(("%s: Ctl#%d: message to async I/O thread, continuing DMA transfer\n", __FUNCTION__, ATACONTROLLER_IDX(pCtl)));
return val;
return val;
PDMBOTHCBDECL(int) ataBMDMAIOPortRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb)
int rc;
return rc;
return VERR_IOM_IOPORT_UNUSED;
return rc;
PDMBOTHCBDECL(int) ataBMDMAIOPortWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb)
int rc;
return rc;
#ifndef IN_RING3
default: AssertMsgFailed(("%s: Unsupported write to port %x size=%d val=%x\n", __FUNCTION__, Port, cb, u32)); break;
return rc;
#ifdef IN_RING3
static DECLCALLBACK(int) ataBMDMAIORangeMap(PPCIDEVICE pPciDev, /*unsigned*/ int iRegion, RTGCPHYS GCPhysAddress, uint32_t cb, PCIADDRESSSPACE enmType)
AssertMsg(RT_ALIGN(GCPhysAddress, 8) == GCPhysAddress, ("Expected 8 byte alignment. GCPhysAddress=%#x\n", GCPhysAddress));
return rc;
return NULL;
static DECLCALLBACK(int) ataStatus_QueryStatusLed(PPDMILEDPORTS pInterface, unsigned iLUN, PPDMLED *ppLed)
switch (iLUN)
return VINF_SUCCESS;
return VERR_PDM_LUN_NOT_FOUND;
return NULL;
static DECLCALLBACK(int) ataR3QueryDeviceLocation(PPDMIBLOCKPORT pInterface, const char **ppcszController,
return VINF_SUCCESS;
PDMBOTHCBDECL(int) ataIOPortWrite1(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb)
return rc;
return rc;
PDMBOTHCBDECL(int) ataIOPortRead1(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb)
return rc;
return rc;
PDMBOTHCBDECL(int) ataIOPortReadStr1(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, RTGCPTR *pGCPtrDst, PRTGCUINTREG pcTransfer, unsigned cb)
return rc;
#ifndef IN_RING3
/* Deal with the unlikely case where no data (or not enough for the read length operation) is available; go back to ring 3. */
if (!cTransAvailable)
return VINF_IOM_R3_IOPORT_READ;
rc = PGMPhysSimpleDirtyWriteGCPtr(PDMDevHlpGetVMCPU(pDevIns), GCDst, s->CTX_SUFF(pbIOBuffer) + s->iIOBufferPIODataStart, cbTransfer);
#ifndef IN_RING3
AssertFailed();
return VINF_IOM_R3_IOPORT_READ;
if (cbTransfer)
Log3(("%s: addr=%#x val=%.*Rhxs\n", __FUNCTION__, Port, cbTransfer, s->CTX_SUFF(pbIOBuffer) + s->iIOBufferPIODataStart));
#ifdef IN_RING3
return rc;
PDMBOTHCBDECL(int) ataIOPortWriteStr1(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, RTGCPTR *pGCPtrSrc, PRTGCUINTREG pcTransfer, unsigned cb)
int rc;
return rc;
#ifndef IN_RING3
/* Deal with the unlikely case where no data (or not enough for the read length operation) is available; go back to ring 3. */
if (!cTransAvailable)
return VINF_IOM_R3_IOPORT_WRITE;
rc = PGMPhysSimpleReadGCPtr(PDMDevHlpGetVMCPU(pDevIns), s->CTX_SUFF(pbIOBuffer) + s->iIOBufferPIODataStart, GCSrc, cbTransfer);
#ifndef IN_RING3
AssertFailed();
return VINF_IOM_R3_IOPORT_WRITE;
if (cbTransfer)
Log3(("%s: addr=%#x val=%.*Rhxs\n", __FUNCTION__, Port, cbTransfer, s->CTX_SUFF(pbIOBuffer) + s->iIOBufferPIODataStart));
#ifdef IN_RING3
return rc;
PDMBOTHCBDECL(int) ataIOPortWrite2(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb)
int rc;
return VINF_SUCCESS;
return rc;
return rc;
PDMBOTHCBDECL(int) ataIOPortRead2(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb)
int rc;
return VERR_IOM_IOPORT_UNUSED;
return rc;
return VINF_SUCCESS;
#ifdef IN_RING3
if (s->pbIOBufferR3)
int rc;
LogRel(("PIIX3 ATA Dtor: Ctl#%u is still executing, DevSel=%d AIOIf=%d CmdIf0=%#04x CmdIf1=%#04x rc=%Rrc\n",
return VINF_SUCCESS;
unsigned iController;
unsigned iInterface;
AssertReleaseMsg(iController < RT_ELEMENTS(pThis->aCts), ("iController=%d iLUN=%d\n", iController, iLUN));
return VERR_PDM_MISSING_INTERFACE;
return VERR_PDM_MISSING_INTERFACE;
AssertMsgFailed(("Configuration error: LUN#%d isn't a disk or cd/dvd-rom. enmType=%d\n", pIf->iLUN, enmType));
return VERR_PDM_UNSUPPORTED_BLOCK_TYPE;
return VERR_INTERNAL_ERROR;
rc = MMR3HyperAllocOnceNoRel(pVM, pIf->cbIOBuffer, 0, MM_TAG_PDM_DEVICE_USER, (void **)&pIf->pbIOBufferR3);
return VERR_NO_MEMORY;
LogRel(("PIIX3 ATA: LUN#%d: CD/DVD, total number of sectors %Ld, passthrough %s\n", pIf->iLUN, pIf->cTotalSectors, (pIf->fATAPIPassthrough ? "enabled" : "disabled")));
LogRel(("PIIX3 ATA: LUN#%d: disk, PCHS=%u/%u/%u, total number of sectors %Ld\n", pIf->iLUN, pIf->PCHSGeometry.cCylinders, pIf->PCHSGeometry.cHeads, pIf->PCHSGeometry.cSectors, pIf->cTotalSectors));
return rc;
int rc;
unsigned iController;
unsigned iInterface;
AssertReleaseMsg(iController < RT_ELEMENTS(pThis->aCts), ("iController=%d iLUN=%d\n", iController, iLUN));
return rc;
int rc;
if (!fRc)
if (!fRc)
if (!fConstruct)
return rcRet;
return VINF_SUCCESS;
return VINF_SSM_DONT_CALL_AGAIN;
SSMR3PutMem(pSSM, &pThis->aCts[i].aIfs[j].abATAPISense, sizeof(pThis->aCts[i].aIfs[j].abATAPISense));
switch (iLun)
static DECLCALLBACK(int) ataLoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
int rc;
return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("Config mismatch: u8Type - saved=%u config=%u"), u8Type, pThis->u8Type);
bool fEnabled;
if (!fEnabled)
bool fInUse;
N_("The %s VM is missing a %s device. Please make sure the source and target VMs have compatible storage configurations"),
return VINF_SUCCESS;
return VERR_INTERNAL_ERROR_4;
SSMR3GetMem(pSSM, pThis->aCts[i].aIfs[j].abATAPISense, sizeof(pThis->aCts[i].aIfs[j].abATAPISense));
while (cbLeft-- > 0)
return rc;
if (u32 != ~0U)
return rc;
return VINF_SUCCESS;
szType);
return rc;
int rc;
bool fGCEnabled;
bool fR0Enabled;
return rc;
case CHIPSET_ICH6:
* See www.intel.com/Assets/PDF/manual/298600.pdf p. 30
case CHIPSET_PIIX4:
case CHIPSET_PIIX3:
PCIDevSetCommand( &pThis->dev, PCI_COMMAND_IOACCESS | PCI_COMMAND_MEMACCESS | PCI_COMMAND_BUSMASTER);
PCIDevSetClassProg( &pThis->dev, 0x8a); /* programming interface = PCI_IDE bus master is supported */
if (fGCEnabled)
if (fR0Enabled)
if (fGCEnabled)
if (fR0Enabled)
PDMDevHlpSTAMRegisterF(pDevIns, &pIf->StatATADMA, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES,
PDMDevHlpSTAMRegisterF(pDevIns, &pIf->StatATAPIO, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES,
PDMDevHlpSTAMRegisterF(pDevIns, &pIf->StatATAPIDMA, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES,
PDMDevHlpSTAMRegisterF(pDevIns, &pIf->StatATAPIPIO, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES,
PDMDevHlpSTAMRegisterF(pDevIns, &pIf->StatReads, STAMTYPE_PROFILE_ADV, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_CALL,
PDMDevHlpSTAMRegisterF(pDevIns, &pIf->StatBytesRead, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES,
#ifdef VBOX_INSTRUMENT_DMA_WRITES
PDMDevHlpSTAMRegisterF(pDevIns, &pIf->StatInstrVDWrites,STAMTYPE_PROFILE_ADV, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_CALL,
"Profiling of the VD DMA write operations.", "/Devices/IDE%d/ATA%d/Unit%d/InstrVDWrites", iInstance, i, j);
#ifdef VBOX_WITH_STATISTICS
PDMDevHlpSTAMRegisterF(pDevIns, &pIf->StatWrites, STAMTYPE_PROFILE_ADV, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_CALL,
PDMDevHlpSTAMRegisterF(pDevIns, &pIf->StatBytesWritten, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES,
#ifdef VBOX_WITH_STATISTICS
PDMDevHlpSTAMRegisterF(pDevIns, &pIf->StatFlushes, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_CALL,
PDMDevHlpSTAMRegisterF(pDevIns, &pThis->aCts[i].StatAsyncOps, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES,
PDMDevHlpSTAMRegisterF(pDevIns, &pThis->aCts[i].StatAsyncMinWait, STAMTYPE_U64_RESET, STAMVISIBILITY_ALWAYS, STAMUNIT_NONE,
PDMDevHlpSTAMRegisterF(pDevIns, &pThis->aCts[i].StatAsyncMaxWait, STAMTYPE_U64_RESET, STAMVISIBILITY_ALWAYS, STAMUNIT_NONE,
PDMDevHlpSTAMRegisterF(pDevIns, &pThis->aCts[i].StatAsyncTimeUS, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_NONE,
PDMDevHlpSTAMRegisterF(pDevIns, &pThis->aCts[i].StatAsyncTime, STAMTYPE_PROFILE_ADV, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_CALL,
PDMDevHlpSTAMRegisterF(pDevIns, &pThis->aCts[i].StatLockWait, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_CALL,
Assert(pCtl->AsyncIOThread != NIL_RTTHREAD && pCtl->AsyncIOSem != NIL_RTSEMEVENT && pCtl->SuspendIOSem != NIL_RTSEMEVENT && pCtl->AsyncIORequestMutex != NIL_RTSEMMUTEX);
Log(("%s: controller %d AIO thread id %#x; sem %p susp_sem %p mutex %p\n", __FUNCTION__, i, pCtl->AsyncIOThread, pCtl->AsyncIOSem, pCtl->SuspendIOSem, pCtl->AsyncIORequestMutex));
rc = CFGMR3QueryStringDef(pCfgNode, "SerialNumber", pIf->szSerialNumber, sizeof(pIf->szSerialNumber),
szSerial);
rc = CFGMR3QueryStringDef(pCfgNode, "FirmwareRevision", pIf->szFirmwareRevision, sizeof(pIf->szFirmwareRevision),
rc = CFGMR3QueryStringDef(pCfgNode, "ATAPIVendorId", pIf->szInquiryVendorId, sizeof(pIf->szInquiryVendorId),
rc = CFGMR3QueryStringDef(pCfgNode, "ATAPIProductId", pIf->szInquiryProductId, sizeof(pIf->szInquiryProductId),
rc = CFGMR3QueryStringDef(pCfgNode, "ATAPIRevision", pIf->szInquiryRevision, sizeof(pIf->szInquiryRevision),
switch (rc)
case VERR_ACCESS_DENIED:
return rc;
s_apszDescs[i][j]);
sizeof(PCIATAState),
NULL,
NULL,
NULL,
NULL,
NULL,