ATAController.h revision a042dd0dd6f262f097d505be8b52df1c308735b5
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * DevATA, DevAHCI - Shared ATA/ATAPI controller types.
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * Copyright (C) 2006-2008 Sun Microsystems, Inc.
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * This file is part of VirtualBox Open Source Edition (OSE), as
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * available from http://www.virtualbox.org. This file is free software;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * you can redistribute it and/or modify it under the terms of the GNU
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * General Public License (GPL) as published by the Free Software
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * Foundation, in version 2 as it comes in the "COPYING" file of the
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * Clara, CA 95054 USA or visit http://www.sun.com if you need
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * additional information or have any questions.
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync/*******************************************************************************
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync* Header Files *
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync*******************************************************************************/
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync#endif /* IN_RING3 */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync/*******************************************************************************
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync* Defined Constants And Macros *
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync*******************************************************************************/
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * Maximum number of sectors to transfer in a READ/WRITE MULTIPLE request.
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * Set to 1 to disable multi-sector read support. According to the ATA
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * specification this must be a power of 2 and it must fit in an 8 bit
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * value. Thus the only valid values are 1, 2, 4, 8, 16, 32, 64 and 128.
ecb98c0e709a5cebd8877fb39f61a821804024bcvboxsync * Fastest PIO mode supported by the drive.
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * Fastest MDMA mode supported by the drive.
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * Fastest UDMA mode supported by the drive.
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync/** ATAPI sense info size. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync/** The maximum number of release log entries per device. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync/* MediaEventStatus */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync#define ATA_EVENT_STATUS_UNCHANGED 0 /**< medium event status not changed */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync#define ATA_EVENT_STATUS_MEDIA_NEW 1 /**< new medium inserted */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync#define ATA_EVENT_STATUS_MEDIA_REMOVED 2 /**< medium removed */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync#define ATA_EVENT_STATUS_MEDIA_CHANGED 3 /**< medium was removed + new medium was inserted */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync/*******************************************************************************
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync* Structures and Typedefs *
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync*******************************************************************************/
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsynctypedef struct AHCIATADevState {
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** Flag indicating whether the current command uses LBA48 mode. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** Flag indicating whether this drive implements the ATAPI command set. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** Set if this interface has asserted the IRQ. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** Currently configured number of sectors in a multi-sector transfer. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** PCHS disk geometry. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** Total number of sectors on this disk. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** Number of sectors to transfer per IRQ. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** ATA/ATAPI register 1: feature (write-only). */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** ATA/ATAPI register 1: feature, high order byte. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** ATA/ATAPI register 1: error (read-only). */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** ATA/ATAPI register 2: sector count (read/write). */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** ATA/ATAPI register 2: sector count, high order byte. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** ATA/ATAPI register 3: sector, high order byte. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** ATA/ATAPI register 4: cylinder low (read/write). */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** ATA/ATAPI register 4: cylinder low, high order byte. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** ATA/ATAPI register 5: cylinder high (read/write). */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** ATA/ATAPI register 5: cylinder high, high order byte. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** ATA/ATAPI register 6: select drive/head (read/write). */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** ATA/ATAPI register 7: status (read-only). */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** ATA/ATAPI register 7: command (write-only). */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** ATA/ATAPI drive control register (write-only). */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** Currently active transfer mode (MDMA/UDMA) and speed. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** Current transfer direction. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** Index of callback for begin transfer. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** Index of callback for source/sink of data. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** Flag indicating whether the current command transfers data in DMA mode. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** Set to indicate that ATAPI transfer semantics must be used. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** Total ATA/ATAPI transfer size, shared PIO/DMA. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** Elementary ATA/ATAPI transfer size, shared PIO/DMA. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** Current read/write buffer position, shared PIO/DMA. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** First element beyond end of valid buffer content, shared PIO/DMA. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** ATA/ATAPI current PIO read/write transfer position. Not shared with DMA for safety reasons. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** ATA/ATAPI current PIO read/write transfer end. Not shared with DMA for safety reasons. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** ATAPI current LBA position. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** ATAPI current sector size. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** ATAPI current command. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** ATAPI sense data. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** HACK: Countdown till we report a newly unmounted drive as mounted. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** The same for GET_EVENT_STATUS for mechanism */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** The status LED state for this drive. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** Size of I/O buffer. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** Pointer to the I/O buffer. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** Pointer to the I/O buffer. */
9f22c692723a5d3cb78b91896c48cf681c4fb608vboxsync /** Pointer to the I/O buffer. */
6a0359b8230a1b91fe49967c124a75191c3dfbf9vboxsync RTRCPTR Aligmnent1; /**< Align the statistics at an 8-byte boundrary. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * No data that is part of the saved state after this point!!!!!
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /* Release statistics: number of ATA DMA commands. */
1e0e13b23ace43d2fe93d45953b123f63b7e547cvboxsync /* Release statistics: number of ATA PIO commands. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /* Release statistics: number of ATAPI PIO commands. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /* Release statistics: number of ATAPI PIO commands. */
90ce7af4052f25f4a94d18c0ef86181971396cd3vboxsync /* Release statistics: number of DMA sector writes and the time spent. */
90ce7af4052f25f4a94d18c0ef86181971396cd3vboxsync /** Statistics: number of read operations and the time spent reading. */
90ce7af4052f25f4a94d18c0ef86181971396cd3vboxsync /** Statistics: number of bytes read. */
6a0359b8230a1b91fe49967c124a75191c3dfbf9vboxsync /** Statistics: number of write operations and the time spent writing. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** Statistics: number of bytes written. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** Statistics: number of flush operations and the time spend flushing. */
9f22c692723a5d3cb78b91896c48cf681c4fb608vboxsync /** Enable passing through commands directly to the ATAPI drive. */
83d61602c6968041692aa7203ee51c4085c7e460vboxsync /** Number of errors we've reported to the release log.
83d61602c6968041692aa7203ee51c4085c7e460vboxsync * This is to prevent flooding caused by something going horribly wrong.
83d61602c6968041692aa7203ee51c4085c7e460vboxsync * this value against MAX_LOG_REL_ERRORS in places likely to cause floods
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * like the ones we currently seeing on the linux smoke tests (2006-11-10). */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** Timestamp of last started command. 0 if no command pending. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** Pointer to the attached driver's base interface. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** Pointer to the attached driver's block interface. */
a9d98aa17ecb241bc2c79b67dc044f0af2eb7448vboxsync /** Pointer to the attached driver's block bios interface. */
a9d98aa17ecb241bc2c79b67dc044f0af2eb7448vboxsync /** Pointer to the attached driver's mount interface.
83d61602c6968041692aa7203ee51c4085c7e460vboxsync * This is NULL if the driver isn't a removable unit. */
83d61602c6968041692aa7203ee51c4085c7e460vboxsync /** The base interface. */
1e0e13b23ace43d2fe93d45953b123f63b7e547cvboxsync /** The block port interface. */
1e0e13b23ace43d2fe93d45953b123f63b7e547cvboxsync /** The mount notify interface. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** The LUN #. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync RTUINT Alignment2; /**< Align pDevInsR3 correctly. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** Pointer to device instance. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** Pointer to controller instance. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync R3PTRTYPE(struct AHCIATACONTROLLER *) pControllerR3;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** Pointer to device instance. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** Pointer to controller instance. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync R0PTRTYPE(struct AHCIATACONTROLLER *) pControllerR0;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** Pointer to device instance. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** Pointer to controller instance. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync RCPTRTYPE(struct AHCIATACONTROLLER *) pControllerRC;
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsynctypedef enum
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** Begin a new transfer. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** Continue a DMA transfer. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** Continue a PIO transfer. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** Reset the drives on current controller, stop all transfer activity. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** Reset the drives on current controller, resume operation. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** Abort the current transfer of a particular drive. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** The base of the first I/O Port range. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** The base of the second I/O Port range. (0 if none) */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** The assigned IRQ. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** Access critical section */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** Selected drive. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** The interface on which to handle async I/O. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** The state of the async I/O thread. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** Flag indicating whether the next transfer is part of the current command. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** Set when the reset processing is currently active on this controller. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** Flag whether the current transfer needs to be redone. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** Flag whether the redo suspend has been finished. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** Flag whether the DMA operation to be redone is the final transfer. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** The BusMaster DMA state. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** Pointer to first DMA descriptor. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** Pointer to last DMA descriptor. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** Pointer to current DMA buffer (for redo operations). */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** Size of current DMA buffer (for redo operations). */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** The ATA/ATAPI interfaces of this controller. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** Pointer to device instance. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** Pointer to device instance. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** Pointer to device instance. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** Set when the destroying the device instance and the thread must exit. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** The async I/O thread handle. NIL_RTTHREAD if no thread. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** The event semaphore the thread is waiting on for requests. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** The request queue for the AIO thread. One element is always unused. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** The position at which to insert a new request for the AIO thread. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** The position at which to get a new request for the AIO thread. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync uint8_t Alignment3[2]; /**< Explicit padding of the 2 byte gap. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** Magic delay before triggering interrupts in DMA mode. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** The mutex protecting the request queue. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /** The event semaphore the thread is waiting on during suspended I/O. */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync#if 0 /*HC_ARCH_BITS == 32*/
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync /* Statistics */
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync#define ATADEVSTATE_2_CONTROLLER(pIf) ( (pIf)->CTX_SUFF(pController) )
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync#define ATADEVSTATE_2_DEVINS(pIf) ( (pIf)->CTX_SUFF(pDevIns) )
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync#define CONTROLLER_2_DEVINS(pController) ( (pController)->CTX_SUFF(pDevIns) )
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync#define PDMIBASE_2_ATASTATE(pInterface) ( (AHCIATADevState *)((uintptr_t)(pInterface) - RT_OFFSETOF(AHCIATADevState, IBase)) )
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync/*******************************************************************************
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * Internal Functions *
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync ******************************************************************************/
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsyncint ataControllerIOPortWrite1(PAHCIATACONTROLLER pCtl, RTIOPORT Port, uint32_t u32, unsigned cb);
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsyncint ataControllerIOPortRead1(PAHCIATACONTROLLER pCtl, RTIOPORT Port, uint32_t *u32, unsigned cb);
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsyncint ataControllerIOPortWriteStr1(PAHCIATACONTROLLER pCtl, RTIOPORT Port, RTGCPTR *pGCPtrSrc, PRTGCUINTREG pcTransfer, unsigned cb);
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsyncint ataControllerIOPortReadStr1(PAHCIATACONTROLLER pCtl, RTIOPORT Port, RTGCPTR *pGCPtrDst, PRTGCUINTREG pcTransfer, unsigned cb);
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsyncint ataControllerIOPortWrite2(PAHCIATACONTROLLER pCtl, RTIOPORT Port, uint32_t u32, unsigned cb);
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsyncint ataControllerIOPortRead2(PAHCIATACONTROLLER pCtl, RTIOPORT Port, uint32_t *u32, unsigned cb);
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsyncint ataControllerBMDMAIOPortRead(PAHCIATACONTROLLER pCtl, RTIOPORT Port, uint32_t *pu32, unsigned cb);
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsyncint ataControllerBMDMAIOPortWrite(PAHCIATACONTROLLER pCtl, RTIOPORT Port, uint32_t u32, unsigned cb);
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * Initialize a controller state.
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * @returns VBox status code.
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * @param pDevIns Pointer to the device instance which creates a controller.
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * @param pCtl Pointer to the unitialized ATA controller structure.
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * @param pDrvBaseMaster Pointer to the base driver interface which acts as the master.
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * @param pDrvBaseSlave Pointer to the base driver interface which acts as the slave.
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * @param pcbSSMState Where to store the size of the device state for loading/saving.
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * @param szName Name of the controller (Used to initialize the critical section).
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsyncint ataControllerInit(PPDMDEVINS pDevIns, PAHCIATACONTROLLER pCtl, PPDMIBASE pDrvBaseMaster, PPDMIBASE pDrvBaseSlave,
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync uint32_t *pcbSSMState, const char *szName, PPDMLED pLed, PSTAMCOUNTER pStatBytesRead, PSTAMCOUNTER pStatBytesWritten);
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * Free all allocated resources for one controller instance.
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * @returns VBox status code.
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * @param pCtl The controller instance.
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * Power off a controller.
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * @returns nothing.
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * @param pCtl the controller instance.
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsyncvoid ataControllerPowerOff(PAHCIATACONTROLLER pCtl);
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * Reset a controller instance to an initial state.
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * @returns VBox status code.
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * @param pCtl Pointer to the controller.
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * Suspend operation of an controller.
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * @returns nothing
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * @param pCtl The controller instance.
41d680dd6eb0287afc200adc5b0d61b07a32b72dvboxsync * Resume operation of an controller.
9d7b020d79101e5c23c1f58a0ce5fa49488ccf73vboxsync * @returns nothing
9d7b020d79101e5c23c1f58a0ce5fa49488ccf73vboxsync * @param pCtl The controller instance.
9d7b020d79101e5c23c1f58a0ce5fa49488ccf73vboxsync * Relocate neccessary pointers.
9d7b020d79101e5c23c1f58a0ce5fa49488ccf73vboxsync * @returns nothing.
9d7b020d79101e5c23c1f58a0ce5fa49488ccf73vboxsync * @param pCtl The controller instance.
9d7b020d79101e5c23c1f58a0ce5fa49488ccf73vboxsync * @param offDelta The relocation delta relative to the old location.
9d7b020d79101e5c23c1f58a0ce5fa49488ccf73vboxsyncvoid ataControllerRelocate(PAHCIATACONTROLLER pCtl, RTGCINTPTR offDelta);
9d7b020d79101e5c23c1f58a0ce5fa49488ccf73vboxsync * Execute state save operation.
9d7b020d79101e5c23c1f58a0ce5fa49488ccf73vboxsync * @returns VBox status code.
9d7b020d79101e5c23c1f58a0ce5fa49488ccf73vboxsync * @param pCtl The controller instance.
9d7b020d79101e5c23c1f58a0ce5fa49488ccf73vboxsync * @param pSSM SSM operation handle.
6ea079037b825359aab1ba56bb4b9e202ecea648vboxsyncint ataControllerSaveExec(PAHCIATACONTROLLER pCtl, PSSMHANDLE pSSM);
6ea079037b825359aab1ba56bb4b9e202ecea648vboxsync * Prepare state save operation.
6ea079037b825359aab1ba56bb4b9e202ecea648vboxsync * @returns VBox status code.
6ea079037b825359aab1ba56bb4b9e202ecea648vboxsync * @param pCtl The controller instance.
6ea079037b825359aab1ba56bb4b9e202ecea648vboxsync * @param pSSM SSM operation handle.
6ea079037b825359aab1ba56bb4b9e202ecea648vboxsyncint ataControllerSavePrep(PAHCIATACONTROLLER pCtl, PSSMHANDLE pSSM);
9d7b020d79101e5c23c1f58a0ce5fa49488ccf73vboxsync * Excute state load operation.
6ea079037b825359aab1ba56bb4b9e202ecea648vboxsync * @returns VBox status code.
6ea079037b825359aab1ba56bb4b9e202ecea648vboxsync * @param pCtl The controller instance.
9d7b020d79101e5c23c1f58a0ce5fa49488ccf73vboxsync * @param pSSM SSM operation handle.
6ea079037b825359aab1ba56bb4b9e202ecea648vboxsyncint ataControllerLoadExec(PAHCIATACONTROLLER pCtl, PSSMHANDLE pSSM);
6ea079037b825359aab1ba56bb4b9e202ecea648vboxsync * Prepare state load operation.
6ea079037b825359aab1ba56bb4b9e202ecea648vboxsync * @returns VBox status code.
6ea079037b825359aab1ba56bb4b9e202ecea648vboxsync * @param pCtl The controller instance.
6ea079037b825359aab1ba56bb4b9e202ecea648vboxsync * @param pSSM SSM operation handle.
6ea079037b825359aab1ba56bb4b9e202ecea648vboxsyncint ataControllerLoadPrep(PAHCIATACONTROLLER pCtl, PSSMHANDLE pSSM);
6ea079037b825359aab1ba56bb4b9e202ecea648vboxsync#endif /* IN_RING3 */
6ea079037b825359aab1ba56bb4b9e202ecea648vboxsync#endif /* !VBOX_DEVICE_STRUCT_TESTCASE */
6ea079037b825359aab1ba56bb4b9e202ecea648vboxsync#endif /* !___Storage_ATAController_h */