DevParallel.cpp revision a6e58d30b4d856cf924fda15cd743fed386fff93
ff62f2ecb95b5892be2edaa7d786d80727d64a2cvboxsync * DevParallel - Parallel (Port) Device Emulation.
ff62f2ecb95b5892be2edaa7d786d80727d64a2cvboxsync * Contributed by: Alexander Eichner
ff62f2ecb95b5892be2edaa7d786d80727d64a2cvboxsync * Copyright (C) 2006-2007 Sun Microsystems, Inc.
ff62f2ecb95b5892be2edaa7d786d80727d64a2cvboxsync * This file is part of VirtualBox Open Source Edition (OSE), as
ff62f2ecb95b5892be2edaa7d786d80727d64a2cvboxsync * available from http://www.virtualbox.org. This file is free software;
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync * you can redistribute it and/or modify it under the terms of the GNU
76c5ade78ff18423f4a3aed5cf7fcc84b1c0933bvboxsync * General Public License (GPL) as published by the Free Software
1f5edbfd0fc9c890d44edbf915ebc06e75e08943vboxsync * Foundation, in version 2 as it comes in the "COPYING" file of the
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
76c5ade78ff18423f4a3aed5cf7fcc84b1c0933bvboxsync * Clara, CA 95054 USA or visit http://www.sun.com if you need
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync * additional information or have any questions.
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync/*******************************************************************************
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync* Header Files *
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync*******************************************************************************/
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync/*******************************************************************************
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync* Defined Constants And Macros *
444f91a8285333437cdc9da6bf750121b52f208dvboxsync*******************************************************************************/
ff62f2ecb95b5892be2edaa7d786d80727d64a2cvboxsync/* defines for accessing the register bits */
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync#define LPT_STATUS_BIT1 0x02 /* reserved (only for completeness) */
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync#define LPT_CONTROL_BIT7 0x80 /* reserved (only for completeness) */
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync#define LPT_CONTROL_BIT6 0x40 /* reserved (only for completeness) */
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync/** mode defines for the extended control register */
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync#define LPT_ECP_ECR_CHIPMODE_GET_BITS(reg) ((reg) >> 5)
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync#define LPT_ECP_ECR_CHIPMODE_SET_BITS(val) ((val) << 5)
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync/** FIFO status bits in extended control register */
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync#define LPT_ECP_CONFIGA_FIFO_WIDTH_GET_BITS(reg) ((reg) >> 4)
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync#define LPT_ECP_CONFIGA_FIFO_WIDTH_SET_BITS(val) ((val) << 4)
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync/*******************************************************************************
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync* Structures and Typedefs *
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync*******************************************************************************/
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync /** Access critical section. */
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync /** Pointer to the device instance - R3 Ptr */
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync /** Pointer to the device instance - R0 Ptr */
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync /** Pointer to the device instance - RC Ptr */
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync /** The base interface. */
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync /** The host device port interface. */
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync /** Pointer to the attached base driver. */
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync /** Pointer to the attached host device. */
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync R3PTRTYPE(PPDMIHOSTPARALLELCONNECTOR) pDrvHostParallelConnector;
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync /** Unused event semaphore... */
b97d0f715f8fe39ceb7d4138427da4a0030ff65fvboxsync uint8_t reg_ecp_base_plus_400h; /* has different meanings */
b97d0f715f8fe39ceb7d4138427da4a0030ff65fvboxsync /** The ECP FIFO implementation*/
ede381e58d677545f69d56df0b26b1959d1b9fbfvboxsync#define PDMIHOSTPARALLELPORT_2_PARALLELSTATE(pInstance) ( (ParallelState *)((uintptr_t)(pInterface) - RT_OFFSETOF(ParallelState, IHostParallelPort)) )
ede381e58d677545f69d56df0b26b1959d1b9fbfvboxsync#define PDMIHOSTDEVICEPORT_2_PARALLELSTATE(pInstance) ( (ParallelState *)((uintptr_t)(pInterface) - RT_OFFSETOF(ParallelState, IHostDevicePort)) )
ede381e58d677545f69d56df0b26b1959d1b9fbfvboxsync#define PDMIBASE_2_PARALLELSTATE(pInstance) ( (ParallelState *)((uintptr_t)(pInterface) - RT_OFFSETOF(ParallelState, IBase)) )
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync/*******************************************************************************
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync* Internal Functions *
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync*******************************************************************************/
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsyncPDMBOTHCBDECL(int) parallelIOPortRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb);
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsyncPDMBOTHCBDECL(int) parallelIOPortWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb);
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsyncPDMBOTHCBDECL(int) parallelIOPortReadECP(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb);
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsyncPDMBOTHCBDECL(int) parallelIOPortWriteECP(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb);
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync if (s->reg_control & LPT_CONTROL_ENABLE_IRQ_VIA_ACK)
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync PDMDevHlpISASetIrqNoWait(s->CTX_SUFF(pDevIns), s->irq, 1);
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync PDMDevHlpISASetIrqNoWait(s->CTX_SUFF(pDevIns), s->irq, 0);
3d0c9ab568ff32132049431e7dc45ea82cda6089vboxsyncstatic int parallel_ioport_write(void *opaque, uint32_t addr, uint32_t val)
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync unsigned char ch;
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync LogFlow(("parallel: write addr=0x%02x val=0x%02x\n", addr, val));
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync int rc = s->pDrvHostParallelConnector->pfnWrite(s->pDrvHostParallelConnector, &ch, &cbWrite);
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync /* Set the reserved bits to one */
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync int rc = s->pDrvHostParallelConnector->pfnWriteControl(s->pDrvHostParallelConnector, ch);
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsyncstatic uint32_t parallel_ioport_read(void *opaque, uint32_t addr, int *pRC)
444f91a8285333437cdc9da6bf750121b52f208dvboxsync if (!(s->reg_control & LPT_CONTROL_ENABLE_BIDIRECT))
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync int rc = s->pDrvHostParallelConnector->pfnRead(s->pDrvHostParallelConnector, &s->reg_data, &cbRead);
2a2095adf36a009010d72cf36ffabb3c1261ad08vboxsync Log(("parallel_io_port_read: read 0x%X\n", s->reg_data));
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync int rc = s->pDrvHostParallelConnector->pfnReadStatus(s->pDrvHostParallelConnector, &s->reg_status);
2a2095adf36a009010d72cf36ffabb3c1261ad08vboxsync LogFlow(("parallel: read addr=0x%02x val=0x%02x\n", addr, ret));
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsyncstatic int parallel_ioport_write_ecp(void *opaque, uint32_t addr, uint32_t val)
76c5ade78ff18423f4a3aed5cf7fcc84b1c0933bvboxsync unsigned char ch;
2a2095adf36a009010d72cf36ffabb3c1261ad08vboxsync LogFlow(("parallel: write ecp addr=0x%02x val=0x%02x\n", addr, val));
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync if (LPT_ECP_ECR_CHIPMODE_GET_BITS(s->reg_ecp_ecr) == LPT_ECP_ECR_CHIPMODE_FIFO_TEST) {
76c5ade78ff18423f4a3aed5cf7fcc84b1c0933bvboxsync /* FIFO has some data (clear both FIFO bits) */
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync s->reg_ecp_ecr &= ~(LPT_ECP_ECR_FIFO_EMPTY | LPT_ECP_ECR_FIFO_FULL);
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync /* FIFO is full */
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync /* Clear FIFO empty bit */
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync /* Set FIFO full bit */
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync /* If we change the mode clear FIFO */
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync if ((ch & LPT_ECP_ECR_CHIPMODE_MASK) != (s->reg_ecp_ecr & LPT_ECP_ECR_CHIPMODE_MASK)) {
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync /* reset the fifo */
76c5ade78ff18423f4a3aed5cf7fcc84b1c0933bvboxsync /* Set FIFO empty bit */
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync /* Clear FIFO full bit */
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync /* Set new mode */
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync s->reg_ecp_ecr |= LPT_ECP_ECR_CHIPMODE_SET_BITS(LPT_ECP_ECR_CHIPMODE_GET_BITS(ch));
76c5ade78ff18423f4a3aed5cf7fcc84b1c0933bvboxsyncstatic uint32_t parallel_ioport_read_ecp(void *opaque, uint32_t addr, int *pRC)
ff62f2ecb95b5892be2edaa7d786d80727d64a2cvboxsync if (LPT_ECP_ECR_CHIPMODE_GET_BITS(s->reg_ecp_ecr) == LPT_ECP_ECR_CHIPMODE_FIFO_TEST) {
ff62f2ecb95b5892be2edaa7d786d80727d64a2cvboxsync s->act_fifo_pos_read = 0; /* end of FIFO, start at beginning */
ff62f2ecb95b5892be2edaa7d786d80727d64a2cvboxsync if (s->act_fifo_pos_read == s->act_fifo_pos_write) {
ff62f2ecb95b5892be2edaa7d786d80727d64a2cvboxsync /* FIFO is empty */
ff62f2ecb95b5892be2edaa7d786d80727d64a2cvboxsync /* Set FIFO empty bit */
ff62f2ecb95b5892be2edaa7d786d80727d64a2cvboxsync /* Clear FIFO full bit */
ff62f2ecb95b5892be2edaa7d786d80727d64a2cvboxsync /* FIFO has some data (clear all FIFO bits) */
ff62f2ecb95b5892be2edaa7d786d80727d64a2cvboxsync s->reg_ecp_ecr &= ~(LPT_ECP_ECR_FIFO_EMPTY | LPT_ECP_ECR_FIFO_FULL);
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync LogFlow(("parallel: read ecp addr=0x%02x val=0x%02x\n", addr, ret));
e5da5dbb49b995e6e7d20a79a6cac76307549b15vboxsyncstatic DECLCALLBACK(int) parallelNotifyInterrupt(PPDMIHOSTPARALLELPORT pInterface)
e5da5dbb49b995e6e7d20a79a6cac76307549b15vboxsync ParallelState *pThis = PDMIHOSTPARALLELPORT_2_PARALLELSTATE(pInterface);
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync#endif /* IN_RING3 */
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync * Port I/O Handler for OUT operations.
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync * @returns VBox status code.
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync * @param pDevIns The device instance.
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync * @param pvUser User argument.
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync * @param Port Port number used for the IN operation.
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync * @param u32 The value to output.
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync * @param cb The value size in bytes.
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsyncPDMBOTHCBDECL(int) parallelIOPortWrite(PPDMDEVINS pDevIns, void *pvUser,
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync ParallelState *pThis = PDMINS_2_DATA(pDevIns, ParallelState *);
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync rc = PDMCritSectEnter(&pThis->CritSect, VINF_IOM_HC_IOPORT_WRITE);
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync Log2(("%s: port %#06x val %#04x\n", __FUNCTION__, Port, u32));
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync AssertMsgFailed(("Port=%#x cb=%d u32=%#x\n", Port, cb, u32));
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync * Port I/O Handler for IN operations.
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync * @returns VBox status code.
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync * @param pDevIns The device instance.
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync * @param pvUser User argument.
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync * @param Port Port number used for the IN operation.
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync * @param u32 The value to output.
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync * @param cb The value size in bytes.
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsyncPDMBOTHCBDECL(int) parallelIOPortRead(PPDMDEVINS pDevIns, void *pvUser,
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync ParallelState *pThis = PDMINS_2_DATA(pDevIns, ParallelState *);
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync rc = PDMCritSectEnter(&pThis->CritSect, VINF_IOM_HC_IOPORT_READ);
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync Log2(("%s: port %#06x val %#04x\n", __FUNCTION__, Port, *pu32));
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync * Port I/O Handler for OUT operations on ECP registers.
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync * @returns VBox status code.
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync * @param pDevIns The device instance.
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync * @param pvUser User argument.
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync * @param Port Port number used for the IN operation.
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync * @param u32 The value to output.
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync * @param cb The value size in bytes.
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsyncPDMBOTHCBDECL(int) parallelIOPortWriteECP(PPDMDEVINS pDevIns, void *pvUser,
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync ParallelState *pThis = PDMINS_2_DATA(pDevIns, ParallelState *);
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync rc = PDMCritSectEnter(&pThis->CritSect, VINF_IOM_HC_IOPORT_WRITE);
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync Log2(("%s: ecp port %#06x val %#04x\n", __FUNCTION__, Port, u32));
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync AssertMsgFailed(("Port=%#x cb=%d u32=%#x\n", Port, cb, u32));
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync * Port I/O Handler for IN operations on ECP registers.
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync * @returns VBox status code.
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync * @param pDevIns The device instance.
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync * @param pvUser User argument.
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync * @param Port Port number used for the IN operation.
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync * @param u32 The value to output.
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync * @param cb The value size in bytes.
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsyncPDMBOTHCBDECL(int) parallelIOPortReadECP(PPDMDEVINS pDevIns, void *pvUser,
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync ParallelState *pThis = PDMINS_2_DATA(pDevIns, ParallelState *);
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync rc = PDMCritSectEnter(&pThis->CritSect, VINF_IOM_HC_IOPORT_READ);
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync *pu32 = parallel_ioport_read_ecp (pThis, Port, &rc);
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync Log2(("%s: ecp port %#06x val %#04x\n", __FUNCTION__, Port, *pu32));
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync * Saves a state of the serial port device.
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync * @returns VBox status code.
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync * @param pDevIns The device instance.
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync * @param pSSMHandle The handle to save the state to.
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsyncstatic DECLCALLBACK(int) parallelSaveExec(PPDMDEVINS pDevIns,
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync ParallelState *pThis = PDMINS_2_DATA(pDevIns, ParallelState *);
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync return SSMR3PutU32(pSSMHandle, ~0); /* sanity/terminator */
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync * Loads a saved serial port device state.
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync * @returns VBox status code.
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync * @param pDevIns The device instance.
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync * @param pSSMHandle The handle to the saved state.
b97d0f715f8fe39ceb7d4138427da4a0030ff65fvboxsync * @param u32Version The data unit version number.
1f5edbfd0fc9c890d44edbf915ebc06e75e08943vboxsyncstatic DECLCALLBACK(int) parallelLoadExec(PPDMDEVINS pDevIns,
1f5edbfd0fc9c890d44edbf915ebc06e75e08943vboxsync ParallelState *pThis = PDMINS_2_DATA(pDevIns, ParallelState *);
1f5edbfd0fc9c890d44edbf915ebc06e75e08943vboxsync AssertLogRelMsgFailed(("u32Version=%d\n", u32Version));
7ae61147cce23a4efff53b9cdf35541be62a0cb8vboxsync if (u32 != ~0U)
0005b7c81d5621b5c6e0b38ce3cbcabf7e883fd3vboxsync AssertLogRelMsgFailed(("u32=%#x expected ~0\n", u32));
7ae61147cce23a4efff53b9cdf35541be62a0cb8vboxsync /* not necessary... but it doesn't harm. */
f4fa1b6b87341bfa5b45bacb7067beec05ca8f96vboxsync * @copydoc FNPDMDEVRELOCATE
f4fa1b6b87341bfa5b45bacb7067beec05ca8f96vboxsyncstatic DECLCALLBACK(void) parallelRelocate(PPDMDEVINS pDevIns, RTGCINTPTR offDelta)
f4fa1b6b87341bfa5b45bacb7067beec05ca8f96vboxsync ParallelState *pThis = PDMINS_2_DATA(pDevIns, ParallelState *);
f4fa1b6b87341bfa5b45bacb7067beec05ca8f96vboxsync/** @copyfrom PIBASE::pfnqueryInterface */
f4fa1b6b87341bfa5b45bacb7067beec05ca8f96vboxsyncstatic DECLCALLBACK(void *) parallelQueryInterface(PPDMIBASE pInterface, PDMINTERFACE enmInterface)
f4fa1b6b87341bfa5b45bacb7067beec05ca8f96vboxsync ParallelState *pThis = PDMIBASE_2_PARALLELSTATE(pInterface);
1f291c5acd315376ba984563c3165bc0edb53f49vboxsync * Destruct a device instance.
2a2095adf36a009010d72cf36ffabb3c1261ad08vboxsync * Most VM resources are freed by the VM. This callback is provided so that any non-VM
1f291c5acd315376ba984563c3165bc0edb53f49vboxsync * resources can be freed correctly.
1f291c5acd315376ba984563c3165bc0edb53f49vboxsync * @returns VBox status.
1f291c5acd315376ba984563c3165bc0edb53f49vboxsync * @param pDevIns The device instance data.
1f291c5acd315376ba984563c3165bc0edb53f49vboxsyncstatic DECLCALLBACK(int) parallelDestruct(PPDMDEVINS pDevIns)
ff62f2ecb95b5892be2edaa7d786d80727d64a2cvboxsync ParallelState *pThis = PDMINS_2_DATA(pDevIns, ParallelState *);
5508f48d486b92a88593b6dcc2252969927faed4vboxsync * Construct a device instance for a VM.
5508f48d486b92a88593b6dcc2252969927faed4vboxsync * @returns VBox status.
5508f48d486b92a88593b6dcc2252969927faed4vboxsync * @param pDevIns The device instance data.
5508f48d486b92a88593b6dcc2252969927faed4vboxsync * If the registration structure is needed, pDevIns->pDevReg points to it.
ff62f2ecb95b5892be2edaa7d786d80727d64a2cvboxsync * @param iInstance Instance number. Use this to figure out which registers and such to use.
ff62f2ecb95b5892be2edaa7d786d80727d64a2cvboxsync * The device number is also found in pDevIns->iInstance, but since it's
ff62f2ecb95b5892be2edaa7d786d80727d64a2cvboxsync * likely to be freqently used PDM passes it as parameter.
ff62f2ecb95b5892be2edaa7d786d80727d64a2cvboxsync * @param pCfgHandle Configuration node handle for the device. Use this to obtain the configuration
ff62f2ecb95b5892be2edaa7d786d80727d64a2cvboxsync * of the device instance. It's also found in pDevIns->pCfgHandle, but like
ff62f2ecb95b5892be2edaa7d786d80727d64a2cvboxsync * iInstance it's expected to be used a bit in this function.
ff62f2ecb95b5892be2edaa7d786d80727d64a2cvboxsyncstatic DECLCALLBACK(int) parallelConstruct(PPDMDEVINS pDevIns,
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync ParallelState *pThis = PDMINS_2_DATA(pDevIns, ParallelState*);
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync * Init the data so parallelDestruct doesn't choke.
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync /* IBase */
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync pThis->IBase.pfnQueryInterface = parallelQueryInterface;
5508f48d486b92a88593b6dcc2252969927faed4vboxsync /* IHostParallelPort */
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync pThis->IHostParallelPort.pfnNotifyInterrupt = parallelNotifyInterrupt;
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync /* Init parallel state */
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync pThis->reg_ecp_ecr = LPT_ECP_ECR_CHIPMODE_COMPAT | LPT_ECP_ECR_FIFO_EMPTY;
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync * Validate and read the configuration.
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync if (!CFGMR3AreValuesValid(pCfgHandle, "IRQ\0" "IOBase\0" "GCEnabled\0" "R0Enabled\0"))
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync return PDMDEV_SET_ERROR(pDevIns, VERR_PDM_DEVINS_UNKNOWN_CFG_VALUES,
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync rc = CFGMR3QueryBoolDef(pCfgHandle, "GCEnabled", &pThis->fGCEnabled, true);
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync N_("Configuration error: Failed to get the \"GCEnabled\" value"));
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync rc = CFGMR3QueryBoolDef(pCfgHandle, "R0Enabled", &pThis->fR0Enabled, true);
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync N_("Configuration error: Failed to get the \"R0Enabled\" value"));
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync rc = CFGMR3QueryU8Def(pCfgHandle, "IRQ", &irq_lvl, 7);
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync N_("Configuration error: Failed to get the \"IRQ\" value"));
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync rc = CFGMR3QueryU16Def(pCfgHandle, "IOBase", &io_base, 0x378);
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync N_("Configuration error: Failed to get the \"IOBase\" value"));
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync Log(("parallelConstruct instance %d iobase=%04x irq=%d\n", iInstance, io_base, irq_lvl));
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync * Initialize critical section and event semaphore.
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync * This must of course be done before attaching drivers or anything else which can call us back..
b97d0f715f8fe39ceb7d4138427da4a0030ff65fvboxsync RTStrPrintf(szName, sizeof(szName), "Parallel#%d", iInstance);
ff62f2ecb95b5892be2edaa7d786d80727d64a2cvboxsync rc = PDMDevHlpCritSectInit(pDevIns, &pThis->CritSect, szName);
e2fe5c2c7eeaf4282b1f3d185fc3f379276fae5dvboxsync * Register the I/O ports and saved state.
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync rc = PDMDevHlpIOPortRegister(pDevIns, io_base, 8, 0,
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync /* register ecp registers */
2d97f8baccdd684bc0a8a15eb86bbe9ff2b85374vboxsync rc = PDMDevHlpIOPortRegister(pDevIns, io_base+0x400, 8, 0,
1f5edbfd0fc9c890d44edbf915ebc06e75e08943vboxsync rc = PDMDevHlpIOPortRegisterGC(pDevIns, io_base, 8, 0, "parallelIOPortWrite",
ff62f2ecb95b5892be2edaa7d786d80727d64a2cvboxsync rc = PDMDevHlpIOPortRegisterGC(pDevIns, io_base+0x400, 8, 0, "parallelIOPortWriteECP",
ff62f2ecb95b5892be2edaa7d786d80727d64a2cvboxsync "parallelIOPortReadECP", NULL, NULL, "Parallel Ecp");
ff62f2ecb95b5892be2edaa7d786d80727d64a2cvboxsync rc = PDMDevHlpIOPortRegisterR0(pDevIns, io_base, 8, 0, "parallelIOPortWrite",
1f5edbfd0fc9c890d44edbf915ebc06e75e08943vboxsync rc = PDMDevHlpIOPortRegisterR0(pDevIns, io_base+0x400, 8, 0, "parallelIOPortWriteECP",
1f5edbfd0fc9c890d44edbf915ebc06e75e08943vboxsync "parallelIOPortReadECP", NULL, NULL, "Parallel Ecp");
8b36c1115d96725cbbcbdb50bbe0a90993f7d5c1vboxsync * Attach the parallel port driver and get the interfaces.
8b36c1115d96725cbbcbdb50bbe0a90993f7d5c1vboxsync * For now no run-time changes are supported.
8b36c1115d96725cbbcbdb50bbe0a90993f7d5c1vboxsync rc = PDMDevHlpDriverAttach(pDevIns, 0, &pThis->IBase, &pThis->pDrvBase, "Parallel Host");
8b36c1115d96725cbbcbdb50bbe0a90993f7d5c1vboxsync pThis->pDrvHostParallelConnector = (PDMIHOSTPARALLELCONNECTOR *)pThis->pDrvBase->pfnQueryInterface(pThis->pDrvBase,
4338d1606b19c219ef8f200aae7558a8ea7cb796vboxsync AssertMsgFailed(("Configuration error: instance %d has no host parallel interface!\n", iInstance));
return VERR_PDM_MISSING_INTERFACE;
pThis->pDrvHostParallelConnector->pfnSetMode(pThis->pDrvHostParallelConnector, PDM_PARALLEL_PORT_MODE_COMPAT);
pThis->pDrvHostParallelConnector->pfnReadControl(pThis->pDrvHostParallelConnector, &pThis->reg_control);
return VINF_SUCCESS;
PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT | PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT | PDM_DEVREG_FLAGS_GC | PDM_DEVREG_FLAGS_R0,
sizeof(ParallelState),
NULL,
NULL,
NULL,
NULL,
NULL,
NULL,
NULL,