DevHPET.cpp revision 9b7ab382b3f9667e8847020e1e58f7143c4d2334
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync * HPET virtual device - high precision event timer emulation
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync * Copyright (C) 2009-2010 Sun Microsystems, Inc.
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync * This file is part of VirtualBox Open Source Edition (OSE), as
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync * available from http://www.virtualbox.org. This file is free software;
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync * you can redistribute it and/or modify it under the terms of the GNU
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync * General Public License (GPL) as published by the Free Software
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync * Foundation, in version 2 as it comes in the "COPYING" file of the
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync * Clara, CA 95054 USA or visit http://www.sun.com if you need
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync * additional information or have any questions.
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync/*******************************************************************************
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync* Header Files *
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync*******************************************************************************/
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync * Current limitations:
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync * - not entirely correct time of interrupt, i.e. never
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync * schedule interrupt earlier than in 1ms
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync * - statistics not implemented
9b7ab382b3f9667e8847020e1e58f7143c4d2334vboxsync * - level-triggered mode not implemented
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync * Base address for MMIO
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync * Number of available timers, cannot be changed without
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync * breaking saved states.
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync * 10000000 femtoseconds == 10ns
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync * Femptosecods in nanosecond
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync * Interrupt type
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync/* Delivery mode */
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync/* Via APIC */
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync/* Via FSB */
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync#define HPET_TN_CFG_BITS_READONLY_OR_RESERVED 0xffff80b1U
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync/** The version of the saved state. */
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync/* Empty saved state */
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsynctypedef struct HpetTimer
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync /** The HPET timer - R3 Ptr. */
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync /** Pointer to the instance data - R3 Ptr. */
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync /** The HPET timer - R0 Ptr. */
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync /** Pointer to the instance data - R0 Ptr. */
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync /** The HPET timer - RC Ptr. */
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync /** Pointer to the instance data - RC Ptr. */
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync /* timer number*/
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync /* Alignment */
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync /* Memory-mapped, software visible timer registers */
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync /* comparator */
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync /* FSB route, not supported now */
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync /* Hidden register state */
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync /* Last value written to comparator */
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsynctypedef struct HpetState
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync /** Pointer to the device instance. - R3 ptr. */
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync /** The HPET helpers - R3 Ptr. */
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync /** Pointer to the device instance. - R0 ptr. */
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync /** The HPET helpers - R0 Ptr. */
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync /** Pointer to the device instance. - RC ptr. */
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync /** The HPET helpers - RC Ptr. */
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync /* Timer structures */
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync /* Offset realtive to the system clock */
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync /* Memory-mapped, software visible registers */
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync /* capabilities */
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync /* configuration */
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync /* interrupt status register */
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync /* main counter */
9540eeb13face31ddc1c5f15338556fe46f18a77vboxsync /* Global device lock */
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync * We shall declare MMIO accessors as extern "C" to avoid name mangling
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync * and let them be found during R0/RC module init.
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync * Maybe PDMBOTHCBDECL macro shall have extern "C" part in it.
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsyncPDMBOTHCBDECL(int) hpetMMIOWrite(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void *pv, unsigned cb);
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsyncPDMBOTHCBDECL(int) hpetMMIORead (PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void *pv, unsigned cb);
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync * Temporary control to disble locking if problems found
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsyncstatic const bool fHpetLocking = true;
9540eeb13face31ddc1c5f15338556fe46f18a77vboxsyncDECLINLINE(int) hpetLock(HpetState* pThis, int rcBusy)
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsyncstatic uint32_t hpetTimeAfter32(uint64_t a, uint64_t b)
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsyncstatic uint32_t hpetTimeAfter64(uint64_t a, uint64_t b)
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync return (ASMMultU64ByU32DivByU32(value, HPET_CLK_PERIOD, FS_PER_NS));
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync return (ASMMultU64ByU32DivByU32(u64Value, FS_PER_NS, HPET_CLK_PERIOD));
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync * We can use any timer to get current time, they all go
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync * with the same speed.
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync return nsToHpetTicks(TMTimerGet(pThis->aTimers[0].CTX_SUFF(pTimer)) +
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync return (!(u64OldValue & u64Mask) && (u64NewValue & u64Mask));
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync return ((u64OldValue & u64Mask) && !(u64NewValue & u64Mask));
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsyncDECLINLINE(uint64_t) hpetComputeDiff(HpetTimer* pTimer,
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync u32Diff = (uint32_t)pTimer->u64Cmp - (uint32_t)u64Now;
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync u32Diff = ((int32_t)u32Diff > 0) ? u32Diff : (uint32_t)0;
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync u64Diff = ((int64_t)u64Diff > 0) ? u64Diff : (uint64_t)0;
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync if ((pTimer->u64Config & HPET_TN_PERIODIC) && (u64Period != 0))
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync /* While loop is suboptimal */
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync pTimer->u64Cmp = (uint32_t)(pTimer->u64Cmp + u64Period);
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync uint64_t u64Ticks = hpetGetTicks(pTimer->CTX_SUFF(pHpet));
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync /* no wrapping on new timers */
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync /* Spec says in one-shot 32-bit mode, generate an interrupt when
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync * counter wraps in addition to an interrupt with comparator match.
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync if ((pTimer->u64Config & HPET_TN_32BIT) && !(pTimer->u64Config & HPET_TN_PERIODIC))
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync /* Avoid killing VM with interrupts */
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync /* @todo: HACK, rethink, may have negative impact on the guest */
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync Log4(("HPET: next IRQ in %lld ticks (%lld ns)\n", u64Diff, hpetTicksToNs(u64Diff)));
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync TMTimerSetNano(pTimer->CTX_SUFF(pTimer), hpetTicksToNs(u64Diff));
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsyncstatic uint32_t getTimerIrq(struct HpetTimer *pTimer)
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync * Per spec, in legacy mode HPET timers wired as:
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync * timer 0: IRQ0 for PIC and IRQ2 for APIC
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync * timer 1: IRQ8 for both PIC and APIC
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync * As primary usecase for HPET is APIC config, we pretend
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync * being always APIC, although for safety we shall check currect IC.
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync * @todo: implement private interface between HPET and PDM
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync * to allow figuring that out and enabling/disabling
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync * PIT and RTC
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync (pTimer->CTX_SUFF(pHpet)->u64Config & HPET_CFG_LEGACY))
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync return (pTimer->u64Config & HPET_TN_INT_ROUTE_MASK) >> HPET_TN_INT_ROUTE_SHIFT;
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync LogRel(("HPET: using timer above configured range: %d\n", iTimerNo));
36fbf6dcd3e6b2e5891456b730577ff0eb355c9fvboxsync Log(("read HPET_TN_CFG on %d\n", pTimer->u8TimerNumber));
36fbf6dcd3e6b2e5891456b730577ff0eb355c9fvboxsync Log(("read HPET_TN_CFG+4 on %d\n", pTimer->u8TimerNumber));
36fbf6dcd3e6b2e5891456b730577ff0eb355c9fvboxsync Log(("read HPET_TN_CMP on %d, cmp=%llx\n", pTimer->u8TimerNumber, pTimer->u64Cmp));
36fbf6dcd3e6b2e5891456b730577ff0eb355c9fvboxsync Log(("read HPET_TN_CMP+4 on %d, cmp=%llx\n", pTimer->u8TimerNumber, pTimer->u64Cmp));
36fbf6dcd3e6b2e5891456b730577ff0eb355c9fvboxsync Log(("read HPET_TN_ROUTE on %d\n", pTimer->u8TimerNumber));
36fbf6dcd3e6b2e5891456b730577ff0eb355c9fvboxsync LogRel(("invalid HPET register read %d on %d\n", iTimerReg, pTimer->u8TimerNumber));
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync *pValue = (uint32_t)(pThis->u64Capabilities >> 32);
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync /** @todo: is it correct? */
ac6445a70a26cb69d08734f1d9dbc171cec86cd8vboxsync *pValue = (iIndex == HPET_COUNTER) ? (uint32_t)u64Ticks : (uint32_t)(u64Ticks >> 32);
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync LogRel(("HPET: using timer above configured range: %d\n", iTimerNo));
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync rc = timerRegRead32(pThis, iTimerNo, iTimerReg, &u32Temp);
9b7ab382b3f9667e8847020e1e58f7143c4d2334vboxsync if ((iNewValue & HPET_TN_INT_TYPE) == HPET_TIMER_TYPE_LEVEL)
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync LogRel(("level-triggered config not yet supported\n"));
9b7ab382b3f9667e8847020e1e58f7143c4d2334vboxsync /** We only care about lower 32-bits so far */
9b7ab382b3f9667e8847020e1e58f7143c4d2334vboxsync updateMasked(iNewValue, iOldValue, HPET_TN_CFG_WRITE_MASK);
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync case HPET_TN_CMP: /* lower bits of comparator register */
36fbf6dcd3e6b2e5891456b730577ff0eb355c9fvboxsync Log(("write HPET_TN_CMP on %d: %x\n", iTimerNo, iNewValue));
36fbf6dcd3e6b2e5891456b730577ff0eb355c9fvboxsync /* HPET_TN_SETVAL allows to adjust comparator w/o updating period, and it's cleared on access */
36fbf6dcd3e6b2e5891456b730577ff0eb355c9fvboxsync iNewValue &= (pTimer->u64Config & HPET_TN_32BIT ? ~0U : ~0ULL) >> 1;
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync pTimer->u64Period = (pTimer->u64Period & 0xffffffff00000000ULL)
36fbf6dcd3e6b2e5891456b730577ff0eb355c9fvboxsync pTimer->u64Cmp = (pTimer->u64Cmp & 0xffffffff00000000ULL)
36fbf6dcd3e6b2e5891456b730577ff0eb355c9fvboxsync Log2(("after HPET_TN_CMP cmp=%llx per=%llx\n", pTimer->u64Cmp, pTimer->u64Period));
36fbf6dcd3e6b2e5891456b730577ff0eb355c9fvboxsync case HPET_TN_CMP + 4: /* upper bits of comparator register */
36fbf6dcd3e6b2e5891456b730577ff0eb355c9fvboxsync Log(("write HPET_TN_CMP + 4 on %d: %x\n", iTimerNo, iNewValue));
36fbf6dcd3e6b2e5891456b730577ff0eb355c9fvboxsync /* HPET_TN_SETVAL allows to adjust comparator w/o updating period, and it's cleared on access */
36fbf6dcd3e6b2e5891456b730577ff0eb355c9fvboxsync pTimer->u64Period = (pTimer->u64Period & 0xffffffffULL)
36fbf6dcd3e6b2e5891456b730577ff0eb355c9fvboxsync Log2(("after HPET_TN_CMP+4 cmp=%llx per=%llx\n", pTimer->u64Cmp, pTimer->u64Period));
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync LogRel(("invalid timer register write: %d\n", iTimerReg));
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync /* Don't do anything complicated outside of R3 */
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync#else /* IN_RING3 */
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync rc = pThis->pHpetHlpR3->pfnSetLegacyMode(pThis->pDevInsR3, fActivate);
3614117c1132a61599e6190939e775cafe549411vboxsync * This check must be here, before actual update, as hpetLegacyMode
3614117c1132a61599e6190939e775cafe549411vboxsync * may request retry in R3 - so we must keep state intact.
3614117c1132a61599e6190939e775cafe549411vboxsync if (isBitJustSet(iOldValue, iNewValue, HPET_CFG_LEGACY))
3614117c1132a61599e6190939e775cafe549411vboxsync else if (isBitJustCleared(iOldValue, iNewValue, HPET_CFG_LEGACY))
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync pThis->u64Config = updateMasked(iNewValue, iOldValue, HPET_CFG_WRITE_MASK);
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync if (isBitJustSet(iOldValue, iNewValue, HPET_CFG_ENABLE))
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync /* Enable main counter and interrupt generation. */
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync pThis->u64HpetOffset = hpetTicksToNs(pThis->u64HpetCounter)
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync for (i = 0; i < HPET_NUM_TIMERS; i++)
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync else if (isBitJustCleared(iOldValue, iNewValue, HPET_CFG_ENABLE))
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync /* Halt main counter and disable interrupt generation. */
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync for (i = 0; i < HPET_NUM_TIMERS; i++)
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync pThis->u64Config = updateMasked((uint64_t)iNewValue << 32,
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync 0xffffffff00000000ULL);
ac6445a70a26cb69d08734f1d9dbc171cec86cd8vboxsync // clear ISR for all set bits in iNewValue, see p. 14 of HPET spec
ac6445a70a26cb69d08734f1d9dbc171cec86cd8vboxsync LogRel(("Writing HPET_STATUS + 4 with non-zero, ignored\n"));
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync pThis->u64HpetCounter = (pThis->u64HpetCounter & 0xffffffff00000000ULL) | iNewValue;
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync pThis->u64HpetCounter = (pThis->u64HpetCounter & 0xffffffffULL)
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync LogRel(("invalid HPET config write: %x\n", iIndex));
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync HpetState * pThis = PDMINS_2_DATA(pDevIns, HpetState*);
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync uint32_t iIndex = (uint32_t)(GCPhysAddr - HPET_BASE);
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync LogFlow(("hpetMMIORead: %llx (%x)\n", (uint64_t)GCPhysAddr, iIndex));
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync rc = timerRegRead32(pThis, (iIndex - 0x100) / 0x20, (iIndex - 0x100) % 0x20, (uint32_t*)pv);
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync rc = configRegRead32(pThis, iIndex, (uint32_t*)pv);
ac6445a70a26cb69d08734f1d9dbc171cec86cd8vboxsync /* Unaligned accesses not allowed */
ac6445a70a26cb69d08734f1d9dbc171cec86cd8vboxsync // for 8-byte accesses we just split them, happens under lock anyway
ac6445a70a26cb69d08734f1d9dbc171cec86cd8vboxsync rc = timerRegRead32(pThis, iTimer, iTimerReg, &value.u32[0]);
ac6445a70a26cb69d08734f1d9dbc171cec86cd8vboxsync rc = timerRegRead32(pThis, iTimer, iTimerReg + 4, &value.u32[1]);
ac6445a70a26cb69d08734f1d9dbc171cec86cd8vboxsync rc = configRegRead32(pThis, iIndex, &value.u32[0]);
ac6445a70a26cb69d08734f1d9dbc171cec86cd8vboxsync rc = configRegRead32(pThis, iIndex+4, &value.u32[1]);
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync AssertReleaseMsgFailed(("cb=%d\n", cb)); /* for now we assume simple accesses. */
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsyncPDMBOTHCBDECL(int) hpetMMIOWrite(PPDMDEVINS pDevIns,
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync HpetState *pThis = PDMINS_2_DATA(pDevIns, HpetState*);
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync uint32_t iIndex = (uint32_t)(GCPhysAddr - HPET_BASE);
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync rc = configRegWrite32(pThis, iIndex, *(uint32_t*)pv);
ac6445a70a26cb69d08734f1d9dbc171cec86cd8vboxsync /* Unaligned accesses not allowed */
ac6445a70a26cb69d08734f1d9dbc171cec86cd8vboxsync AssertMsgFailed(("Unaligned HPET write access\n"));
ac6445a70a26cb69d08734f1d9dbc171cec86cd8vboxsync // for 8-byte accesses we just split them, happens under lock anyway
ac6445a70a26cb69d08734f1d9dbc171cec86cd8vboxsync rc = timerRegWrite32(pThis, iTimer, iTimerReg, value.u32[0]);
ac6445a70a26cb69d08734f1d9dbc171cec86cd8vboxsync rc = timerRegWrite32(pThis, iTimer, iTimerReg + 4, value.u32[1]);
ac6445a70a26cb69d08734f1d9dbc171cec86cd8vboxsync rc = configRegWrite32(pThis, iIndex, value.u32[0]);
ac6445a70a26cb69d08734f1d9dbc171cec86cd8vboxsync rc = configRegWrite32(pThis, iIndex+4, value.u32[1]);
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync AssertReleaseMsgFailed(("cb=%d\n", cb)); /* for now we assume simple accesses. */
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync * @copydoc FNSSMDEVLIVEEXEC
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsyncstatic DECLCALLBACK(int) hpetLiveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uPass)
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync HpetState *pThis = PDMINS_2_DATA(pDevIns, HpetState *);
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync * Saves a state of the HPET device.
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync * @returns VBox status code.
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync * @param pDevIns The device instance.
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync * @param pSSMHandle The handle to save the state to.
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsyncstatic DECLCALLBACK(int) hpetSaveExec(PPDMDEVINS pDevIns,
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync HpetState *pThis = PDMINS_2_DATA(pDevIns, HpetState *);
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync /* The config. */
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync for (iTimer = 0; iTimer < HPET_NUM_TIMERS; iTimer++)
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync * Loads a HPET device state.
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync * @returns VBox status code.
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync * @param pDevIns The device instance.
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync * @param pSSMHandle The handle to the saved state.
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync * @param uVersion The data unit version number.
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync * @param uPass The data pass.
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsyncstatic DECLCALLBACK(int) hpetLoadExec(PPDMDEVINS pDevIns,
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync HpetState *pThis = PDMINS_2_DATA(pDevIns, HpetState *);
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync rc = SSMR3GetU8(pSSM, &u8NumTimers); AssertRCReturn(rc, rc);
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("Config mismatch - wrong number of timers: saved=%#x config=%#x"), u8NumTimers, HPET_NUM_TIMERS);
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync for (iTimer = 0; iTimer < HPET_NUM_TIMERS; iTimer++)
23603ed361f22874964e3a841add2c58ec2bb1eavboxsync /** @todo: is it correct? */
9b7ab382b3f9667e8847020e1e58f7143c4d2334vboxsync /* ISR bits are only set in level-triggered mode */
9b7ab382b3f9667e8847020e1e58f7143c4d2334vboxsync if ((pTimer->u64Config & HPET_TN_INT_TYPE) == HPET_TIMER_TYPE_LEVEL)
23603ed361f22874964e3a841add2c58ec2bb1eavboxsync pThis->u64Isr |= (uint64_t)(1 << pTimer->u8TimerNumber);
9b7ab382b3f9667e8847020e1e58f7143c4d2334vboxsync /* We trigger flip/flop in edge-triggered mode and do nothing in level-triggered mode yet */
9b7ab382b3f9667e8847020e1e58f7143c4d2334vboxsync if ((pTimer->u64Config & HPET_TN_INT_TYPE) == HPET_TIMER_TYPE_EDGE)
23603ed361f22874964e3a841add2c58ec2bb1eavboxsync pThis->pHpetHlpR3->pfnSetIrq(pThis->CTX_SUFF(pDevIns), irq, PDM_IRQ_LEVEL_FLIP_FLOP);
9b7ab382b3f9667e8847020e1e58f7143c4d2334vboxsync /* @todo: implement IRQs in level-triggered mode */
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync * Device timer callback function.
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync * @param pDevIns Device instance of the device which registered the timer.
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync * @param pTimer The timer handle.
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync * @param pvUser Pointer to the HPET timer state.
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsyncstatic DECLCALLBACK(void) hpetTimer(PPDMDEVINS pDevIns,
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync HpetState *pThis = PDMINS_2_DATA(pDevIns, HpetState *);
9540eeb13face31ddc1c5f15338556fe46f18a77vboxsync /* Lock in R3 must either block or succeed */
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync if ((pTimer->u64Config & HPET_TN_PERIODIC) && (u64Period != 0))
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync Log4(("HPET: periodical: next in %lld\n", hpetTicksToNs(u64Diff)));
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync /* Should it really be under lock, does it really matter? */
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync * Relocation notification.
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync * @returns VBox status.
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync * @param pDevIns The device instance data.
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync * @param offDelta The delta relative to the old address.
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsyncstatic DECLCALLBACK(void) hpetRelocate(PPDMDEVINS pDevIns, RTGCINTPTR offDelta)
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync HpetState *pThis = PDMINS_2_DATA(pDevIns, HpetState *);
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync unsigned i;
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync pThis->pHpetHlpRC = pThis->pHpetHlpR3->pfnGetRCHelpers(pDevIns);
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync * Reset notification.
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync * @returns VBox status.
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync * @param pDevIns The device instance data.
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsyncstatic DECLCALLBACK(void) hpetReset(PPDMDEVINS pDevIns)
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync HpetState *pThis = PDMINS_2_DATA(pDevIns, HpetState *);
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync unsigned i;
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync for (i = 0; i < HPET_NUM_TIMERS; i++)
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync /* capable of periodic operations and 64-bits */
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync pTimer->u64Config = HPET_TN_PERIODIC_CAP | HPET_TN_SIZE_CAP;
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync /* We can do all IRQs */
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync pTimer->u64Config |= ((uint64_t)u32RoutingCap) << 32;
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync /* 64-bit main counter; 3 timers supported; LegacyReplacementRoute. */
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync (1 << 15) /* LEG_RT_CAP, LegacyReplacementRoute capable */ |
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync (1 << 13) /* COUNTER_SIZE_CAP, main counter is 64-bit capable */ |
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync ((HPET_NUM_TIMERS-1) << 8) /* NUM_TIM_CAP, number of timers -1 */ |
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync pThis->u64Capabilities = (u32Vendor << 16) | u32Caps;
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync pThis->u64Capabilities |= ((uint64_t)(HPET_CLK_PERIOD) << 32);
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync * Initialization routine.
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync * @returns VBox status.
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync * @param pDevIns The device instance data.
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync unsigned i;
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync HpetState *pThis = PDMINS_2_DATA(pDevIns, HpetState *);
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync for (i = 0; i < HPET_NUM_TIMERS; i++)
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync rc = PDMDevHlpTMTimerCreate(pDevIns, TMCLOCK_VIRTUAL_SYNC, hpetTimer, timer,
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync pThis->aTimers[i].pTimerRC = TMTimerRCPtr(pThis->aTimers[i].pTimerR3);
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync pThis->aTimers[i].pTimerR0 = TMTimerR0Ptr(pThis->aTimers[i].pTimerR3);
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync * Info handler, device version.
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync * @param pDevIns Device instance which registered the info.
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync * @param pHlp Callback functions for doing output.
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync * @param pszArgs Argument string. Optional and specific to the handler.
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsyncstatic DECLCALLBACK(void) hpetInfo(PPDMDEVINS pDevIns, PCDBGFINFOHLP pHlp, const char *pszArgs)
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync HpetState *pThis = PDMINS_2_DATA(pDevIns, HpetState *);
23603ed361f22874964e3a841add2c58ec2bb1eavboxsync "HPET status:\n"
23603ed361f22874964e3a841add2c58ec2bb1eavboxsync " config = %016RX64\n"
23603ed361f22874964e3a841add2c58ec2bb1eavboxsync " offset = %016RX64 counter = %016RX64 isr = %016RX64\n"
23603ed361f22874964e3a841add2c58ec2bb1eavboxsync " legacy mode is %s\n",
23603ed361f22874964e3a841add2c58ec2bb1eavboxsync pThis->u64HpetOffset, pThis->u64HpetCounter, pThis->u64Isr,
23603ed361f22874964e3a841add2c58ec2bb1eavboxsync (pThis->u64Config & HPET_CFG_LEGACY) ? "on" : "off");
23603ed361f22874964e3a841add2c58ec2bb1eavboxsync "Timers:\n");
23603ed361f22874964e3a841add2c58ec2bb1eavboxsync for (i = 0; i < HPET_NUM_TIMERS; i++)
23603ed361f22874964e3a841add2c58ec2bb1eavboxsync pHlp->pfnPrintf(pHlp, " %d: comparator=%016RX64 period(hidden)=%016RX64 cfg=%016RX64\n",
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync * @interface_method_impl{PDMDEVREG,pfnConstruct}
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsyncstatic DECLCALLBACK(int) hpetConstruct(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfg)
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync HpetState *pThis = PDMINS_2_DATA(pDevIns, HpetState *);
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync bool fRCEnabled = false;
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync bool fR0Enabled = false;
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync /* Only one HPET device now */
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync * Validate configuration.
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync if (!CFGMR3AreValuesValid(pCfg, "GCEnabled\0" "R0Enabled\0"))
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync /* Query configuration. */
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync rc = CFGMR3QueryBoolDef(pCfg, "GCEnabled", &fRCEnabled, true);
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync N_("Configuration error: Querying \"GCEnabled\" as a bool failed"));
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync rc = CFGMR3QueryBoolDef(pCfg, "R0Enabled", &fR0Enabled, true);
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync N_("Configuration error: failed to read R0Enabled as boolean"));
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync /* Initialize the device state */
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync * Register the HPET and get helpers.
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync rc = PDMDevHlpHPETRegister(pDevIns, &HpetReg, &pThis->pHpetHlpR3);
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync AssertMsgRC(rc, ("Cannot HPETRegister: %Rrc\n", rc));
9540eeb13face31ddc1c5f15338556fe46f18a77vboxsync * Initialize critical section.
9540eeb13face31ddc1c5f15338556fe46f18a77vboxsync rc = PDMDevHlpCritSectInit(pDevIns, &pThis->csLock, RT_SRC_POS, "HPET");
9540eeb13face31ddc1c5f15338556fe46f18a77vboxsync return PDMDEV_SET_ERROR(pDevIns, rc, N_("HPET cannot initialize critical section"));
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync * Register the MMIO range, PDM API requests page aligned
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync * addresses and sizes.
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync rc = PDMDevHlpMMIORegister(pDevIns, HPET_BASE, 0x1000, pThis,
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync AssertMsgRC(rc, ("Cannot register MMIO: %Rrc\n", rc));
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync rc = PDMDevHlpMMIORegisterRC(pDevIns, HPET_BASE, 0x1000, 0,
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync pThis->pHpetHlpRC = pThis->pHpetHlpR3->pfnGetRCHelpers(pDevIns);
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync AssertReleaseMsgFailed(("cannot get RC helper\n"));
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync rc = PDMDevHlpMMIORegisterR0(pDevIns, HPET_BASE, 0x1000, 0,
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync pThis->pHpetHlpR0 = pThis->pHpetHlpR3->pfnGetR0Helpers(pDevIns);
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync AssertReleaseMsgFailed(("cannot get R0 helper\n"));
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync /* Register SSM callbacks */
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync rc = PDMDevHlpSSMRegister3(pDevIns, HPET_SAVED_STATE_VERSION, sizeof(*pThis), hpetLiveExec, hpetSaveExec, hpetLoadExec);
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync * @todo Register statistics.
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync PDMDevHlpDBGFInfoRegister(pDevIns, "hpet", "Display HPET status. (no arguments)", hpetInfo);
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync * The device registration structure.
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync /* u32Version */
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync /* szName */
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync /* szRCMod */
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync "VBoxDDGC.gc",
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync /* szR0Mod */
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync "VBoxDDR0.r0",
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync /* pszDescription */
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync " High Precision Event Timer (HPET) Device",
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync /* fFlags */
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT | PDM_DEVREG_FLAGS_GUEST_BITS_32_64 | PDM_DEVREG_FLAGS_PAE36 | PDM_DEVREG_FLAGS_RC | PDM_DEVREG_FLAGS_R0,
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync /* fClass */
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync /* cMaxInstances */
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync /* cbInstance */
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync /* pfnConstruct */
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync /* pfnDestruct */
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync /* pfnRelocate */
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync /* pfnIOCtl */
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync /* pfnPowerOn */
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync /* pfnReset */
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync /* pfnSuspend */
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync /* pfnResume */
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync /* pfnAttach */
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync /* pfnDetach */
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync /* pfnQueryInterface. */
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync /* pfnInitComplete */
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync /* pfnPowerOff */
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync /* pfnSoftReset */
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync /* u32VersionEnd */
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync#endif /* IN_RING3 */
016096e367cd20c3d3c3fd9a6650b55935c2e31dvboxsync#endif /* VBOX_DEVICE_STRUCT_TESTCASE */