DevE1000Phy.h revision aaf6eb788dab09bc8c3c8576c60fabc60037a483
/** $Id$ */
/** @file
* DevE1000Phy - Intel 82540EM Ethernet Controller Internal PHY Emulation, Header.
*/
/*
* Copyright (C) 2007 Sun Microsystems, Inc.
*
* Sun Microsystems, Inc. confidential
* All rights reserved
*/
#define PHY_EPID_M881000 0xC50
#define PHY_EPID_M881011 0xC24
#define PCTRL_SPDSELM 0x0040
#define PCTRL_DUPMOD 0x0100
#define PCTRL_ANEG 0x1000
#define PCTRL_SPDSELL 0x2000
#define PCTRL_RESET 0x8000
#define PSTATUS_LNKSTAT 0x0004
#define PSSTAT_LINK 0x0400
{
/**
* Indices of memory-mapped registers in register table
*/
enum enmRegIdx
{
};
/**
* Emulation state of PHY.
*/
struct Phy_st
{
/** Network controller instance this PHY is attached to. */
int iInstance;
/** Register storage. */
/** Current state of serial MDIO interface. */
/** Current state of serial MDIO interface. */
/** PHY register offset selected for MDIO operation. */
};
}
#define MDIO_IDLE 0
#define MDIO_ST 1
#define MDIO_OP_ADR 2
#define MDIO_TA_RD 3
#define MDIO_TA_WR 4
#define MDIO_READ 5
#define MDIO_WRITE 6
#define MDIO_READ_OP 2
#define MDIO_WRITE_OP 1
/* Interface *****************************************************************/
/** Initialize PHY. */
/** Read PHY register at specified address. */
/** Write to PHY register at specified address. */
/** Read the value on MDIO pin. */
/** Set the value of MDIO pin. */
/** Hardware reset. */
/** Query link status. */
/** Set link status. */
/** Save PHY state. */
/** Restore previously saved PHY state. */
}