svga_reg.h revision ae94ad7e769e467419ab99cab5403bdb39bc544f
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync/*
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync * VMware SVGA II hardware definitions
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync */
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync#ifndef _SVGA_REG_H_
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync#define _SVGA_REG_H_
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync#define PCI_VENDOR_ID_VMWARE 0x15AD
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync#define PCI_DEVICE_ID_VMWARE_SVGA2 0x0405
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync#define SVGA_IRQFLAG_ANY_FENCE 0x1
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync#define SVGA_IRQFLAG_FIFO_PROGRESS 0x2
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync#define SVGA_IRQFLAG_FENCE_GOAL 0x4
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync#define SVGA_MAX_PSEUDOCOLOR_DEPTH 8
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync#define SVGA_MAX_PSEUDOCOLORS (1 << SVGA_MAX_PSEUDOCOLOR_DEPTH)
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync#define SVGA_NUM_PALETTE_REGS (3 * SVGA_MAX_PSEUDOCOLORS)
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync#define SVGA_MAGIC 0x900000UL
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync#define SVGA_MAKE_ID(ver) (SVGA_MAGIC << 8 | (ver))
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync#define SVGA_VERSION_2 2
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync#define SVGA_ID_2 SVGA_MAKE_ID(SVGA_VERSION_2)
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync#define SVGA_VERSION_1 1
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync#define SVGA_ID_1 SVGA_MAKE_ID(SVGA_VERSION_1)
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync#define SVGA_VERSION_0 0
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync#define SVGA_ID_0 SVGA_MAKE_ID(SVGA_VERSION_0)
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync#define SVGA_ID_INVALID 0xFFFFFFFF
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync#define SVGA_INDEX_PORT 0x0
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync#define SVGA_VALUE_PORT 0x1
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync#define SVGA_BIOS_PORT 0x2
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync#define SVGA_IRQSTATUS_PORT 0x8
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync#define SVGA_IRQFLAG_ANY_FENCE 0x1
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync#define SVGA_IRQFLAG_FIFO_PROGRESS 0x2
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync#define SVGA_IRQFLAG_FENCE_GOAL 0x4
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsyncenum
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync{
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_REG_ID = 0,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_REG_ENABLE = 1,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_REG_WIDTH = 2,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_REG_HEIGHT = 3,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_REG_MAX_WIDTH = 4,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_REG_MAX_HEIGHT = 5,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_REG_DEPTH = 6,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_REG_BITS_PER_PIXEL = 7,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_REG_PSEUDOCOLOR = 8,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_REG_RED_MASK = 9,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_REG_GREEN_MASK = 10,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_REG_BLUE_MASK = 11,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_REG_BYTES_PER_LINE = 12,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_REG_FB_START = 13,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_REG_FB_OFFSET = 14,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_REG_VRAM_SIZE = 15,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_REG_FB_SIZE = 16,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_REG_CAPABILITIES = 17,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_REG_MEM_START = 18,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_REG_MEM_SIZE = 19,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_REG_CONFIG_DONE = 20,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_REG_SYNC = 21,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_REG_BUSY = 22,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_REG_GUEST_ID = 23,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_REG_CURSOR_ID = 24,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_REG_CURSOR_X = 25,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_REG_CURSOR_Y = 26,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_REG_CURSOR_ON = 27,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_REG_HOST_BITS_PER_PIXEL = 28,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_REG_SCRATCH_SIZE = 29,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_REG_MEM_REGS = 30,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_REG_NUM_DISPLAYS = 31,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_REG_PITCHLOCK = 32,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_REG_IRQMASK = 33,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_REG_NUM_GUEST_DISPLAYS = 34,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_REG_DISPLAY_ID = 35,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_REG_DISPLAY_IS_PRIMARY = 36,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_REG_DISPLAY_POSITION_X = 37,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_REG_DISPLAY_POSITION_Y = 38,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_REG_DISPLAY_WIDTH = 39,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_REG_DISPLAY_HEIGHT = 40,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_REG_GMR_ID = 41,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_REG_GMR_DESCRIPTOR = 42,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_REG_GMR_MAX_IDS = 43,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_REG_GMR_MAX_DESCRIPTOR_LENGTH = 44,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_REG_TRACES = 45,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_REG_GMRS_MAX_PAGES = 46,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_REG_MEMORY_SIZE = 47,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_REG_TOP = 48,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_PALETTE_BASE = 1024,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_SCRATCH_BASE = SVGA_PALETTE_BASE + SVGA_NUM_PALETTE_REGS
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync};
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsyncenum
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync{
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_FIFO_MIN = 0,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_FIFO_MAX,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_FIFO_NEXT_CMD,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_FIFO_STOP,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_FIFO_CAPABILITIES = 4,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_FIFO_FLAGS,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_FIFO_FENCE,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_FIFO_3D_HWVERSION,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_FIFO_PITCHLOCK,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_FIFO_CURSOR_ON,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_FIFO_CURSOR_X,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_FIFO_CURSOR_Y,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_FIFO_CURSOR_COUNT,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_FIFO_CURSOR_LAST_UPDATED,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_FIFO_RESERVED,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_FIFO_CURSOR_SCREEN_ID,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_FIFO_DEAD,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_FIFO_3D_HWVERSION_REVISED,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_FIFO_3D_CAPS = 32,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_FIFO_3D_CAPS_LAST = 32 + 255,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_FIFO_GUEST_3D_HWVERSION,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_FIFO_FENCE_GOAL,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_FIFO_BUSY,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_FIFO_NUM_REGS
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync};
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsynctypedef enum
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync{
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_CMD_INVALID_CMD = 0,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_CMD_UPDATE = 1,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_CMD_RECT_COPY = 3,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_CMD_DEFINE_CURSOR = 19,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_CMD_DEFINE_ALPHA_CURSOR = 22,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_CMD_UPDATE_VERBOSE = 25,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_CMD_FRONT_ROP_FILL = 29,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_CMD_FENCE = 30,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_CMD_ESCAPE = 33,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_CMD_DEFINE_SCREEN = 34,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_CMD_DESTROY_SCREEN = 35,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_CMD_DEFINE_GMRFB = 36,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_CMD_BLIT_GMRFB_TO_SCREEN = 37,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_CMD_BLIT_SCREEN_TO_GMRFB = 38,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_CMD_ANNOTATION_FILL = 39,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_CMD_ANNOTATION_COPY = 40,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_CMD_DEFINE_GMR2 = 41,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_CMD_REMAP_GMR2 = 42,
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGA_CMD_MAX
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync} SVGAFifoCmdId;
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsynctypedef struct SVGAColorBGRX
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync{
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync union
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync {
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync struct
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync {
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync uint32_t b : 8;
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync uint32_t g : 8;
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync uint32_t r : 8;
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync uint32_t x : 8;
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync } s;
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync uint32_t value;
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync };
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync} SVGAColorBGRX;
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsynctypedef struct SVGASignedPoint
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync{
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync int32_t x;
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync int32_t y;
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync} SVGASignedPoint;
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync#define SVGA_CAP_NONE 0x00000000
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync#define SVGA_CAP_RECT_COPY 0x00000002
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync#define SVGA_CAP_CURSOR 0x00000020
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync#define SVGA_CAP_CURSOR_BYPASS 0x00000040
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync#define SVGA_CAP_CURSOR_BYPASS_2 0x00000080
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync#define SVGA_CAP_8BIT_EMULATION 0x00000100
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync#define SVGA_CAP_ALPHA_CURSOR 0x00000200
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync#define SVGA_CAP_3D 0x00004000
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync#define SVGA_CAP_EXTENDED_FIFO 0x00008000
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync#define SVGA_CAP_MULTIMON 0x00010000
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync#define SVGA_CAP_PITCHLOCK 0x00020000
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync#define SVGA_CAP_IRQMASK 0x00040000
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync#define SVGA_CAP_DISPLAY_TOPOLOGY 0x00080000
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync#define SVGA_CAP_GMR 0x00100000
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync#define SVGA_CAP_TRACES 0x00200000
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync#define SVGA_CAP_GMR2 0x00400000
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync#define SVGA_CAP_SCREEN_OBJECT_2 0x00800000
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync#define SVGA_GMR_NULL ((uint32_t) -1)
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync#define SVGA_GMR_FRAMEBUFFER ((uint32_t) -2)
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsynctypedef struct SVGAGuestPtr
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync{
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync uint32_t gmrId;
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync uint32_t offset;
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync} SVGAGuestPtr;
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsynctypedef struct SVGAGMRImageFormat
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync{
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync union
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync {
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync struct
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync {
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync uint32_t bitsPerPixel : 8;
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync uint32_t colorDepth : 8;
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync uint32_t reserved : 16;
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync } s;
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync uint32_t value;
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync };
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync} SVGAGMRImageFormat;
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsynctypedef struct SVGAGuestImage
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync{
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGAGuestPtr ptr;
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync uint32_t pitch;
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync} SVGAGuestImage;
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync#define SVGA_SCREEN_MUST_BE_SET (1 << 0)
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync#define SVGA_SCREEN_HAS_ROOT SVGA_SCREEN_MUST_BE_SET
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync#define SVGA_SCREEN_IS_PRIMARY (1 << 1)
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync#define SVGA_SCREEN_FULLSCREEN_HINT (1 << 2)
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync#define SVGA_SCREEN_DEACTIVATE (1 << 3)
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync#define SVGA_SCREEN_BLANKING (1 << 4)
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsynctypedef struct SVGAScreenObject
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync{
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync uint32_t structSize;
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync uint32_t id;
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync uint32_t flags;
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync struct
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync {
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync uint32_t width;
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync uint32_t height;
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync } size;
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync struct
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync {
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync int32_t x;
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync int32_t y;
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync } root;
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGAGuestImage backingStore;
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync uint32_t cloneCount;
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync} SVGAScreenObject;
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsynctypedef struct
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync{
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync uint32_t screenId;
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync} SVGAFifoCmdDestroyScreen;
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsynctypedef struct
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync{
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync uint32_t x;
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync uint32_t y;
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync uint32_t width;
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync uint32_t height;
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync} SVGAFifoCmdUpdate;
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsynctypedef struct
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync{
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync uint32_t fence;
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync} SVGAFifoCmdFence;
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsynctypedef struct
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync{
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync uint32_t nsid;
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync uint32_t size;
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync} SVGAFifoCmdEscape;
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsynctypedef struct
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync{
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync uint32_t id;
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync uint32_t hotspotX;
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync uint32_t hotspotY;
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync uint32_t width;
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync uint32_t height;
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync uint32_t andMaskDepth;
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync uint32_t xorMaskDepth;
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync} SVGAFifoCmdDefineCursor;
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsynctypedef struct
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync{
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync uint32_t id;
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync uint32_t hotspotX;
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync uint32_t hotspotY;
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync uint32_t width;
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync uint32_t height;
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync} SVGAFifoCmdDefineAlphaCursor;
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsynctypedef struct
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync{
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGAScreenObject screen;
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync} SVGAFifoCmdDefineScreen;
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsynctypedef struct
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync{
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGAColorBGRX color;
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync} SVGAFifoCmdAnnotationFill;
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsynctypedef struct
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync{
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync SVGASignedPoint srcOrigin;
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync uint32_t srcScreenId;
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync} SVGAFifoCmdAnnotationCopy;
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync#define SVGA_FIFO_CAP_NONE 0
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync#define SVGA_FIFO_CAP_FENCE (1<<0)
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync#define SVGA_FIFO_CAP_ACCELFRONT (1<<1)
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync#define SVGA_FIFO_CAP_PITCHLOCK (1<<2)
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync#define SVGA_FIFO_CAP_VIDEO (1<<3)
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync#define SVGA_FIFO_CAP_CURSOR_BYPASS_3 (1<<4)
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync#define SVGA_FIFO_CAP_ESCAPE (1<<5)
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync#define SVGA_FIFO_CAP_RESERVE (1<<6)
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync#define SVGA_FIFO_CAP_SCREEN_OBJECT (1<<7)
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync#define SVGA_FIFO_CAP_GMR2 (1<<8)
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync#define SVGA_FIFO_CAP_3D_HWVERSION_REVISED SVGA_FIFO_CAP_GMR2
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync#define SVGA_FIFO_CAP_SCREEN_OBJECT_2 (1<<9)
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync#define SVGA_FIFO_CAP_DEAD (1<<10)
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync
ae94ad7e769e467419ab99cab5403bdb39bc544fvboxsync#endif /* _SVGA_REG_H_ */