4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Provides basic function upon network adapter card.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsyncCopyright (c) 2006, Intel Corporation. All rights reserved.<BR>
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsyncThis program and the accompanying materials
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsyncare licensed and made available under the terms and conditions of the BSD License
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsyncwhich accompanies this distribution. The full text of the license may be found at
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsyncTHE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsyncWITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync (UINT8)0xf2, (UINT8)0x80, // 0x40=Force full-duplex
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync// How to wait for the command unit to accept a command.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync// Typically this takes 0 ticks.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync while ((InByte (AdapterInfo, cmd_ioaddr) != 0) && --wait_count >= 0) \
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync This function calls the MemIo callback to read a byte from the device's
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync address space
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Since UNDI3.0 uses the TmpMemIo function (instead of the callback routine)
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync which also takes the UniqueId parameter (as in UNDI3.1 spec) we don't have
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync to make undi3.0 a special case
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param Port Which port to read from.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @retval Results The data read from the port.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync// TODO: AdapterInfo - add argument and description to function comment
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync This function calls the MemIo callback to read a word from the device's
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync address space
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Since UNDI3.0 uses the TmpMemIo function (instead of the callback routine)
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync which also takes the UniqueId parameter (as in UNDI3.1 spec) we don't have
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync to make undi3.0 a special case
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param Port Which port to read from.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @retval Results The data read from the port.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync// TODO: AdapterInfo - add argument and description to function comment
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync This function calls the MemIo callback to read a dword from the device's
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync address space
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Since UNDI3.0 uses the TmpMemIo function (instead of the callback routine)
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync which also takes the UniqueId parameter (as in UNDI3.1 spec) we don't have
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync to make undi3.0 a special case
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param Port Which port to read from.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @retval Results The data read from the port.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync// TODO: AdapterInfo - add argument and description to function comment
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync This function calls the MemIo callback to write a byte from the device's
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync address space
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Since UNDI3.0 uses the TmpMemIo function (instead of the callback routine)
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync which also takes the UniqueId parameter (as in UNDI3.1 spec) we don't have
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync to make undi3.0 a special case
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param Data Data to write to Port.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param Port Which port to write to.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @return none
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync// TODO: AdapterInfo - add argument and description to function comment
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync This function calls the MemIo callback to write a word from the device's
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync address space
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Since UNDI3.0 uses the TmpMemIo function (instead of the callback routine)
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync which also takes the UniqueId parameter (as in UNDI3.1 spec) we don't have
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync to make undi3.0 a special case
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param Data Data to write to Port.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param Port Which port to write to.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @return none
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync// TODO: AdapterInfo - add argument and description to function comment
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync This function calls the MemIo callback to write a dword from the device's
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync address space
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Since UNDI3.0 uses the TmpMemIo function (instead of the callback routine)
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync which also takes the UniqueId parameter (as in UNDI3.1 spec) we don't have
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync to make undi3.0 a special case
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param Data Data to write to Port.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param Port Which port to write to.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @return none
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync// TODO: AdapterInfo - add argument and description to function comment
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync TODO: Add function description
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param AdapterInfo TODO: add argument description
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param MemAddr TODO: add argument description
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param Size TODO: add argument description
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param Direction TODO: add argument description
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param MappedAddr TODO: add argument description
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @return TODO: add return values
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // mapping is different for theold and new NII protocols
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync (*AdapterInfo->Virt2Phys_30) (MemAddr, (UINT64) (UINTN) PhyAddr);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // this UNDI cannot handle addresses beyond 4 GB without a map routine
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync TODO: Add function description
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param AdapterInfo TODO: add argument description
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param MemAddr TODO: add argument description
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param Size TODO: add argument description
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param Direction TODO: add argument description
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param MappedAddr TODO: add argument description
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @return TODO: add return values
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // no mapping service
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param AdapterInfo Pointer to the NIC data structure
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync information which the UNDI driver is
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync layering on..
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync// TODO: MicroSeconds - add argument and description to function comment
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync (*AdapterInfo->Delay) (AdapterInfo->Unique_ID, MicroSeconds);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param AdapterInfo Pointer to the NIC data structure
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync information which the UNDI driver is
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync layering on..
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync// TODO: flag - add argument and description to function comment
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync (*AdapterInfo->Block) (AdapterInfo->Unique_ID, flag);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync TODO: Add function description
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param AdapterInfo TODO: add argument description
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @return TODO: add return values
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // we will use the linear (flat) memory model and fill our base registers
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // with 0's so that the entire physical address is our offset
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // we reset the statistics totals here because this is where we are loading stats addr
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // Load the statistics block address.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync OutLong (AdapterInfo, (UINT32) AdapterInfo->stat_phy_addr, AdapterInfo->ioaddr + SCBPointer);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync OutByte (AdapterInfo, CU_STATSADDR, AdapterInfo->ioaddr + SCBCmd);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync OutLong (AdapterInfo, 0, AdapterInfo->ioaddr + SCBPointer);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync OutByte (AdapterInfo, RX_ADDR_LOAD, AdapterInfo->ioaddr + SCBCmd);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync OutLong (AdapterInfo, 0, AdapterInfo->ioaddr + SCBPointer);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync OutByte (AdapterInfo, CU_CMD_BASE, AdapterInfo->ioaddr + SCBCmd);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync TODO: Add function description
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param AdapterInfo TODO: add argument description
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param cmd_ptr TODO: add argument description
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @return TODO: add return values
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // read the CU status, if it is idle, write the address of cb_ptr
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // in the scbpointer and issue a cu_start,
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // if it is suspended, remove the suspend bit in the previous command
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // block and issue a resume
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // Ensure that the CU Active Status bit is not on from previous CBs.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync status = InWord (AdapterInfo, AdapterInfo->ioaddr + SCBStatus);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // Skip acknowledging the interrupt if it is not already set
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // ack only the cna the integer
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync OutWord (AdapterInfo, SCB_STATUS_CNA, AdapterInfo->ioaddr + SCBStatus);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync if ((status & SCB_STATUS_CU_MASK) == SCB_STATUS_CU_IDLE) {
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // give a cu_start
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync OutLong (AdapterInfo, cmd_ptr->PhysTCBAddress, AdapterInfo->ioaddr + SCBPointer);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync OutByte (AdapterInfo, CU_START, AdapterInfo->ioaddr + SCBCmd);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // either active or suspended, give a resume
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync cmd_ptr->PrevTCBVirtualLinkPtr->cb_header.command &= ~(CmdSuspend | CmdIntr);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync OutByte (AdapterInfo, CU_RESUME, AdapterInfo->ioaddr + SCBCmd);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync TODO: Add function description
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param AdapterInfo TODO: add argument description
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @return TODO: add return values
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // all command blocks are of TxCB format
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync data_ptr = (UINT8 *) cmd_ptr + sizeof (struct CB_Header);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // start the config data right after the command header
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync for (Index = 0; Index < sizeof (basic_config_cmd); Index++) {
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync my_filter = (UINT8) ((AdapterInfo->Rx_Filter & PXE_OPFLAGS_RECEIVE_FILTER_PROMISCUOUS) ? 1 : 0);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync my_filter = (UINT8) (my_filter | ((AdapterInfo->Rx_Filter & PXE_OPFLAGS_RECEIVE_FILTER_BROADCAST) ? 0 : 2));
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync data_ptr[19] = (UINT8) (AdapterInfo->Duplex ? 0xC0 : 0x80);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync data_ptr[21] = (UINT8) ((AdapterInfo->Rx_Filter & PXE_OPFLAGS_RECEIVE_FILTER_ALL_MULTICAST) ? 0x0D : 0x05);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // check if we have to use the AUI port instead
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync cmd_ptr->cb_header.command = CmdSuspend | CmdConfigure;
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // restore the cb values for tx
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync cmd_ptr->PhysTBDArrayAddres = cmd_ptr->PhysArrayAddr;
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync cmd_ptr->ByteCount = cmd_ptr->Threshold = cmd_ptr->TBDCount = 0;
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // fields beyond the immediatedata are assumed to be safe
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // add the CB to the free list again
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync TODO: Add function description
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param AdapterInfo TODO: add argument description
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @return TODO: add return values
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // all command blocks are of TxCB format
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync eaddrs = (UINT16 *) AdapterInfo->CurrentNodeAddress;
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync data_ptr = (UINT16 *) ((UINT8 *) cmd_ptr +sizeof (struct CB_Header));
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // AVOID a bug (?!) here by marking the command already completed.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync cmd_ptr->cb_header.command = (CmdSuspend | CmdIASetup);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // restore the cb values for tx
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync cmd_ptr->PhysTBDArrayAddres = cmd_ptr->PhysArrayAddr;
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync cmd_ptr->ByteCount = cmd_ptr->Threshold = cmd_ptr->TBDCount = 0;
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // fields beyond the immediatedata are assumed to be safe
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // add the CB to the free list again
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Instructs the NIC to stop receiving packets.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param AdapterInfo Pointer to the NIC data structure
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync information which the UNDI driver is
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync layering on..
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // Todo: verify that we must wait for previous command completion.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // Disable interrupts, and stop the chip's Rx process.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync OutWord (AdapterInfo, INT_MASK, AdapterInfo->ioaddr + SCBCmd);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync OutWord (AdapterInfo, INT_MASK | RX_ABORT, AdapterInfo->ioaddr + SCBCmd);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Instructs the NIC to start receiving packets.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param AdapterInfo Pointer to the NIC data structure
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync information which the UNDI driver is
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync layering on..
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @retval 0 Successful
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @retval -1 Already Started
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // already started
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync OutLong (AdapterInfo, (UINT32) AdapterInfo->rx_phy_addr, AdapterInfo->ioaddr + SCBPointer);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync OutByte (AdapterInfo, RX_START, AdapterInfo->ioaddr + SCBCmd);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Configures the chip. This routine expects the NIC_DATA_INSTANCE structure to be filled in.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param AdapterInfo Pointer to the NIC data structure
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync information which the UNDI driver is
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync layering on..
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @retval 0 Successful
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @retval PXE_STATCODE_NOT_ENOUGH_MEMORY Insufficient length of locked memory
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @retval other Failure initializing chip
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync if (stat != 0) {
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync CfgHdr = (PCI_CONFIG_HEADER *) &(AdapterInfo->Config[0]);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // fill in the ioaddr, int... from the config space
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // we don't need to validate integer number, what if they don't want to assign one?
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // if (AdapterInfo->int_num == 0 || AdapterInfo->int_num == 0xff)
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // return PXE_STATCODE_DEVICE_FAILURE;
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // Read the station address EEPROM before doing the reset.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // Perhaps this should even be done before accepting the device,
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // then we wouldn't have a device name with which to report the error.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync if (E100bReadEepromAndStationAddress (AdapterInfo) != 0) {
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // ## calculate the buffer #s depending on memory given
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // ## calculate the rx and tx ring pointers
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync AdapterInfo->rx_ring = (RxFD *) (UINTN) (AdapterInfo->MemoryPtr);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync AdapterInfo->tx_ring = (TxCB *) (UINTN) (AdapterInfo->MemoryPtr + rx_size);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync AdapterInfo->statistics = (struct speedo_stats *) (UINTN) (AdapterInfo->MemoryPtr + rx_size + tx_size);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync AdapterInfo->rx_phy_addr = AdapterInfo->Mapped_MemoryPtr;
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync AdapterInfo->tx_phy_addr = AdapterInfo->Mapped_MemoryPtr + rx_size;
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync AdapterInfo->stat_phy_addr = AdapterInfo->tx_phy_addr + tx_size;
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // auto detect.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync AdapterInfo->Rx_Filter = PXE_OPFLAGS_RECEIVE_FILTER_BROADCAST;
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Sets the interrupt state for the NIC.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param AdapterInfo Pointer to the NIC data structure
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync information which the UNDI driver is
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync layering on..
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @retval 0 Successful
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // don't set receive interrupt if receiver is disabled...
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync if ((AdapterInfo->int_mask & PXE_OPFLAGS_INTERRUPT_RECEIVE) != 0) {
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync cmd_word = InWord (AdapterInfo, AdapterInfo->ioaddr + SCBCmd);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync OutWord (AdapterInfo, cmd_word, AdapterInfo->ioaddr + SCBCmd);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // disable ints, should not be given for SW Int.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync OutWord (AdapterInfo, INT_MASK, AdapterInfo->ioaddr + SCBCmd);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync if ((AdapterInfo->int_mask & PXE_OPFLAGS_INTERRUPT_SOFTWARE) != 0) {
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // reset the bit in our mask, it is only one time!!
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync AdapterInfo->int_mask &= ~(PXE_OPFLAGS_INTERRUPT_SOFTWARE);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync cmd_word = InWord (AdapterInfo, AdapterInfo->ioaddr + SCBCmd);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync OutWord (AdapterInfo, cmd_word, AdapterInfo->ioaddr + SCBCmd);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync// we are not going to disable broadcast for the WOL's sake!
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Instructs the NIC to start receiving packets.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param AdapterInfo Pointer to the NIC data structure
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync information which the UNDI driver is
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync layering on.. new_filter
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @retval 0 Successful
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @retval -1 Already Started
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync PXE_CPB_RECEIVE_FILTERS *mc_list = (PXE_CPB_RECEIVE_FILTERS *) (UINTN)cpb;
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // only these bits need a change in the configuration
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // actually change in bcast requires configure but we ignore that change
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync if ((old_filter & cfg_flt) != (new_filter & cfg_flt)) {
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync AdapterInfo->Rx_Filter = (UINT8) (new_filter | PXE_OPFLAGS_RECEIVE_FILTER_BROADCAST);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // check if mcast setting changed
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync if ( ((new_filter & PXE_OPFLAGS_RECEIVE_FILTER_FILTERED_MULTICAST) !=
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync (old_filter & PXE_OPFLAGS_RECEIVE_FILTER_FILTERED_MULTICAST) ) ||
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync mc_count = AdapterInfo->mcast_list.list_len = (UINT16) (cpbsize / PXE_MAC_LENGTH);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync for (Index = 0; (Index < mc_count && Index < MAX_MCAST_ADDRESS_CNT); Index++) {
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync for (Index2 = 0; Index2 < PXE_MAC_LENGTH; Index2++) {
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync AdapterInfo->mcast_list.mc_list[Index][Index2] = mc_list->MCastList[Index][Index2];
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // are we setting the list or resetting??
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync if ((new_filter & PXE_OPFLAGS_RECEIVE_FILTER_FILTERED_MULTICAST) != 0) {
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // we are setting a new list!
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // count should be the actual # of bytes in the list
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // so multiply this with 6
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync mc_byte_cnt = (UINT16) ((mc_count << 2) + (mc_count << 1));
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync AdapterInfo->Rx_Filter |= PXE_OPFLAGS_RECEIVE_FILTER_FILTERED_MULTICAST;
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // disabling the list in the NIC.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync AdapterInfo->Rx_Filter &= (~PXE_OPFLAGS_RECEIVE_FILTER_FILTERED_MULTICAST);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // before issuing any new command!
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // fill the command structure and issue
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync data_ptr = (struct MC_CB_STRUCT *) (&cmd_ptr->PhysTBDArrayAddres);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // first 2 bytes are the count;
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync for (Index2 = 0; Index2 < PXE_HWADDR_LEN_ETHER; Index2++) {
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync data_ptr->m_list[Index][Index2] = AdapterInfo->mcast_list.mc_list[Index][Index2];
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync cmd_ptr->cb_header.command = CmdSuspend | CmdMulticastList;
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync cmd_ptr->PhysTBDArrayAddres = cmd_ptr->PhysArrayAddr;
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync cmd_ptr->ByteCount = cmd_ptr->Threshold = cmd_ptr->TBDCount = 0;
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // fields beyond the immediatedata are assumed to be safe
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // add the CB to the free list again
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // enable unicast and start the RU
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync AdapterInfo->Rx_Filter = (UINT8) (AdapterInfo->Rx_Filter | (new_filter | PXE_OPFLAGS_RECEIVE_FILTER_UNICAST));
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // may be disabling everything!
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync AdapterInfo->Rx_Filter |= (~PXE_OPFLAGS_RECEIVE_FILTER_UNICAST);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync TODO: Add function description
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param AdapterInfo TODO: add argument description
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param cpb TODO: add argument description
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param opflags TODO: add argument description
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @return TODO: add return values
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync tx_ptr_f = (PXE_CPB_TRANSMIT_FRAGMENTS *) (UINTN) cpb;
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // stop reentrancy here
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // Prevent interrupts from changing the Tx ring from underneath us.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // Calculate the Tx descriptor entry.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync tcb_ptr->cb_header.command = (CmdSuspend | CmdTx | CmdTxFlex);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // no immediate data, set EOF in the ByteCount
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // The data region is always in one buffer descriptor, Tx FIFO
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // threshold of 256.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // 82557 multiplies the threashold value by 8, so give 256/8
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync if ((opflags & PXE_OPFLAGS_TRANSMIT_FRAGMENTED) != 0) {
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync for (Index = 0; Index < tx_ptr_f->FragCnt; Index++) {
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync if (stat != 0) {
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync tcb_ptr->TBDArray[Index].phys_buf_addr = (UINT32) Tmp_ptr;
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync tcb_ptr->TBDArray[Index].buf_len = tx_ptr_f->FragDesc[Index].FragLen;
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync tcb_ptr->free_data_ptr = tx_ptr_f->FragDesc[0].FragAddr;
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // non fragmented case
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync if (stat != 0) {
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync tcb_ptr->TBDArray[0].phys_buf_addr = (UINT32) (Tmp_ptr);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync tcb_ptr->TBDArray[0].buf_len = tx_ptr_1->DataLen + tx_ptr_1->MediaheaderLen;
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // must wait for previous command completion only if it was a non-transmit
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // see if we need to wait for completion here
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // don't wait for more than 1 second!!!
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // we need to un-map any mapped buffers here
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync if ((opflags & PXE_OPFLAGS_TRANSMIT_FRAGMENTED) != 0) {
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync for (Index = 0; Index < tx_ptr_f->FragCnt; Index++) {
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // CB will be set free later in get_status (or when we run out of xmit buffers
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync TODO: Add function description
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param AdapterInfo TODO: add argument description
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param cpb TODO: add argument description
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param db TODO: add argument description
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @return TODO: add return values
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync status = InWord (AdapterInfo, AdapterInfo->ioaddr + SCBStatus);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync AdapterInfo->Int_Status = (UINT16) (AdapterInfo->Int_Status | status);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // acknoledge the interrupts
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync OutWord (AdapterInfo, (UINT16) (status & 0xfc00), (UINT32) (AdapterInfo->ioaddr + SCBStatus));
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // include the prev ints as well
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync rx_ptr = &AdapterInfo->rx_ring[AdapterInfo->cur_rx_ind];
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // be in a loop just in case (we may drop a pkt)
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync while ((status = rx_ptr->cb_header.status) & RX_COMPLETE) {
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // If we own the next entry, it's a new packet. Send it up.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // discard bad frames
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // crc, align, dma overrun, too short, receive error (v22 no coll)
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // make sure the status is OK
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync CopyMem ((INT8 *) (UINTN) rx_cpbptr->BufferAddr, (INT8 *) &rx_ptr->RFDBuffer, Tmp_len);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // fill the CDB and break the loop
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // includes header
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync rx_dbptr->MediaHeaderLen = PXE_MAC_HEADER_LEN_ETHER;
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync for (Index = 0; Index < PXE_HWADDR_LEN_ETHER; Index++) {
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync if (hdr_ptr->dest_addr[Index] != AdapterInfo->CurrentNodeAddress[Index]) {
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync for (Index = 0; Index < PXE_HWADDR_LEN_ETHER; Index++) {
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync if (hdr_ptr->dest_addr[Index] != AdapterInfo->BroadcastNodeAddress[Index]) {
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync for (Index = 0; Index < PXE_HWADDR_LEN_ETHER; Index++) {
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync rx_dbptr->SrcAddr[Index] = hdr_ptr->src_addr[Index];
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync rx_dbptr->DestAddr[Index] = hdr_ptr->dest_addr[Index];
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Recycle_RFD (AdapterInfo, AdapterInfo->cur_rx_ind);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync if (AdapterInfo->cur_rx_ind == AdapterInfo->RxBufCnt) {
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Recycle_RFD (AdapterInfo, AdapterInfo->cur_rx_ind);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync if (AdapterInfo->cur_rx_ind == AdapterInfo->RxBufCnt) {
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync rx_ptr = &AdapterInfo->rx_ring[AdapterInfo->cur_rx_ind];
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync status = InWord (AdapterInfo, AdapterInfo->ioaddr + SCBStatus);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // start the receive unit here!
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // leave all the filled frames,
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync OutLong (AdapterInfo, (UINT32) AdapterInfo->rx_phy_addr, AdapterInfo->ioaddr + SCBPointer);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync OutWord (AdapterInfo, RX_START, AdapterInfo->ioaddr + SCBCmd);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync TODO: Add function description
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param AdapterInfo TODO: add argument description
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @return TODO: add return values
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // in words
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync AdapterInfo->NVData_Len = eeprom_len = (UINT16) (1 << addr_len);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync for (Index2 = 0, Index = 0; ((Index2 < PXE_MAC_LENGTH - 1) && (Index < eeprom_len)); Index++) {
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync value = E100bReadEeprom (AdapterInfo, Index, addr_len);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync AdapterInfo->PermNodeAddress[Index2++] = (UINT8) value;
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync AdapterInfo->PermNodeAddress[Index2++] = (UINT8) (value >> 8);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync for (Index = 0; Index < PXE_HWADDR_LEN_ETHER; Index++) {
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync AdapterInfo->CurrentNodeAddress[Index] = AdapterInfo->PermNodeAddress[Index];
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync for (Index = 0; Index < PXE_HWADDR_LEN_ETHER; Index++) {
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync for (Index = PXE_HWADDR_LEN_ETHER; Index < PXE_MAC_LENGTH; Index++) {
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync// CBList is a circular linked list
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync// 1) When all are free, Tail->next == Head and FreeCount == # allocated
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync// 2) When none are free, Tail == Head and FreeCount == 0
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync// 3) when one is free, Tail == Head and Freecount == 1
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync// 4) First non-Free frame is always at Tail->next
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync TODO: Add function description
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param AdapterInfo TODO: add argument description
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @return TODO: add return values
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync array_off = (UINTN) (&cur_ptr->TBDArray) - (UINTN) cur_ptr;
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync for (Index = 0; Index < AdapterInfo->TxBufCnt; Index++) {
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync (UINT32) AdapterInfo->tx_phy_addr + (Index * sizeof (TxCB));
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync cur_ptr[Index].PhysArrayAddr = (UINT32)(cur_ptr[Index].PhysTCBAddress + array_off);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync cur_ptr[Index].PhysTBDArrayAddres = (UINT32)(cur_ptr[Index].PhysTCBAddress + array_off);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync cur_ptr[Index].cb_header.link = cur_ptr[Index].PhysTCBAddress + sizeof (TxCB);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync cur_ptr[Index].NextTCBVirtualLinkPtr = &cur_ptr[Index + 1];
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync cur_ptr[Index + 1].PrevTCBVirtualLinkPtr = &cur_ptr[Index];
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync tail_ptr->cb_header.link = head_ptr->PhysTCBAddress;
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // set tail of the free list, next to this would be either in use
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // or the head itself
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync AdapterInfo->xmit_done_head = AdapterInfo->xmit_done_tail = 0;
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync TODO: Add function description
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param AdapterInfo TODO: add argument description
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @return TODO: add return values
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // claim any hanging free CBs
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // don't use up the last CB problem if the previous CB that the CU used
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // becomes the last CB we submit because of the SUSPEND bit we set.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // the CU thinks it was never cleared.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync AdapterInfo->FreeTxHeadPtr = free_cb_ptr->NextTCBVirtualLinkPtr;
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync TODO: Add function description
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param AdapterInfo TODO: add argument description
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param cb_ptr TODO: add argument description
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @return TODO: add return values
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // here we assume cb are returned in the order they are taken out
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // and we link the newly freed cb at the tail of free cb list
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync TODO: Add function description
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param ind TODO: add argument description
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @return TODO: add return values
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync TODO: Add function description
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param AdapterInfo TODO: add argument description
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @return TODO: add return values
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync while (1) {
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Tmp_ptr = AdapterInfo->FreeTxTailPtr->NextTCBVirtualLinkPtr;
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync if ((Tmp_ptr->cb_header.status & CMD_STATUS_MASK) != 0) {
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // check if Q is full
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync if (next (AdapterInfo->xmit_done_tail) != AdapterInfo->xmit_done_head) {
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync AdapterInfo->xmit_done[AdapterInfo->xmit_done_tail] = Tmp_ptr->free_data_ptr;
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync AdapterInfo->xmit_done_tail = next (AdapterInfo->xmit_done_tail);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync// Description : Initialize the RFD list list by linking each element together
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync// in a circular list. The simplified memory model is used.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync// All data is in the RFD. The RFDs are linked together and the
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync// last one points back to the first one. When the current RFD
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync// is processed (frame received), its EL bit is set and the EL
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync// bit in the previous RXFD is cleared.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync// Allocation done during INIT, this is making linked list.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync TODO: Add function description
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param AdapterInfo TODO: add argument description
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @return TODO: add return values
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync for (Index = 0; Index < AdapterInfo->RxBufCnt; Index++) {
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // RBDs not used, simple memory model
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // RBDs not used, simple memory model
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // don't use Tmp_ptr if it is beyond the last one
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync rx_ptr[Index].cb_header.link = (UINT32) AdapterInfo->rx_phy_addr + ((Index + 1) * sizeof (RxFD));
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync tail_ptr = (&AdapterInfo->rx_ring[AdapterInfo->RxBufCnt - 1]);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync tail_ptr->cb_header.link = (UINT32) AdapterInfo->rx_phy_addr;
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // set the EL bit
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync TODO: Add function description
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param AdapterInfo TODO: add argument description
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param rx_index TODO: add argument description
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @return TODO: add return values
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // change the EL bit and change the AdapterInfo->RxTailPtr
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // rx_ptr is assumed to be the head of the Q
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // AdapterInfo->rx_forwarded[rx_index] = FALSE;
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // set el_bit and suspend bit
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // resetting the el_bit.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // check the receive unit, fix if there is any problem
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync// Serial EEPROM section.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync// EEPROM_Ctrl bits.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync// Delay between EEPROM clock transitions.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync// This will actually work with no delay on 33Mhz PCI.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync#define eeprom_delay(nanosec) DelayIt (AdapterInfo, nanosec);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync// The EEPROM commands include the alway-set leading bit.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsyncRoutine Description:
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync TODO: Add function description
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync AdapterInfo - TODO: add argument description
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync val - TODO: add argument description
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync num_bits - TODO: add argument description
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync TODO: add return values
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // will be 0 or 4
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync dataval = (INT16) ((val & (1 << Index)) ? EE_DI : 0);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // mask off the data_in bit
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Tmp = (UINT8) (InByte (AdapterInfo, EEAddr) &~EE_DI);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // raise the eeprom clock
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync OutByte (AdapterInfo, (UINT8) (Tmp | EE_SHIFT_CLK), EEAddr);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // lower the eeprom clock
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync OutByte (AdapterInfo, (UINT8) (Tmp &~EE_SHIFT_CLK), EEAddr);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync TODO: Add function description
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param AdapterInfo TODO: add argument description
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @return TODO: add return values
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // raise the clock
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // mask off the data_in bit
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync OutByte (AdapterInfo, (UINT8) (Tmp | EE_SHIFT_CLK), EEAddr);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync retval = (UINT16) ((retval << 1) | ((Tmp & EE_DO) ? 1 : 0));
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // lower the clock
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync OutByte (AdapterInfo, (UINT8) (Tmp &~EE_SHIFT_CLK), EEAddr);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync This routine sets the EEPROM lockout bit to gain exclusive access to the
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync eeprom. the access bit is the most significant bit in the General Control
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Register 2 in the SCB space.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param AdapterInfo Pointer to the NIC data structure
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync information which the UNDI driver is
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync layering on..
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @retval TRUE if it got the access
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @retval FALSE if it fails to get the exclusive access
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync while (wait--) {
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync tmp = InByte (AdapterInfo, AdapterInfo->ioaddr + SCBGenCtrl2);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync OutByte (AdapterInfo, tmp, AdapterInfo->ioaddr + SCBGenCtrl2);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync tmp = InByte (AdapterInfo, AdapterInfo->ioaddr + SCBGenCtrl2);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync This routine Resets the EEPROM lockout bit to giveup access to the
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync eeprom. the access bit is the most significant bit in the General Control
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Register 2 in the SCB space.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param AdapterInfo Pointer to the NIC data structure
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync information which the UNDI driver is
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync layering on..
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @return None
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync tmp = InByte (AdapterInfo, AdapterInfo->ioaddr + SCBGenCtrl2);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync OutByte (AdapterInfo, tmp, AdapterInfo->ioaddr + SCBGenCtrl2);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Using the NIC data structure information, read the EEPROM to get a Word of data for the MAC address.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param AdapterInfo Pointer to the NIC data structure
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync information which the UNDI driver is
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync layering on..
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param Location Word offset into the MAC address to read.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param AddrLen Number of bits of address length.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @retval RetVal The word read from the EEPROM.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync ReadCmd = (UINT16) (Location | (EE_READ_CMD << AddrLen));
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // get exclusive access to the eeprom first!
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // eeprom control reg bits: x,x,x,x,DO,DI,CS,SK
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // to write the opcode+data value out one bit at a time in DI starting at msb
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // and then out a 1 to sk, wait, out 0 to SK and wait
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // repeat this for all the bits to be written
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // 11110010b
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Tmp = (UINT8) (InByte (AdapterInfo, EEAddr) & 0xF2);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync OutByte (AdapterInfo, (UINT8) (Tmp | EE_CS), EEAddr);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // 3 for the read opcode 110b
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync shift_bits_out (AdapterInfo, ReadCmd, (UINT8) (3 + AddrLen));
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // read the eeprom word one bit at a time
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // Terminate the EEPROM access and leave eeprom in a clean state.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // raise the clock and lower the eeprom shift clock
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync OutByte (AdapterInfo, (UINT8) (Tmp | EE_SHIFT_CLK), EEAddr);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync OutByte (AdapterInfo, (UINT8) (Tmp &~EE_SHIFT_CLK), EEAddr);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // giveup access to the eeprom
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Using the NIC data structure information, read the EEPROM to determine how many bits of address length
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync this EEPROM is in Words.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param AdapterInfo Pointer to the NIC data structure
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync information which the UNDI driver is
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync layering on..
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @retval RetVal The word read from the EEPROM.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // assume 64word eeprom (so,6 bits of address_length)
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // get exclusive access to the eeprom first!
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // address we are trying to read is 0
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // eeprom control reg bits: x,x,x,x,DO,,DI,,CS,SK
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // to write the opcode+data value out one bit at a time in DI starting at msb
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // and then out a 1 to sk, wait, out 0 to SK and wait
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // repeat this for all the bits to be written
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Tmp = (UINT8) (InByte (AdapterInfo, EEAddr) & 0xF2);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // enable eeprom access
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync OutByte (AdapterInfo, (UINT8) (Tmp | EE_CS), EEAddr);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // 3 for opcode, 6 for the default address len
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync shift_bits_out (AdapterInfo, ReadCmd, (UINT8) (3 + 6));
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // (in case of a 64 word eeprom).
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // read the "dummy zero" from EE_DO to say that the address we wrote
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // (six 0s) is accepted, write more zeros (until 8) to get a "dummy zero"
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // assume the smallest
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync OutByte (AdapterInfo, (UINT8) (Tmp &~EE_DI), EEAddr);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // raise the eeprom clock
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync OutByte (AdapterInfo, (UINT8) (Tmp | EE_SHIFT_CLK), EEAddr);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // lower the eeprom clock
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync OutByte (AdapterInfo, (UINT8) (Tmp &~EE_SHIFT_CLK), EEAddr);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // read the eeprom word, even though we don't need this
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // Terminate the EEPROM access.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // raise the clock and lower the eeprom shift clock
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync OutByte (AdapterInfo, (UINT8) (Tmp | EE_SHIFT_CLK), EEAddr);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync OutByte (AdapterInfo, (UINT8) (Tmp &~EE_SHIFT_CLK), EEAddr);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // giveup access to the eeprom!
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync TODO: Add function description
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param AdapterInfo TODO: add argument description
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param DBaddr TODO: add argument description
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param DBsize TODO: add argument description
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @return TODO: add return values
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // wait upto one second (each wait is 100 micro s)
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // Clear statistics done marker.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // Issue statistics dump (or dump w/ reset) command.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // Wait for command to complete.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // zero the db here just to chew up a little more time.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync while (Wait != 0) {
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // Wait a bit before checking.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // Look for done marker at end of statistics.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync case 0xA005:
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync case 0xA007:
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // if we did not "continue" from the above switch, we are done,
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // If this is a reset, we are out of here!
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // Convert NIC statistics counter format to EFI/UNDI
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // specification statistics counter format.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // 54 3210 fedc ba98 7654 3210
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // db.Supported = 01 0000 0100 1101 0001 0111;
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // Statistics from the NIC
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync db.Data[0x01] = AdapterInfo->statistics->rx_good_frames;
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync db.Data[0x02] = AdapterInfo->statistics->rx_runt_errs;
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync db.Data[0x08] = AdapterInfo->statistics->rx_crc_errs +
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync db.Data[0x0B] = AdapterInfo->statistics->tx_good_frames;
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync db.Data[0x0E] = AdapterInfo->statistics->tx_coll16_errs +
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync db.Data[0x14] = AdapterInfo->statistics->tx_total_colls;
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync CopyMem ((VOID *) (UINTN) DBaddr, (VOID *) &db, (UINTN) DBsize);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync TODO: Add function description
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param AdapterInfo TODO: add argument description
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param OpFlags TODO: add argument description
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @return TODO: add return values
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // disable the interrupts
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync OutWord (AdapterInfo, INT_MASK, AdapterInfo->ioaddr + SCBCmd);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // wait for the tx queue to complete
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // check the opflags and restart receive filters
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync if ((OpFlags & PXE_OPFLAGS_RESET_DISABLE_FILTERS) == 0) {
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // if we give the filter same as Rx_Filter,
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // this routine will not set mcast list (it thinks there is no change)
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // to force it, we will reset that flag in the Rx_Filter
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync AdapterInfo->Rx_Filter &= (~PXE_OPFLAGS_RECEIVE_FILTER_FILTERED_MULTICAST);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync E100bSetfilter (AdapterInfo, save_filter, (UINT64) 0, (UINT32) 0);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync if ((OpFlags & PXE_OPFLAGS_RESET_DISABLE_INTERRUPTS) != 0) {
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // disable the interrupts
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // else leave the interrupt in the pre-set state!!!
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync TODO: Add function description
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param AdapterInfo TODO: add argument description
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @return TODO: add return values
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // disable the interrupts
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync OutWord (AdapterInfo, INT_MASK, AdapterInfo->ioaddr + SCBCmd);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // stop the receive unit
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // wait for the tx queue to complete
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync if (AdapterInfo->FreeCBCount != AdapterInfo->TxBufCnt) {
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // we do not want to reset the phy, it takes a long time to renegotiate the
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // link after that (3-4 seconds)
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync This routine will write a value to the specified MII register
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync of an external MDI compliant device (e.g. PHY 100). The command will
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync execute in polled mode.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param AdapterInfo pointer to the structure that contains
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync the NIC's context.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param RegAddress The MII register that we are writing to
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param PhyAddress The MDI address of the Phy component.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param DataValue The value that we are writing to the MII
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @return nothing
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // Issue the write command to the MDI control register.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync OutLong (AdapterInfo, WriteCommand, AdapterInfo->ioaddr + SCBCtrlMDI);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // wait 20usec before checking status
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // poll for the mdi write to complete
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync while ((InLong (AdapterInfo, AdapterInfo->ioaddr + SCBCtrlMDI) &
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync This routine will read a value from the specified MII register
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync of an external MDI compliant device (e.g. PHY 100), and return
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync it to the calling routine. The command will execute in polled mode.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param AdapterInfo pointer to the structure that contains
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync the NIC's context.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param RegAddress The MII register that we are reading from
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param PhyAddress The MDI address of the Phy component.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param DataValue pointer to the value that we read from
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync the MII register.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // Issue the read command to the MDI control register.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync OutLong (AdapterInfo, ReadCommand, AdapterInfo->ioaddr + SCBCtrlMDI);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // wait 20usec before checking status
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // poll for the mdi read to complete
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync while ((InLong (AdapterInfo, AdapterInfo->ioaddr + SCBCtrlMDI) &
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync *DataValue = InWord (AdapterInfo, AdapterInfo->ioaddr + SCBCtrlMDI);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync This routine will reset the PHY that the adapter is currently
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync configured to use.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param AdapterInfo pointer to the structure that contains
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync the NIC's context.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // Write the MDI control register with our new Phy configuration
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync This routine will detect what phy we are using, set the line
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync speed, FDX or HDX, and configure the phy if necessary.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync The following combinations are supported:
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync - TX or T4 PHY alone at PHY address 1
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync - T4 or TX PHY at address 1 and MII PHY at address 0
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync - 82503 alone (10Base-T mode, no full duplex support)
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync - 82503 and MII PHY (TX or T4) at address 0
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync The sequence / priority of detection is as follows:
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync - PHY 1 with cable termination
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync - PHY 0 with cable termination
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync - PHY 1 (if found) without cable termination
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync - 503 interface
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Additionally auto-negotiation capable (NWAY) and parallel
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync detection PHYs are supported. The flow-chart is described in
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync the 82557 software writer's manual.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync NOTE: 1. All PHY MDI registers are read in polled mode.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync 2. The routines assume that the 82557 has been RESET and we have
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync obtained the virtual memory address of the CSR.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync 3. PhyDetect will not RESET the PHY.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync 4. If FORCEFDX is set, SPEED should also be set. The driver will
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync check the values for inconsistency with the detected PHY
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync technology.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync 5. PHY 1 (the PHY on the adapter) may have an address in the range
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync 1 through 31 inclusive. The driver will accept addresses in
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync this range.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync 6. Driver ignores FORCEFDX and SPEED overrides if a 503 interface
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync is detected.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param AdapterInfo pointer to the structure that contains
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync the NIC's context.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @retval TRUE If a Phy was detected, and configured
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @retval FALSE If a valid phy could not be detected and
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync configured.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // EEPROM word [6] contains the Primary PHY record in which the least 3 bits
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // indicate the PHY address
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // and word [7] contains the secondary PHY record
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync AdapterInfo->PhyAddress = (UINT8) (AdapterInfo->PhyRecord[0] & 7);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // Check for a phy address over-ride of 32 which indicates force use of 82503
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // not detecting the link in this case
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // 503 interface over-ride
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // Record the current speed and duplex. We will be in half duplex
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // mode unless the user used the force full duplex over-ride.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // If the Phy Address is between 1-31 then we must first look for phy 1,
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // at that address.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync if ((AdapterInfo->PhyAddress > 0) && (AdapterInfo->PhyAddress < 32)) {
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // Read the MDI control and status registers at phy 1
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // and check if we found a valid phy
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // we have a valid phy1
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // Read the status register again because of sticky bits
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // If there is a valid link then use this Phy.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // Next try to detect a PHY at address 0x00 because there was no Phy 1,
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // or Phy 1 didn't have link, or we had a phy 0 over-ride
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // Read the MDI control and status registers at phy 0
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync MdiRead (AdapterInfo, MDI_CONTROL_REG, 0, &MdiControlReg);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync MdiRead (AdapterInfo, MDI_STATUS_REG, 0, &MdiStatusReg);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // check if we found a valid phy 0
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // we don't have a valid phy at address 0
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // if phy address was forced to 0, then error out because we
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // didn't find a phy at that address
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // at this point phy1 does not have link and there is no phy 0 at all
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // if we are forced to detect the cable, error out here!
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // no phy 0, but there is a phy 1 (no link I guess), so use phy 1
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // didn't find phy 0 or phy 1, so assume a 503 interface
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // Record the current speed and duplex. We'll be in half duplex
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // mode unless the user used the force full duplex over-ride.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // We have a valid phy at address 0. If phy 0 has a link then we use
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // phy 0. If Phy 0 doesn't have a link then we use Phy 1 (no link)
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // if phy 1 is present, or phy 0 if phy 1 is not present
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // If phy 1 was present, then we must isolate phy 1 before we enable
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // phy 0 to see if Phy 0 has a link.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // isolate phy 1
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // wait 100 microseconds for the phy to isolate.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // Since this Phy is at address 0, we must enable it. So clear
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // the isolate bit, and set the auto-speed select bit
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // wait 100 microseconds for the phy to be enabled.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // restart the auto-negotion process
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // wait no more than 3.5 seconds for auto-negotiation to complete
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // Read the status register twice because of sticky bits
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync MdiRead (AdapterInfo, MDI_STATUS_REG, 0, &MdiStatusReg);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync MdiRead (AdapterInfo, MDI_STATUS_REG, 0, &MdiStatusReg);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // Read the status register again because of sticky bits
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync MdiRead (AdapterInfo, MDI_STATUS_REG, 0, &MdiStatusReg);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // If the link was not set
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // PHY1 does not have a link and phy 0 does not have a link
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // do not proceed if we need to detect the link!
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // the link wasn't set, so use phy 1 if phy 1 was present
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // isolate phy 0
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync MdiWrite (AdapterInfo, MDI_CONTROL_REG, 0, MDI_CR_ISOLATE);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // wait 100 microseconds for the phy to isolate.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // Now re-enable PHY 1
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // wait 100 microseconds for the phy to be enabled
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // restart the auto-negotion process
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // Don't wait for it to complete (we didn't have link earlier)
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // Definitely using Phy 0
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync This routine will setup phy 1 or phy 0 so that it is configured
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync to match a speed and duplex over-ride option. If speed or
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync duplex mode is not explicitly specified in the registry, the
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync driver will skip the speed and duplex over-ride code, and
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync assume the adapter is automatically setting the line speed, and
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync the duplex mode. At the end of this routine, any truly Phy
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync specific code will be executed (each Phy has its own quirks,
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync and some require that certain special bits are set).
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync NOTE: The driver assumes that SPEED and FORCEFDX are specified at the
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync same time. If FORCEDPX is set without speed being set, the driver
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync will encouter a fatal error and log a message into the event viewer.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param AdapterInfo pointer to the structure that contains
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync the NIC's context.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @retval TRUE If the phy could be configured correctly
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @retval FALSE If the phy couldn't be configured
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync correctly, because an unsupported
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync over-ride option was used
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // If we are NOT forcing a setting for line speed or full duplex, then
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // we won't force a link setting, and we'll jump down to the phy
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // specific code.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync if (((AdapterInfo->LinkSpeedReq) || (AdapterInfo->DuplexReq))) {
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // Find out what kind of technology this Phy is capable of.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // Read the MDI control register at our phy
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // Now check the validity of our forced option. If the force option is
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // valid, then force the setting. If the force option is not valid,
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // we'll set a flag indicating that we should error out.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // If speed is forced to 10mb
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // If half duplex is forced
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync if ((AdapterInfo->DuplexReq & PXE_FORCE_HALF_DUPLEX) != 0) {
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync MdiControlReg &= ~(MDI_CR_10_100 | MDI_CR_AUTO_SELECT | MDI_CR_FULL_HALF);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync } else if ((AdapterInfo->DuplexReq & PXE_FORCE_FULL_DUPLEX) != 0) {
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // If full duplex is forced
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync MdiControlReg &= ~(MDI_CR_10_100 | MDI_CR_AUTO_SELECT);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // If auto duplex (we actually set phy to 1/2)
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync if (MdiStatusReg & (MDI_SR_10T_FULL_DPX | MDI_SR_10T_HALF_DPX)) {
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync MdiControlReg &= ~(MDI_CR_10_100 | MDI_CR_AUTO_SELECT | MDI_CR_FULL_HALF);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // If speed is forced to 100mb
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // If half duplex is forced
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync if ((AdapterInfo->DuplexReq & PXE_FORCE_HALF_DUPLEX) != 0) {
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync if (MdiStatusReg & (MDI_SR_TX_HALF_DPX | MDI_SR_T4_CAPABLE)) {
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync MdiControlReg &= ~(MDI_CR_AUTO_SELECT | MDI_CR_FULL_HALF);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync } else if ((AdapterInfo->DuplexReq & PXE_FORCE_FULL_DUPLEX) != 0) {
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // If full duplex is forced
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync MdiControlReg |= (MDI_CR_10_100 | MDI_CR_FULL_HALF);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // If auto duplex (we set phy to 1/2)
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync if (MdiStatusReg & (MDI_SR_TX_HALF_DPX | MDI_SR_T4_CAPABLE)) {
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync MdiControlReg &= ~(MDI_CR_AUTO_SELECT | MDI_CR_FULL_HALF);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // Write the MDI control register with our new Phy configuration
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // wait 100 milliseconds for auto-negotiation to complete
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // Find out specifically what Phy this is. We do this because for certain
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // phys there are specific bits that must be set so that the phy and the
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // 82557 work together properly.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync PhyId = ((UINT32) MdiIdLowReg | ((UINT32) MdiIdHighReg << 16));
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // And out the revsion field of the Phy ID so that we'll be able to detect
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // future revs of the same Phy.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // Handle the National TX
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync MdiMiscReg |= (NSC_TX_CONG_TXREADY | NSC_TX_CONG_F_CONNECT);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // We put a hardware fix on to our adapters to work-around the PHY_100 errata
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // described below. The following code is only compiled in, if we wanted
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // to attempt a software workaround to the PHY_100 A/B step problem.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync This routine will figure out what line speed and duplex mode
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync the PHY is currently using.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param AdapterInfo pointer to the structure that contains
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync the NIC's context.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param PhyId The ID of the PHY in question.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @return NOTHING
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // If there was a speed and/or duplex override, then set our current
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // value accordingly
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync AdapterInfo->LinkSpeed = AdapterInfo->LinkSpeedReq;
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync AdapterInfo->Duplex = (UINT8) ((AdapterInfo->DuplexReq & PXE_FORCE_FULL_DUPLEX) ?
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // If speed and duplex were forced, then we know our current settings, so
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // we'll just return. Otherwise, we'll need to figure out what NWAY set
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync if (AdapterInfo->LinkSpeed && AdapterInfo->Duplex) {
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // If we didn't have a valid link, then we'll assume that our current
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // speed is 10mb half-duplex.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // Read the status register twice because of sticky bits
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // If there wasn't a valid link then use default speed & duplex
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // If this is an Intel PHY (a T4 PHY_100 or a TX PHY_TX), then read bits
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // 1 and 0 of extended register 0, to get the current speed and duplex
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // settings.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync if ((PhyId == PHY_100_A) || (PhyId == PHY_100_C) || (PhyId == PHY_TX_ID)) {
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // Read extended register 0
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // Get current speed setting
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // Get current duplex setting -- if bit is set then FDX is enabled
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // Read our link partner's advertisement register
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // See if Auto-Negotiation was complete (bit 5, reg 1)
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // If a True NWAY connection was made, then we can detect speed/duplex by
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // ANDing our adapter's advertised abilities with our link partner's
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // advertised ablilities, and then assuming that the highest common
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // denominator was chosed by NWAY.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // Read our advertisement register
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // AND the two advertisement registers together, and get rid of any
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // extraneous bits.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync MdiOwnAdReg = (UINT16) (MdiOwnAdReg & (MdiLinkPartnerAdReg & NWAY_LP_ABILITY));
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // Get speed setting
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync if (MdiOwnAdReg & (NWAY_AD_TX_HALF_DPX | NWAY_AD_TX_FULL_DPX | NWAY_AD_T4_CAPABLE)) {
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // Get duplex setting -- use priority resolution algorithm
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // If we are connected to a dumb (non-NWAY) repeater or hub, and the line
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // speed was determined automatically by parallel detection, then we have
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // no way of knowing exactly what speed the PHY is set to unless that PHY
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // has a propietary register which indicates speed in this situation. The
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // NSC TX PHY does have such a register. Also, since NWAY didn't establish
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // the connection, the duplex setting should HALF duplex.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // Read register 25 to get the SPEED_10 bit
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // If bit 6 was set then we're at 10mb
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // If we don't know what line speed we are set at, then we'll default to
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync TODO: Add function description
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param AdapterInfo TODO: add argument description
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @return TODO: add return values
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync if (AdapterInfo->FreeCBCount == AdapterInfo->TxBufCnt) {
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // used xmit cb list starts right after the free tail (ends before the
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // free head ptr)
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync TxPtr = AdapterInfo->FreeTxTailPtr->NextTCBVirtualLinkPtr;
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync TODO: Add function description
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param cmd_ptr TODO: add argument description
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param AdapterInfo TODO: add argument description
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @return TODO: add return values
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync while ((cmd_ptr->cb_header.status == 0) && (--wait > 0)) {
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync TODO: Add function description
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param AdapterInfo TODO: add argument description
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @return TODO: add return values
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // Reset the chip: stop Tx and Rx processes and clear counters.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // This takes less than 10usec and will easily finish before the next
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync OutLong (AdapterInfo, PORT_RESET, AdapterInfo->ioaddr + SCBPort);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // wait for 5 milli seconds here!
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // TCO Errata work around for 559s only
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // -----------------------------------------------------------------------------------
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // TCO Workaround Code
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // haifa workaround
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // -----------------------------------------------------------------------------------
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // 1. Issue SW-RST ^^^ (already done above)
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // 2. Issue a redundant Set CU Base CMD immediately
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // Do not set the General Pointer before the Set CU Base cycle
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // Do not check the SCB CMD before the Set CU Base cycle
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // 3. Wait for the SCB-CMD to be cleared
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // this indicates the transition to post-driver
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // 4. Poll the TCO-Req bit in the PMDR to be cleared
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // this indicates the tco activity has stopped for real
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // 5. Proceed with the nominal Driver Init:
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // Actual Set CU & RU Base ...
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // Check for ICH2 device ID. If this is an ICH2,
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // do the TCO workaround code.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // donot load the scb pointer but just give load_cu cmd.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync OutByte (AdapterInfo, CU_CMD_BASE, AdapterInfo->ioaddr + SCBCmd);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // wait for command to be accepted.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // read PMDR register and check bit 1 in it to see if TCO is active
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // wait for 5 milli seconds
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync tco_stat = InByte (AdapterInfo, AdapterInfo->ioaddr + 0x1b);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // is the activity bit clear??
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // not zero??
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync TODO: Add function description
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param AdapterInfo TODO: add argument description
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @return TODO: add return values
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync OutLong (AdapterInfo, POR_SELECTIVE_RESET, AdapterInfo->ioaddr + SCBPort);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // wait for this to complete
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // wait for 2 milli seconds here!
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync while (wait > 0) {
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync stat = InLong (AdapterInfo, AdapterInfo->ioaddr + SCBPort);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync if (stat == 0) {
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // wait for 1 milli second
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync if (stat != 0) {
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync TODO: Add function description
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param AdapterInfo TODO: add argument description
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @return TODO: add return values
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // disable interrupts
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync OutWord (AdapterInfo, INT_MASK, AdapterInfo->ioaddr + SCBCmd);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // Load the base registers with 0s (we will give the complete address as
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // offset later when we issue any command
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync if ((ret_val = Load_Base_Regs (AdapterInfo)) != 0) {
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync if ((ret_val = SetupReceiveQueues (AdapterInfo)) != 0) {
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // detect the PHY only if we need to detect the cable as requested by the
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // initialize parameters
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync if ((ret_val = E100bSetupIAAddr (AdapterInfo)) != 0) {