4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync IA-32/x64 MSR functions.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync This program and the accompanying materials
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync are licensed and made available under the terms and conditions of the BSD License
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync which accompanies this distribution. The full text of the license may be found at
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Returns the lower 32-bits of a Machine Specific Register(MSR).
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Reads and returns the lower 32-bits of the MSR specified by Index.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync No parameter checking is performed on Index, and some Index values may cause
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync CPU exceptions. The caller must either guarantee that Index is valid, or the
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync caller must set up exception handlers to catch the exceptions. This function
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync is only available on IA-32 and x64.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param Index The 32-bit MSR index to read.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @return The lower 32 bits of the MSR identified by Index.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Writes a 32-bit value to a Machine Specific Register(MSR), and returns the value.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync The upper 32-bits of the MSR are set to zero.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Writes the 32-bit value specified by Value to the MSR specified by Index. The
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync upper 32-bits of the MSR write are set to zero. The 32-bit value written to
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync the MSR is returned. No parameter checking is performed on Index or Value,
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync and some of these may cause CPU exceptions. The caller must either guarantee
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync that Index and Value are valid, or the caller must establish proper exception
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync handlers. This function is only available on IA-32 and x64.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param Index The 32-bit MSR index to write.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param Value The 32-bit value to write to the MSR.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @return Value
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Reads a 64-bit MSR, performs a bitwise OR on the lower 32-bits, and
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync writes the result back to the 64-bit MSR.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Reads the 64-bit MSR specified by Index, performs a bitwise OR
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync between the lower 32-bits of the read result and the value specified by
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync OrData, and writes the result to the 64-bit MSR specified by Index. The lower
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync 32-bits of the value written to the MSR is returned. No parameter checking is
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync performed on Index or OrData, and some of these may cause CPU exceptions. The
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync caller must either guarantee that Index and OrData are valid, or the caller
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync must establish proper exception handlers. This function is only available on
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync IA-32 and x64.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param Index The 32-bit MSR index to write.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param OrData The value to OR with the read value from the MSR.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @return The lower 32-bit value written to the MSR.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Reads a 64-bit MSR, performs a bitwise AND on the lower 32-bits, and writes
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync the result back to the 64-bit MSR.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync lower 32-bits of the read result and the value specified by AndData, and
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync writes the result to the 64-bit MSR specified by Index. The lower 32-bits of
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync the value written to the MSR is returned. No parameter checking is performed
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync on Index or AndData, and some of these may cause CPU exceptions. The caller
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync must either guarantee that Index and AndData are valid, or the caller must
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync establish proper exception handlers. This function is only available on IA-32
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param Index The 32-bit MSR index to write.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param AndData The value to AND with the read value from the MSR.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @return The lower 32-bit value written to the MSR.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise OR
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync on the lower 32-bits, and writes the result back to the 64-bit MSR.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync lower 32-bits of the read result and the value specified by AndData
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync preserving the upper 32-bits, performs a bitwise OR between the
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync result of the AND operation and the value specified by OrData, and writes the
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync result to the 64-bit MSR specified by Address. The lower 32-bits of the value
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync written to the MSR is returned. No parameter checking is performed on Index,
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync AndData, or OrData, and some of these may cause CPU exceptions. The caller
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync must either guarantee that Index, AndData, and OrData are valid, or the
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync caller must establish proper exception handlers. This function is only
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync available on IA-32 and x64.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param Index The 32-bit MSR index to write.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param AndData The value to AND with the read value from the MSR.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param OrData The value to OR with the result of the AND operation.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @return The lower 32-bit value written to the MSR.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync return (UINT32)AsmMsrAndThenOr64 (Index, AndData, OrData);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Reads a bit field of an MSR.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Reads the bit field in the lower 32-bits of a 64-bit MSR. The bit field is
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync specified by the StartBit and the EndBit. The value of the bit field is
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync returned. The caller must either guarantee that Index is valid, or the caller
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync must set up exception handlers to catch the exceptions. This function is only
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync available on IA-32 and x64.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync If StartBit is greater than 31, then ASSERT().
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync If EndBit is greater than 31, then ASSERT().
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync If EndBit is less than StartBit, then ASSERT().
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param Index The 32-bit MSR index to read.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param StartBit The ordinal of the least significant bit in the bit field.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Range 0..31.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param EndBit The ordinal of the most significant bit in the bit field.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Range 0..31.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @return The bit field read from the MSR.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync return BitFieldRead32 (AsmReadMsr32 (Index), StartBit, EndBit);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Writes a bit field to an MSR.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Writes Value to a bit field in the lower 32-bits of a 64-bit MSR. The bit
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync field is specified by the StartBit and the EndBit. All other bits in the
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync destination MSR are preserved. The lower 32-bits of the MSR written is
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync returned. The caller must either guarantee that Index and the data written
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync is valid, or the caller must set up exception handlers to catch the exceptions.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync This function is only available on IA-32 and x64.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync If StartBit is greater than 31, then ASSERT().
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync If EndBit is greater than 31, then ASSERT().
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync If EndBit is less than StartBit, then ASSERT().
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param Index The 32-bit MSR index to write.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param StartBit The ordinal of the least significant bit in the bit field.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Range 0..31.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param EndBit The ordinal of the most significant bit in the bit field.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Range 0..31.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param Value The new value of the bit field.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @return The lower 32-bit of the value written to the MSR.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync return (UINT32)AsmMsrBitFieldWrite64 (Index, StartBit, EndBit, Value);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Reads a bit field in a 64-bit MSR, performs a bitwise OR, and writes the
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync result back to the bit field in the 64-bit MSR.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Reads the 64-bit MSR specified by Index, performs a bitwise OR
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync between the read result and the value specified by OrData, and writes the
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync result to the 64-bit MSR specified by Index. The lower 32-bits of the value
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync written to the MSR are returned. Extra left bits in OrData are stripped. The
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync caller must either guarantee that Index and the data written is valid, or
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync the caller must set up exception handlers to catch the exceptions. This
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync function is only available on IA-32 and x64.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync If StartBit is greater than 31, then ASSERT().
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync If EndBit is greater than 31, then ASSERT().
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync If EndBit is less than StartBit, then ASSERT().
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param Index The 32-bit MSR index to write.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param StartBit The ordinal of the least significant bit in the bit field.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Range 0..31.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param EndBit The ordinal of the most significant bit in the bit field.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Range 0..31.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param OrData The value to OR with the read value from the MSR.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @return The lower 32-bit of the value written to the MSR.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync return (UINT32)AsmMsrBitFieldOr64 (Index, StartBit, EndBit, OrData);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync result back to the bit field in the 64-bit MSR.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync read result and the value specified by AndData, and writes the result to the
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync 64-bit MSR specified by Index. The lower 32-bits of the value written to the
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync MSR are returned. Extra left bits in AndData are stripped. The caller must
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync either guarantee that Index and the data written is valid, or the caller must
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync set up exception handlers to catch the exceptions. This function is only
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync available on IA-32 and x64.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync If StartBit is greater than 31, then ASSERT().
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync If EndBit is greater than 31, then ASSERT().
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync If EndBit is less than StartBit, then ASSERT().
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param Index The 32-bit MSR index to write.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param StartBit The ordinal of the least significant bit in the bit field.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Range 0..31.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param EndBit The ordinal of the most significant bit in the bit field.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Range 0..31.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param AndData The value to AND with the read value from the MSR.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @return The lower 32-bit of the value written to the MSR.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync return (UINT32)AsmMsrBitFieldAnd64 (Index, StartBit, EndBit, AndData);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync bitwise OR, and writes the result back to the bit field in the
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync 64-bit MSR.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by a
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync bitwise OR between the read result and the value specified by
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync AndData, and writes the result to the 64-bit MSR specified by Index. The
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync lower 32-bits of the value written to the MSR are returned. Extra left bits
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync in both AndData and OrData are stripped. The caller must either guarantee
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync that Index and the data written is valid, or the caller must set up exception
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync handlers to catch the exceptions. This function is only available on IA-32
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync If StartBit is greater than 31, then ASSERT().
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync If EndBit is greater than 31, then ASSERT().
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync If EndBit is less than StartBit, then ASSERT().
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param Index The 32-bit MSR index to write.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param StartBit The ordinal of the least significant bit in the bit field.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Range 0..31.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param EndBit The ordinal of the most significant bit in the bit field.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Range 0..31.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param AndData The value to AND with the read value from the MSR.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param OrData The value to OR with the result of the AND operation.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @return The lower 32-bit of the value written to the MSR.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Reads a 64-bit MSR, performs a bitwise OR, and writes the result
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync back to the 64-bit MSR.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Reads the 64-bit MSR specified by Index, performs a bitwise OR
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync between the read result and the value specified by OrData, and writes the
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync result to the 64-bit MSR specified by Index. The value written to the MSR is
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync returned. No parameter checking is performed on Index or OrData, and some of
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync these may cause CPU exceptions. The caller must either guarantee that Index
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync and OrData are valid, or the caller must establish proper exception handlers.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync This function is only available on IA-32 and x64.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param Index The 32-bit MSR index to write.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param OrData The value to OR with the read value from the MSR.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @return The value written back to the MSR.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync return AsmWriteMsr64 (Index, AsmReadMsr64 (Index) | OrData);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Reads a 64-bit MSR, performs a bitwise AND, and writes the result back to the
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync 64-bit MSR.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync read result and the value specified by OrData, and writes the result to the
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync 64-bit MSR specified by Index. The value written to the MSR is returned. No
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync parameter checking is performed on Index or OrData, and some of these may
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync cause CPU exceptions. The caller must either guarantee that Index and OrData
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync are valid, or the caller must establish proper exception handlers. This
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync function is only available on IA-32 and x64.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param Index The 32-bit MSR index to write.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param AndData The value to AND with the read value from the MSR.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @return The value written back to the MSR.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync return AsmWriteMsr64 (Index, AsmReadMsr64 (Index) & AndData);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync OR, and writes the result back to the 64-bit MSR.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Reads the 64-bit MSR specified by Index, performs a bitwise AND between read
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync result and the value specified by AndData, performs a bitwise OR
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync between the result of the AND operation and the value specified by OrData,
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync and writes the result to the 64-bit MSR specified by Index. The value written
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync to the MSR is returned. No parameter checking is performed on Index, AndData,
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync or OrData, and some of these may cause CPU exceptions. The caller must either
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync guarantee that Index, AndData, and OrData are valid, or the caller must
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync establish proper exception handlers. This function is only available on IA-32
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param Index The 32-bit MSR index to write.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param AndData The value to AND with the read value from the MSR.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param OrData The value to OR with the result of the AND operation.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @return The value written back to the MSR.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync return AsmWriteMsr64 (Index, (AsmReadMsr64 (Index) & AndData) | OrData);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Reads a bit field of an MSR.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Reads the bit field in the 64-bit MSR. The bit field is specified by the
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync StartBit and the EndBit. The value of the bit field is returned. The caller
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync must either guarantee that Index is valid, or the caller must set up
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync exception handlers to catch the exceptions. This function is only available
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync on IA-32 and x64.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync If StartBit is greater than 63, then ASSERT().
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync If EndBit is greater than 63, then ASSERT().
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync If EndBit is less than StartBit, then ASSERT().
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param Index The 32-bit MSR index to read.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param StartBit The ordinal of the least significant bit in the bit field.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Range 0..63.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param EndBit The ordinal of the most significant bit in the bit field.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Range 0..63.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @return The value read from the MSR.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync return BitFieldRead64 (AsmReadMsr64 (Index), StartBit, EndBit);
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Writes a bit field to an MSR.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Writes Value to a bit field in a 64-bit MSR. The bit field is specified by
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync the StartBit and the EndBit. All other bits in the destination MSR are
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync preserved. The MSR written is returned. The caller must either guarantee
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync that Index and the data written is valid, or the caller must set up exception
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync handlers to catch the exceptions. This function is only available on IA-32 and x64.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync If StartBit is greater than 63, then ASSERT().
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync If EndBit is greater than 63, then ASSERT().
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync If EndBit is less than StartBit, then ASSERT().
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param Index The 32-bit MSR index to write.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param StartBit The ordinal of the least significant bit in the bit field.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Range 0..63.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param EndBit The ordinal of the most significant bit in the bit field.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Range 0..63.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param Value The new value of the bit field.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @return The value written back to the MSR.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync BitFieldWrite64 (AsmReadMsr64 (Index), StartBit, EndBit, Value)
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Reads a bit field in a 64-bit MSR, performs a bitwise OR, and
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync writes the result back to the bit field in the 64-bit MSR.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Reads the 64-bit MSR specified by Index, performs a bitwise OR
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync between the read result and the value specified by OrData, and writes the
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync result to the 64-bit MSR specified by Index. The value written to the MSR is
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync returned. Extra left bits in OrData are stripped. The caller must either
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync guarantee that Index and the data written is valid, or the caller must set up
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync exception handlers to catch the exceptions. This function is only available
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync on IA-32 and x64.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync If StartBit is greater than 63, then ASSERT().
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync If EndBit is greater than 63, then ASSERT().
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync If EndBit is less than StartBit, then ASSERT().
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param Index The 32-bit MSR index to write.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param StartBit The ordinal of the least significant bit in the bit field.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Range 0..63.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param EndBit The ordinal of the most significant bit in the bit field.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Range 0..63.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param OrData The value to OR with the read value from the bit field.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @return The value written back to the MSR.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync BitFieldOr64 (AsmReadMsr64 (Index), StartBit, EndBit, OrData)
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync result back to the bit field in the 64-bit MSR.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync read result and the value specified by AndData, and writes the result to the
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync 64-bit MSR specified by Index. The value written to the MSR is returned.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Extra left bits in AndData are stripped. The caller must either guarantee
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync that Index and the data written is valid, or the caller must set up exception
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync handlers to catch the exceptions. This function is only available on IA-32
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync If StartBit is greater than 63, then ASSERT().
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync If EndBit is greater than 63, then ASSERT().
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync If EndBit is less than StartBit, then ASSERT().
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param Index The 32-bit MSR index to write.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param StartBit The ordinal of the least significant bit in the bit field.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Range 0..63.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param EndBit The ordinal of the most significant bit in the bit field.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Range 0..63.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param AndData The value to AND with the read value from the bit field.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @return The value written back to the MSR.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync BitFieldAnd64 (AsmReadMsr64 (Index), StartBit, EndBit, AndData)
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync bitwise OR, and writes the result back to the bit field in the
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync 64-bit MSR.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync a bitwise OR between the read result and the value specified by
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync AndData, and writes the result to the 64-bit MSR specified by Index. The
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync value written to the MSR is returned. Extra left bits in both AndData and
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync OrData are stripped. The caller must either guarantee that Index and the data
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync written is valid, or the caller must set up exception handlers to catch the
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync exceptions. This function is only available on IA-32 and x64.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync If StartBit is greater than 63, then ASSERT().
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync If EndBit is greater than 63, then ASSERT().
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync If EndBit is less than StartBit, then ASSERT().
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param Index The 32-bit MSR index to write.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param StartBit The ordinal of the least significant bit in the bit field.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Range 0..63.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param EndBit The ordinal of the most significant bit in the bit field.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Range 0..63.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param AndData The value to AND with the read value from the bit field.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param OrData The value to OR with the result of the AND operation.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @return The value written back to the MSR.