Acpi50.h revision 4fd606d1f5abe38e1f42c38de1d2e895166bd0f4
/** @file
ACPI 5.0 definitions from the ACPI Specification Revision 5.0 December 6, 2011
Copyright (c) 2011 - 2012, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef _ACPI_5_0_H_
#define _ACPI_5_0_H_
#include <IndustryStandard/Acpi40.h>
//
// Define for Desriptor
//
#define ACPI_SMALL_FIXED_DMA_DESCRIPTOR_NAME 0x0A
#define ACPI_LARGE_GPIO_CONNECTION_DESCRIPTOR_NAME 0x0C
#define ACPI_FIXED_DMA_DESCRIPTOR 0x55
#define ACPI_GPIO_CONNECTION_DESCRIPTOR 0x8C
#define ACPI_GENERIC_SERIAL_BUS_CONNECTION_DESCRIPTOR 0x8E
#pragma pack(1)
///
/// Generic DMA Descriptor.
///
typedef PACKED struct {
///
/// GPIO Connection Descriptor
///
typedef PACKED struct {
#define EFI_ACPI_GPIO_CONNECTION_TYPE_INTERRUPT 0x0
#define EFI_ACPI_GPIO_CONNECTION_TYPE_IO 0x1
///
/// Serial Bus Resource Descriptor (Generic)
///
typedef PACKED struct {
// Type specific data
#define EFI_ACPI_SERIAL_BUS_RESOURCE_TYPE_I2C 0x1
#define EFI_ACPI_SERIAL_BUS_RESOURCE_TYPE_SPI 0x2
#define EFI_ACPI_SERIAL_BUS_RESOURCE_TYPE_UART 0x3
///
/// Serial Bus Resource Descriptor (I2C)
///
typedef PACKED struct {
///
/// Serial Bus Resource Descriptor (SPI)
///
typedef PACKED struct {
///
/// Serial Bus Resource Descriptor (UART)
///
typedef PACKED struct {
#pragma pack()
//
// Ensure proper structure formats
//
#pragma pack(1)
///
/// ACPI 5.0 Generic Address Space definition
///
typedef struct {
//
// Generic Address Space Address IDs
//
#define EFI_ACPI_5_0_SYSTEM_MEMORY 0
#define EFI_ACPI_5_0_SYSTEM_IO 1
#define EFI_ACPI_5_0_PCI_CONFIGURATION_SPACE 2
#define EFI_ACPI_5_0_EMBEDDED_CONTROLLER 3
#define EFI_ACPI_5_0_SMBUS 4
#define EFI_ACPI_5_0_FUNCTIONAL_FIXED_HARDWARE 0x7F
//
// Generic Address Space Access Sizes
//
#define EFI_ACPI_5_0_UNDEFINED 0
#define EFI_ACPI_5_0_BYTE 1
#define EFI_ACPI_5_0_WORD 2
#define EFI_ACPI_5_0_DWORD 3
#define EFI_ACPI_5_0_QWORD 4
//
// ACPI 5.0 table structures
//
///
/// Root System Description Pointer Structure
///
typedef struct {
///
/// RSD_PTR Revision (as defined in ACPI 5.0 spec.)
///
#define EFI_ACPI_5_0_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02 ///< ACPISpec (Revision 5.0) says current value is 2
///
/// Common table header, this prefaces all ACPI tables, including FACS, but
/// excluding the RSD PTR structure
///
typedef struct {
//
// Root System Description Table
// No definition needed as it is a common description table header, the same with
// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT32 table pointers.
//
///
/// RSDT Revision (as defined in ACPI 5.0 spec.)
///
#define EFI_ACPI_5_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
//
// Extended System Description Table
// No definition needed as it is a common description table header, the same with
// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT64 table pointers.
//
///
/// XSDT Revision (as defined in ACPI 5.0 spec.)
///
///
/// Fixed ACPI Description Table Structure (FADT)
///
typedef struct {
///
/// FADT Version (as defined in ACPI 5.0 spec.)
///
#define EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x05
//
// Fixed ACPI Description Table Preferred Power Management Profile
//
#define EFI_ACPI_5_0_PM_PROFILE_UNSPECIFIED 0
#define EFI_ACPI_5_0_PM_PROFILE_DESKTOP 1
#define EFI_ACPI_5_0_PM_PROFILE_MOBILE 2
#define EFI_ACPI_5_0_PM_PROFILE_WORKSTATION 3
#define EFI_ACPI_5_0_PM_PROFILE_SOHO_SERVER 5
#define EFI_ACPI_5_0_PM_PROFILE_APPLIANCE_PC 6
#define EFI_ACPI_5_0_PM_PROFILE_TABLET 8
//
// Fixed ACPI Description Table Boot Architecture Flags
// All other bits are reserved and must be set to 0.
//
#define EFI_ACPI_5_0_LEGACY_DEVICES BIT0
#define EFI_ACPI_5_0_8042 BIT1
#define EFI_ACPI_5_0_VGA_NOT_PRESENT BIT2
#define EFI_ACPI_5_0_MSI_NOT_SUPPORTED BIT3
#define EFI_ACPI_5_0_PCIE_ASPM_CONTROLS BIT4
//
// Fixed ACPI Description Table Fixed Feature Flags
// All other bits are reserved and must be set to 0.
//
#define EFI_ACPI_5_0_WBINVD BIT0
#define EFI_ACPI_5_0_WBINVD_FLUSH BIT1
#define EFI_ACPI_5_0_PROC_C1 BIT2
#define EFI_ACPI_5_0_P_LVL2_UP BIT3
#define EFI_ACPI_5_0_PWR_BUTTON BIT4
#define EFI_ACPI_5_0_SLP_BUTTON BIT5
#define EFI_ACPI_5_0_FIX_RTC BIT6
#define EFI_ACPI_5_0_RTC_S4 BIT7
#define EFI_ACPI_5_0_TMR_VAL_EXT BIT8
#define EFI_ACPI_5_0_DCK_CAP BIT9
#define EFI_ACPI_5_0_RESET_REG_SUP BIT10
#define EFI_ACPI_5_0_SEALED_CASE BIT11
#define EFI_ACPI_5_0_HEADLESS BIT12
#define EFI_ACPI_5_0_CPU_SW_SLP BIT13
#define EFI_ACPI_5_0_PCI_EXP_WAK BIT14
#define EFI_ACPI_5_0_USE_PLATFORM_CLOCK BIT15
#define EFI_ACPI_5_0_S4_RTC_STS_VALID BIT16
#define EFI_ACPI_5_0_HW_REDUCED_ACPI BIT20
///
/// Firmware ACPI Control Structure
///
typedef struct {
///
/// FACS Version (as defined in ACPI 5.0 spec.)
///
#define EFI_ACPI_5_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION 0x02
///
/// Firmware Control Structure Feature Flags
/// All other bits are reserved and must be set to 0.
///
#define EFI_ACPI_5_0_S4BIOS_F BIT0
///
/// OSPM Enabled Firmware Control Structure Flags
/// All other bits are reserved and must be set to 0.
///
#define EFI_ACPI_5_0_OSPM_64BIT_WAKE_F BIT0
//
// Differentiated System Description Table,
// Secondary System Description Table
// and Persistent System Description Table,
// no definition needed as they are common description table header, the same with
// EFI_ACPI_DESCRIPTION_HEADER, followed by a definition block.
//
///
/// Multiple APIC Description Table header definition. The rest of the table
/// must be defined in a platform specific manner.
///
typedef struct {
///
/// MADT Revision (as defined in ACPI 5.0 spec.)
///
///
/// Multiple APIC Flags
/// All other bits are reserved and must be set to 0.
///
#define EFI_ACPI_5_0_PCAT_COMPAT BIT0
//
// Multiple APIC Description Table APIC structure types
// All other values between 0x0D and 0x7F are reserved and
// will be ignored by OSPM. 0x80 ~ 0xFF are reserved for OEM.
//
#define EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC 0x00
#define EFI_ACPI_5_0_IO_APIC 0x01
#define EFI_ACPI_5_0_INTERRUPT_SOURCE_OVERRIDE 0x02
#define EFI_ACPI_5_0_NON_MASKABLE_INTERRUPT_SOURCE 0x03
#define EFI_ACPI_5_0_LOCAL_APIC_NMI 0x04
#define EFI_ACPI_5_0_LOCAL_APIC_ADDRESS_OVERRIDE 0x05
#define EFI_ACPI_5_0_IO_SAPIC 0x06
#define EFI_ACPI_5_0_LOCAL_SAPIC 0x07
#define EFI_ACPI_5_0_PLATFORM_INTERRUPT_SOURCES 0x08
#define EFI_ACPI_5_0_PROCESSOR_LOCAL_X2APIC 0x09
#define EFI_ACPI_5_0_LOCAL_X2APIC_NMI 0x0A
#define EFI_ACPI_5_0_GIC 0x0B
#define EFI_ACPI_5_0_GICD 0x0C
//
// APIC Structure Definitions
//
///
/// Processor Local APIC Structure Definition
///
typedef struct {
///
/// Local APIC Flags. All other bits are reserved and must be 0.
///
#define EFI_ACPI_5_0_LOCAL_APIC_ENABLED BIT0
///
/// IO APIC Structure
///
typedef struct {
///
/// Interrupt Source Override Structure
///
typedef struct {
///
/// Platform Interrupt Sources Structure Definition
///
typedef struct {
//
// MPS INTI flags.
// All other bits are reserved and must be set to 0.
//
#define EFI_ACPI_5_0_POLARITY (3 << 0)
///
/// Non-Maskable Interrupt Source Structure
///
typedef struct {
///
/// Local APIC NMI Structure
///
typedef struct {
///
/// Local APIC Address Override Structure
///
typedef struct {
///
/// IO SAPIC Structure
///
typedef struct {
///
/// Local SAPIC Structure
/// This struct followed by a null-terminated ASCII string - ACPI Processor UID String
///
typedef struct {
///
/// Platform Interrupt Sources Structure
///
typedef struct {
///
/// Platform Interrupt Source Flags.
/// All other bits are reserved and must be set to 0.
///
///
/// Processor Local x2APIC Structure Definition
///
typedef struct {
///
/// Local x2APIC NMI Structure
///
typedef struct {
///
/// GIC Structure
///
typedef struct {
///
/// GIC Flags. All other bits are reserved and must be 0.
///
#define EFI_ACPI_5_0_GIC_ENABLED BIT0
///
/// GIC Distributor Structure
///
typedef struct {
///
/// Smart Battery Description Table (SBST)
///
typedef struct {
///
/// SBST Version (as defined in ACPI 5.0 spec.)
///
///
/// Embedded Controller Boot Resources Table (ECDT)
/// The table is followed by a null terminated ASCII string that contains
/// a fully qualified reference to the name space object.
///
typedef struct {
///
/// ECDT Version (as defined in ACPI 5.0 spec.)
///
///
/// System Resource Affinity Table (SRAT). The rest of the table
/// must be defined in a platform specific manner.
///
typedef struct {
///
/// SRAT Version (as defined in ACPI 5.0 spec.)
///
#define EFI_ACPI_5_0_SYSTEM_RESOURCE_AFFINITY_TABLE_REVISION 0x03
//
// SRAT structure types.
// All other values between 0x03 an 0xFF are reserved and
// will be ignored by OSPM.
//
#define EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY 0x00
#define EFI_ACPI_5_0_MEMORY_AFFINITY 0x01
#define EFI_ACPI_5_0_PROCESSOR_LOCAL_X2APIC_AFFINITY 0x02
///
///
typedef struct {
///
///
#define EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED (1 << 0)
///
/// Memory Affinity Structure Definition
///
typedef struct {
//
// Memory Flags. All other bits are reserved and must be 0.
//
#define EFI_ACPI_5_0_MEMORY_ENABLED (1 << 0)
///
/// Processor Local x2APIC Affinity Structure Definition
///
typedef struct {
///
/// System Locality Distance Information Table (SLIT).
/// The rest of the table is a matrix.
///
typedef struct {
///
/// SLIT Version (as defined in ACPI 5.0 spec.)
///
///
/// Corrected Platform Error Polling Table (CPEP)
///
typedef struct {
///
/// CPEP Version (as defined in ACPI 5.0 spec.)
///
//
// CPEP processor structure types.
//
#define EFI_ACPI_5_0_CPEP_PROCESSOR_APIC_SAPIC 0x00
///
/// Corrected Platform Error Polling Processor Structure Definition
///
typedef struct {
///
/// Maximum System Characteristics Table (MSCT)
///
typedef struct {
///
/// MSCT Version (as defined in ACPI 5.0 spec.)
///
///
/// Maximum Proximity Domain Information Structure Definition
///
typedef struct {
///
/// ACPI RAS Feature Table definition.
///
typedef struct {
///
/// RASF Version (as defined in ACPI 5.0 spec.)
///
#define EFI_ACPI_5_0_RAS_FEATURE_TABLE_REVISION 0x01
///
/// ACPI RASF Platform Communication Channel Shared Memory Region definition.
///
typedef struct {
///
/// ACPI RASF PCC command code
///
///
/// ACPI RASF Platform RAS Capabilities
///
#define EFI_ACPI_5_0_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPOTED_AND_EXPOSED_TO_SOFTWARE 0x02
///
/// ACPI RASF Parameter Block structure for PATROL_SCRUB
///
typedef struct {
///
/// ACPI RASF Patrol Scrub command
///
///
/// Memory Power State Table definition.
///
typedef struct {
// Memory Power Node Structure
// Memory Power State Characteristics
///
/// MPST Version (as defined in ACPI 5.0 spec.)
///
#define EFI_ACPI_5_0_MEMORY_POWER_STATE_TABLE_REVISION 0x01
///
/// MPST Platform Communication Channel Shared Memory Region definition.
///
typedef struct {
///
/// ACPI MPST PCC command code
///
///
/// ACPI MPST Memory Power command
///
///
/// MPST Memory Power Node Table
///
typedef struct {
typedef struct {
//EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE MemoryPowerState[NumberOfPowerStates];
//UINT16 PhysicalComponentIdentifier[NumberOfPhysicalComponents];
#define EFI_ACPI_5_0_MPST_MEMORY_POWER_STRUCTURE_FLAG_ENABLE 0x01
typedef struct {
///
/// MPST Memory Power State Characteristics Table
///
typedef struct {
#define EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_MEMORY_CONTENT_PRESERVED 0x01
#define EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_ENTRY 0x02
#define EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_EXIT 0x04
typedef struct {
///
/// Memory Topology Table definition.
///
typedef struct {
///
/// PMTT Version (as defined in ACPI 5.0 spec.)
///
#define EFI_ACPI_5_0_MEMORY_TOPOLOGY_TABLE_REVISION 0x01
///
/// Common Memory Aggregator Device Structure.
///
typedef struct {
///
/// Memory Aggregator Device Type
///
///
/// Socket Memory Aggregator Device Structure.
///
typedef struct {
//EFI_ACPI_5_0_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE MemoryController[];
///
/// MemoryController Memory Aggregator Device Structure.
///
typedef struct {
//UINT32 ProximityDomain[NumberOfProximityDomains];
//EFI_ACPI_5_0_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE PhysicalComponent[];
///
/// DIMM Memory Aggregator Device Structure.
///
typedef struct {
///
/// Boot Graphics Resource Table definition.
///
typedef struct {
///
/// 2-bytes (16 bit) version ID. This value must be 1.
///
///
/// 1-byte status field indicating current status about the table.
/// Bits[7:1] = Reserved (must be zero)
/// Bit [0] = Valid. A one indicates the boot image graphic is valid.
///
///
/// 1-byte enumerated type field indicating format of the image.
/// 0 = Bitmap
/// 1 - 255 Reserved (for future use)
///
///
/// 8-byte (64 bit) physical address pointing to the firmware's in-memory copy
/// of the image bitmap.
///
///
/// A 4-byte (32-bit) unsigned long describing the display X-offset of the boot image.
/// (X, Y) display offset of the top left corner of the boot image.
/// The top left corner of the display is at offset (0, 0).
///
///
/// A 4-byte (32-bit) unsigned long describing the display Y-offset of the boot image.
/// (X, Y) display offset of the top left corner of the boot image.
/// The top left corner of the display is at offset (0, 0).
///
///
/// BGRT Revision
///
///
/// BGRT Version
///
#define EFI_ACPI_5_0_BGRT_VERSION 0x01
///
/// BGRT Status
///
#define EFI_ACPI_5_0_BGRT_STATUS_INVALID 0x00
#define EFI_ACPI_5_0_BGRT_STATUS_VALID 0x01
///
/// BGRT Image Type
///
#define EFI_ACPI_5_0_BGRT_IMAGE_TYPE_BMP 0x00
///
/// FPDT Version (as defined in ACPI 5.0 spec.)
///
///
/// FPDT Performance Record Types
///
#define EFI_ACPI_5_0_FPDT_RECORD_TYPE_FIRMWARE_BASIC_BOOT_POINTER 0x0000
#define EFI_ACPI_5_0_FPDT_RECORD_TYPE_S3_PERFORMANCE_TABLE_POINTER 0x0001
///
/// FPDT Performance Record Revision
///
///
/// FPDT Runtime Performance Record Types
///
#define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_TYPE_S3_RESUME 0x0000
#define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_TYPE_S3_SUSPEND 0x0001
#define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_TYPE_FIRMWARE_BASIC_BOOT 0x0002
///
/// FPDT Runtime Performance Record Revision
///
#define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_REVISION_S3_RESUME 0x01
#define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_REVISION_S3_SUSPEND 0x01
///
/// FPDT Performance Record header
///
typedef struct {
///
/// FPDT Performance Table header
///
typedef struct {
///
/// FPDT Firmware Basic Boot Performance Pointer Record Structure
///
typedef struct {
///
/// 64-bit processor-relative physical address of the Basic Boot Performance Table.
///
///
/// FPDT S3 Performance Table Pointer Record Structure
///
typedef struct {
///
/// 64-bit processor-relative physical address of the S3 Performance Table.
///
///
/// FPDT Firmware Basic Boot Performance Record Structure
///
typedef struct {
///
/// Timer value logged at the beginning of firmware image execution.
/// This may not always be zero or near zero.
///
///
/// Timer value logged just prior to loading the OS boot loader into memory.
/// For non-UEFI compatible boots, this field must be zero.
///
///
/// Timer value logged just prior to launching the previously loaded OS boot loader image.
/// For non-UEFI compatible boots, the timer value logged will be just prior
/// to the INT 19h handler invocation.
///
///
/// Timer value logged at the point when the OS loader calls the
/// ExitBootServices function for UEFI compatible firmware.
/// For non-UEFI compatible boots, this field must be zero.
///
///
/// Timer value logged at the point just prior towhen the OS loader gaining
/// control back from calls the ExitBootServices function for UEFI compatible firmware.
/// For non-UEFI compatible boots, this field must be zero.
///
///
/// FPDT Firmware Basic Boot Performance Table signature
///
//
// FPDT Firmware Basic Boot Performance Table
//
typedef struct {
//
// one or more Performance Records.
//
///
/// FPDT "S3PT" S3 Performance Table
///
//
// FPDT Firmware S3 Boot Performance Table
//
typedef struct {
//
// one or more Performance Records.
//
///
/// FPDT Basic S3 Resume Performance Record
///
typedef struct {
///
/// A count of the number of S3 resume cycles since the last full boot sequence.
///
///
/// Timer recorded at the end of BIOS S3 resume, just prior to handoff to the
/// OS waking vector. Only the most recent resume cycle's time is retained.
///
///
/// Average timer value of all resume cycles logged since the last full boot
/// sequence, including the most recent resume. Note that the entire log of
/// timer values does not need to be retained in order to calculate this average.
///
///
/// FPDT Basic S3 Suspend Performance Record
///
typedef struct {
///
/// Timer value recorded at the OS write to SLP_TYP upon entry to S3.
/// Only the most recent suspend cycle's timer value is retained.
///
///
/// Timer value recorded at the final firmware write to SLP_TYP (or other
/// mechanism) used to trigger hardware entry to S3.
/// Only the most recent suspend cycle's timer value is retained.
///
///
/// Firmware Performance Record Table definition.
///
typedef struct {
///
/// Generic Timer Description Table definition.
///
typedef struct {
///
/// GTDT Version (as defined in ACPI 5.0 spec.)
///
///
/// Global Flags. All other bits are reserved and must be 0.
///
///
/// Timer Flags. All other bits are reserved and must be 0.
///
///
/// Boot Error Record Table (BERT)
///
typedef struct {
///
/// BERT Version (as defined in ACPI 5.0 spec.)
///
#define EFI_ACPI_5_0_BOOT_ERROR_RECORD_TABLE_REVISION 0x01
///
/// Boot Error Region Block Status Definition
///
typedef struct {
///
/// Boot Error Region Definition
///
typedef struct {
//
// Boot Error Severity types
//
#define EFI_ACPI_5_0_ERROR_SEVERITY_CORRECTABLE 0x00
#define EFI_ACPI_5_0_ERROR_SEVERITY_FATAL 0x01
#define EFI_ACPI_5_0_ERROR_SEVERITY_CORRECTED 0x02
#define EFI_ACPI_5_0_ERROR_SEVERITY_NONE 0x03
///
/// Generic Error Data Entry Definition
///
typedef struct {
///
/// Generic Error Data Entry Version (as defined in ACPI 5.0 spec.)
///
#define EFI_ACPI_5_0_GENERIC_ERROR_DATA_ENTRY_REVISION 0x0201
///
/// HEST - Hardware Error Source Table
///
typedef struct {
///
/// HEST Version (as defined in ACPI 5.0 spec.)
///
#define EFI_ACPI_5_0_HARDWARE_ERROR_SOURCE_TABLE_REVISION 0x01
//
// Error Source structure types.
//
#define EFI_ACPI_5_0_IA32_ARCHITECTURE_NMI_ERROR 0x02
#define EFI_ACPI_5_0_PCI_EXPRESS_ROOT_PORT_AER 0x06
#define EFI_ACPI_5_0_PCI_EXPRESS_DEVICE_AER 0x07
#define EFI_ACPI_5_0_PCI_EXPRESS_BRIDGE_AER 0x08
#define EFI_ACPI_5_0_GENERIC_HARDWARE_ERROR 0x09
//
// Error Source structure flags.
//
#define EFI_ACPI_5_0_ERROR_SOURCE_FLAG_FIRMWARE_FIRST (1 << 0)
///
/// IA-32 Architecture Machine Check Exception Structure Definition
///
typedef struct {
///
/// IA-32 Architecture Machine Check Bank Structure Definition
///
typedef struct {
///
/// IA-32 Architecture Machine Check Bank Structure MCA data format
///
//
// Hardware Error Notification types. All other values are reserved
//
#define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_POLLED 0x00
#define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_SCI 0x03
#define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_NMI 0x04
///
/// Hardware Error Notification Configuration Write Enable Structure Definition
///
typedef struct {
///
/// Hardware Error Notification Structure Definition
///
typedef struct {
EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE ConfigurationWriteEnable;
///
/// IA-32 Architecture Corrected Machine Check Structure Definition
///
typedef struct {
///
/// IA-32 Architecture NMI Error Structure Definition
///
typedef struct {
///
/// PCI Express Root Port AER Structure Definition
///
typedef struct {
///
/// PCI Express Device AER Structure Definition
///
typedef struct {
///
/// PCI Express Bridge AER Structure Definition
///
typedef struct {
///
/// Generic Hardware Error Source Structure Definition
///
typedef struct {
///
/// Generic Error Status Definition
///
typedef struct {
///
/// ERST - Error Record Serialization Table
///
typedef struct {
///
/// ERST Version (as defined in ACPI 5.0 spec.)
///
///
/// ERST Serialization Actions
///
#define EFI_ACPI_5_0_ERST_BEGIN_WRITE_OPERATION 0x00
#define EFI_ACPI_5_0_ERST_BEGIN_READ_OPERATION 0x01
#define EFI_ACPI_5_0_ERST_BEGIN_CLEAR_OPERATION 0x02
#define EFI_ACPI_5_0_ERST_END_OPERATION 0x03
#define EFI_ACPI_5_0_ERST_SET_RECORD_OFFSET 0x04
#define EFI_ACPI_5_0_ERST_EXECUTE_OPERATION 0x05
#define EFI_ACPI_5_0_ERST_CHECK_BUSY_STATUS 0x06
#define EFI_ACPI_5_0_ERST_GET_COMMAND_STATUS 0x07
#define EFI_ACPI_5_0_ERST_GET_RECORD_IDENTIFIER 0x08
#define EFI_ACPI_5_0_ERST_SET_RECORD_IDENTIFIER 0x09
#define EFI_ACPI_5_0_ERST_GET_RECORD_COUNT 0x0A
#define EFI_ACPI_5_0_ERST_BEGIN_DUMMY_WRITE_OPERATION 0x0B
#define EFI_ACPI_5_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE 0x0D
#define EFI_ACPI_5_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE_LENGTH 0x0E
///
/// ERST Action Command Status
///
#define EFI_ACPI_5_0_ERST_STATUS_SUCCESS 0x00
#define EFI_ACPI_5_0_ERST_STATUS_NOT_ENOUGH_SPACE 0x01
#define EFI_ACPI_5_0_ERST_STATUS_HARDWARE_NOT_AVAILABLE 0x02
#define EFI_ACPI_5_0_ERST_STATUS_FAILED 0x03
#define EFI_ACPI_5_0_ERST_STATUS_RECORD_STORE_EMPTY 0x04
#define EFI_ACPI_5_0_ERST_STATUS_RECORD_NOT_FOUND 0x05
///
/// ERST Serialization Instructions
///
#define EFI_ACPI_5_0_ERST_READ_REGISTER 0x00
#define EFI_ACPI_5_0_ERST_READ_REGISTER_VALUE 0x01
#define EFI_ACPI_5_0_ERST_WRITE_REGISTER 0x02
#define EFI_ACPI_5_0_ERST_WRITE_REGISTER_VALUE 0x03
#define EFI_ACPI_5_0_ERST_NOOP 0x04
#define EFI_ACPI_5_0_ERST_LOAD_VAR1 0x05
#define EFI_ACPI_5_0_ERST_LOAD_VAR2 0x06
#define EFI_ACPI_5_0_ERST_STORE_VAR1 0x07
#define EFI_ACPI_5_0_ERST_ADD 0x08
#define EFI_ACPI_5_0_ERST_SUBTRACT 0x09
#define EFI_ACPI_5_0_ERST_ADD_VALUE 0x0A
#define EFI_ACPI_5_0_ERST_SUBTRACT_VALUE 0x0B
#define EFI_ACPI_5_0_ERST_STALL 0x0C
#define EFI_ACPI_5_0_ERST_STALL_WHILE_TRUE 0x0D
#define EFI_ACPI_5_0_ERST_SKIP_NEXT_INSTRUCTION_IF_TRUE 0x0E
#define EFI_ACPI_5_0_ERST_GOTO 0x0F
#define EFI_ACPI_5_0_ERST_SET_SRC_ADDRESS_BASE 0x10
#define EFI_ACPI_5_0_ERST_SET_DST_ADDRESS_BASE 0x11
#define EFI_ACPI_5_0_ERST_MOVE_DATA 0x12
///
/// ERST Instruction Flags
///
#define EFI_ACPI_5_0_ERST_PRESERVE_REGISTER 0x01
///
/// ERST Serialization Instruction Entry
///
typedef struct {
///
/// EINJ - Error Injection Table
///
typedef struct {
///
/// EINJ Version (as defined in ACPI 5.0 spec.)
///
#define EFI_ACPI_5_0_ERROR_INJECTION_TABLE_REVISION 0x01
///
/// EINJ Error Injection Actions
///
#define EFI_ACPI_5_0_EINJ_BEGIN_INJECTION_OPERATION 0x00
#define EFI_ACPI_5_0_EINJ_GET_TRIGGER_ERROR_ACTION_TABLE 0x01
#define EFI_ACPI_5_0_EINJ_SET_ERROR_TYPE 0x02
#define EFI_ACPI_5_0_EINJ_GET_ERROR_TYPE 0x03
#define EFI_ACPI_5_0_EINJ_END_OPERATION 0x04
#define EFI_ACPI_5_0_EINJ_EXECUTE_OPERATION 0x05
#define EFI_ACPI_5_0_EINJ_CHECK_BUSY_STATUS 0x06
#define EFI_ACPI_5_0_EINJ_GET_COMMAND_STATUS 0x07
#define EFI_ACPI_5_0_EINJ_TRIGGER_ERROR 0xFF
///
/// EINJ Action Command Status
///
#define EFI_ACPI_5_0_EINJ_STATUS_SUCCESS 0x00
#define EFI_ACPI_5_0_EINJ_STATUS_UNKNOWN_FAILURE 0x01
#define EFI_ACPI_5_0_EINJ_STATUS_INVALID_ACCESS 0x02
///
/// EINJ Error Type Definition
///
#define EFI_ACPI_5_0_EINJ_ERROR_PROCESSOR_CORRECTABLE (1 << 0)
///
/// EINJ Injection Instructions
///
#define EFI_ACPI_5_0_EINJ_READ_REGISTER 0x00
#define EFI_ACPI_5_0_EINJ_READ_REGISTER_VALUE 0x01
#define EFI_ACPI_5_0_EINJ_WRITE_REGISTER 0x02
#define EFI_ACPI_5_0_EINJ_WRITE_REGISTER_VALUE 0x03
#define EFI_ACPI_5_0_EINJ_NOOP 0x04
///
/// EINJ Instruction Flags
///
#define EFI_ACPI_5_0_EINJ_PRESERVE_REGISTER 0x01
///
/// EINJ Injection Instruction Entry
///
typedef struct {
///
/// EINJ Trigger Action Table
///
typedef struct {
///
/// Platform Communications Channel Table (PCCT)
///
typedef struct {
///
/// PCCT Version (as defined in ACPI 5.0 spec.)
///
///
/// PCCT Global Flags
///
//
// PCCT Subspace type
//
#define EFI_ACPI_5_0_PCCT_SUBSPACE_TYPE_GENERIC 0x00
///
/// PCC Subspace Structure Header
///
typedef struct {
///
/// Generic Communications Subspace Structure
///
typedef struct {
///
/// Generic Communications Channel Shared Memory Region
///
typedef struct {
typedef struct {
typedef struct {
//
// Known table signatures
//
///
/// "RSD PTR " Root System Description Pointer
///
#define EFI_ACPI_5_0_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE SIGNATURE_64('R', 'S', 'D', ' ', 'P', 'T', 'R', ' ')
///
/// "APIC" Multiple APIC Description Table
///
///
/// "BERT" Boot Error Record Table
///
///
/// "BGRT" Boot Graphics Resource Table
///
///
/// "CPEP" Corrected Platform Error Polling Table
///
#define EFI_ACPI_5_0_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_SIGNATURE SIGNATURE_32('C', 'P', 'E', 'P')
///
/// "DSDT" Differentiated System Description Table
///
#define EFI_ACPI_5_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('D', 'S', 'D', 'T')
///
/// "ECDT" Embedded Controller Boot Resources Table
///
#define EFI_ACPI_5_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE SIGNATURE_32('E', 'C', 'D', 'T')
///
/// "EINJ" Error Injection Table
///
///
/// "ERST" Error Record Serialization Table
///
///
/// "FACP" Fixed ACPI Description Table
///
///
/// "FACS" Firmware ACPI Control Structure
///
///
/// "FPDT" Firmware Performance Data Table
///
///
/// "GTDT" Generic Timer Description Table
///
///
/// "HEST" Hardware Error Source Table
///
///
/// "MPST" Memory Power State Table
///
///
/// "MSCT" Maximum System Characteristics Table
///
#define EFI_ACPI_5_0_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'C', 'T')
///
/// "PMTT" Platform Memory Topology Table
///
///
/// "PSDT" Persistent System Description Table
///
///
/// "RASF" ACPI RAS Feature Table
///
///
/// "RSDT" Root System Description Table
///
///
/// "SBST" Smart Battery Specification Table
///
///
/// "SLIT" System Locality Information Table
///
///
/// "SRAT" System Resource Affinity Table
///
///
/// "SSDT" Secondary System Description Table
///
///
/// "XSDT" Extended System Description Table
///
///
/// "BOOT" MS Simple Boot Spec
///
///
/// "CSRT" MS Core System Resource Table
///
///
/// "DBG2" MS Debug Port 2 Spec
///
///
/// "DBGP" MS Debug Port Spec
///
///
/// "DMAR" DMA Remapping Table
///
///
/// "ETDT" Event Timer Description Table
///
///
/// "HPET" IA-PC High Precision Event Timer Table
///
///
/// "iBFT" iSCSI Boot Firmware Table
///
///
/// "IVRS" I/O Virtualization Reporting Structure
///
#define EFI_ACPI_5_0_IO_VIRTUALIZATION_REPORTING_STRUCTURE_SIGNATURE SIGNATURE_32('I', 'V', 'R', 'S')
///
/// "MCFG" PCI Express Memory Mapped Configuration Space Base Address Description Table
///
#define EFI_ACPI_5_0_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'F', 'G')
///
/// "MCHI" Management Controller Host Interface Table
///
#define EFI_ACPI_5_0_MANAGEMENT_CONTROLLER_HOST_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'H', 'I')
///
/// "MSDM" MS Data Management Table
///
///
/// "SLIC" MS Software Licensing Table Specification
///
///
/// "SPCR" Serial Port Concole Redirection Table
///
#define EFI_ACPI_5_0_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'C', 'R')
///
/// "SPMI" Server Platform Management Interface Table
///
#define EFI_ACPI_5_0_SERVER_PLATFORM_MANAGEMENT_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'M', 'I')
///
/// "TCPA" Trusted Computing Platform Alliance Capabilities Table
///
#define EFI_ACPI_5_0_TRUSTED_COMPUTING_PLATFORM_ALLIANCE_CAPABILITIES_TABLE_SIGNATURE SIGNATURE_32('T', 'C', 'P', 'A')
///
/// "TPM2" Trusted Computing Platform 1 Table
///
///
/// "UEFI" UEFI ACPI Data Table
///
///
/// "WAET" Windows ACPI Enlightenment Table
///
///
/// "WDAT" Watchdog Action Table
///
///
/// "WDRT" Watchdog Resource Table
///
///
/// "WPBT" MS Platform Binary Table
///
#pragma pack()
#endif