Acpi20.h revision 4fd606d1f5abe38e1f42c38de1d2e895166bd0f4
/** @file
ACPI 2.0 definitions from the ACPI Specification, revision 2.0
Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef _ACPI_2_0_H_
#define _ACPI_2_0_H_
#include <IndustryStandard/Acpi10.h>
//
// Define for Desriptor
//
#define ACPI_LARGE_GENERIC_REGISTER_DESCRIPTOR_NAME 0x02
#define ACPI_GENERIC_REGISTER_DESCRIPTOR 0x82
//
// Ensure proper structure formats
//
#pragma pack(1)
///
/// Generic Register Descriptor
///
typedef PACKED struct {
#pragma pack()
//
// Ensure proper structure formats
//
#pragma pack(1)
///
/// ACPI 2.0 Generic Address Space definition
///
typedef struct {
//
// Generic Address Space Address IDs
//
#define EFI_ACPI_2_0_SYSTEM_MEMORY 0
#define EFI_ACPI_2_0_SYSTEM_IO 1
#define EFI_ACPI_2_0_PCI_CONFIGURATION_SPACE 2
#define EFI_ACPI_2_0_EMBEDDED_CONTROLLER 3
#define EFI_ACPI_2_0_SMBUS 4
#define EFI_ACPI_2_0_FUNCTIONAL_FIXED_HARDWARE 0x7F
//
// ACPI 2.0 table structures
//
///
/// Root System Description Pointer Structure
///
typedef struct {
///
/// RSD_PTR Revision (as defined in ACPI 2.0 spec.)
///
///
/// Common table header, this prefaces all ACPI tables, including FACS, but
/// excluding the RSD PTR structure
///
typedef struct {
//
// Root System Description Table
// No definition needed as it is a common description table header, the same with
// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT32 table pointers.
//
///
/// RSDT Revision (as defined in ACPI 2.0 spec.)
///
#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
//
// Extended System Description Table
// No definition needed as it is a common description table header, the same with
// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT64 table pointers.
//
///
/// XSDT Revision (as defined in ACPI 2.0 spec.)
///
///
/// Fixed ACPI Description Table Structure (FADT)
///
typedef struct {
///
/// FADT Version (as defined in ACPI 2.0 spec.)
///
#define EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x03
//
// Fixed ACPI Description Table Preferred Power Management Profile
//
#define EFI_ACPI_2_0_PM_PROFILE_UNSPECIFIED 0
#define EFI_ACPI_2_0_PM_PROFILE_DESKTOP 1
#define EFI_ACPI_2_0_PM_PROFILE_MOBILE 2
#define EFI_ACPI_2_0_PM_PROFILE_WORKSTATION 3
#define EFI_ACPI_2_0_PM_PROFILE_SOHO_SERVER 5
#define EFI_ACPI_2_0_PM_PROFILE_APPLIANCE_PC 6
//
// Fixed ACPI Description Table Boot Architecture Flags
// All other bits are reserved and must be set to 0.
//
#define EFI_ACPI_2_0_LEGACY_DEVICES BIT0
#define EFI_ACPI_2_0_8042 BIT1
//
// Fixed ACPI Description Table Fixed Feature Flags
// All other bits are reserved and must be set to 0.
//
#define EFI_ACPI_2_0_WBINVD BIT0
#define EFI_ACPI_2_0_WBINVD_FLUSH BIT1
#define EFI_ACPI_2_0_PROC_C1 BIT2
#define EFI_ACPI_2_0_P_LVL2_UP BIT3
#define EFI_ACPI_2_0_PWR_BUTTON BIT4
#define EFI_ACPI_2_0_SLP_BUTTON BIT5
#define EFI_ACPI_2_0_FIX_RTC BIT6
#define EFI_ACPI_2_0_RTC_S4 BIT7
#define EFI_ACPI_2_0_TMR_VAL_EXT BIT8
#define EFI_ACPI_2_0_DCK_CAP BIT9
#define EFI_ACPI_2_0_RESET_REG_SUP BIT10
#define EFI_ACPI_2_0_SEALED_CASE BIT11
#define EFI_ACPI_2_0_HEADLESS BIT12
#define EFI_ACPI_2_0_CPU_SW_SLP BIT13
///
/// Firmware ACPI Control Structure
///
typedef struct {
///
/// FACS Version (as defined in ACPI 2.0 spec.)
///
#define EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION 0x01
///
/// Firmware Control Structure Feature Flags
/// All other bits are reserved and must be set to 0.
///
#define EFI_ACPI_2_0_S4BIOS_F BIT0
///
/// Multiple APIC Description Table header definition. The rest of the table
/// must be defined in a platform specific manner.
///
typedef struct {
///
/// MADT Revision (as defined in ACPI 2.0 spec.)
///
///
/// Multiple APIC Flags
/// All other bits are reserved and must be set to 0.
///
#define EFI_ACPI_2_0_PCAT_COMPAT BIT0
//
// Multiple APIC Description Table APIC structure types
// All other values between 0x09 an 0xFF are reserved and
// will be ignored by OSPM.
//
#define EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC 0x00
#define EFI_ACPI_2_0_IO_APIC 0x01
#define EFI_ACPI_2_0_INTERRUPT_SOURCE_OVERRIDE 0x02
#define EFI_ACPI_2_0_NON_MASKABLE_INTERRUPT_SOURCE 0x03
#define EFI_ACPI_2_0_LOCAL_APIC_NMI 0x04
#define EFI_ACPI_2_0_LOCAL_APIC_ADDRESS_OVERRIDE 0x05
#define EFI_ACPI_2_0_IO_SAPIC 0x06
#define EFI_ACPI_2_0_PROCESSOR_LOCAL_SAPIC 0x07
#define EFI_ACPI_2_0_PLATFORM_INTERRUPT_SOURCES 0x08
//
// APIC Structure Definitions
//
///
/// Processor Local APIC Structure Definition
///
typedef struct {
///
/// Local APIC Flags. All other bits are reserved and must be 0.
///
#define EFI_ACPI_2_0_LOCAL_APIC_ENABLED BIT0
///
/// IO APIC Structure
///
typedef struct {
///
/// Interrupt Source Override Structure
///
typedef struct {
///
/// Non-Maskable Interrupt Source Structure
///
typedef struct {
///
/// Local APIC NMI Structure
///
typedef struct {
///
/// Local APIC Address Override Structure
///
typedef struct {
///
/// IO SAPIC Structure
///
typedef struct {
///
/// Local SAPIC Structure
///
typedef struct {
///
/// Platform Interrupt Sources Structure
///
typedef struct {
///
/// Smart Battery Description Table (SBST)
///
typedef struct {
///
/// SBST Version (as defined in ACPI 2.0 spec.)
///
///
/// Embedded Controller Boot Resources Table (ECDT)
/// The table is followed by a null terminated ASCII string that contains
/// a fully qualified reference to the name space object.
///
typedef struct {
///
/// ECDT Version (as defined in ACPI 2.0 spec.)
///
//
// Known table signatures
//
///
/// "RSD PTR " Root System Description Pointer
///
#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE SIGNATURE_64('R', 'S', 'D', ' ', 'P', 'T', 'R', ' ')
///
/// "SPIC" Multiple SAPIC Description Table
///
/// BUGBUG: Don't know where this came from except SR870BN4 uses it.
/// #define EFI_ACPI_2_0_MULTIPLE_SAPIC_DESCRIPTION_TABLE_SIGNATURE 0x43495053
///
///
/// "BOOT" MS Simple Boot Spec
///
///
/// "DBGP" MS Bebug Port Spec
///
///
/// "DSDT" Differentiated System Description Table
///
#define EFI_ACPI_2_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('D', 'S', 'D', 'T')
///
/// "ECDT" Embedded Controller Boot Resources Table
///
#define EFI_ACPI_2_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE SIGNATURE_32('E', 'C', 'D', 'T')
///
/// "ETDT" Event Timer Description Table
///
///
/// "FACS" Firmware ACPI Control Structure
///
///
/// "FACP" Fixed ACPI Description Table
///
///
/// "APIC" Multiple APIC Description Table
///
///
/// "PSDT" Persistent System Description Table
///
///
/// "RSDT" Root System Description Table
///
///
/// "SBST" Smart Battery Specification Table
///
///
/// "SLIT" System Locality Information Table
///
///
/// "SPCR" Serial Port Concole Redirection Table
///
#define EFI_ACPI_2_0_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'C', 'R')
///
/// "SRAT" Static Resource Affinity Table
///
///
/// "SSDT" Secondary System Description Table
///
///
/// "SPMI" Server Platform Management Interface Table
///
#define EFI_ACPI_2_0_SERVER_PLATFORM_MANAGEMENT_INTERFACE_SIGNATURE SIGNATURE_32('S', 'P', 'M', 'I')
///
/// "XSDT" Extended System Description Table
///
///
/// "MCFG" PCI Express Memory Mapped Configuration Space Base Address Description Table
///
#define EFI_ACPI_2_0_MEMORY_MAPPED_CONFIGURATION_BASE_ADDRESS_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'F', 'G')
#pragma pack()
#endif