PciCommand.c revision 4fd606d1f5abe38e1f42c38de1d2e895166bd0f4
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync PCI command register operations supporting functions implementation for PCI Bus module.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsyncCopyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsyncThis program and the accompanying materials
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsyncare licensed and made available under the terms and conditions of the BSD License
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsyncwhich accompanies this distribution. The full text of the license may be found at
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsyncTHE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsyncWITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Operate the PCI register via PciIo function interface.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param PciIoDevice Pointer to instance of PCI_IO_DEVICE.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param Command Operator command.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param Offset The address within the PCI configuration space for the PCI controller.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param Operation Type of Operation.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param PtrCommand Return buffer holding old PCI command, if operation is not EFI_SET_REGISTER.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @return Status of PciIo operation.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Check the cpability supporting by given device.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param PciIoDevice Pointer to instance of PCI_IO_DEVICE.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @retval TRUE Cpability supportted.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @retval FALSE Cpability not supportted.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync if ((PciIoDevice->Pci.Hdr.Status & EFI_PCI_STATUS_CAPABILITY) != 0) {
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Locate capability register block per capability ID.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param PciIoDevice A pointer to the PCI_IO_DEVICE.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param CapId The capability ID.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param Offset A pointer to the offset returned.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param NextRegBlock A pointer to the next block returned.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @retval EFI_SUCCESS Successfuly located capability register block.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @retval EFI_UNSUPPORTED Pci device does not support capability.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @retval EFI_NOT_FOUND Pci device support but can not find register block.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // To check the cpability of this device supports
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync if (*Offset != 0) {
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync while ((CapabilityPtr >= 0x40) && ((CapabilityPtr & 0x03) == 0x00)) {
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync Locate PciExpress capability register block per capability ID.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param PciIoDevice A pointer to the PCI_IO_DEVICE.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param CapId The capability ID.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param Offset A pointer to the offset returned.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @param NextRegBlock A pointer to the next block returned.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @retval EFI_SUCCESS Successfuly located capability register block.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @retval EFI_UNSUPPORTED Pci device does not support capability.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync @retval EFI_NOT_FOUND Pci device support but can not find register block.
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // To check the capability of this device supports
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync if (*Offset != 0) {
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync while (CapabilityPtr != 0) {
4fd606d1f5abe38e1f42c38de1d2e895166bd0f4vboxsync // Mask it to DWORD alignment per PCI spec