EhciReg.c revision 4fd606d1f5abe38e1f42c38de1d2e895166bd0f4
/** @file
The EHCI register operation routines.
Copyright (c) 2007 - 2012, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include "Ehci.h"
/**
Read EHCI capability register.
@param Ehc The EHCI device.
@param Offset Capability register address.
@return The register content read.
@retval If err, return 0xffff.
**/
)
{
1,
&Data
);
Data = 0xFFFF;
}
return Data;
}
/**
Read EHCI debug port register.
@param Ehc The EHCI device.
@param Offset Debug port register offset.
@return The register content read.
@retval If err, return 0xffff.
**/
)
{
1,
&Data
);
Data = 0xFFFF;
}
return Data;
}
/**
Read EHCI Operation register.
@param Ehc The EHCI device.
@param Offset The operation register offset.
@return The register content read.
@retval If err, return 0xffff.
**/
)
{
1,
&Data
);
Data = 0xFFFF;
}
return Data;
}
/**
Write the data to the EHCI operation register.
@param Ehc The EHCI device.
@param Offset EHCI operation register offset.
@param Data The data to write.
**/
)
{
1,
&Data
);
}
}
/**
Set one bit of the operational register while keeping other bits.
@param Ehc The EHCI device.
@param Offset The offset of the operational register.
@param Bit The bit mask of the register to set.
**/
)
{
}
/**
Clear one bit of the operational register while keeping other bits.
@param Ehc The EHCI device.
@param Offset The offset of the operational register.
@param Bit The bit mask of the register to clear.
**/
)
{
}
/**
Wait the operation register's bit as specified by Bit
to become set (or clear).
@param Ehc The EHCI device.
@param Offset The offset of the operation register.
@param Bit The bit of the register to wait for.
@param WaitToSet Wait the bit to set or clear.
@param Timeout The time to wait before abort (in millisecond).
@retval EFI_SUCCESS The bit successfully changed by host controller.
@retval EFI_TIMEOUT The time out occurred.
**/
)
{
return EFI_SUCCESS;
}
}
return EFI_TIMEOUT;
}
/**
Add support for UEFI Over Legacy (UoL) feature, stop
the legacy USB SMI support.
@param Ehc The EHCI device.
**/
)
{
TimeOut = 40;
while (TimeOut-- != 0) {
break;
}
}
}
/**
Set door bell and wait it to be ACKed by host controller.
This function is used to synchronize with the hardware.
@param Ehc The EHCI device.
@param Timeout The time to wait before abort (in millisecond, ms).
@retval EFI_SUCCESS Synchronized with the hardware.
@retval EFI_TIMEOUT Time out happened while waiting door bell to set.
**/
)
{
//
// ACK the IAA bit in USBSTS register. Make sure other
// interrupt bits are not ACKed. These bits are WC (Write Clean).
//
Data &= ~USBSTS_INTACK_MASK;
Data |= USBSTS_IAA;
return Status;
}
/**
Clear all the interrutp status bits, these bits
are Write-Clean.
@param Ehc The EHCI device.
**/
)
{
}
/**
Enable the periodic schedule then wait EHC to
actually enable it.
@param Ehc The EHCI device.
@param Timeout The time to wait before abort (in millisecond, ms).
@retval EFI_SUCCESS The periodical schedule is enabled.
@retval EFI_TIMEOUT Time out happened while enabling periodic schedule.
**/
)
{
return Status;
}
/**
Disable periodic schedule.
@param Ehc The EHCI device.
@param Timeout Time to wait before abort (in millisecond, ms).
@retval EFI_SUCCESS Periodic schedule is disabled.
@retval EFI_DEVICE_ERROR Fail to disable periodic schedule.
**/
)
{
return Status;
}
/**
Enable asynchrounous schedule.
@param Ehc The EHCI device.
@param Timeout Time to wait before abort.
@retval EFI_SUCCESS The EHCI asynchronous schedule is enabled.
@return Others Failed to enable the asynchronous scheudle.
**/
)
{
return Status;
}
/**
Disable asynchrounous schedule.
@param Ehc The EHCI device.
@param Timeout Time to wait before abort (in millisecond, ms).
@retval EFI_SUCCESS The asynchronous schedule is disabled.
@return Others Failed to disable the asynchronous schedule.
**/
)
{
return Status;
}
/**
Whether Ehc is halted.
@param Ehc The EHCI device.
@retval TRUE The controller is halted.
@retval FALSE It isn't halted.
**/
)
{
}
/**
Whether system error occurred.
@param Ehc The EHCI device.
@return TRUE System error happened.
@return FALSE No system error.
**/
)
{
}
/**
Reset the host controller.
@param Ehc The EHCI device.
@param Timeout Time to wait before abort (in millisecond, ms).
@retval EFI_SUCCESS The host controller is reset.
@return Others Failed to reset the host.
**/
)
{
//
// Host can only be reset when it is halt. If not so, halt it
//
return Status;
}
}
return Status;
}
/**
Halt the host controller.
@param Ehc The EHCI device.
@param Timeout Time to wait before abort.
@retval EFI_SUCCESS The EHCI is halt.
@retval EFI_TIMEOUT Failed to halt the controller before Timeout.
**/
)
{
return Status;
}
/**
Set the EHCI to run.
@param Ehc The EHCI device.
@param Timeout Time to wait before abort.
@retval EFI_SUCCESS The EHCI is running.
@return Others Failed to set the EHCI to run.
**/
EhcRunHC (
)
{
return Status;
}
/**
Initialize the HC hardware.
EHCI spec lists the five things to do to initialize the hardware:
1. Program CTRLDSSEGMENT
2. Set USBINTR to enable interrupts
3. Set periodic list base
4. Set USBCMD, interrupt threshold, frame list size etc
5. Write 1 to CONFIGFLAG to route all ports to EHCI
@param Ehc The EHCI device.
@return EFI_SUCCESS The EHCI has come out of halt state.
@return EFI_TIMEOUT Time out happened.
**/
)
{
// This ASSERT crashes the BeagleBoard. There is some issue in the USB stack.
// This ASSERT needs to be removed so the BeagleBoard will boot. When we fix
// the USB stack we can put this ASSERT back in
// ASSERT (EhcIsHalt (Ehc));
//
// Allocate the periodic frame and associated memeory
// management facilities if not already done.
//
EhcFreeSched (Ehc);
}
return Status;
}
//
// 1. Clear USBINTR to disable all the interrupt. UEFI works by polling
//
//
// 2. Start the Host Controller
//
//
// 3. Power up all ports if EHCI has Port Power Control (PPC) support
//
}
}
//
// Wait roothub port power stable
//
//
// 4. Set all ports routing to EHC
//
return Status;
}
return Status;
}
return EFI_SUCCESS;
}