MsixCommon.cpp revision c4159ccabc1c97ff09d2d128e6e3a2b578b31af4
/* $Id$ */
/** @file
* MSI-X support routines
*/
/*
* Copyright (C) 2010 Oracle Corporation
*
* This file is part of VirtualBox Open Source Edition (OSE), as
* available from http://www.virtualbox.org. This file is free software;
* General Public License (GPL) as published by the Free Software
* Foundation, in version 2 as it comes in the "COPYING" file of the
* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
*/
#define LOG_GROUP LOG_GROUP_DEV_PCI
/* Hack to get PCIDEVICEINT declare at the right point - include "PCIInternal.h". */
#define PCI_INCLUDE_PRIVATE
#include "MsiCommon.h"
#pragma pack(1)
typedef struct {
#pragma pack()
{
}
{
}
{
}
{
}
{
}
{
}
{
}
{
}
{
}
{
}
{
}
{
}
{
}
static void msixCheckPendingVector(PPDMDEVINS pDevIns, PCPDMPCIHLP pPciHlp, PPCIDEVICE pDev, uint32_t iVector)
{
}
#ifdef IN_RING3
PDMBOTHCBDECL(int) msixMMIORead(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void *pv, unsigned cb)
{
/// @todo: qword accesses?
("MSI-X must be accessed with 4-byte reads"),
return VINF_SUCCESS;
}
PDMBOTHCBDECL(int) msixMMIOWrite(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void *pv, unsigned cb)
{
/// @todo: qword accesses?
("MSI-X must be accessed with 4-byte reads"),
msixCheckPendingVector(pDevIns, (PCPDMPCIHLP)pPciDev->Int.s.pPciBusPtrR3, pPciDev, off / VBOX_MSIX_ENTRY_SIZE);
return VINF_SUCCESS;
}
{
if (RT_FAILURE(rc))
return rc;
return VINF_SUCCESS;
}
{
if (pMsiReg->cMsixVectors == 0)
return VINF_SUCCESS;
if (cVectors > VBOX_MSIX_MAX_ENTRIES)
return VERR_TOO_MUCH_DATA;
if (iBar > 5)
return VERR_INVALID_PARAMETER;
int rc;
if (RT_FAILURE (rc))
return rc;
return VERR_NO_VM_MEMORY;
/* R3 PCI helper */
return VINF_SUCCESS;
}
#endif
{
}
{
/* We only trigger MSI-X on level up */
if ((iLevel & PDM_IRQ_LEVEL_HIGH) == 0)
{
return;
}
// if this vector is somehow disabled
{
// mark pending bit
return;
}
// clear pending bit
}
{
}
{
}
void MsixPciConfigWrite(PPDMDEVINS pDevIns, PCPDMPCIHLP pPciHlp, PPCIDEVICE pDev, uint32_t u32Address, uint32_t val, unsigned len)
{
bool fJustEnabled = false;
{
switch (reg)
{
case 0: /* Capability ID, ro */
case 1: /* Next pointer, ro */
break;
/* don't change read-only bits: 0-7 */
break;
case VBOX_MSIX_CAP_MESSAGE_CONTROL + 1:
{
/* don't change read-only bits 8-13 */
/* If just enabled globally - check pending vectors */
fJustEnabled |= msixBitJustCleared(pDev->config[uAddr], u8NewVal, VBOX_PCI_MSIX_FLAGS_FUNCMASK >> 8);
break;
}
default:
/* other fields read-only too */
break;
}
uAddr++;
val >>= 8;
}
if (fJustEnabled)
}
{
switch (len)
{
case 1:
break;
case 2:
break;
case 4:
break;
default:
Assert(false);
}
return rv;
}