DevIchHdaCodec.cpp revision 307a7d6149fc07e6bb75bf04f38ef1195c791268
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync * DevIchHdaCodec - VBox ICH Intel HD Audio Codec.
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync * Implemented against "Intel I/O Controller Hub 6 (ICH6) High Definition
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync * Audio / AC '97 - Programmer's Reference Manual (PRM)", document number
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync * 302349-003.
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync * Copyright (C) 2006-2014 Oracle Corporation
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync * This file is part of VirtualBox Open Source Edition (OSE), as
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync * available from http://www.virtualbox.org. This file is free software;
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync * you can redistribute it and/or modify it under the terms of the GNU
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync * General Public License (GPL) as published by the Free Software
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync * Foundation, in version 2 as it comes in the "COPYING" file of the
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync/*******************************************************************************
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync* Header Files *
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync*******************************************************************************/
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync//#define LOG_GROUP LOG_GROUP_DEV_AUDIO
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsyncextern "C" {
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync/*******************************************************************************
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync* Defined Constants And Macros *
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync*******************************************************************************/
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync/* PRM 5.3.1 */
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync/** Codec address mask. */
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync/** Codec address shift. */
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync/** Node ID mask. */
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync/** Node ID shift. */
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync#define CODEC_CAD(cmd) (((cmd) & CODEC_CAD_MASK) >> CODEC_CAD_SHIFT)
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync#define CODEC_DIRECT(cmd) ((cmd) & CODEC_DIRECT_MASK)
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync#define CODEC_NID(cmd) ((((cmd) & CODEC_NID_MASK)) >> CODEC_NID_SHIFT)
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync#define CODEC_VERBDATA(cmd) ((cmd) & CODEC_VERBDATA_MASK)
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync#define CODEC_VERB_CMD(cmd, mask, x) (((cmd) & (mask)) >> (x))
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync#define CODEC_VERB_CMD4(cmd) (CODEC_VERB_CMD((cmd), CODEC_VERB_4BIT_CMD, 4))
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync#define CODEC_VERB_CMD8(cmd) (CODEC_VERB_CMD((cmd), CODEC_VERB_8BIT_CMD, 8))
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync#define CODEC_VERB_CMD16(cmd) (CODEC_VERB_CMD((cmd), CODEC_VERB_16BIT_CMD, 16))
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync#define CODEC_VERB_PAYLOAD4(cmd) ((cmd) & CODEC_VERB_4BIT_DATA)
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync#define CODEC_VERB_PAYLOAD8(cmd) ((cmd) & CODEC_VERB_8BIT_DATA)
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync#define CODEC_VERB_PAYLOAD16(cmd) ((cmd) & CODEC_VERB_16BIT_DATA)
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync/* HDA spec 7.3.3.7 NoteA */
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync#define CODEC_GET_AMP_DIRECTION(cmd) (((cmd) & CODEC_VERB_GET_AMP_DIRECTION) >> 15)
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync#define CODEC_GET_AMP_SIDE(cmd) (((cmd) & CODEC_VERB_GET_AMP_SIDE) >> 13)
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync#define CODEC_GET_AMP_INDEX(cmd) (CODEC_GET_AMP_DIRECTION(cmd) ? 0 : ((cmd) & CODEC_VERB_GET_AMP_INDEX))
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync/* HDA spec 7.3.3.7 NoteC */
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync#define CODEC_SET_AMP_IS_OUT_DIRECTION(cmd) (((cmd) & CODEC_VERB_SET_AMP_OUT_DIRECTION) != 0)
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync#define CODEC_SET_AMP_IS_IN_DIRECTION(cmd) (((cmd) & CODEC_VERB_SET_AMP_IN_DIRECTION) != 0)
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync#define CODEC_SET_AMP_IS_LEFT_SIDE(cmd) (((cmd) & CODEC_VERB_SET_AMP_LEFT_SIDE) != 0)
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync#define CODEC_SET_AMP_IS_RIGHT_SIDE(cmd) (((cmd) & CODEC_VERB_SET_AMP_RIGHT_SIDE) != 0)
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync#define CODEC_SET_AMP_INDEX(cmd) (((cmd) & CODEC_VERB_SET_AMP_INDEX) >> 7)
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync/* HDA spec 7.3.3.1 defines layout of configuration registers/verbs (0xF00) */
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync/* VendorID (7.3.4.1) */
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync#define CODEC_MAKE_F00_00(vendorID, deviceID) (((vendorID) << 16) | (deviceID))
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync#define CODEC_F00_00_VENDORID(f00_00) (((f00_00) >> 16) & 0xFFFF)
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync#define CODEC_F00_00_DEVICEID(f00_00) ((f00_00) & 0xFFFF)
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync/* RevisionID (7.3.4.2)*/
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync#define CODEC_MAKE_F00_02(MajRev, MinRev, RevisionID, SteppingID) (((MajRev) << 20)|((MinRev) << 16)|((RevisionID) << 8)|(SteppingID))
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync/* Subordinate node count (7.3.4.3)*/
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync#define CODEC_MAKE_F00_04(startNodeNumber, totalNodeNumber) ((((startNodeNumber) & 0xFF) << 16)|((totalNodeNumber) & 0xFF))
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync#define CODEC_F00_04_TO_START_NODE_NUMBER(f00_04) (((f00_04) >> 16) & 0xFF)
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync#define CODEC_F00_04_TO_NODE_COUNT(f00_04) ((f00_04) & 0xFF)
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync * Function Group Type (7.3.4.4)
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync * 0 & [0x3-0x7f] are reserved types
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync * [0x80 - 0xff] are vendor defined function groups
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync#define CODEC_MAKE_F00_05(UnSol, NodeType) (((UnSol) << 8)|(NodeType))
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync#define CODEC_F00_05_IS_UNSOL(f00_05) RT_BOOL((f00_05) & RT_BIT(8))
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync#define CODEC_F00_05_GROUP(f00_05) ((f00_05) & 0xff)
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync/* Audio Function Group capabilities (7.3.4.5) */
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync#define CODEC_MAKE_F00_08(BeepGen, InputDelay, OutputDelay) ((((BeepGen) & 0x1) << 16)| (((InputDelay) & 0xF) << 8) | ((OutputDelay) & 0xF))
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync#define CODEC_F00_08_BEEP_GEN(f00_08) ((f00_08) & RT_BIT(16)
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync/* Widget Capabilities (7.3.4.6) */
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync#define CODEC_MAKE_F00_09(type, delay, chanel_count) \
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync/* note: types 0x8-0xe are reserved */
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync#define CODEC_F00_09_TYPE(f00_09) (((f00_09) >> 20) & 0xF)
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync#define CODEC_F00_09_IS_CAP_CP(f00_09) RT_BOOL((f00_09) & RT_BIT(12))
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync#define CODEC_F00_09_IS_CAP_L_R_SWAP(f00_09) RT_BOOL((f00_09) & RT_BIT(11))
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync#define CODEC_F00_09_IS_CAP_POWER_CTRL(f00_09) RT_BOOL((f00_09) & RT_BIT(10))
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync#define CODEC_F00_09_IS_CAP_DIGITAL(f00_09) RT_BOOL((f00_09) & RT_BIT(9))
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync#define CODEC_F00_09_IS_CAP_CONNECTION_LIST(f00_09) RT_BOOL((f00_09) & RT_BIT(8))
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync#define CODEC_F00_09_IS_CAP_UNSOL(f00_09) RT_BOOL((f00_09) & RT_BIT(7))
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync#define CODEC_F00_09_IS_CAP_PROC_WIDGET(f00_09) RT_BOOL((f00_09) & RT_BIT(6))
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync#define CODEC_F00_09_IS_CAP_STRIPE(f00_09) RT_BOOL((f00_09) & RT_BIT(5))
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync#define CODEC_F00_09_IS_CAP_FMT_OVERRIDE(f00_09) RT_BOOL((f00_09) & RT_BIT(4))
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync#define CODEC_F00_09_IS_CAP_AMP_OVERRIDE(f00_09) RT_BOOL((f00_09) & RT_BIT(3))
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync#define CODEC_F00_09_IS_CAP_OUT_AMP_PRESENT(f00_09) RT_BOOL((f00_09) & RT_BIT(2))
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync#define CODEC_F00_09_IS_CAP_IN_AMP_PRESENT(f00_09) RT_BOOL((f00_09) & RT_BIT(1))
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync#define CODEC_F00_09_IS_CAP_LSB(f00_09) RT_BOOL((f00_09) & RT_BIT(0))
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync/* Supported PCM size, rates (7.3.4.7) */
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync/* 2/3 * 48kHz */
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync/* 1/2 * 44.1kHz */
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync/* 1/3 * 48kHz */
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync/* 1/4 * 44.1kHz */
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync/* 1/6 * 48kHz */
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync/* Supported streams formats (7.3.4.8) */
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync/* Pin Capabilities (7.3.4.9)*/
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync#define CODEC_MAKE_F00_0C(vref_ctrl) (((vref_ctrl) & 0xFF) << 8)
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync#define CODEC_F00_0C_IS_CAP_HBR(f00_0c) ((f00_0c) & RT_BIT(27))
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync#define CODEC_F00_0C_IS_CAP_DP(f00_0c) ((f00_0c) & RT_BIT(24))
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync#define CODEC_F00_0C_IS_CAP_EAPD(f00_0c) ((f00_0c) & RT_BIT(16))
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync#define CODEC_F00_0C_IS_CAP_HDMI(f00_0c) ((f00_0c) & RT_BIT(7))
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync#define CODEC_F00_0C_IS_CAP_BALANCED_IO(f00_0c) ((f00_0c) & RT_BIT(6))
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync#define CODEC_F00_0C_IS_CAP_INPUT(f00_0c) ((f00_0c) & RT_BIT(5))
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync#define CODEC_F00_0C_IS_CAP_OUTPUT(f00_0c) ((f00_0c) & RT_BIT(4))
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync#define CODEC_F00_0C_IS_CAP_HP(f00_0c) ((f00_0c) & RT_BIT(3))
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync#define CODEC_F00_0C_IS_CAP_PRESENSE_DETECT(f00_0c) ((f00_0c) & RT_BIT(2))
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync#define CODEC_F00_0C_IS_CAP_TRIGGER_REQUIRED(f00_0c) ((f00_0c) & RT_BIT(1))
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync#define CODEC_F00_0C_IS_CAP_IMPENDANCE_SENSE(f00_0c) ((f00_0c) & RT_BIT(0))
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync/* Input Amplifier capabilities (7.3.4.10) */
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync#define CODEC_MAKE_F00_0D(mute_cap, step_size, num_steps, offset) \
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync/* Output Amplifier capabilities (7.3.4.10) */
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync/* Connection list lenght (7.3.4.11) */
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync#define CODEC_F00_0E_IS_LONG(f00_0e) RT_BOOL((f00_0e) & RT_BIT(7))
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync#define CODEC_F00_0E_COUNT(f00_0e) ((f00_0e) & 0x7F)
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync/* Supported Power States (7.3.4.12) */
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync/* Processing capabilities 7.3.4.13 */
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync#define CODEC_MAKE_F00_10(num, benign) ((((num) & 0xFF) << 8) | ((benign) & 0x1))
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync#define CODEC_F00_10_NUM(f00_10) (((f00_10) & (0xFF << 8)) >> 8)
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync#define CODEC_F00_10_BENING(f00_10) ((f00_10) & 0x1)
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync/* CP/IO Count (7.3.4.14) */
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync#define CODEC_MAKE_F00_11(wake, unsol, numgpi, numgpo, numgpio) \
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync/* Processing States (7.3.3.4) */
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync/* Power States (7.3.3.10) */
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync#define CODEC_MAKE_F05(reset, stopok, error, act, set) \
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync#define CODEC_F05_IS_RESET(value) (((value) & RT_BIT(10)) != 0)
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync#define CODEC_F05_IS_STOPOK(value) (((value) & RT_BIT(9)) != 0)
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync#define CODEC_F05_IS_ERROR(value) (((value) & RT_BIT(8)) != 0)
a5e7ae69e440f6816420fc99599f044e79e716b6vboxsync/* Pin Widged Control (7.3.3.13) */
#define CODEC_F07_VREF_HIZ (0)
#define CODEC_A_MULT_1X (0)
#define CODEC_A_DIV_1X (0)
#define CODEC_A_8_BIT (0)
#define CODEC_MAKE_F0C(lrswap, eapd, btl) ((((lrswap) & 1) << 2) | (((eapd) & 1) << 1) | ((btl) & 1))
#define CODEC_F1C_LOCATION_PRIMARY_CHASSIS (0)
#define CODEC_F1C_LOCATION_NA (0)
#define CODEC_F1C_DEVICE_LINE_OUT (0)
#define CODEC_F1C_CONNECTION_TYPE_UNKNOWN (0)
#define CODEC_F1C_COLOR_UNKNOWN (0)
#define CODEC_F1C_MISC_JACK_DETECT (0)
#define CODEC_F1C_SEQ_SHIFT (0)
#define CODEC_MAKE_F1C(port_connectivity, location, device, connection_type, color, misc, association, sequence) \
| ((sequence)))
typedef struct CODECCOMMONNODE
char const *pszName;
typedef struct ROOTCODECNODE
#define AMPLIFIER_IN 0
#define AMPLIFIER_RIGHT 0
typedef struct DACNODE
typedef struct ADCNODE
typedef struct SPDIFOUTNODE
typedef struct SPDIFINNODE
typedef struct AFGCODECNODE
typedef struct PORTNODE
typedef struct DIGOUTNODE
typedef struct DIGINNODE
typedef struct ADCMUXNODE
typedef struct PCBEEPNODE
typedef struct CDNODE
typedef struct VOLUMEKNOBNODE
typedef struct ADCVOLNODE
typedef struct RESNODE
typedef struct CODECSAVEDSTATENODE
typedef union CODECNODE
switch (nodenum)
pNode->node.au32F00_param[0x0D] = CODEC_MAKE_F00_0D(1, 0x5, 0xE, 0);//RT_BIT(31)|(0x5 << 16)|(0xE)<<8;
pNode->afg.u32F05_param = CODEC_MAKE_F05(0, 0, 0, CODEC_F05_D2, CODEC_F05_D2);//0x2 << 4| 0x2; /* PS-Act: D3, PS->Set D3 */
pNode->dac.u32A_param = CODEC_MAKE_A(0, 1, CODEC_A_MULT_1X, CODEC_A_DIV_1X, CODEC_A_16_BIT, 1);//RT_BIT(14)|(0x1 << 4)|0x1; /* 441000Hz/16bit/2ch */
pNode->dac.u32F05_param = CODEC_MAKE_F05(0, 0, 0, CODEC_F05_D3, CODEC_F05_D3);//0x3 << 4 | 0x3; /* PS-Act: D3, Set: D3 */
goto adc_init;
pNode->adc.u32A_param = CODEC_MAKE_A(0, 1, CODEC_A_MULT_1X, CODEC_A_DIV_1X, CODEC_A_16_BIT, 1);//RT_BIT(14)|(0x1 << 3)|0x1; /* 441000Hz/16bit/2ch */
pNode->adc.u32F05_param = CODEC_MAKE_F05(0, 0, 0, CODEC_F05_D3, CODEC_F05_D3);//0x3 << 4 | 0x3; /* PS-Act: D3 Set: D3 */
pNode->spdifout.u32A_param = CODEC_MAKE_A(0, 1, CODEC_A_MULT_1X, CODEC_A_DIV_1X, CODEC_A_16_BIT, 1);//(1<<14)|(0x1<<4) | 0x1;
pNode->spdifin.u32A_param = CODEC_MAKE_A(0, 1, CODEC_A_MULT_1X, CODEC_A_DIV_1X, CODEC_A_16_BIT, 1);//(0x1<<4) | 0x1;
goto port_init;
goto port_init;
goto port_init;
pNode->node.au32F00_param[9] = (4 << 20) | (3 << 16) | RT_BIT(10) | RT_BIT(9) | RT_BIT(7) | RT_BIT(0);
pNode->digin.u32F05_param = CODEC_MAKE_F05(0, 0, 0, CODEC_F05_D3, CODEC_F05_D3);//0x3 << 4 | 0x3; /* PS-Act: D3 -> D3 */
goto adcmux_init;
pNode->node.au32F00_param[0x9] = CODEC_MAKE_F00_09(CODEC_F00_09_TYPE_VOLUME_KNOB, 0x0, 0x0);//(0x6 << 20);
goto adcvol_init;
return VINF_SUCCESS;
return VERR_NO_MEMORY;
return VINF_SUCCESS;
#ifdef VBOX_WITH_PDM_AUDIO_DRIVER
switch (mt)
#ifdef VBOX_WITH_PDM_AUDIO_DRIVER
case PDMAUDIOMIXERCTL_VOLUME:
case PDMAUDIOMIXERCTL_PCM:
case AUD_MIXER_VOLUME:
case AUD_MIXER_PCM:
#ifdef VBOX_WITH_PDM_AUDIO_DRIVER
case PDMAUDIOMIXERCTL_LINE_IN:
case AUD_MIXER_LINE_IN:
#ifdef VBOX_WITH_PDM_AUDIO_DRIVER
/** @todo In SetVolume no passing audmixerctl_in as its not used in DrvAudio.cpp. */
return VINF_SUCCESS;
DECLINLINE(void) hdaCodecSetRegister(uint32_t *pu32Reg, uint32_t u32Cmd, uint8_t u8Offset, uint32_t mask)
*pResp = 0;
return VINF_SUCCESS;
int rc;
return rc;
return VINF_SUCCESS;
*pResp = 0;
u8Index);
u8Index);
u8Index);
u8Index);
u8Index);
u8Index);
AssertMsgFailedReturn(("access to fields of %x need to be implemented\n", CODEC_NID(cmd)), VINF_SUCCESS);
return VINF_SUCCESS;
bool fIsLeft = false;
bool fIsRight = false;
bool fIsOut = false;
bool fIsIn = false;
return VINF_SUCCESS;
*pResp = 0;
return VINF_SUCCESS;
if (fIsIn)
if (fIsLeft)
hdaCodecSetRegisterU8(&LIFIER_REGISTER(*pAmplifier, AMPLIFIER_IN, AMPLIFIER_LEFT, u8Index), cmd, 0);
if (fIsRight)
hdaCodecSetRegisterU8(&LIFIER_REGISTER(*pAmplifier, AMPLIFIER_IN, AMPLIFIER_RIGHT, u8Index), cmd, 0);
if (fIsOut)
if (fIsLeft)
hdaCodecSetRegisterU8(&LIFIER_REGISTER(*pAmplifier, AMPLIFIER_OUT, AMPLIFIER_LEFT, u8Index), cmd, 0);
if (fIsRight)
hdaCodecSetRegisterU8(&LIFIER_REGISTER(*pAmplifier, AMPLIFIER_OUT, AMPLIFIER_RIGHT, u8Index), cmd, 0);
#ifdef VBOX_WITH_PDM_AUDIO_DRIVER
#ifdef VBOX_WITH_PDM_AUDIO_DRIVER
return VINF_SUCCESS;
return VINF_SUCCESS;
return VINF_SUCCESS;
return VINF_SUCCESS;
return VINF_SUCCESS;
*pResp = 0;
return VINF_SUCCESS;
return VINF_SUCCESS;
*pResp = 0;
return VINF_SUCCESS;
return VINF_SUCCESS;
*pResp = 0;
return VINF_SUCCESS;
return VINF_SUCCESS;
*pResp = 0;
return VINF_SUCCESS;
static DECLCALLBACK(int) vrbProcGetUnsolicitedEnabled(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
return VINF_SUCCESS;
*pResp = 0;
return VINF_SUCCESS;
static DECLCALLBACK(int) vrbProcSetUnsolicitedEnabled(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
return VINF_SUCCESS;
*pResp = 0;
AssertMsgFailedReturn(("unsupported operation %x on node: %x\n", CODEC_VERB_CMD8(cmd), CODEC_NID(cmd)), VINF_SUCCESS);
return VINF_SUCCESS;
return VINF_SUCCESS;
*pResp = 0;
return VINF_SUCCESS;
return VINF_SUCCESS;
*pResp = 0;
return VINF_SUCCESS;
static DECLCALLBACK(int) vrbProcGetConnectionListEntry(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
*pResp = 0;
return VINF_SUCCESS;
return VINF_SUCCESS;
return VINF_SUCCESS;
return VINF_SUCCESS;
*pResp = 0;
return VINF_SUCCESS;
return VINF_SUCCESS;
*pResp = 0;
return VINF_SUCCESS;
return VINF_SUCCESS;
*pResp = 0;
return VINF_SUCCESS;
static int codecSetDigitalConverter(PHDACODEC pThis, uint32_t cmd, uint8_t u8Offset, uint64_t *pResp)
return VINF_SUCCESS;
*pResp = 0;
return VINF_SUCCESS;
static DECLCALLBACK(int) vrbProcSetDigitalConverter1(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
static DECLCALLBACK(int) vrbProcSetDigitalConverter2(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp)
return VINF_SUCCESS;
*pResp = 0;
return VINF_SUCCESS;
return VINF_SUCCESS;
return VINF_SUCCESS;
*pResp = 0;
*pResp = 0;
*pResp = 0;
*pResp = 0;
uint8_t i;
*pResp = 0;
return VINF_SUCCESS;
return VINF_SUCCESS;
*pResp = 0;
return VINF_SUCCESS;
if (!pu32F05_param)
return VINF_SUCCESS;
*pResp = 0;
while (*(++pu8NodeIndex))
while (*(++pu8NodeIndex))
while (*(++pu8NodeIndex))
return VINF_SUCCESS;
return VINF_SUCCESS;
*pResp = 0;
return VINF_SUCCESS;
return VINF_SUCCESS;
*pResp = 0;
return VINF_SUCCESS;
return VINF_SUCCESS;
*pResp = 0;
return VINF_SUCCESS;
return VINF_SUCCESS;
*pResp = 0;
return VINF_SUCCESS;
return VINF_SUCCESS;
*pResp = 0;
return VINF_SUCCESS;
return VINF_SUCCESS;
*pResp = 0;
return VINF_SUCCESS;
return VINF_SUCCESS;
*pResp = 0;
return VINF_SUCCESS;
return VINF_SUCCESS;
*pResp = 0;
if (pu32Reg)
return VINF_SUCCESS;
return VINF_SUCCESS;
*pResp = 0;
return VINF_SUCCESS;
return VINF_SUCCESS;
*pResp = 0;
if (pu32Reg)
return VINF_SUCCESS;
return VINF_SUCCESS;
*pResp = 0;
return VINF_SUCCESS;
return VINF_SUCCESS;
if (pu32Reg)
return VINF_SUCCESS;
*pResp = 0;
*pResp = 0;
*pResp = 0;
*pResp = 0;
/// @todo r=michaln: There needs to be a counter to avoid log flooding (see e.g. DevRTC.cpp)
return VINF_SUCCESS;
return VINF_SUCCESS;
return VINF_SUCCESS;
#ifndef VBOX_WITH_PDM_AUDIO_DRIVER
#ifdef VBOX_WITH_PDM_AUDIO_DRIVER
int hdaCodecOpenStream(PHDACODEC pThis, ENMSOUNDSOURCE enmSoundSource, audsettings_t *pAudioSettings)
int rc;
switch (enmSoundSource)
case PI_INDEX:
#ifdef VBOX_WITH_PDM_AUDIO_DRIVER
pThis->SwVoiceIn = AUD_open_in(&pThis->card, pThis->SwVoiceIn, "hda.in", pThis, pi_callback, pAudioSettings);
case PO_INDEX:
#ifdef VBOX_WITH_PDM_AUDIO_DRIVER
pThis->SwVoiceOut = AUD_open_out(&pThis->card, pThis->SwVoiceOut, "hda.out", pThis, po_callback, pAudioSettings);
#ifdef VBOX_WITH_PDM_AUDIO_DRIVER
# ifdef VBOX_WITH_HDA_MIC_IN
case MC_INDEX:
return rc;
AssertLogRelMsgReturn(pThis->cTotalNodes == 0x1c, ("cTotalNodes=%#x, should be 0x1c", pThis->cTotalNodes),
SSMR3PutStructEx(pSSM, &pThis->paNodes[idxNode].SavedState, sizeof(pThis->paNodes[idxNode].SavedState),
return VINF_SUCCESS;
switch (uVersion)
case HDA_SSM_VERSION_1:
case HDA_SSM_VERSION_2:
case HDA_SSM_VERSION_3:
case HDA_SSM_VERSION:
fFlags = 0;
return rc;
#ifdef VBOX_WITH_PDM_AUDIO_DRIVER
hdaCodecToAudVolume(pThis, &pThis->paNodes[pThis->u8DacLineOut].dac.B_params, PDMAUDIOMIXERCTL_VOLUME);
#ifdef VBOX_WITH_PDM_AUDIO_DRIVER
hdaCodecToAudVolume(pThis, &pThis->paNodes[pThis->u8DacLineOut].spdifout.B_params, PDMAUDIOMIXERCTL_VOLUME);
hdaCodecToAudVolume(pThis, &pThis->paNodes[pThis->u8AdcVolsLineIn].adcvol.B_params, PDMAUDIOMIXERCTL_LINE_IN);
return VINF_SUCCESS;
return VINF_SUCCESS;
pThis->paNodes[0].node.au32F00_param[0] = CODEC_MAKE_F00_00(pThis->u16VendorId, pThis->u16DeviceId);
pThis->paNodes[1].afg.u32F20_param = CODEC_MAKE_F20(pThis->u16VendorId, pThis->u8BSKU, pThis->u8AssemblyId);
#ifdef VBOX_WITH_PDM_AUDIO_DRIVER
#ifdef VBOX_WITH_PDM_AUDIO_DRIVER
# ifdef VBOX_WITH_HDA_MIC_IN
uint8_t i;
#ifdef VBOX_WITH_PDM_AUDIO_DRIVER
hdaCodecToAudVolume(pThis, &pThis->paNodes[pThis->u8DacLineOut].dac.B_params, PDMAUDIOMIXERCTL_VOLUME);
hdaCodecToAudVolume(pThis, &pThis->paNodes[pThis->u8AdcVolsLineIn].adcvol.B_params, PDMAUDIOMIXERCTL_LINE_IN);
AUD_init_null ();
len += RTStrPrintf (szMissingVoices + len, sizeof(szMissingVoices) - len, len ? ", PCM_out" : "PCM_out");
return VINF_SUCCESS;