DevIchAc97.cpp revision 24d466e56e3082b3497e64b59d6ecdd42359258d
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync/** @file
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync *
ee4d840f54fd2dcea8a73b1b86d5ec0db370b05dvboxsync * VBox ICH AC97 Audio Controller
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync */
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync/*
e64031e20c39650a7bc902a3e1aba613b9415deevboxsync * Copyright (C) 2006 InnoTek Systemberatung GmbH
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync *
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * This file is part of VirtualBox Open Source Edition (OSE), as
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * available from http://www.virtualbox.org. This file is free software;
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * you can redistribute it and/or modify it under the terms of the GNU
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * General Public License as published by the Free Software Foundation,
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * in version 2 as it comes in the "COPYING" file of the VirtualBox OSE
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * distribution. VirtualBox OSE is distributed in the hope that it will
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * be useful, but WITHOUT ANY WARRANTY of any kind.
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync *
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * If you received this file as part of a commercial VirtualBox
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * distribution, then only the terms of your commercial VirtualBox
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync * license agreement apply instead of the previous paragraph.
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync */
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync/*******************************************************************************
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync* Header Files *
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync*******************************************************************************/
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync#define LOG_GROUP LOG_GROUP_DEV_AUDIO
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync#include <VBox/pdm.h>
2f0d866e126dd288169fed591c259c1c6b4016e5vboxsync#include <VBox/err.h>
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync
ee4d840f54fd2dcea8a73b1b86d5ec0db370b05dvboxsync#include <VBox/log.h>
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync#include <iprt/assert.h>
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync#include <iprt/uuid.h>
ee4d840f54fd2dcea8a73b1b86d5ec0db370b05dvboxsync#include <iprt/string.h>
ee4d840f54fd2dcea8a73b1b86d5ec0db370b05dvboxsync#include <VBox/mm.h>
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync#include "Builtins.h"
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync
4569bf0ad094b40d2e177299a00d37e94d28616cvboxsyncextern "C" {
4569bf0ad094b40d2e177299a00d37e94d28616cvboxsync#include "audio.h"
4569bf0ad094b40d2e177299a00d37e94d28616cvboxsync}
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync#undef LOG_VOICES
ee4d840f54fd2dcea8a73b1b86d5ec0db370b05dvboxsync//#define USE_MIXER
ee4d840f54fd2dcea8a73b1b86d5ec0db370b05dvboxsync
ee4d840f54fd2dcea8a73b1b86d5ec0db370b05dvboxsync#define AC97_SSM_VERSION 1
ee4d840f54fd2dcea8a73b1b86d5ec0db370b05dvboxsync
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsyncenum {
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync AC97_Reset = 0x00,
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync AC97_Master_Volume_Mute = 0x02,
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync AC97_Headphone_Volume_Mute = 0x04,
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync AC97_Master_Volume_Mono_Mute = 0x06,
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync AC97_Master_Tone_RL = 0x08,
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync AC97_PC_BEEP_Volume_Mute = 0x0A,
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync AC97_Phone_Volume_Mute = 0x0C,
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync AC97_Mic_Volume_Mute = 0x0E,
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync AC97_Line_In_Volume_Mute = 0x10,
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync AC97_CD_Volume_Mute = 0x12,
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync AC97_Video_Volume_Mute = 0x14,
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync AC97_Aux_Volume_Mute = 0x16,
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync AC97_PCM_Out_Volume_Mute = 0x18,
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync AC97_Record_Select = 0x1A,
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync AC97_Record_Gain_Mute = 0x1C,
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync AC97_Record_Gain_Mic_Mute = 0x1E,
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync AC97_General_Purpose = 0x20,
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync AC97_3D_Control = 0x22,
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync AC97_AC_97_RESERVED = 0x24,
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync AC97_Powerdown_Ctrl_Stat = 0x26,
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync AC97_Extended_Audio_ID = 0x28,
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync AC97_Extended_Audio_Ctrl_Stat = 0x2A,
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync AC97_PCM_Front_DAC_Rate = 0x2C,
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync AC97_PCM_Surround_DAC_Rate = 0x2E,
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync AC97_PCM_LFE_DAC_Rate = 0x30,
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync AC97_PCM_LR_ADC_Rate = 0x32,
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync AC97_MIC_ADC_Rate = 0x34,
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync AC97_6Ch_Vol_C_LFE_Mute = 0x36,
ee4d840f54fd2dcea8a73b1b86d5ec0db370b05dvboxsync AC97_6Ch_Vol_L_R_Surround_Mute = 0x38,
ee4d840f54fd2dcea8a73b1b86d5ec0db370b05dvboxsync AC97_Vendor_Reserved = 0x58,
ee4d840f54fd2dcea8a73b1b86d5ec0db370b05dvboxsync AC97_Vendor_ID1 = 0x7c,
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync AC97_Vendor_ID2 = 0x7e
ee4d840f54fd2dcea8a73b1b86d5ec0db370b05dvboxsync};
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync#define SOFT_VOLUME
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync#define SR_FIFOE BIT(4) /* rwc, fifo error */
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync#define SR_BCIS BIT(3) /* rwc, buffer completion interrupt status */
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync#define SR_LVBCI BIT(2) /* rwc, last valid buffer completion interrupt */
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync#define SR_CELV BIT(1) /* ro, current equals last valid */
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync#define SR_DCH BIT(0) /* ro, controller halted */
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync#define SR_VALID_MASK (BIT(5) - 1)
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync#define SR_WCLEAR_MASK (SR_FIFOE | SR_BCIS | SR_LVBCI)
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync#define SR_RO_MASK (SR_DCH | SR_CELV)
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync#define SR_INT_MASK (SR_FIFOE | SR_BCIS | SR_LVBCI)
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync#define CR_IOCE BIT(4) /* rw */
d4e9ccea0ea1ed303b5708ff94f6c202755f0dc6vboxsync#define CR_FEIE BIT(3) /* rw */
d4e9ccea0ea1ed303b5708ff94f6c202755f0dc6vboxsync#define CR_LVBIE BIT(2) /* rw */
0c4004948fca34f2db87e7b38013137e9472c306vboxsync#define CR_RR BIT(1) /* rw */
0c4004948fca34f2db87e7b38013137e9472c306vboxsync#define CR_RPBM BIT(0) /* rw */
0c4004948fca34f2db87e7b38013137e9472c306vboxsync#define CR_VALID_MASK (BIT(5) - 1)
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync#define CR_DONT_CLEAR_MASK (CR_IOCE | CR_FEIE | CR_LVBIE)
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync#define GC_WR 4 /* rw */
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync#define GC_CR 2 /* rw */
44a2ecaf2d0fc196ab76cab13b3f909299e386d1vboxsync#define GC_VALID_MASK (BIT(6) - 1)
44a2ecaf2d0fc196ab76cab13b3f909299e386d1vboxsync
4569bf0ad094b40d2e177299a00d37e94d28616cvboxsync#define GS_MD3 BIT(17) /* rw */
4569bf0ad094b40d2e177299a00d37e94d28616cvboxsync#define GS_AD3 BIT(16) /* rw */
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync#define GS_RCS BIT(15) /* rwc */
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync#define GS_B3S12 BIT(14) /* ro */
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync#define GS_B2S12 BIT(13) /* ro */
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync#define GS_B1S12 BIT(12) /* ro */
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync#define GS_S1R1 BIT(11) /* rwc */
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync#define GS_S0R1 BIT(10) /* rwc */
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync#define GS_S1CR BIT(9) /* ro */
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync#define GS_S0CR BIT(8) /* ro */
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync#define GS_MINT BIT(7) /* ro */
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync#define GS_POINT BIT(6) /* ro */
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync#define GS_PIINT BIT(5) /* ro */
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync#define GS_RSRVD (BIT(4)|BIT(3))
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync#define GS_MOINT BIT(2) /* ro */
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync#define GS_MIINT BIT(1) /* ro */
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync#define GS_GSCI BIT(0) /* rwc */
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync#define GS_RO_MASK (GS_B3S12| \
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync GS_B2S12| \
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync GS_B1S12| \
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync GS_S1CR| \
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync GS_S0CR| \
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync GS_MINT| \
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync GS_POINT| \
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync GS_PIINT| \
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync GS_RSRVD| \
a9f41cb889f53e8407561a6155052c441eb0fc5fvboxsync GS_MOINT| \
a9f41cb889f53e8407561a6155052c441eb0fc5fvboxsync GS_MIINT)
a9f41cb889f53e8407561a6155052c441eb0fc5fvboxsync#define GS_VALID_MASK (BIT(18) - 1)
a9f41cb889f53e8407561a6155052c441eb0fc5fvboxsync#define GS_WCLEAR_MASK (GS_RCS|GS_S1R1|GS_S0R1|GS_GSCI)
a9f41cb889f53e8407561a6155052c441eb0fc5fvboxsync
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync/** Buffer Descriptor */
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync#define BD_IOC BIT(31) /* Interrupt on Completion */
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync#define BD_BUP BIT(30) /* Buffer Underrun Policy */
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync#define EACS_VRA 1
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync#define EACS_VRM 8
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync#define VOL_MASK 0x1f
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync#define MUTE_SHIFT 15
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync#define REC_MASK 7
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsyncenum
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync{
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync REC_MIC = 0,
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync REC_CD,
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync REC_VIDEO,
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync REC_AUX,
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync REC_LINE_IN,
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync REC_STEREO_MIX,
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync REC_MONO_MIX,
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync REC_PHONE
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync};
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsynctypedef struct BD
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync{
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync uint32_t addr;
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync uint32_t ctl_len;
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync} BD;
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsynctypedef struct AC97BusMasterRegs
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync{
93f91841f87620d1cb6d0238b3d0d5e52cd3b9a4vboxsync uint32_t bdbar; /* rw 0, buffer descriptor list base address register */
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync uint8_t civ; /* ro 0, current index value */
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync uint8_t lvi; /* rw 0, last valid index */
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync uint16_t sr; /* rw 1, status register */
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync uint16_t picb; /* ro 0, position in current buffer */
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync uint8_t piv; /* ro 0, prefetched index value */
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync uint8_t cr; /* rw 0, control register */
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync int bd_valid; /* initialized? */
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync BD bd;
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync} AC97BusMasterRegs;
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsynctypedef struct AC97LinkState
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync{
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync QEMUSoundCard card;
44a2ecaf2d0fc196ab76cab13b3f909299e386d1vboxsync /** Global Control (Bus Master Control Register) */
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync uint32_t glob_cnt;
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync /** Global Status (Bus Master Control Register) */
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync uint32_t glob_sta;
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync /** Codec Access Semaphore Register (Bus Master Control Register) */
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync uint32_t cas;
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync uint32_t last_samp;
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync /** Bus Master Control Registers for PCM in, PCM out, and Mic in */
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync AC97BusMasterRegs bm_regs[3];
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync uint8_t mixer_data[256];
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync /** PCM in */
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync SWVoiceIn *voice_pi;
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync /** PCM out */
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync SWVoiceOut *voice_po;
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync /** Mic in */
f687f34bd232be13744edbc0cc5155fa5d4540edvboxsync SWVoiceIn *voice_mc;
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync uint8_t silence[128];
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync int bup_flag;
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync /** Pointer to the device instance. */
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync PPDMDEVINS pDevIns;
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync /** Pointer to the connector of the attached audio driver. */
0dd6dfbebcda0af90da4413aaea5f3b9d1817556vboxsync PPDMIAUDIOCONNECTOR pDrv;
0dd6dfbebcda0af90da4413aaea5f3b9d1817556vboxsync /** Pointer to the attached audio driver. */
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync PPDMIBASE pDrvBase;
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync /** The base interface. */
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync PDMIBASE IBase;
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync /** Base port of the I/O space region. */
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync RTIOPORT IOPortBase[2];
ead016c68c61b5f2e1fe4d237054eebea9327d4bvboxsync} AC97LinkState;
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync
44a2ecaf2d0fc196ab76cab13b3f909299e386d1vboxsync#define ICHAC97STATE_2_DEVINS(pAC97) ((pAC97)->pDevIns)
f687f34bd232be13744edbc0cc5155fa5d4540edvboxsync#define PCIDEV_2_ICHAC97STATE(pPciDev) ((PCIAC97LinkState *)(pPciDev))
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsyncenum
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync{
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync BUP_SET = BIT(0),
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync BUP_LAST = BIT(1)
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync};
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsynctypedef struct PCIAC97LinkState
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync{
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync PCIDevice dev;
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync AC97LinkState ac97;
44a2ecaf2d0fc196ab76cab13b3f909299e386d1vboxsync} PCIAC97LinkState;
44a2ecaf2d0fc196ab76cab13b3f909299e386d1vboxsync
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync#define MKREGS(prefix, start) \
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsyncenum { \
fc78e01f665145ab3641c5f8095e9ae984ddcb84vboxsync prefix ## _BDBAR = start, \
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync prefix ## _CIV = start + 4, \
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync prefix ## _LVI = start + 5, \
0dd6dfbebcda0af90da4413aaea5f3b9d1817556vboxsync prefix ## _SR = start + 6, \
0dd6dfbebcda0af90da4413aaea5f3b9d1817556vboxsync prefix ## _PICB = start + 8, \
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync prefix ## _PIV = start + 10, \
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync prefix ## _CR = start + 11 \
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync}
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsyncenum
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync{
fc78e01f665145ab3641c5f8095e9ae984ddcb84vboxsync PI_INDEX = 0, /* PCM in */
4569bf0ad094b40d2e177299a00d37e94d28616cvboxsync PO_INDEX, /* PCM out */
4569bf0ad094b40d2e177299a00d37e94d28616cvboxsync MC_INDEX, /* Mic in */
4569bf0ad094b40d2e177299a00d37e94d28616cvboxsync LAST_INDEX
4569bf0ad094b40d2e177299a00d37e94d28616cvboxsync};
4569bf0ad094b40d2e177299a00d37e94d28616cvboxsync
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsyncMKREGS (PI, PI_INDEX * 16);
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsyncMKREGS (PO, PO_INDEX * 16);
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsyncMKREGS (MC, MC_INDEX * 16);
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsyncenum
a9f41cb889f53e8407561a6155052c441eb0fc5fvboxsync{
a9f41cb889f53e8407561a6155052c441eb0fc5fvboxsync GLOB_CNT = 0x2c,
a9f41cb889f53e8407561a6155052c441eb0fc5fvboxsync GLOB_STA = 0x30,
a9f41cb889f53e8407561a6155052c441eb0fc5fvboxsync CAS = 0x34
a9f41cb889f53e8407561a6155052c441eb0fc5fvboxsync};
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync#define GET_BM(index) (((index) >> 4) & 3)
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsyncstatic void po_callback (void *opaque, int free);
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsyncstatic void pi_callback (void *opaque, int avail);
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsyncstatic void mc_callback (void *opaque, int avail);
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsyncstatic void warm_reset (AC97LinkState *s)
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync{
a9f41cb889f53e8407561a6155052c441eb0fc5fvboxsync (void) s;
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync}
0dd6dfbebcda0af90da4413aaea5f3b9d1817556vboxsync
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsyncstatic void cold_reset (AC97LinkState * s)
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync{
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync (void) s;
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync}
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync
a9f41cb889f53e8407561a6155052c441eb0fc5fvboxsync/** Fetch Buffer Descriptor at _CIV */
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsyncstatic void fetch_bd (AC97LinkState *s, AC97BusMasterRegs *r)
0dd6dfbebcda0af90da4413aaea5f3b9d1817556vboxsync{
0dd6dfbebcda0af90da4413aaea5f3b9d1817556vboxsync PPDMDEVINS pDevIns = ICHAC97STATE_2_DEVINS(s);
0dd6dfbebcda0af90da4413aaea5f3b9d1817556vboxsync uint8_t b[8];
4569bf0ad094b40d2e177299a00d37e94d28616cvboxsync
4569bf0ad094b40d2e177299a00d37e94d28616cvboxsync PDMDevHlpPhysRead (pDevIns, r->bdbar + r->civ * 8, b, sizeof(b));
4569bf0ad094b40d2e177299a00d37e94d28616cvboxsync r->bd_valid = 1;
4569bf0ad094b40d2e177299a00d37e94d28616cvboxsync#if !defined(__X86__) && !defined(__AMD64__)
4569bf0ad094b40d2e177299a00d37e94d28616cvboxsync#error Please adapt the code (audio buffers are little endian)!
4569bf0ad094b40d2e177299a00d37e94d28616cvboxsync#else
4569bf0ad094b40d2e177299a00d37e94d28616cvboxsync r->bd.addr = (*(uint32_t *) &b[0]) & ~3;
4569bf0ad094b40d2e177299a00d37e94d28616cvboxsync r->bd.ctl_len = (*(uint32_t *) &b[4]);
4569bf0ad094b40d2e177299a00d37e94d28616cvboxsync#endif
4569bf0ad094b40d2e177299a00d37e94d28616cvboxsync r->picb = r->bd.ctl_len & 0xffff;
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync Log (("ac97: bd %2d addr=%#x ctl=%#06x len=%#x(%d bytes)\n",
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync r->civ, r->bd.addr, r->bd.ctl_len >> 16,
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync r->bd.ctl_len & 0xffff, (r->bd.ctl_len & 0xffff) << 1));
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync}
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync
fc78e01f665145ab3641c5f8095e9ae984ddcb84vboxsync/**
fc78e01f665145ab3641c5f8095e9ae984ddcb84vboxsync * Update the BM status register
fc78e01f665145ab3641c5f8095e9ae984ddcb84vboxsync */
fc78e01f665145ab3641c5f8095e9ae984ddcb84vboxsyncstatic void update_sr (AC97LinkState *s, AC97BusMasterRegs *r, uint32_t new_sr)
fc78e01f665145ab3641c5f8095e9ae984ddcb84vboxsync{
fc78e01f665145ab3641c5f8095e9ae984ddcb84vboxsync PPDMDEVINS pDevIns = ICHAC97STATE_2_DEVINS(s);
fc78e01f665145ab3641c5f8095e9ae984ddcb84vboxsync int event = 0;
fc78e01f665145ab3641c5f8095e9ae984ddcb84vboxsync int level = 0;
fc78e01f665145ab3641c5f8095e9ae984ddcb84vboxsync uint32_t new_mask = new_sr & SR_INT_MASK;
fc78e01f665145ab3641c5f8095e9ae984ddcb84vboxsync uint32_t old_mask = r->sr & SR_INT_MASK;
fc78e01f665145ab3641c5f8095e9ae984ddcb84vboxsync uint32_t masks[] = {GS_PIINT, GS_POINT, GS_MINT};
fc78e01f665145ab3641c5f8095e9ae984ddcb84vboxsync
fc78e01f665145ab3641c5f8095e9ae984ddcb84vboxsync if (new_mask ^ old_mask)
fc78e01f665145ab3641c5f8095e9ae984ddcb84vboxsync {
fc78e01f665145ab3641c5f8095e9ae984ddcb84vboxsync /** @todo is IRQ deasserted when only one of status bits is cleared? */
fc78e01f665145ab3641c5f8095e9ae984ddcb84vboxsync if (!new_mask)
fc78e01f665145ab3641c5f8095e9ae984ddcb84vboxsync {
fc78e01f665145ab3641c5f8095e9ae984ddcb84vboxsync event = 1;
fc78e01f665145ab3641c5f8095e9ae984ddcb84vboxsync level = 0;
fc78e01f665145ab3641c5f8095e9ae984ddcb84vboxsync }
fc78e01f665145ab3641c5f8095e9ae984ddcb84vboxsync else if ((new_mask & SR_LVBCI) && (r->cr & CR_LVBIE))
fc78e01f665145ab3641c5f8095e9ae984ddcb84vboxsync {
fc78e01f665145ab3641c5f8095e9ae984ddcb84vboxsync event = 1;
fc78e01f665145ab3641c5f8095e9ae984ddcb84vboxsync level = 1;
fc78e01f665145ab3641c5f8095e9ae984ddcb84vboxsync }
fc78e01f665145ab3641c5f8095e9ae984ddcb84vboxsync else if ((new_mask & SR_BCIS) && (r->cr & CR_IOCE))
4569bf0ad094b40d2e177299a00d37e94d28616cvboxsync {
fc78e01f665145ab3641c5f8095e9ae984ddcb84vboxsync event = 1;
fc78e01f665145ab3641c5f8095e9ae984ddcb84vboxsync level = 1;
fc78e01f665145ab3641c5f8095e9ae984ddcb84vboxsync }
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync }
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync r->sr = new_sr;
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync Log (("ac97: IOC%d LVB%d sr=%#x event=%d level=%d\n",
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync r->sr & SR_BCIS, r->sr & SR_LVBCI, r->sr, event, level));
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync if (event)
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync {
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync s->glob_sta |= masks[r - s->bm_regs];
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync Log (("ac97: set irq level=%d\n", !!level));
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync PDMDevHlpPCISetIrq (pDevIns, 0, !!level);
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync }
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync}
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsyncstatic void voice_set_active (AC97LinkState *s, int bm_index, int on)
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync{
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync switch (bm_index)
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync {
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync case PI_INDEX: AUD_set_active_in (s->voice_pi, on); break;
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync case PO_INDEX: AUD_set_active_out(s->voice_po, on); break;
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync case MC_INDEX: AUD_set_active_in (s->voice_mc, on); break;
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync default: AssertFailed ();
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync break;
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync }
d7125f3a1b435761c393f9ec406e85a73ae2a3e7vboxsync}
d4e9ccea0ea1ed303b5708ff94f6c202755f0dc6vboxsync
d4e9ccea0ea1ed303b5708ff94f6c202755f0dc6vboxsyncstatic void reset_bm_regs (AC97LinkState *s, AC97BusMasterRegs *r)
d7125f3a1b435761c393f9ec406e85a73ae2a3e7vboxsync{
0c4004948fca34f2db87e7b38013137e9472c306vboxsync Log (("ac97: reset_bm_regs\n"));
d7125f3a1b435761c393f9ec406e85a73ae2a3e7vboxsync r->bdbar = 0;
d7125f3a1b435761c393f9ec406e85a73ae2a3e7vboxsync r->civ = 0;
0c4004948fca34f2db87e7b38013137e9472c306vboxsync r->lvi = 0;
d7125f3a1b435761c393f9ec406e85a73ae2a3e7vboxsync /** @todo do we need to do that? */
0c4004948fca34f2db87e7b38013137e9472c306vboxsync update_sr (s, r, SR_DCH);
0c4004948fca34f2db87e7b38013137e9472c306vboxsync r->picb = 0;
d7125f3a1b435761c393f9ec406e85a73ae2a3e7vboxsync r->piv = 0;
d7125f3a1b435761c393f9ec406e85a73ae2a3e7vboxsync r->cr = r->cr & CR_DONT_CLEAR_MASK;
d7125f3a1b435761c393f9ec406e85a73ae2a3e7vboxsync r->bd_valid = 0;
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync voice_set_active (s, r - s->bm_regs, 0);
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync memset (s->silence, 0, sizeof (s->silence));
0c4004948fca34f2db87e7b38013137e9472c306vboxsync}
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsyncstatic void mixer_store (AC97LinkState *s, uint32_t i, uint16_t v)
0c4004948fca34f2db87e7b38013137e9472c306vboxsync{
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync if (i + 2 > sizeof (s->mixer_data))
0c4004948fca34f2db87e7b38013137e9472c306vboxsync {
0c4004948fca34f2db87e7b38013137e9472c306vboxsync Log (("ac97: mixer_store: index %d out of bounds %d\n",
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync i, sizeof (s->mixer_data)));
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync return;
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync }
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync s->mixer_data[i + 0] = v & 0xff;
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync s->mixer_data[i + 1] = v >> 8;
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync}
0c4004948fca34f2db87e7b38013137e9472c306vboxsync
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsyncstatic uint16_t mixer_load (AC97LinkState *s, uint32_t i)
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync{
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync uint16_t val;
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync if (i + 2 > sizeof (s->mixer_data))
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync {
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync Log (("ac97: mixer_store: index %d out of bounds %d\n",
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync i, sizeof (s->mixer_data)));
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync val = 0xffff;
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync }
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync else
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync val = s->mixer_data[i + 0] | (s->mixer_data[i + 1] << 8);
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync return val;
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync}
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsyncstatic void open_voice (AC97LinkState *s, int index, int freq)
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync{
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync audsettings_t as;
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync if (freq)
d4e9ccea0ea1ed303b5708ff94f6c202755f0dc6vboxsync {
d4e9ccea0ea1ed303b5708ff94f6c202755f0dc6vboxsync as.freq = freq;
d4e9ccea0ea1ed303b5708ff94f6c202755f0dc6vboxsync as.nchannels = 2;
d4e9ccea0ea1ed303b5708ff94f6c202755f0dc6vboxsync as.fmt = AUD_FMT_S16;
d4e9ccea0ea1ed303b5708ff94f6c202755f0dc6vboxsync as.endianness = 0;
d4e9ccea0ea1ed303b5708ff94f6c202755f0dc6vboxsync
d4e9ccea0ea1ed303b5708ff94f6c202755f0dc6vboxsync switch (index)
d4e9ccea0ea1ed303b5708ff94f6c202755f0dc6vboxsync {
d4e9ccea0ea1ed303b5708ff94f6c202755f0dc6vboxsync case PI_INDEX: /* PCM in */
d4e9ccea0ea1ed303b5708ff94f6c202755f0dc6vboxsync s->voice_pi = AUD_open_in (&s->card, s->voice_pi, "ac97.pi",
d4e9ccea0ea1ed303b5708ff94f6c202755f0dc6vboxsync s, pi_callback, &as);
8a339f91959bb7a3315b51a23461b68c7b0cb50evboxsync#ifdef LOG_VOICES
d4e9ccea0ea1ed303b5708ff94f6c202755f0dc6vboxsync LogRel(("AC97: open PI freq=%d (%s)\n", freq, s->voice_pi ? "ok" : "FAIL"));
d4e9ccea0ea1ed303b5708ff94f6c202755f0dc6vboxsync#endif
d4e9ccea0ea1ed303b5708ff94f6c202755f0dc6vboxsync break;
d4e9ccea0ea1ed303b5708ff94f6c202755f0dc6vboxsync
d4e9ccea0ea1ed303b5708ff94f6c202755f0dc6vboxsync case PO_INDEX: /* PCM out */
d4e9ccea0ea1ed303b5708ff94f6c202755f0dc6vboxsync s->voice_po = AUD_open_out (&s->card, s->voice_po, "ac97.po",
d4e9ccea0ea1ed303b5708ff94f6c202755f0dc6vboxsync s, po_callback, &as);
d4e9ccea0ea1ed303b5708ff94f6c202755f0dc6vboxsync#ifdef LOG_VOICES
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync LogRel(("AC97: open PO freq=%d (%s)\n", freq, s->voice_po ? "ok" : "FAIL"));
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync#endif
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync break;
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync
d4e9ccea0ea1ed303b5708ff94f6c202755f0dc6vboxsync case MC_INDEX: /* Mic in */
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync s->voice_mc = AUD_open_in (&s->card, s->voice_mc, "ac97.mc",
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync s, mc_callback, &as);
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync#ifdef LOG_VOICES
d4e9ccea0ea1ed303b5708ff94f6c202755f0dc6vboxsync LogRel(("AC97: open MC freq=%d (%s)\n", freq, s->voice_mc ? "ok" : "FAIL"));
d4e9ccea0ea1ed303b5708ff94f6c202755f0dc6vboxsync#endif
d4e9ccea0ea1ed303b5708ff94f6c202755f0dc6vboxsync break;
d4e9ccea0ea1ed303b5708ff94f6c202755f0dc6vboxsync }
d4e9ccea0ea1ed303b5708ff94f6c202755f0dc6vboxsync }
d4e9ccea0ea1ed303b5708ff94f6c202755f0dc6vboxsync else
0c4004948fca34f2db87e7b38013137e9472c306vboxsync {
d7125f3a1b435761c393f9ec406e85a73ae2a3e7vboxsync switch (index)
d7125f3a1b435761c393f9ec406e85a73ae2a3e7vboxsync {
d4e9ccea0ea1ed303b5708ff94f6c202755f0dc6vboxsync case PI_INDEX:
d4e9ccea0ea1ed303b5708ff94f6c202755f0dc6vboxsync AUD_close_in (&s->card, s->voice_pi);
d4e9ccea0ea1ed303b5708ff94f6c202755f0dc6vboxsync#ifdef LOG_VOICES
d4e9ccea0ea1ed303b5708ff94f6c202755f0dc6vboxsync LogRel(("AC97: Closing PCM IN\n"));
d4e9ccea0ea1ed303b5708ff94f6c202755f0dc6vboxsync#endif
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync s->voice_pi = NULL;
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync break;
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync case PO_INDEX:
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync AUD_close_out (&s->card, s->voice_po);
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync#ifdef LOG_VOICES
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync LogRel(("AC97: Closing PCM OUT\n"));
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync#endif
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync s->voice_po = NULL;
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync break;
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync case MC_INDEX:
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync AUD_close_in (&s->card, s->voice_mc);
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync#ifdef LOG_VOICES
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync LogRel(("AC97: Closing MIC IN\n"));
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync#endif
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync s->voice_mc = NULL;
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync break;
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync }
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync }
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync}
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsyncstatic void reset_voices (AC97LinkState *s, uint8_t active[LAST_INDEX])
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync{
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync uint16_t freq;
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync freq = mixer_load (s, AC97_PCM_LR_ADC_Rate);
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync open_voice (s, PI_INDEX, freq);
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync AUD_set_active_in (s->voice_pi, active[PI_INDEX]);
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync freq = mixer_load (s, AC97_PCM_Front_DAC_Rate);
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync open_voice (s, PO_INDEX, freq);
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync AUD_set_active_out (s->voice_po, active[PO_INDEX]);
ee4d840f54fd2dcea8a73b1b86d5ec0db370b05dvboxsync
ee4d840f54fd2dcea8a73b1b86d5ec0db370b05dvboxsync freq = mixer_load (s, AC97_MIC_ADC_Rate);
ee4d840f54fd2dcea8a73b1b86d5ec0db370b05dvboxsync open_voice (s, MC_INDEX, freq);
ee4d840f54fd2dcea8a73b1b86d5ec0db370b05dvboxsync AUD_set_active_in (s->voice_mc, active[MC_INDEX]);
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync}
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync
ee4d840f54fd2dcea8a73b1b86d5ec0db370b05dvboxsync#ifdef USE_MIXER
ee4d840f54fd2dcea8a73b1b86d5ec0db370b05dvboxsyncstatic void set_volume (AC97LinkState *s, int index,
a39ea3668b7019c23a68936259545f9b71bce1aavboxsync audmixerctl_t mt, uint32_t val)
0db6a029780d9f9b347500e117320a8d5661efe5vboxsync{
da3503c04ce76e653401396fe2795a9bc2427a1dvboxsync int mute = (val >> MUTE_SHIFT) & 1;
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync uint8_t rvol = VOL_MASK - (val & VOL_MASK);
ee4d840f54fd2dcea8a73b1b86d5ec0db370b05dvboxsync uint8_t lvol = VOL_MASK - ((val >> 8) & VOL_MASK);
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync rvol = 255 * rvol / VOL_MASK;
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync lvol = 255 * lvol / VOL_MASK;
d4e9ccea0ea1ed303b5708ff94f6c202755f0dc6vboxsync
8f0fc87a72dee210b62acc9dd859a4bebf8bfb33vboxsync#ifdef SOFT_VOLUME
8f0fc87a72dee210b62acc9dd859a4bebf8bfb33vboxsync if (index == AC97_Master_Volume_Mute)
0c4004948fca34f2db87e7b38013137e9472c306vboxsync AUD_set_volume_out (s->voice_po, mute, lvol, rvol);
0c4004948fca34f2db87e7b38013137e9472c306vboxsync else
d4e9ccea0ea1ed303b5708ff94f6c202755f0dc6vboxsync AUD_set_volume (mt, &mute, &lvol, &rvol);
0c4004948fca34f2db87e7b38013137e9472c306vboxsync#else
d4e9ccea0ea1ed303b5708ff94f6c202755f0dc6vboxsync AUD_set_volume (mt, &mute, &lvol, &rvol);
0c4004948fca34f2db87e7b38013137e9472c306vboxsync#endif
0c4004948fca34f2db87e7b38013137e9472c306vboxsync
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync rvol = VOL_MASK - ((VOL_MASK * rvol) / 255);
d4e9ccea0ea1ed303b5708ff94f6c202755f0dc6vboxsync lvol = VOL_MASK - ((VOL_MASK * lvol) / 255);
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync mixer_store (s, index, val);
d4e9ccea0ea1ed303b5708ff94f6c202755f0dc6vboxsync}
d4e9ccea0ea1ed303b5708ff94f6c202755f0dc6vboxsync
71f6a34b72f9cc873da208630959de49df1a28a5vboxsyncstatic audrecsource_t ac97_to_aud_record_source (uint8_t i)
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync{
d4e9ccea0ea1ed303b5708ff94f6c202755f0dc6vboxsync switch (i)
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync {
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync case REC_MIC: return AUD_REC_MIC;
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync case REC_CD: return AUD_REC_CD;
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync case REC_VIDEO: return AUD_REC_VIDEO;
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync case REC_AUX: return AUD_REC_AUX;
0c4004948fca34f2db87e7b38013137e9472c306vboxsync case REC_LINE_IN: return AUD_REC_LINE_IN;
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync case REC_PHONE: return AUD_REC_PHONE;
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync default: Log (("ac97: Unknown record source %d, using MIC\n", i));
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync return AUD_REC_MIC;
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync }
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync}
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync
71f6a34b72f9cc873da208630959de49df1a28a5vboxsyncstatic uint8_t aud_to_ac97_record_source (audrecsource_t rs)
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync{
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync switch (rs)
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync {
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync case AUD_REC_MIC: return REC_MIC;
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync case AUD_REC_CD: return REC_CD;
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync case AUD_REC_VIDEO: return REC_VIDEO;
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync case AUD_REC_AUX: return REC_AUX;
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync case AUD_REC_LINE_IN: return REC_LINE_IN;
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync case AUD_REC_PHONE: return REC_PHONE;
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync default: Log (("ac97: Unknown audio recording source %d using MIC\n", rs));
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync return REC_MIC;
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync }
d4e9ccea0ea1ed303b5708ff94f6c202755f0dc6vboxsync}
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync
0c4004948fca34f2db87e7b38013137e9472c306vboxsyncstatic void record_select (AC97LinkState *s, uint32_t val)
0c4004948fca34f2db87e7b38013137e9472c306vboxsync{
0c4004948fca34f2db87e7b38013137e9472c306vboxsync uint8_t rs = val & REC_MASK;
0c4004948fca34f2db87e7b38013137e9472c306vboxsync uint8_t ls = (val >> 8) & REC_MASK;
0c4004948fca34f2db87e7b38013137e9472c306vboxsync audrecsource_t ars = ac97_to_aud_record_source (rs);
d4e9ccea0ea1ed303b5708ff94f6c202755f0dc6vboxsync audrecsource_t als = ac97_to_aud_record_source (ls);
0c4004948fca34f2db87e7b38013137e9472c306vboxsync AUD_set_record_source (&als, &ars);
0c4004948fca34f2db87e7b38013137e9472c306vboxsync rs = aud_to_ac97_record_source (ars);
d4e9ccea0ea1ed303b5708ff94f6c202755f0dc6vboxsync ls = aud_to_ac97_record_source (als);
0c4004948fca34f2db87e7b38013137e9472c306vboxsync mixer_store (s, AC97_Record_Select, rs | (ls << 8));
0c4004948fca34f2db87e7b38013137e9472c306vboxsync}
0c4004948fca34f2db87e7b38013137e9472c306vboxsync#endif
0c4004948fca34f2db87e7b38013137e9472c306vboxsync
71f6a34b72f9cc873da208630959de49df1a28a5vboxsyncstatic void mixer_reset (AC97LinkState *s)
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync{
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync uint8_t active[LAST_INDEX];
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync Log (("ac97: mixer_reset\n"));
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync memset (s->mixer_data, 0, sizeof (s->mixer_data));
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync memset (active, 0, sizeof (active));
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync mixer_store (s, AC97_Reset , 0x0000); /* 6940 */
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync mixer_store (s, AC97_Master_Volume_Mono_Mute , 0x8000);
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync mixer_store (s, AC97_PC_BEEP_Volume_Mute , 0x0000);
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync mixer_store (s, AC97_Phone_Volume_Mute , 0x8008);
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync mixer_store (s, AC97_Mic_Volume_Mute , 0x8008);
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync mixer_store (s, AC97_CD_Volume_Mute , 0x8808);
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync mixer_store (s, AC97_Aux_Volume_Mute , 0x8808);
d4e9ccea0ea1ed303b5708ff94f6c202755f0dc6vboxsync mixer_store (s, AC97_Record_Gain_Mic_Mute , 0x8000);
d4e9ccea0ea1ed303b5708ff94f6c202755f0dc6vboxsync mixer_store (s, AC97_General_Purpose , 0x0000);
8f0fc87a72dee210b62acc9dd859a4bebf8bfb33vboxsync mixer_store (s, AC97_3D_Control , 0x0000);
8f0fc87a72dee210b62acc9dd859a4bebf8bfb33vboxsync mixer_store (s, AC97_Powerdown_Ctrl_Stat , 0x000f);
8f0fc87a72dee210b62acc9dd859a4bebf8bfb33vboxsync
8f0fc87a72dee210b62acc9dd859a4bebf8bfb33vboxsync /*
8f0fc87a72dee210b62acc9dd859a4bebf8bfb33vboxsync * Sigmatel 9700 (STAC9700)
0c4004948fca34f2db87e7b38013137e9472c306vboxsync */
8f0fc87a72dee210b62acc9dd859a4bebf8bfb33vboxsync mixer_store (s, AC97_Vendor_ID1 , 0x8384);
8f0fc87a72dee210b62acc9dd859a4bebf8bfb33vboxsync mixer_store (s, AC97_Vendor_ID2 , 0x7600); /* 7608 */
8f0fc87a72dee210b62acc9dd859a4bebf8bfb33vboxsync
8f0fc87a72dee210b62acc9dd859a4bebf8bfb33vboxsync mixer_store (s, AC97_Extended_Audio_ID , 0x0809);
8f0fc87a72dee210b62acc9dd859a4bebf8bfb33vboxsync mixer_store (s, AC97_Extended_Audio_Ctrl_Stat, 0x0009);
8f0fc87a72dee210b62acc9dd859a4bebf8bfb33vboxsync mixer_store (s, AC97_PCM_Front_DAC_Rate , 0xbb80);
0c4004948fca34f2db87e7b38013137e9472c306vboxsync mixer_store (s, AC97_PCM_Surround_DAC_Rate , 0xbb80);
0c4004948fca34f2db87e7b38013137e9472c306vboxsync mixer_store (s, AC97_PCM_LFE_DAC_Rate , 0xbb80);
0c4004948fca34f2db87e7b38013137e9472c306vboxsync mixer_store (s, AC97_PCM_LR_ADC_Rate , 0xbb80);
0c4004948fca34f2db87e7b38013137e9472c306vboxsync mixer_store (s, AC97_MIC_ADC_Rate , 0xbb80);
0c4004948fca34f2db87e7b38013137e9472c306vboxsync
0c4004948fca34f2db87e7b38013137e9472c306vboxsync#ifdef USE_MIXER
0c4004948fca34f2db87e7b38013137e9472c306vboxsync record_select (s, 0);
0c4004948fca34f2db87e7b38013137e9472c306vboxsync set_volume (s, AC97_Master_Volume_Mute, AUD_MIXER_VOLUME, 0x8000);
0c4004948fca34f2db87e7b38013137e9472c306vboxsync set_volume (s, AC97_PCM_Out_Volume_Mute, AUD_MIXER_PCM, 0x8808);
0c4004948fca34f2db87e7b38013137e9472c306vboxsync set_volume (s, AC97_Line_In_Volume_Mute, AUD_MIXER_LINE_IN, 0x8808);
0c4004948fca34f2db87e7b38013137e9472c306vboxsync#else
8f0fc87a72dee210b62acc9dd859a4bebf8bfb33vboxsync mixer_store (s, AC97_Record_Select, 0);
8f0fc87a72dee210b62acc9dd859a4bebf8bfb33vboxsync mixer_store (s, AC97_Master_Volume_Mute, 0x8000);
0c4004948fca34f2db87e7b38013137e9472c306vboxsync mixer_store (s, AC97_PCM_Out_Volume_Mute, 0x8808);
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync mixer_store (s, AC97_Line_In_Volume_Mute, 0x8808);
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync#endif
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync reset_voices (s, active);
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync}
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync
71f6a34b72f9cc873da208630959de49df1a28a5vboxsyncstatic int write_audio (AC97LinkState *s, AC97BusMasterRegs *r,
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync int max, int *stop)
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync{
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync PPDMDEVINS pDevIns = ICHAC97STATE_2_DEVINS(s);
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync uint8_t tmpbuf[4096];
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync uint32_t addr = r->bd.addr;
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync uint32_t temp = r->picb << 1;
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync uint32_t written = 0;
8f0fc87a72dee210b62acc9dd859a4bebf8bfb33vboxsync int to_copy = 0;
8f0fc87a72dee210b62acc9dd859a4bebf8bfb33vboxsync
8f0fc87a72dee210b62acc9dd859a4bebf8bfb33vboxsync temp = audio_MIN (temp, (uint32_t) max);
8f0fc87a72dee210b62acc9dd859a4bebf8bfb33vboxsync if (!temp)
8f0fc87a72dee210b62acc9dd859a4bebf8bfb33vboxsync {
8f0fc87a72dee210b62acc9dd859a4bebf8bfb33vboxsync *stop = 1;
8f0fc87a72dee210b62acc9dd859a4bebf8bfb33vboxsync return 0;
0c4004948fca34f2db87e7b38013137e9472c306vboxsync }
8f0fc87a72dee210b62acc9dd859a4bebf8bfb33vboxsync
8f0fc87a72dee210b62acc9dd859a4bebf8bfb33vboxsync while (temp)
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync {
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync int copied;
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync to_copy = audio_MIN (temp, sizeof (tmpbuf));
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync PDMDevHlpPhysRead (pDevIns, addr, tmpbuf, to_copy);
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync copied = AUD_write (s->voice_po, tmpbuf, to_copy);
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync Log (("ac97: write_audio max=%x to_copy=%x copied=%x\n",
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync max, to_copy, copied));
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync if (!copied)
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync {
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync *stop = 1;
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync break;
e74eef731a813e4e06680c587a6759b9974b29c9vboxsync }
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync temp -= copied;
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync addr += copied;
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync written += copied;
8cd2f2e64725096acb682f34a5568b7fb816eda7vboxsync }
8cd2f2e64725096acb682f34a5568b7fb816eda7vboxsync
8cd2f2e64725096acb682f34a5568b7fb816eda7vboxsync if (!temp)
e74eef731a813e4e06680c587a6759b9974b29c9vboxsync {
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync if (to_copy < 4)
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync {
26947320577c481b4afefdb0afbb855181e5b2e8vboxsync Log (("ac97: whoops\n"));
26947320577c481b4afefdb0afbb855181e5b2e8vboxsync s->last_samp = 0;
26947320577c481b4afefdb0afbb855181e5b2e8vboxsync }
26947320577c481b4afefdb0afbb855181e5b2e8vboxsync else
26947320577c481b4afefdb0afbb855181e5b2e8vboxsync s->last_samp = *(uint32_t *) &tmpbuf[to_copy - 4];
26947320577c481b4afefdb0afbb855181e5b2e8vboxsync }
26947320577c481b4afefdb0afbb855181e5b2e8vboxsync
26947320577c481b4afefdb0afbb855181e5b2e8vboxsync r->bd.addr = addr;
26947320577c481b4afefdb0afbb855181e5b2e8vboxsync return written;
26947320577c481b4afefdb0afbb855181e5b2e8vboxsync}
26947320577c481b4afefdb0afbb855181e5b2e8vboxsync
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsyncstatic void write_bup (AC97LinkState *s, int elapsed)
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync{
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync int written = 0;
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync Log (("ac97: write_bup\n"));
cba6719bd64ec749967bbe931230452664109857vboxsync if (!(s->bup_flag & BUP_SET))
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync {
c28fa006ba669ad8f26ae31d00a338379c04ea1bvboxsync if (s->bup_flag & BUP_LAST)
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync {
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync unsigned int i;
c28fa006ba669ad8f26ae31d00a338379c04ea1bvboxsync uint32_t *p = (uint32_t*)s->silence;
e74eef731a813e4e06680c587a6759b9974b29c9vboxsync for (i = 0; i < sizeof (s->silence) / 4; i++)
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync *p++ = s->last_samp;
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync }
a8139954a84d6e9090dd3a8371aa788351d45bc3vboxsync else
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync memset (s->silence, 0, sizeof (s->silence));
a8139954a84d6e9090dd3a8371aa788351d45bc3vboxsync
a8139954a84d6e9090dd3a8371aa788351d45bc3vboxsync s->bup_flag |= BUP_SET;
a8139954a84d6e9090dd3a8371aa788351d45bc3vboxsync }
a8139954a84d6e9090dd3a8371aa788351d45bc3vboxsync
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync while (elapsed)
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync {
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync unsigned int temp = audio_MIN ((unsigned int)elapsed, sizeof (s->silence));
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync while (temp)
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync {
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync int copied = AUD_write (s->voice_po, s->silence, temp);
cba6719bd64ec749967bbe931230452664109857vboxsync if (!copied)
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync return;
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync temp -= copied;
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync elapsed -= copied;
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync written += copied;
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync }
da3503c04ce76e653401396fe2795a9bc2427a1dvboxsync }
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync}
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsyncstatic int read_audio (AC97LinkState *s, AC97BusMasterRegs *r,
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync int max, int *stop)
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync{
da3503c04ce76e653401396fe2795a9bc2427a1dvboxsync PPDMDEVINS pDevIns = ICHAC97STATE_2_DEVINS(s);
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync uint8_t tmpbuf[4096];
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync uint32_t addr = r->bd.addr;
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync uint32_t temp = r->picb << 1;
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync uint32_t nread = 0;
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync int to_copy = 0;
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync SWVoiceIn *voice = (r - s->bm_regs) == MC_INDEX ? s->voice_mc : s->voice_pi;
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync
0db6a029780d9f9b347500e117320a8d5661efe5vboxsync temp = audio_MIN (temp, (uint32_t) max);
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync if (!temp)
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync {
da3503c04ce76e653401396fe2795a9bc2427a1dvboxsync *stop = 1;
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync return 0;
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync }
0db6a029780d9f9b347500e117320a8d5661efe5vboxsync
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync while (temp)
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync {
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync int acquired;
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync to_copy = audio_MIN (temp, sizeof (tmpbuf));
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync acquired = AUD_read (voice, tmpbuf, to_copy);
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync if (!acquired)
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync {
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync *stop = 1;
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync break;
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync }
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync PDMDevHlpPhysWrite (pDevIns, addr, tmpbuf, acquired);
da3503c04ce76e653401396fe2795a9bc2427a1dvboxsync temp -= acquired;
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync addr += acquired;
cba6719bd64ec749967bbe931230452664109857vboxsync nread += acquired;
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync }
9b789c281103a2489742bf32f6ab500e38b2ecd5vboxsync
9b789c281103a2489742bf32f6ab500e38b2ecd5vboxsync r->bd.addr = addr;
9b789c281103a2489742bf32f6ab500e38b2ecd5vboxsync return nread;
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync}
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsyncstatic void transfer_audio (AC97LinkState *s, int index, int elapsed)
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync{
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync AC97BusMasterRegs *r = &s->bm_regs[index];
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync int written = 0, stop = 0;
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync if (r->sr & SR_DCH)
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync {
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync if (r->cr & CR_RPBM)
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync {
ea779b55cc87f3e3fadddca4672c6697c82606edvboxsync switch (index)
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync {
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync case PO_INDEX:
9b789c281103a2489742bf32f6ab500e38b2ecd5vboxsync write_bup (s, elapsed);
9b789c281103a2489742bf32f6ab500e38b2ecd5vboxsync break;
9b789c281103a2489742bf32f6ab500e38b2ecd5vboxsync }
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync }
c91345f92b829d3fba05ce7a97206d83c5183ce0vboxsync return;
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync }
c91345f92b829d3fba05ce7a97206d83c5183ce0vboxsync
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync while ((elapsed >> 1) && !stop)
44a2ecaf2d0fc196ab76cab13b3f909299e386d1vboxsync {
44a2ecaf2d0fc196ab76cab13b3f909299e386d1vboxsync int temp;
44a2ecaf2d0fc196ab76cab13b3f909299e386d1vboxsync
44a2ecaf2d0fc196ab76cab13b3f909299e386d1vboxsync if (!r->bd_valid)
44a2ecaf2d0fc196ab76cab13b3f909299e386d1vboxsync {
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync Log (("ac97: invalid bd\n"));
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync fetch_bd (s, r);
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync }
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync if (!r->picb)
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync {
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync Log (("ac97: fresh bd %d is empty %#x %#x\n",
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync r->civ, r->bd.addr, r->bd.ctl_len));
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync if (r->civ == r->lvi)
71f6a34b72f9cc873da208630959de49df1a28a5vboxsync {
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync r->sr |= SR_DCH; /* CELV? */
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync s->bup_flag = 0;
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync break;
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync }
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync r->sr &= ~SR_CELV;
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync r->civ = r->piv;
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync r->piv = (r->piv + 1) % 32;
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync fetch_bd (s, r);
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync return;
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync }
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync
5b465a7c1237993faf8bb50120d247f3f0319adavboxsync switch (index)
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync {
ad77e3ec3cde24263bc7537575f5cae442bee3b1vboxsync case PO_INDEX:
ad77e3ec3cde24263bc7537575f5cae442bee3b1vboxsync temp = write_audio (s, r, elapsed, &stop);
ad77e3ec3cde24263bc7537575f5cae442bee3b1vboxsync written += temp;
ad77e3ec3cde24263bc7537575f5cae442bee3b1vboxsync elapsed -= temp;
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync r->picb -= (temp >> 1);
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync break;
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync case PI_INDEX:
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync case MC_INDEX:
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync temp = read_audio (s, r, elapsed, &stop);
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync elapsed -= temp;
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync r->picb -= (temp >> 1);
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync break;
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync }
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync Log(("r->picb = %d\n", r->picb));
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync if (!r->picb)
ad77e3ec3cde24263bc7537575f5cae442bee3b1vboxsync {
ad77e3ec3cde24263bc7537575f5cae442bee3b1vboxsync uint32_t new_sr = r->sr & ~SR_CELV;
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync if (r->bd.ctl_len & BD_IOC)
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync new_sr |= SR_BCIS;
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync if (r->civ == r->lvi)
d4e9ccea0ea1ed303b5708ff94f6c202755f0dc6vboxsync {
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync Log (("ac97: Underrun civ (%d) == lvi (%d)\n", r->civ, r->lvi));
8f0fc87a72dee210b62acc9dd859a4bebf8bfb33vboxsync new_sr |= SR_LVBCI | SR_DCH | SR_CELV;
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync stop = 1;
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync s->bup_flag = (r->bd.ctl_len & BD_BUP) ? BUP_LAST : 0;
cba6719bd64ec749967bbe931230452664109857vboxsync }
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync else
cba6719bd64ec749967bbe931230452664109857vboxsync {
d7125f3a1b435761c393f9ec406e85a73ae2a3e7vboxsync r->civ = r->piv;
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync r->piv = (r->piv + 1) % 32;
8f0fc87a72dee210b62acc9dd859a4bebf8bfb33vboxsync fetch_bd (s, r);
cba6719bd64ec749967bbe931230452664109857vboxsync }
cba6719bd64ec749967bbe931230452664109857vboxsync update_sr (s, r, new_sr);
cba6719bd64ec749967bbe931230452664109857vboxsync }
cba6719bd64ec749967bbe931230452664109857vboxsync }
9dca051a5f8ff457ef1692990f6ecfa280daf265vboxsync}
44a2ecaf2d0fc196ab76cab13b3f909299e386d1vboxsync
static void pi_callback (void *opaque, int avail)
{
transfer_audio ((AC97LinkState*)opaque, PI_INDEX, avail);
}
static void mc_callback (void *opaque, int avail)
{
transfer_audio ((AC97LinkState*)opaque, MC_INDEX, avail);
}
static void po_callback (void *opaque, int free)
{
transfer_audio ((AC97LinkState*)opaque, PO_INDEX, free);
}
/**
* Port I/O Handler for IN operations.
*
* @returns VBox status code.
*
* @param pDevIns The device instance.
* @param pvUser User argument.
* @param uPort Port number used for the IN operation.
* @param pu32 Where to store the result.
* @param cb Number of bytes read.
*/
static DECLCALLBACK(int) ichac97IOPortNABMRead (PPDMDEVINS pDevIns, void *pvUser,
RTIOPORT Port, uint32_t *pu32, unsigned cb)
{
PCIAC97LinkState *d = (PCIAC97LinkState*)pvUser;
AC97LinkState *s = &d->ac97;
switch (cb)
{
case 1:
{
AC97BusMasterRegs *r = NULL;
uint32_t index = Port - d->ac97.IOPortBase[1];
*pu32 = ~0U;
switch (index)
{
case CAS:
/* Codec Access Semaphore Register */
Log (("ac97: CAS %d\n", s->cas));
*pu32 = s->cas;
s->cas = 1;
break;
case PI_CIV:
case PO_CIV:
case MC_CIV:
/* Current Index Value Register */
r = &s->bm_regs[GET_BM (index)];
*pu32 = r->civ;
Log (("ac97: CIV[%d] -> %#x\n", GET_BM (index), *pu32));
break;
case PI_LVI:
case PO_LVI:
case MC_LVI:
/* Last Valid Index Register */
r = &s->bm_regs[GET_BM (index)];
*pu32 = r->lvi;
Log (("ac97: LVI[%d] -> %#x\n", GET_BM (index), *pu32));
break;
case PI_PIV:
case PO_PIV:
case MC_PIV:
/* Prefetched Index Value Register */
r = &s->bm_regs[GET_BM (index)];
*pu32 = r->piv;
Log (("ac97: PIV[%d] -> %#x\n", GET_BM (index), *pu32));
break;
case PI_CR:
case PO_CR:
case MC_CR:
/* Control Register */
r = &s->bm_regs[GET_BM (index)];
*pu32 = r->cr;
Log (("ac97: CR[%d] -> %#x\n", GET_BM (index), *pu32));
break;
case PI_SR:
case PO_SR:
case MC_SR:
/* Status Register (lower part) */
r = &s->bm_regs[GET_BM (index)];
*pu32 = r->sr & 0xff;
Log (("ac97: SRb[%d] -> %#x\n", GET_BM (index), *pu32));
break;
default:
Log (("ac97: U nabm readb %#x -> %#x\n", Port, *pu32));
break;
}
break;
}
case 2:
{
AC97BusMasterRegs *r = NULL;
uint32_t index = Port - d->ac97.IOPortBase[1];
*pu32 = ~0U;
switch (index)
{
case PI_SR:
case PO_SR:
case MC_SR:
/* Status Register */
r = &s->bm_regs[GET_BM (index)];
*pu32 = r->sr;
Log (("ac97: SR[%d] -> %#x\n", GET_BM (index), *pu32));
break;
case PI_PICB:
case PO_PICB:
case MC_PICB:
/* Position in Current Buffer Register */
r = &s->bm_regs[GET_BM (index)];
*pu32 = r->picb;
Log (("ac97: PICB[%d] -> %#x\n", GET_BM (index), *pu32));
break;
default:
Log (("ac97: U nabm readw %#x -> %#x\n", Port, *pu32));
break;
}
break;
}
case 4:
{
AC97BusMasterRegs *r = NULL;
uint32_t index = Port - d->ac97.IOPortBase[1];
*pu32 = ~0U;
switch (index)
{
case PI_BDBAR:
case PO_BDBAR:
case MC_BDBAR:
/* Buffer Descriptor Base Address Register */
r = &s->bm_regs[GET_BM (index)];
*pu32 = r->bdbar;
Log (("ac97: BMADDR[%d] -> %#x\n", GET_BM (index), *pu32));
break;
case PI_CIV:
case PO_CIV:
case MC_CIV:
/* 32-bit access: Current Index Value Register +
* Last Valid Index Register +
* Status Register */
r = &s->bm_regs[GET_BM (index)];
*pu32 = r->civ | (r->lvi << 8) | (r->sr << 16);
Log (("ac97: CIV LVI SR[%d] -> %#x, %#x, %#x\n", GET_BM (index),
r->civ, r->lvi, r->sr));
break;
case PI_PICB:
case PO_PICB:
case MC_PICB:
/* 32-bit access: Position in Current Buffer Register +
* Prefetched Index Value Register +
* Control Register */
r = &s->bm_regs[GET_BM (index)];
*pu32 = r->picb | (r->piv << 16) | (r->cr << 24);
Log (("ac97: PICB PIV CR[%d] -> %#x %#x %#x %#x\n", GET_BM (index),
*pu32, r->picb, r->piv, r->cr));
break;
case GLOB_CNT:
/* Global Control */
*pu32 = s->glob_cnt;
Log (("ac97: glob_cnt -> %#x\n", *pu32));
break;
case GLOB_STA:
/* Global Status */
*pu32 = s->glob_sta | GS_S0CR;
Log (("ac97: glob_sta -> %#x\n", *pu32));
break;
default:
Log (("ac97: U nabm readl %#x -> %#x\n", Port, *pu32));
break;
}
break;
}
default:
return VERR_IOM_IOPORT_UNUSED;
}
return VINF_SUCCESS;
}
/**
* Port I/O Handler for OUT operations.
*
* @returns VBox status code.
*
* @param pDevIns The device instance.
* @param pvUser User argument.
* @param uPort Port number used for the IN operation.
* @param u32 The value to output.
* @param cb The value size in bytes.
*/
static DECLCALLBACK(int) ichac97IOPortNABMWrite (PPDMDEVINS pDevIns, void *pvUser,
RTIOPORT Port, uint32_t u32, unsigned cb)
{
PCIAC97LinkState *d = (PCIAC97LinkState*)pvUser;
AC97LinkState *s = &d->ac97;
switch (cb)
{
case 1:
{
AC97BusMasterRegs *r = NULL;
uint32_t index = Port - d->ac97.IOPortBase[1];
switch (index)
{
case PI_LVI:
case PO_LVI:
case MC_LVI:
/* Last Valid Index */
r = &s->bm_regs[GET_BM (index)];
if ((r->cr & CR_RPBM) && (r->sr & SR_DCH)) {
r->sr &= ~(SR_DCH | SR_CELV);
r->civ = r->piv;
r->piv = (r->piv + 1) % 32;
fetch_bd (s, r);
}
r->lvi = u32 % 32;
Log (("ac97: LVI[%d] <- %#x\n", GET_BM (index), u32));
break;
case PI_CR:
case PO_CR:
case MC_CR:
/* Control Register */
r = &s->bm_regs[GET_BM (index)];
if (u32 & CR_RR)
reset_bm_regs (s, r);
else
{
r->cr = u32 & CR_VALID_MASK;
if (!(r->cr & CR_RPBM))
{
voice_set_active (s, r - s->bm_regs, 0);
r->sr |= SR_DCH;
}
else
{
r->civ = r->piv;
r->piv = (r->piv + 1) % 32;
fetch_bd (s, r);
r->sr &= ~SR_DCH;
voice_set_active (s, r - s->bm_regs, 1);
}
}
Log (("ac97: CR[%d] <- %#x (cr %#x)\n", GET_BM (index), u32, r->cr));
break;
case PI_SR:
case PO_SR:
case MC_SR:
/* Status Register */
r = &s->bm_regs[GET_BM (index)];
r->sr |= u32 & ~(SR_RO_MASK | SR_WCLEAR_MASK);
update_sr (s, r, r->sr & ~(u32 & SR_WCLEAR_MASK));
Log (("ac97: SR[%d] <- %#x (sr %#x)\n", GET_BM (index), u32, r->sr));
break;
default:
Log (("ac97: U nabm writeb %#x <- %#x\n", Port, u32));
break;
}
break;
}
case 2:
{
AC97BusMasterRegs *r = NULL;
uint32_t index = Port - d->ac97.IOPortBase[1];
switch (index)
{
case PI_SR:
case PO_SR:
case MC_SR:
/* Status Register */
r = &s->bm_regs[GET_BM (index)];
r->sr |= u32 & ~(SR_RO_MASK | SR_WCLEAR_MASK);
update_sr (s, r, r->sr & ~(u32 & SR_WCLEAR_MASK));
Log (("ac97: SR[%d] <- %#x (sr %#x)\n", GET_BM (index), u32, r->sr));
break;
default:
Log (("ac97: U nabm writew %#x <- %#x\n", Port, u32));
break;
}
break;
}
case 4:
{
AC97BusMasterRegs *r = NULL;
uint32_t index = Port - d->ac97.IOPortBase[1];
switch (index)
{
case PI_BDBAR:
case PO_BDBAR:
case MC_BDBAR:
/* Buffer Descriptor list Base Address Register */
r = &s->bm_regs[GET_BM (index)];
r->bdbar = u32 & ~3;
Log (("ac97: BDBAR[%d] <- %#x (bdbar %#x)\n",
GET_BM (index), u32, r->bdbar));
break;
case GLOB_CNT:
/* Global Control */
if (u32 & GC_WR)
warm_reset (s);
if (u32 & GC_CR)
cold_reset (s);
if (!(u32 & (GC_WR | GC_CR)))
s->glob_cnt = u32 & GC_VALID_MASK;
Log (("ac97: glob_cnt <- %#x (glob_cnt %#x)\n", u32, s->glob_cnt));
break;
case GLOB_STA:
/* Global Status */
s->glob_sta &= ~(u32 & GS_WCLEAR_MASK);
s->glob_sta |= (u32 & ~(GS_WCLEAR_MASK | GS_RO_MASK)) & GS_VALID_MASK;
Log (("ac97: glob_sta <- %#x (glob_sta %#x)\n", u32, s->glob_sta));
break;
default:
Log (("ac97: U nabm writel %#x <- %#x\n", Port, u32));
break;
}
break;
}
default:
AssertMsgFailed(("Port=%#x cb=%d u32=%#x\n", Port, cb, u32));
break;
}
return VINF_SUCCESS;
}
/**
* Port I/O Handler for IN operations.
*
* @returns VBox status code.
*
* @param pDevIns The device instance.
* @param pvUser User argument.
* @param uPort Port number used for the IN operation.
* @param pu32 Where to store the result.
* @param cb Number of bytes read.
*/
static DECLCALLBACK(int) ichac97IOPortNAMRead (PPDMDEVINS pDevIns, void *pvUser,
RTIOPORT Port, uint32_t *pu32, unsigned cb)
{
PCIAC97LinkState *d = (PCIAC97LinkState*)pvUser;
AC97LinkState *s = &d->ac97;
switch (cb)
{
case 1:
{
Log (("ac97: U nam readb %#x\n", Port));
s->cas = 0;
*pu32 = ~0U;
break;
}
case 2:
{
uint32_t index = Port - d->ac97.IOPortBase[0];
*pu32 = ~0U;
s->cas = 0;
switch (index)
{
default:
*pu32 = mixer_load (s, index);
Log (("ac97: nam readw %#x -> %#x\n", Port, *pu32));
break;
}
break;
}
case 4:
{
Log (("ac97: U nam readl %#x\n", Port));
s->cas = 0;
*pu32 = ~0U;
break;
}
default:
return VERR_IOM_IOPORT_UNUSED;
}
return VINF_SUCCESS;
}
/**
* Port I/O Handler for OUT operations.
*
* @returns VBox status code.
*
* @param pDevIns The device instance.
* @param pvUser User argument.
* @param uPort Port number used for the IN operation.
* @param u32 The value to output.
* @param cb The value size in bytes.
*/
static DECLCALLBACK(int) ichac97IOPortNAMWrite (PPDMDEVINS pDevIns, void *pvUser,
RTIOPORT Port, uint32_t u32, unsigned cb)
{
PCIAC97LinkState *d = (PCIAC97LinkState*)pvUser;
AC97LinkState *s = &d->ac97;
switch (cb)
{
case 1:
{
Log (("ac97: U nam writeb %#x <- %#x\n", Port, u32));
s->cas = 0;
break;
}
case 2:
{
uint32_t index = Port - d->ac97.IOPortBase[0];
s->cas = 0;
switch (index)
{
case AC97_Reset:
mixer_reset (s);
break;
case AC97_Powerdown_Ctrl_Stat:
u32 &= ~0xf;
u32 |= mixer_load (s, index) & 0xf;
mixer_store (s, index, u32);
break;
#ifdef USE_MIXER
case AC97_Master_Volume_Mute:
set_volume (s, index, AUD_MIXER_VOLUME, u32);
break;
case AC97_PCM_Out_Volume_Mute:
set_volume (s, index, AUD_MIXER_PCM, u32);
break;
case AC97_Line_In_Volume_Mute:
set_volume (s, index, AUD_MIXER_LINE_IN, u32);
break;
case AC97_Record_Select:
record_select (s, u32);
break;
#else
case AC97_Master_Volume_Mute:
case AC97_PCM_Out_Volume_Mute:
case AC97_Line_In_Volume_Mute:
case AC97_Record_Select:
mixer_store (s, index, u32);
break;
#endif
case AC97_Vendor_ID1:
case AC97_Vendor_ID2:
Log (("ac97: Attempt to write vendor ID to %#x\n", u32));
break;
case AC97_Extended_Audio_ID:
Log (("ac97: Attempt to write extended audio ID to %#x\n", u32));
break;
case AC97_Extended_Audio_Ctrl_Stat:
if (!(u32 & EACS_VRA))
{
mixer_store (s, AC97_PCM_Front_DAC_Rate, 0xbb80);
mixer_store (s, AC97_PCM_LR_ADC_Rate, 0xbb80);
open_voice (s, PI_INDEX, 48000);
open_voice (s, PO_INDEX, 48000);
}
if (!(u32 & EACS_VRM))
{
mixer_store (s, AC97_MIC_ADC_Rate, 0xbb80);
open_voice (s, MC_INDEX, 48000);
}
Log (("ac97: Setting extended audio control to %#x\n", u32));
mixer_store (s, AC97_Extended_Audio_Ctrl_Stat, u32);
break;
case AC97_PCM_Front_DAC_Rate:
if (mixer_load (s, AC97_Extended_Audio_Ctrl_Stat) & EACS_VRA)
{
mixer_store (s, index, u32);
Log(("ac97: Set front DAC rate to %d\n", u32));
open_voice (s, PO_INDEX, u32);
}
else
{
Log (("ac97: Attempt to set front DAC rate to %d, "
"but VRA is not set\n",
u32));
}
break;
case AC97_MIC_ADC_Rate:
if (mixer_load (s, AC97_Extended_Audio_Ctrl_Stat) & EACS_VRM)
{
mixer_store (s, index, u32);
Log (("ac97: Set MIC ADC rate to %d\n", u32));
open_voice (s, MC_INDEX, u32);
}
else
{
Log (("ac97: Attempt to set MIC ADC rate to %d, "
"but VRM is not set\n",
u32));
}
break;
case AC97_PCM_LR_ADC_Rate:
if (mixer_load (s, AC97_Extended_Audio_Ctrl_Stat) & EACS_VRA)
{
mixer_store (s, index, u32);
Log (("ac97: Set front LR ADC rate to %d\n", u32));
open_voice (s, PI_INDEX, u32);
}
else
{
Log (("ac97: Attempt to set LR ADC rate to %d, but VRA is not set\n",
u32));
}
break;
default:
Log (("ac97: U nam writew %#x <- %#x\n", Port, u32));
mixer_store (s, index, u32);
break;
}
break;
}
case 4:
{
Log (("ac97: U nam writel %#x <- %#x\n", Port, u32));
s->cas = 0;
break;
}
default:
AssertMsgFailed(("Port=%#x cb=%d u32=%#x\n", Port, cb, u32));
break;
}
return VINF_SUCCESS;
}
/**
* Callback function for mapping a PCI I/O region.
*
* @return VBox status code.
* @param pPciDev Pointer to PCI device.
* Use pPciDev->pDevIns to get the device instance.
* @param iRegion The region number.
* @param GCPhysAddress Physical address of the region.
* If iType is PCI_ADDRESS_SPACE_IO, this is an
* I/O port, else it's a physical address.
* This address is *NOT* relative
* to pci_mem_base like earlier!
* @param enmType One of the PCI_ADDRESS_SPACE_* values.
*/
static DECLCALLBACK(int) ichac97IOPortMap (PPCIDEVICE pPciDev, int iRegion,
RTGCPHYS GCPhysAddress, uint32_t cb,
PCIADDRESSSPACE enmType)
{
int rc;
PPDMDEVINS pDevIns = pPciDev->pDevIns;
RTIOPORT Port = (RTIOPORT)GCPhysAddress;
PCIAC97LinkState *pData = PCIDEV_2_ICHAC97STATE(pPciDev);
Assert(enmType == PCI_ADDRESS_SPACE_IO);
Assert(cb >= 0x20);
if (iRegion == 0)
rc = PDMDevHlpIOPortRegister (pDevIns, Port, 256, pData,
ichac97IOPortNAMWrite, ichac97IOPortNAMRead,
NULL, NULL, "ICHAC97 NAM");
else
rc = PDMDevHlpIOPortRegister (pDevIns, Port, 64, pData,
ichac97IOPortNABMWrite, ichac97IOPortNABMRead,
NULL, NULL, "ICHAC97 NABM");
if (VBOX_FAILURE(rc))
return rc;
pData->ac97.IOPortBase[iRegion] = Port;
return VINF_SUCCESS;
}
/**
* Saves a state of the AC'97 device.
*
* @returns VBox status code.
* @param pDevIns The device instance.
* @param pSSMHandle The handle to save the state to.
*/
static DECLCALLBACK(int) ichac97SaveExec (PPDMDEVINS pDevIns, PSSMHANDLE pSSMHandle)
{
PCIAC97LinkState *pData = PDMINS2DATA(pDevIns, PCIAC97LinkState *);
size_t i;
uint8_t active[LAST_INDEX];
AC97LinkState *s = &pData->ac97;
SSMR3PutU32 (pSSMHandle, s->glob_cnt);
SSMR3PutU32 (pSSMHandle, s->glob_sta);
SSMR3PutU32 (pSSMHandle, s->cas);
for (i = 0; i < sizeof (s->bm_regs) / sizeof (s->bm_regs[0]); ++i)
{
AC97BusMasterRegs *r = &s->bm_regs[i];
SSMR3PutU32 (pSSMHandle, r->bdbar);
SSMR3PutU8 (pSSMHandle, r->civ);
SSMR3PutU8 (pSSMHandle, r->lvi);
SSMR3PutU16 (pSSMHandle, r->sr);
SSMR3PutU16 (pSSMHandle, r->picb);
SSMR3PutU8 (pSSMHandle, r->piv);
SSMR3PutU8 (pSSMHandle, r->cr);
SSMR3PutS32 (pSSMHandle, r->bd_valid);
SSMR3PutU32 (pSSMHandle, r->bd.addr);
SSMR3PutU32 (pSSMHandle, r->bd.ctl_len);
}
SSMR3PutMem (pSSMHandle, s->mixer_data, sizeof (s->mixer_data));
active[PI_INDEX] = AUD_is_active_in (s->voice_pi) ? 1 : 0;
active[PO_INDEX] = AUD_is_active_out (s->voice_po) ? 1 : 0;
active[MC_INDEX] = AUD_is_active_in (s->voice_mc) ? 1 : 0;
SSMR3PutMem (pSSMHandle, active, sizeof (active));
return VINF_SUCCESS;
}
/**
* Loads a saved AC'97 device state.
*
* @returns VBox status code.
* @param pDevIns The device instance.
* @param pSSMHandle The handle to the saved state.
* @param u32Version The data unit version number.
*/
static DECLCALLBACK(int) ichac97LoadExec (PPDMDEVINS pDevIns, PSSMHANDLE pSSMHandle,
uint32_t u32Version)
{
PCIAC97LinkState *pData = PDMINS2DATA(pDevIns, PCIAC97LinkState *);
size_t i;
uint8_t active[LAST_INDEX];
AC97LinkState *s = &pData->ac97;
if (u32Version != AC97_SSM_VERSION)
{
AssertFailed();
return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
}
SSMR3GetU32 (pSSMHandle, &s->glob_cnt);
SSMR3GetU32 (pSSMHandle, &s->glob_sta);
SSMR3GetU32 (pSSMHandle, &s->cas);
for (i = 0; i < sizeof (s->bm_regs) / sizeof (s->bm_regs[0]); ++i)
{
AC97BusMasterRegs *r = &s->bm_regs[i];
SSMR3GetU32 (pSSMHandle, &r->bdbar);
SSMR3GetU8 (pSSMHandle, &r->civ);
SSMR3GetU8 (pSSMHandle, &r->lvi);
SSMR3GetU16 (pSSMHandle, &r->sr);
SSMR3GetU16 (pSSMHandle, &r->picb);
SSMR3GetU8 (pSSMHandle, &r->piv);
SSMR3GetU8 (pSSMHandle, &r->cr);
SSMR3GetS32 (pSSMHandle, &r->bd_valid);
SSMR3GetU32 (pSSMHandle, &r->bd.addr);
SSMR3GetU32 (pSSMHandle, &r->bd.ctl_len);
}
SSMR3GetMem (pSSMHandle, s->mixer_data, sizeof (s->mixer_data));
SSMR3GetMem (pSSMHandle, active, sizeof (active));
#ifdef USE_MIXER
record_select (s, mixer_load (s, AC97_Record_Select));
#define V_(a, b) set_volume (s, a, b, mixer_load (s, a))
V_ (AC97_Master_Volume_Mute, AUD_MIXER_VOLUME);
V_ (AC97_PCM_Out_Volume_Mute, AUD_MIXER_PCM);
V_ (AC97_Line_In_Volume_Mute, AUD_MIXER_LINE_IN);
#undef V_
#endif
reset_voices (s, active);
s->bup_flag = 0;
s->last_samp = 0;
return VINF_SUCCESS;
}
/**
* Reset notification.
*
* @returns VBox status.
* @param pDevIns The device instance data.
*
* @remark The original sources didn't install a reset handler, but it seems to
* make sense to me so we'll do it.
*/
static DECLCALLBACK(void) ac97Reset(PPDMDEVINS pDevIns)
{
PCIAC97LinkState *pData = PDMINS2DATA(pDevIns, PCIAC97LinkState *);
/*
* Reset the device state (will need pDrv later).
*/
reset_bm_regs (&pData->ac97, &pData->ac97.bm_regs[0]);
reset_bm_regs (&pData->ac97, &pData->ac97.bm_regs[1]);
reset_bm_regs (&pData->ac97, &pData->ac97.bm_regs[2]);
/*
* Reset the mixer too. The Windows XP driver seems to rely on
* this. At least it wants to read the vendor id before it resets
* the codec manually.
*/
mixer_reset(&pData->ac97);
}
/**
* Queries an interface to the driver.
*
* @returns Pointer to interface.
* @returns NULL if the interface was not supported by the driver.
* @param pInterface Pointer to this interface structure.
* @param enmInterface The requested interface identification.
* @thread Any thread.
*/
static DECLCALLBACK(void *) ichac97QueryInterface (struct PDMIBASE *pInterface,
PDMINTERFACE enmInterface)
{
PCIAC97LinkState *pData =
(PCIAC97LinkState *)((uintptr_t)pInterface
- RT_OFFSETOF(PCIAC97LinkState, ac97.IBase));
Assert(&pData->ac97.IBase == pInterface);
switch (enmInterface)
{
case PDMINTERFACE_BASE:
return &pData->ac97.IBase;
default:
return NULL;
}
}
/**
* Construct a device instance for a VM.
*
* @returns VBox status.
* @param pDevIns The device instance data.
* If the registration structure is needed,
* pDevIns->pDevReg points to it.
* @param iInstance Instance number. Use this to figure out which
* registers and such to use.
* The device number is also found in pDevIns->iInstance,
* but since it's likely to be freqently used PDM passes
* it as parameter.
* @param pCfgHandle Configuration node handle for the device.
* Use this to obtain the configuration
* of the device instance. It's also found in
* pDevIns->pCfgHandle, but like iInstance it's expected
* to be used a bit in this function.
*/
static DECLCALLBACK(int) ichac97Construct (PPDMDEVINS pDevIns, int iInstance,
PCFGMNODE pCfgHandle)
{
PCIAC97LinkState *pData = PDMINS2DATA(pDevIns, PCIAC97LinkState *);
int rc;
Assert(iInstance == 0);
/*
* Initialize data (most of it anyway).
*/
pData->ac97.pDevIns = pDevIns;
/* IBase */
pData->ac97.IBase.pfnQueryInterface = ichac97QueryInterface;
/* PCI Device */
pData->dev.config[0x00] = 0x86; /* vid vendor id intel ro */
pData->dev.config[0x01] = 0x80; /* intel */
pData->dev.config[0x02] = 0x15; /* did device id 82801 ro */
pData->dev.config[0x03] = 0x24; /* 82801aa */
pData->dev.config[0x04] = 0x00; /* pcicmd pci command rw, ro */
pData->dev.config[0x05] = 0x00;
pData->dev.config[0x06] = 0x80; /* pcists pci status rwc, ro */
pData->dev.config[0x07] = 0x02;
pData->dev.config[0x08] = 0x01; /* rid revision ro */
pData->dev.config[0x09] = 0x00; /* pi programming interface ro */
pData->dev.config[0x0a] = 0x01; /* scc sub class code ro */
pData->dev.config[0x0b] = 0x04; /* bcc base class code ro */
pData->dev.config[0x0e] = 0x00; /* headtyp header type ro */
pData->dev.config[0x10] = 0x01; /* nambar native audio mixer base
* address rw */
pData->dev.config[0x11] = 0x00;
pData->dev.config[0x12] = 0x00;
pData->dev.config[0x13] = 0x00;
pData->dev.config[0x14] = 0x01; /* nabmbar native audio bus mastering
* base address rw */
pData->dev.config[0x15] = 0x00;
pData->dev.config[0x16] = 0x00;
pData->dev.config[0x17] = 0x00;
pData->dev.config[0x2c] = 0x86; /* svid subsystem vendor id rwo */
pData->dev.config[0x2d] = 0x80;
pData->dev.config[0x2e] = 0x00; /* sid subsystem id rwo */
pData->dev.config[0x2f] = 0x00;
pData->dev.config[0x3c] = 0x00; /* intr_ln interrupt line rw */
pData->dev.config[0x3d] = 0x01; /* intr_pn interrupt pin ro */
/*
* Register the PCI device, it's I/O regions, the timer and the
* saved state item.
*/
rc = PDMDevHlpPCIRegister (pDevIns, &pData->dev);
if (VBOX_FAILURE(rc))
return rc;
rc = PDMDevHlpPCIIORegionRegister (pDevIns, 0, 256, PCI_ADDRESS_SPACE_IO,
ichac97IOPortMap);
if (VBOX_FAILURE(rc))
return rc;
rc = PDMDevHlpPCIIORegionRegister (pDevIns, 1, 64, PCI_ADDRESS_SPACE_IO,
ichac97IOPortMap);
if (VBOX_FAILURE(rc))
return rc;
rc = PDMDevHlpSSMRegister (pDevIns, pDevIns->pDevReg->szDeviceName,
iInstance, AC97_SSM_VERSION, sizeof(*pData),
NULL, ichac97SaveExec, NULL,
NULL, ichac97LoadExec, NULL);
if (VBOX_FAILURE(rc))
return rc;
/*
* Attach driver.
*/
rc = PDMDevHlpDriverAttach (pDevIns, 0, &pData->ac97.IBase,
&pData->ac97.pDrvBase, "Audio Driver Port");
if (rc == VERR_PDM_NO_ATTACHED_DRIVER)
Log (("ac97: No attached driver!\n"));
else if (VBOX_FAILURE(rc))
{
AssertMsgFailed(("Failed to attach AC97 LUN #0! rc=%Vrc\n", rc));
return rc;
}
AUD_register_card ("ICH0", &pData->ac97.card);
ac97Reset(pDevIns);
/**
* @todo We should probably display a message box. And perhaps we should
* select the noaudio driver instead.
*/
if (!pData->ac97.voice_pi)
LogRel(("AC97: WARNING: Unable to open PCM IN!\n"));
if (!pData->ac97.voice_po)
LogRel(("AC97: WARNING: Unable to open PCM OUT!\n"));
if (!pData->ac97.voice_mc)
LogRel(("AC97: WARNING: Unable to open PCM MC!\n"));
/** @todo r=bird: add a devhlp for this of course! */
if (!pData->ac97.voice_pi || !pData->ac97.voice_po || !pData->ac97.voice_mc)
VMSetRuntimeError(PDMDevHlpGetVM(pDevIns), false,
N_("Some audio devices could not be opened. Guest applications "
"generating audio output or depending on audio input may hang. "
"Make sure your host audio device is working properly."),
"HostAudioNotResponding");
return VINF_SUCCESS;
}
/**
* The device registration structure.
*/
const PDMDEVREG g_DeviceICHAC97 =
{
/* u32Version */
PDM_DEVREG_VERSION,
/* szDeviceName */
"ichac97",
/* szGCMod */
"",
/* szR0Mod */
"",
/* pszDescription */
"ICH AC'97 Audio Controller",
/* fFlags */
PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT | PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT,
/* fClass */
PDM_DEVREG_CLASS_AUDIO,
/* cMaxInstances */
1,
/* cbInstance */
sizeof(PCIAC97LinkState),
/* pfnConstruct */
ichac97Construct,
/* pfnDestruct */
NULL,
/* pfnRelocate */
NULL,
/* pfnIOCtl */
NULL,
/* pfnPowerOn */
NULL,
/* pfnReset */
ac97Reset,
/* pfnSuspend */
NULL,
/* pfnResume */
NULL,
/* pfnAttach */
NULL,
/* pfnDetach */
NULL,
/* pfnQueryInterface. */
NULL
};