cabde247f900dcf6e58d009bbdd15099c028c6fcvboxsync * This file contains all information to interpret a standard EDIC block
cabde247f900dcf6e58d009bbdd15099c028c6fcvboxsync * transmitted by a display device via DDC (Display Data Channel). So far
cabde247f900dcf6e58d009bbdd15099c028c6fcvboxsync * there is no information to deal with optional EDID blocks.
cabde247f900dcf6e58d009bbdd15099c028c6fcvboxsync * DDC is a Trademark of VESA (Video Electronics Standard Association).
cabde247f900dcf6e58d009bbdd15099c028c6fcvboxsync * Copyright 1998 by Egbert Eich <Egbert.Eich@Physik.TU-Darmstadt.DE>
cabde247f900dcf6e58d009bbdd15099c028c6fcvboxsync/* speed up / slow down */
cabde247f900dcf6e58d009bbdd15099c028c6fcvboxsynctypedef enum {
cabde247f900dcf6e58d009bbdd15099c028c6fcvboxsynctypedef void (* DDC1SetSpeedProc)(ScrnInfoPtr, xf86ddcSpeed);
cabde247f900dcf6e58d009bbdd15099c028c6fcvboxsyncextern _X_EXPORT xf86MonPtr xf86DoEEDID(int scrnIndex, I2CBusPtr pBus, Bool);
cabde247f900dcf6e58d009bbdd15099c028c6fcvboxsyncxf86EdidMonitorSet(int scrnIndex, MonPtr Monitor, xf86MonPtr DDC);
cabde247f900dcf6e58d009bbdd15099c028c6fcvboxsyncextern _X_EXPORT DisplayModePtr xf86DDCGetModes(int scrnIndex, xf86MonPtr DDC);
cabde247f900dcf6e58d009bbdd15099c028c6fcvboxsyncxf86DisplayIDMonitorSet(int scrnIndex, MonPtr mon, xf86MonPtr DDC);
cabde247f900dcf6e58d009bbdd15099c028c6fcvboxsyncFindDMTMode(int hsize, int vsize, int refresh, Bool rb);
cabde247f900dcf6e58d009bbdd15099c028c6fcvboxsync * Quirks to work around broken EDID data from various monitors.
cabde247f900dcf6e58d009bbdd15099c028c6fcvboxsynctypedef enum {
cabde247f900dcf6e58d009bbdd15099c028c6fcvboxsync /* First detailed mode is bogus, prefer largest mode at 60hz */
cabde247f900dcf6e58d009bbdd15099c028c6fcvboxsync /* 135MHz clock is too high, drop a bit */
cabde247f900dcf6e58d009bbdd15099c028c6fcvboxsync /* Prefer the largest mode at 75 Hz */
cabde247f900dcf6e58d009bbdd15099c028c6fcvboxsync /* Convert detailed timing's horizontal from units of cm to mm */
cabde247f900dcf6e58d009bbdd15099c028c6fcvboxsync /* Convert detailed timing's vertical from units of cm to mm */
cabde247f900dcf6e58d009bbdd15099c028c6fcvboxsync /* Detailed timing descriptors have bogus size values, so just take the
cabde247f900dcf6e58d009bbdd15099c028c6fcvboxsync * maximum size and use that.
cabde247f900dcf6e58d009bbdd15099c028c6fcvboxsync /* Monitor forgot to set the first detailed is preferred bit. */
cabde247f900dcf6e58d009bbdd15099c028c6fcvboxsync /* use +hsync +vsync for detailed mode */
cabde247f900dcf6e58d009bbdd15099c028c6fcvboxsync /* Force single-link DVI bandwidth limit */
cabde247f900dcf6e58d009bbdd15099c028c6fcvboxsyncDisplayModePtr xf86DDCGetModes(int scrnIndex, xf86MonPtr DDC);
cabde247f900dcf6e58d009bbdd15099c028c6fcvboxsynctypedef void (* handle_detailed_fn)(struct detailed_monitor_section *,void *);
cabde247f900dcf6e58d009bbdd15099c028c6fcvboxsyncxf86DDCDetectQuirks(int scrnIndex, xf86MonPtr DDC, Bool verbose);
cabde247f900dcf6e58d009bbdd15099c028c6fcvboxsyncvoid xf86DetTimingApplyQuirks(struct detailed_monitor_section *det_mon,
cabde247f900dcf6e58d009bbdd15099c028c6fcvboxsynctypedef void (* handle_video_fn)(struct cea_video_block *, void *);