b9a21c3c91c47e090316e28d759194e46628ed49vboxsync
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync#include <xf86RamDac.h>
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync
b9a21c3c91c47e090316e28d759194e46628ed49vboxsyncextern _X_EXPORT unsigned long TIramdacCalculateMNPForClock(unsigned long RefClock,
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync unsigned long ReqClock, char IsPixClock, unsigned long MinClock,
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync unsigned long MaxClock, unsigned long *rM, unsigned long *rN,
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync unsigned long *rP);
b9a21c3c91c47e090316e28d759194e46628ed49vboxsyncextern _X_EXPORT RamDacHelperRecPtr TIramdacProbe(ScrnInfoPtr pScrn, RamDacSupportedInfoRecPtr ramdacs);
b9a21c3c91c47e090316e28d759194e46628ed49vboxsyncextern _X_EXPORT void TIramdacSave(ScrnInfoPtr pScrn, RamDacRecPtr RamDacRec, RamDacRegRecPtr RamDacRegRec);
b9a21c3c91c47e090316e28d759194e46628ed49vboxsyncextern _X_EXPORT void TIramdacRestore(ScrnInfoPtr pScrn, RamDacRecPtr RamDacRec, RamDacRegRecPtr RamDacRegRec);
b9a21c3c91c47e090316e28d759194e46628ed49vboxsyncextern _X_EXPORT void TIramdac3026SetBpp(ScrnInfoPtr pScrn, RamDacRegRecPtr RamDacRegRec);
b9a21c3c91c47e090316e28d759194e46628ed49vboxsyncextern _X_EXPORT void TIramdac3030SetBpp(ScrnInfoPtr pScrn, RamDacRegRecPtr RamDacRegRec);
b9a21c3c91c47e090316e28d759194e46628ed49vboxsyncextern _X_EXPORT void TIramdacHWCursorInit(xf86CursorInfoPtr infoPtr);
b9a21c3c91c47e090316e28d759194e46628ed49vboxsyncextern _X_EXPORT void TIramdacLoadPalette( ScrnInfoPtr pScrn, int numColors, int *indices,
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync LOCO *colors, VisualPtr pVisual);
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync
b9a21c3c91c47e090316e28d759194e46628ed49vboxsynctypedef void TIramdacLoadPaletteProc(ScrnInfoPtr, int, int *, LOCO *,
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync VisualPtr);
b9a21c3c91c47e090316e28d759194e46628ed49vboxsyncextern _X_EXPORT TIramdacLoadPaletteProc *TIramdacLoadPaletteWeak(void);
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync#define TI3030_RAMDAC (VENDOR_TI << 16) | 0x00
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync#define TI3026_RAMDAC (VENDOR_TI << 16) | 0x01
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync/*
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync * TI Ramdac registers
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync */
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync#define TIDAC_rev 0x01
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync#define TIDAC_ind_curs_ctrl 0x06
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync#define TIDAC_byte_router_ctrl 0x07
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync#define TIDAC_latch_ctrl 0x0f
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync#define TIDAC_true_color_ctrl 0x18
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync#define TIDAC_multiplex_ctrl 0x19
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync#define TIDAC_clock_select 0x1a
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync#define TIDAC_palette_page 0x1c
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync#define TIDAC_general_ctrl 0x1d
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync#define TIDAC_misc_ctrl 0x1e
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync#define TIDAC_pll_addr 0x2c
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync#define TIDAC_pll_pixel_data 0x2d
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync#define TIDAC_pll_memory_data 0x2e
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync#define TIDAC_pll_loop_data 0x2f
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync#define TIDAC_key_over_low 0x30
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync#define TIDAC_key_over_high 0x31
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync#define TIDAC_key_red_low 0x32
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync#define TIDAC_key_red_high 0x33
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync#define TIDAC_key_green_low 0x34
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync#define TIDAC_key_green_high 0x35
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync#define TIDAC_key_blue_low 0x36
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync#define TIDAC_key_blue_high 0x37
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync#define TIDAC_key_ctrl 0x38
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync#define TIDAC_clock_ctrl 0x39
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync#define TIDAC_sense_test 0x3a
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync#define TIDAC_test_mode_data 0x3b
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync#define TIDAC_crc_remain_lsb 0x3c
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync#define TIDAC_crc_remain_msb 0x3d
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync#define TIDAC_crc_bit_select 0x3e
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync#define TIDAC_id 0x3f
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync/* These are pll values that are accessed via TIDAC_pll_pixel_data */
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync#define TIDAC_PIXEL_N 0x80
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync#define TIDAC_PIXEL_M 0x81
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync#define TIDAC_PIXEL_P 0x82
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync#define TIDAC_PIXEL_VALID 0x83
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync/* These are pll values that are accessed via TIDAC_pll_loop_data */
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync#define TIDAC_LOOP_N 0x90
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync#define TIDAC_LOOP_M 0x91
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync#define TIDAC_LOOP_P 0x92
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync#define TIDAC_LOOP_VALID 0x93
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync/* Direct mapping addresses */
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync#define TIDAC_INDEX 0xa0
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync#define TIDAC_PALETTE_DATA 0xa1
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync#define TIDAC_READ_MASK 0xa2
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync#define TIDAC_READ_ADDR 0xa3
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync#define TIDAC_CURS_WRITE_ADDR 0xa4
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync#define TIDAC_CURS_COLOR 0xa5
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync#define TIDAC_CURS_READ_ADDR 0xa7
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync#define TIDAC_CURS_CTL 0xa9
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync#define TIDAC_INDEXED_DATA 0xaa
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync#define TIDAC_CURS_RAM_DATA 0xab
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync#define TIDAC_CURS_XLOW 0xac
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync#define TIDAC_CURS_XHIGH 0xad
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync#define TIDAC_CURS_YLOW 0xae
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync#define TIDAC_CURS_YHIGH 0xaf
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync#define TIDAC_sw_reset 0xff
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync/* Constants */
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync#define TIDAC_TVP_3026_ID 0x26
b9a21c3c91c47e090316e28d759194e46628ed49vboxsync#define TIDAC_TVP_3030_ID 0x30