040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync#ifdef HAVE_XORG_CONFIG_H
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync#include <xorg-config.h>
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync#endif
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync#include "vgaReg.h"
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync#ifdef PC98_EGC
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync#define VGA_ALLPLANES 0xFL
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync#endif
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync/* Do call in Write Mode 3.
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * We take care of the possibility that two passes are needed.
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync */
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync#ifndef PC98_EGC
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync#define DO_WM3(pgc,call) \
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync { int _tp, _fg, _bg, _alu; \
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync _fg = pgc->fgPixel; _bg = pgc->bgPixel; \
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync _tp = wm3_set_regs(pgc); \
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync (call); \
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync if ( _tp ) { \
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync _alu = pgc->alu; \
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync pgc->alu = GXinvert; \
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync _tp = wm3_set_regs(pgc); \
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync (call); \
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync pgc->alu = _alu; \
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync } \
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync pgc->fgPixel = _fg; pgc->bgPixel = _bg; \
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync }
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync#else
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync#define DO_WM3(pgc,call) \
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync { int _tp, _fg, _bg; \
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync _fg = pgc->fgPixel; _bg = pgc->bgPixel; \
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync _tp = wm3_set_regs(pgc); \
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync (call); \
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync pgc->fgPixel = _fg; pgc->bgPixel = _bg; \
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync }
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync#endif
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync#ifndef PC98_EGC
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync#define WM3_SET_INK(ink) \
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync SetVideoGraphics(Set_ResetIndex, ink)
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync#else
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync#define WM3_SET_INK(ink) \
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync outw(EGC_FGC, ink)
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync#endif
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync/* GJA -- Move a long word to screen memory.
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * The reads into 'dummy' are here to load the VGA latches.
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * This is a RMW operation except for trivial cases.
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * Notice that we ignore the operation.
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync */
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync#ifdef PC98_EGC
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync#define UPDRW(destp,src) \
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync { volatile unsigned short *_dtmp = \
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync (volatile unsigned short *)(destp); \
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync unsigned int _stmp = (src); \
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync *_dtmp = _stmp; _dtmp++; _stmp >>= 16; \
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync *_dtmp = _stmp; }
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync#else
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync#define UPDRW(destp,src) \
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync { volatile char *_dtmp = (volatile char *)(destp); \
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync unsigned int _stmp = (src); \
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync volatile int dummy; /* Bit bucket. */ \
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync _stmp = ldl_u(&_stmp); \
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync dummy = *_dtmp; *_dtmp = _stmp; _dtmp++; _stmp >>= 8; \
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync dummy = *_dtmp; *_dtmp = _stmp; _dtmp++; _stmp >>= 8; \
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync dummy = *_dtmp; *_dtmp = _stmp; _dtmp++; _stmp >>= 8; \
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync dummy = *_dtmp; *_dtmp = _stmp; }
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync#endif
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync#define UPDRWB(destp,src) \
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync { volatile int dummy; /* Bit bucket. */ \
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync dummy = *(destp); *(destp) = (src); }