040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync/***********************************************************
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsyncCopyright 1987, 1998 The Open Group
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsyncPermission to use, copy, modify, distribute, and sell this software and its
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsyncdocumentation for any purpose is hereby granted without fee, provided that
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsyncthe above copyright notice appear in all copies and that both that
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsynccopyright notice and this permission notice appear in supporting
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsyncdocumentation.
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsyncThe above copyright notice and this permission notice shall be included in
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsyncall copies or substantial portions of the Software.
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsyncTHE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsyncIMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsyncFITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsyncOPEN GROUP BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsyncAN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsyncCONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsyncExcept as contained in this notice, the name of The Open Group shall not be
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsyncused in advertising or otherwise to promote the sale, use or other dealings
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsyncin this Software without prior written authorization from The Open Group.
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsyncCopyright 1987 by Digital Equipment Corporation, Maynard, Massachusetts.
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync All Rights Reserved
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsyncPermission to use, copy, modify, and distribute this software and its
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsyncdocumentation for any purpose and without fee is hereby granted,
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsyncprovided that the above copyright notice appear in all copies and that
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsyncboth that copyright notice and this permission notice appear in
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsyncsupporting documentation, and that the name of Digital not be
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsyncused in advertising or publicity pertaining to distribution of the
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsyncsoftware without specific, written prior permission.
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsyncDIGITAL DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, INCLUDING
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsyncALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO EVENT SHALL
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsyncDIGITAL BE LIABLE FOR ANY SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsyncANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS,
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsyncWHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION,
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsyncARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync******************************************************************/
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * Machine dependent values:
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * GLYPHPADBYTES should be chosen with consideration for the space-time
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * trade-off. Padding to 0 bytes means that there is no wasted space
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * in the font bitmaps (both on disk and in memory), but that access of
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * the bitmaps will cause odd-address memory references. Padding to
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * 2 bytes would ensure even address memory references and would
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * be suitable for a 68010-class machine, but at the expense of wasted
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * space in the font bitmaps. Padding to 4 bytes would be good
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * for real 32 bit machines, etc. Be sure that you tell the font
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * compiler what kind of padding you want because its defines are
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * kept separate from this. See server/include/font.h for how
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * GLYPHPADBYTES is used.
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * Along with this, you should choose an appropriate value for
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * GETLEFTBITS_ALIGNMENT, which is used in ddx/mfb/maskbits.h. This
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * constant choses what kind of memory references are guarenteed during
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * font access; either 1, 2 or 4, for byte, word or longword access,
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * respectively. For instance, if you have decided to to have
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * GLYPHPADBYTES == 4, then it is pointless for you to have a
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * GETLEFTBITS_ALIGNMENT > 1, because the padding of the fonts has already
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * guarenteed you that your fonts are longword aligned. On the other
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * hand, even if you have chosen GLYPHPADBYTES == 1 to save space, you may
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * also decide that the computing involved in aligning the pointer is more
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * costly than an odd-address access; you choose GETLEFTBITS_ALIGNMENT == 1.
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * Next, choose the tuning parameters which are appropriate for your
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * hardware; these modify the behaviour of the raw frame buffer code
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * in ddx/mfb and ddx/cfb. Defining these incorrectly will not cause
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * the server to run incorrectly, but defining these correctly will
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * cause some noticeable speed improvements:
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * AVOID_MEMORY_READ - (8-bit cfb only)
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * When stippling pixels on the screen (polytext and pushpixels),
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * don't read long words from the display and mask in the
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * appropriate values. Rather, perform multiple byte/short/long
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * writes as appropriate. This option uses many more instructions
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * but runs much faster when the destination is much slower than
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * the CPU and at least 1 level of write buffer is availible (2
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * is much better). Defined currently for SPARC and MIPS.
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * FAST_CONSTANT_OFFSET_MODE - (cfb and mfb)
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * This define is used on machines which have no auto-increment
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * addressing mode, but do have an effectively free constant-offset
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * addressing mode. Currently defined for MIPS and SPARC, even though
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * I remember the cg6 as performing better without it (cg3 definitely
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * performs better with it).
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * LARGE_INSTRUCTION_CACHE -
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * This define increases the number of times some loops are
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * unrolled. On 68020 machines (with 256 bytes of i-cache),
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * this define will slow execution down as instructions miss
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * the cache frequently. On machines with real i-caches, this
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * reduces loop overhead, causing a slight performance improvement.
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * Currently defined for MIPS and SPARC
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * FAST_UNALIGNED_READS -
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * For machines with more memory bandwidth than CPU, this
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * define uses unaligned reads for 8-bit BitBLT instead of doing
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * aligned reads and combining the results with shifts and
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * logical-ors. Currently defined for 68020 and vax.
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * PLENTIFUL_REGISTERS -
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * For machines with > 20 registers. Currently used for
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * unrolling the text painting code a bit more. Currently
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * defined for MIPS.
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * SHARED_IDCACHE -
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * For non-Harvard RISC machines, those which share the same
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * CPU memory bus for instructions and data. This unrolls some
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * solid fill loops which are otherwise best left rolled up.
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * Currently defined for SPARC.
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync#define IMAGE_BYTE_ORDER LSBFirst /* Values for the VAX only */
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync#endif /* vax */
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync# if defined(XF86MONOVGA) || defined(XF86VGA16) || defined(XF86MONO)
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync#endif /* __arm32__ */
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync#define GETLEFTBITS_ALIGNMENT 1 /* PA forces longs to 4 */
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync /* byte boundries */
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync#endif /* hpux || __hppa__ */
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync/* XXX Should this be for Lynx only? */
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync#endif /* PowerPC */
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync#endif /* SuperH */
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync#if (defined(sun) && (defined(__sparc) || defined(sparc))) || \
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync (defined(__uxp__) && (defined(sparc) || defined(mc68000))) || \
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync# if !defined(sparc)
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync# define IMAGE_BYTE_ORDER LSBFirst /* Values for the SUN only */
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync# define IMAGE_BYTE_ORDER MSBFirst /* Values for the SUN only */
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync#endif /* sun && !(i386 && SVR4) */
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync#define IMAGE_BYTE_ORDER MSBFirst /* Values for the RISC/6000 */
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync#endif /* AIXV3 */
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync# define IMAGE_BYTE_ORDER LSBFirst /* Value for PS/2 only */
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync# define IMAGE_BYTE_ORDER MSBFirst /* Values for the RT only*/
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync/* ibm pcc doesn't understand pragmas. */
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync#endif /* ibm */
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync#if defined (M4310) || defined(M4315) || defined(M4317) || defined(M4319) || defined(M4330)
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync#define IMAGE_BYTE_ORDER MSBFirst /* Values for Pegasus only */
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync#endif /* tektronix */
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync#define IMAGE_BYTE_ORDER MSBFirst /* Values for the MacII only */
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync/* might want FAST_UNALIGNED_READS for frame buffers with < 1us latency */
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync#endif /* macII */
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync#if (defined(mips) || defined(__mips)) && !defined(sgi)
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync# define IMAGE_BYTE_ORDER LSBFirst /* Values for the PMAX only */
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync# define IMAGE_BYTE_ORDER MSBFirst /* Values for the MIPS only */
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync#endif /* mips */
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync#if defined(__alpha) || defined(__alpha__) || defined(__alphaCross)
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync# define IMAGE_BYTE_ORDER LSBFirst /* Values for the Alpha only */
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync# if defined(XF86MONOVGA) || defined(XF86VGA16) || defined(XF86MONO)
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync#endif /* alpha */
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync# if defined(XF86MONOVGA) || defined(XF86VGA16) || defined(XF86MONO)
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync#endif /* ia64 */
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync#if defined(__amd64__) || defined(amd64) || defined(__amd64) || defined(__x86_64__)
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync# if defined(XF86MONOVGA) || defined(XF86VGA16) || defined(XF86MONO)
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync#endif /* AMD64 */
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync#define IMAGE_BYTE_ORDER MSBFirst /* Values for the stellar only*/
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * Use SysV random number generator.
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync#endif /* stellar */
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync#define IMAGE_BYTE_ORDER MSBFirst /* Values for the OMRON only*/
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync#endif /* luna */
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync#if (defined(SVR4) && (defined(__i386__) || (defined(__i386)))) || \
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync# if defined(XF86MONOVGA) || defined(XF86VGA16) || defined(XF86MONO)
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync#endif /* SVR4 / BSD / i386 */
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync/* linux on the Compaq Itsy */
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync/* linux on IBM S/390 */
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync/* size of buffer to use with GetImage, measured in bytes. There's obviously
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * a trade-off between the amount of stack (or whatever ALLOCATE_LOCAL gives
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * you) used and the number of times the ddx routine has to be called.
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync/* pad scanline to a longword */
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * This returns the number of padding units, for depth d and width w.
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * For bitmaps this can be calculated with the macros above.
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * Other depths require either grovelling over the formats field of the
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * screenInfo or hardwired constants.
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync int padPixelsLog2; /* log 2 (pixels per pad unit) */
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync int bytesPerPixel; /* only set when notPower2 is TRUE */
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync/* The only portable way to get the bpp from the depth is to look it up */
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync#define BitsPerPixel(d) (PixmapWidthPaddingInfo[d].bitsPerPixel)
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync (((int)(w) * PixmapWidthPaddingInfo[d].bytesPerPixel + \
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync ((int)((w) + PixmapWidthPaddingInfo[d].padRoundUp) >> \
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * Return the number of bytes to which a scanline of the given
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * depth and width will be padded.
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync (PixmapWidthInPadUnits(w, d) << PixmapWidthPaddingInfo[d].padBytesLog2)
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync (((int)((w) + BITMAP_SCANLINE_PAD - 1) >> LOG2_BITMAP_PAD) << LOG2_BYTES_PER_SCANLINE_PAD)
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync#define PixmapWidthInPadUnitsProto(w, d) PixmapWidthInPadUnits(w, d)
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync#define PixmapBytePadProto(w, d) PixmapBytePad(w, d)
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync#endif /* SERVERMD_H */