040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync/****************************************************************************
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync* Realmode X86 Emulator Library
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync* Copyright (C) 1996-1999 SciTech Software, Inc.
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync* Copyright (C) David Mosberger-Tang
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync* Copyright (C) 1999 Egbert Eich
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync* ========================================================================
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync* Permission to use, copy, modify, distribute, and sell this software and
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync* its documentation for any purpose is hereby granted without fee,
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync* provided that the above copyright notice appear in all copies and that
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync* both that copyright notice and this permission notice appear in
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync* supporting documentation, and that the name of the authors not be used
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync* in advertising or publicity pertaining to distribution of the software
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync* without specific, written prior permission. The authors makes no
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync* representations about the suitability of this software for any purpose.
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync* It is provided "as is" without express or implied warranty.
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync* PERFORMANCE OF THIS SOFTWARE.
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync* ========================================================================
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync* Language: ANSI C
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync* Environment: Any
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync* Developer: Kendall Bennett
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync* Description: Header file for x86 register definitions.
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync****************************************************************************/
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync/*---------------------- Macros and type definitions ----------------------*/
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * General EAX, EBX, ECX, EDX type registers. Note that for
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * portability, and speed, the issue of byte swapping is not addressed
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * in the registers. All registers are stored in the default format
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * available on the host machine. The only critical issue is that the
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * registers should line up EXACTLY in the same manner as they do in
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * the 386. That is:
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * EAX & 0xff === AL
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * EAX & 0xffff == AX
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * etc. The result is that alot of the calculations can then be
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * done using the native instruction set fully.
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsynctypedef struct {
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsynctypedef struct {
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsynctypedef struct {
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync#else /* !__BIG_ENDIAN__ */
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsynctypedef struct {
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsynctypedef struct {
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsynctypedef struct {
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync#endif /* BIG_ENDIAN */
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsynctypedef union {
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * Segment registers here represent the 16 bit quantities
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * CS, DS, ES, SS.
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync/* 8 bit registers */
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync/* 16 bit registers */
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync/* 32 bit extended registers */
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync/* special registers */
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync/* special registers */
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync/* special registers */
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync/* segment registers */
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync/* flag conditions */
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync/* 80286 and above always have bit#1 set */
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync#define F_ALWAYS_ON (0x0002) /* flag bits always on */
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * Define a mask for only those flag bits we will ever pass back
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * (via PUSHF)
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync#define F_MSK (FB_CF|FB_PF|FB_AF|FB_ZF|FB_SF|FB_TF|FB_IF|FB_DF|FB_OF)
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync/* following bits masked in to a 16bit quantity */
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync#define F_PF_CALC 0x010000 /* PARITY flag has been calced */
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync#define F_ZF_CALC 0x020000 /* ZERO flag has been calced */
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync#define F_SF_CALC 0x040000 /* SIGN flag has been calced */
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync#define F_ALL_CALC 0xff0000 /* All have been calced */
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * Emulator machine state.
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * Segment usage control.
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsynctypedef struct {
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * MODE contains information on:
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * REPE prefix 2 bits repe,repne
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * SEGMENT overrides 5 bits normal,DS,SS,CS,ES
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * Delayed flag set 3 bits (zero, signed, parity)
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * reserved 6 bits
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * interrupt # 8 bits instruction raised interrupt
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * BIOS video segregs 4 bits
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * Interrupt Pending 1 bits
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * Extern interrupt 1 bits
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * Halted 1 bits
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync volatile int intr; /* mask of pending interrupts */
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync/****************************************************************************
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsyncStructure maintaining the emulator machine state.
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsyncmem_base - Base real mode memory for the emulator
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsyncmem_size - Size of the real mode memory block for the emulator
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsyncprivate - private data pointer
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsyncx86 - X86 registers
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync****************************************************************************/
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsynctypedef struct {
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync/*----------------------------- Global Variables --------------------------*/
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync/* Global emulator machine state.
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync * We keep it global to avoid pointer dereferences in the code for speed.
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync/*-------------------------- Function Prototypes --------------------------*/
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync/* Function to log information at runtime */
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync} /* End of "C" linkage for C++ */
040abec2534dadc53ebc8fa378ef03f4feecb7dbvboxsync#endif /* __X86EMU_REGS_H */