45e9809aff7304721fddb95654901b32195c9c7avboxsync/***********************************************************
45e9809aff7304721fddb95654901b32195c9c7avboxsyncCopyright 1987, 1998 The Open Group
45e9809aff7304721fddb95654901b32195c9c7avboxsyncPermission to use, copy, modify, distribute, and sell this software and its
45e9809aff7304721fddb95654901b32195c9c7avboxsyncdocumentation for any purpose is hereby granted without fee, provided that
45e9809aff7304721fddb95654901b32195c9c7avboxsyncthe above copyright notice appear in all copies and that both that
45e9809aff7304721fddb95654901b32195c9c7avboxsynccopyright notice and this permission notice appear in supporting
45e9809aff7304721fddb95654901b32195c9c7avboxsyncdocumentation.
45e9809aff7304721fddb95654901b32195c9c7avboxsyncThe above copyright notice and this permission notice shall be included in
45e9809aff7304721fddb95654901b32195c9c7avboxsyncall copies or substantial portions of the Software.
45e9809aff7304721fddb95654901b32195c9c7avboxsyncTHE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
45e9809aff7304721fddb95654901b32195c9c7avboxsyncIMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
45e9809aff7304721fddb95654901b32195c9c7avboxsyncFITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
45e9809aff7304721fddb95654901b32195c9c7avboxsyncOPEN GROUP BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
45e9809aff7304721fddb95654901b32195c9c7avboxsyncAN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
45e9809aff7304721fddb95654901b32195c9c7avboxsyncCONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
45e9809aff7304721fddb95654901b32195c9c7avboxsyncExcept as contained in this notice, the name of The Open Group shall not be
45e9809aff7304721fddb95654901b32195c9c7avboxsyncused in advertising or otherwise to promote the sale, use or other dealings
45e9809aff7304721fddb95654901b32195c9c7avboxsyncin this Software without prior written authorization from The Open Group.
45e9809aff7304721fddb95654901b32195c9c7avboxsyncCopyright 1987 by Digital Equipment Corporation, Maynard, Massachusetts.
45e9809aff7304721fddb95654901b32195c9c7avboxsync All Rights Reserved
45e9809aff7304721fddb95654901b32195c9c7avboxsyncPermission to use, copy, modify, and distribute this software and its
45e9809aff7304721fddb95654901b32195c9c7avboxsyncdocumentation for any purpose and without fee is hereby granted,
45e9809aff7304721fddb95654901b32195c9c7avboxsyncprovided that the above copyright notice appear in all copies and that
45e9809aff7304721fddb95654901b32195c9c7avboxsyncboth that copyright notice and this permission notice appear in
45e9809aff7304721fddb95654901b32195c9c7avboxsyncsupporting documentation, and that the name of Digital not be
45e9809aff7304721fddb95654901b32195c9c7avboxsyncused in advertising or publicity pertaining to distribution of the
45e9809aff7304721fddb95654901b32195c9c7avboxsyncsoftware without specific, written prior permission.
45e9809aff7304721fddb95654901b32195c9c7avboxsyncDIGITAL DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, INCLUDING
45e9809aff7304721fddb95654901b32195c9c7avboxsyncALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO EVENT SHALL
45e9809aff7304721fddb95654901b32195c9c7avboxsyncDIGITAL BE LIABLE FOR ANY SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR
45e9809aff7304721fddb95654901b32195c9c7avboxsyncANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS,
45e9809aff7304721fddb95654901b32195c9c7avboxsyncWHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION,
45e9809aff7304721fddb95654901b32195c9c7avboxsyncARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS
45e9809aff7304721fddb95654901b32195c9c7avboxsync******************************************************************/
45e9809aff7304721fddb95654901b32195c9c7avboxsync * Machine dependent values:
45e9809aff7304721fddb95654901b32195c9c7avboxsync * GLYPHPADBYTES should be chosen with consideration for the space-time
45e9809aff7304721fddb95654901b32195c9c7avboxsync * trade-off. Padding to 0 bytes means that there is no wasted space
45e9809aff7304721fddb95654901b32195c9c7avboxsync * in the font bitmaps (both on disk and in memory), but that access of
45e9809aff7304721fddb95654901b32195c9c7avboxsync * the bitmaps will cause odd-address memory references. Padding to
45e9809aff7304721fddb95654901b32195c9c7avboxsync * 2 bytes would ensure even address memory references and would
45e9809aff7304721fddb95654901b32195c9c7avboxsync * be suitable for a 68010-class machine, but at the expense of wasted
45e9809aff7304721fddb95654901b32195c9c7avboxsync * space in the font bitmaps. Padding to 4 bytes would be good
45e9809aff7304721fddb95654901b32195c9c7avboxsync * for real 32 bit machines, etc. Be sure that you tell the font
45e9809aff7304721fddb95654901b32195c9c7avboxsync * compiler what kind of padding you want because its defines are
45e9809aff7304721fddb95654901b32195c9c7avboxsync * kept separate from this. See server/include/font.h for how
45e9809aff7304721fddb95654901b32195c9c7avboxsync * GLYPHPADBYTES is used.
45e9809aff7304721fddb95654901b32195c9c7avboxsync * Along with this, you should choose an appropriate value for
45e9809aff7304721fddb95654901b32195c9c7avboxsync * GETLEFTBITS_ALIGNMENT, which is used in ddx/mfb/maskbits.h. This
45e9809aff7304721fddb95654901b32195c9c7avboxsync * constant choses what kind of memory references are guarenteed during
45e9809aff7304721fddb95654901b32195c9c7avboxsync * font access; either 1, 2 or 4, for byte, word or longword access,
45e9809aff7304721fddb95654901b32195c9c7avboxsync * respectively. For instance, if you have decided to to have
45e9809aff7304721fddb95654901b32195c9c7avboxsync * GLYPHPADBYTES == 4, then it is pointless for you to have a
45e9809aff7304721fddb95654901b32195c9c7avboxsync * GETLEFTBITS_ALIGNMENT > 1, because the padding of the fonts has already
45e9809aff7304721fddb95654901b32195c9c7avboxsync * guarenteed you that your fonts are longword aligned. On the other
45e9809aff7304721fddb95654901b32195c9c7avboxsync * hand, even if you have chosen GLYPHPADBYTES == 1 to save space, you may
45e9809aff7304721fddb95654901b32195c9c7avboxsync * also decide that the computing involved in aligning the pointer is more
45e9809aff7304721fddb95654901b32195c9c7avboxsync * costly than an odd-address access; you choose GETLEFTBITS_ALIGNMENT == 1.
45e9809aff7304721fddb95654901b32195c9c7avboxsync * Next, choose the tuning parameters which are appropriate for your
45e9809aff7304721fddb95654901b32195c9c7avboxsync * hardware; these modify the behaviour of the raw frame buffer code
45e9809aff7304721fddb95654901b32195c9c7avboxsync * in ddx/mfb and ddx/cfb. Defining these incorrectly will not cause
45e9809aff7304721fddb95654901b32195c9c7avboxsync * the server to run incorrectly, but defining these correctly will
45e9809aff7304721fddb95654901b32195c9c7avboxsync * cause some noticeable speed improvements:
45e9809aff7304721fddb95654901b32195c9c7avboxsync * AVOID_MEMORY_READ - (8-bit cfb only)
45e9809aff7304721fddb95654901b32195c9c7avboxsync * When stippling pixels on the screen (polytext and pushpixels),
45e9809aff7304721fddb95654901b32195c9c7avboxsync * don't read long words from the display and mask in the
45e9809aff7304721fddb95654901b32195c9c7avboxsync * appropriate values. Rather, perform multiple byte/short/long
45e9809aff7304721fddb95654901b32195c9c7avboxsync * writes as appropriate. This option uses many more instructions
45e9809aff7304721fddb95654901b32195c9c7avboxsync * but runs much faster when the destination is much slower than
45e9809aff7304721fddb95654901b32195c9c7avboxsync * the CPU and at least 1 level of write buffer is availible (2
45e9809aff7304721fddb95654901b32195c9c7avboxsync * is much better). Defined currently for SPARC and MIPS.
45e9809aff7304721fddb95654901b32195c9c7avboxsync * FAST_CONSTANT_OFFSET_MODE - (cfb and mfb)
45e9809aff7304721fddb95654901b32195c9c7avboxsync * This define is used on machines which have no auto-increment
45e9809aff7304721fddb95654901b32195c9c7avboxsync * addressing mode, but do have an effectively free constant-offset
45e9809aff7304721fddb95654901b32195c9c7avboxsync * addressing mode. Currently defined for MIPS and SPARC, even though
45e9809aff7304721fddb95654901b32195c9c7avboxsync * I remember the cg6 as performing better without it (cg3 definitely
45e9809aff7304721fddb95654901b32195c9c7avboxsync * performs better with it).
45e9809aff7304721fddb95654901b32195c9c7avboxsync * LARGE_INSTRUCTION_CACHE -
45e9809aff7304721fddb95654901b32195c9c7avboxsync * This define increases the number of times some loops are
45e9809aff7304721fddb95654901b32195c9c7avboxsync * unrolled. On 68020 machines (with 256 bytes of i-cache),
45e9809aff7304721fddb95654901b32195c9c7avboxsync * this define will slow execution down as instructions miss
45e9809aff7304721fddb95654901b32195c9c7avboxsync * the cache frequently. On machines with real i-caches, this
45e9809aff7304721fddb95654901b32195c9c7avboxsync * reduces loop overhead, causing a slight performance improvement.
45e9809aff7304721fddb95654901b32195c9c7avboxsync * Currently defined for MIPS and SPARC
45e9809aff7304721fddb95654901b32195c9c7avboxsync * FAST_UNALIGNED_READS -
45e9809aff7304721fddb95654901b32195c9c7avboxsync * For machines with more memory bandwidth than CPU, this
45e9809aff7304721fddb95654901b32195c9c7avboxsync * define uses unaligned reads for 8-bit BitBLT instead of doing
45e9809aff7304721fddb95654901b32195c9c7avboxsync * aligned reads and combining the results with shifts and
45e9809aff7304721fddb95654901b32195c9c7avboxsync * logical-ors. Currently defined for 68020 and vax.
45e9809aff7304721fddb95654901b32195c9c7avboxsync * PLENTIFUL_REGISTERS -
45e9809aff7304721fddb95654901b32195c9c7avboxsync * For machines with > 20 registers. Currently used for
45e9809aff7304721fddb95654901b32195c9c7avboxsync * unrolling the text painting code a bit more. Currently
45e9809aff7304721fddb95654901b32195c9c7avboxsync * defined for MIPS.
45e9809aff7304721fddb95654901b32195c9c7avboxsync * SHARED_IDCACHE -
45e9809aff7304721fddb95654901b32195c9c7avboxsync * For non-Harvard RISC machines, those which share the same
45e9809aff7304721fddb95654901b32195c9c7avboxsync * CPU memory bus for instructions and data. This unrolls some
45e9809aff7304721fddb95654901b32195c9c7avboxsync * solid fill loops which are otherwise best left rolled up.
45e9809aff7304721fddb95654901b32195c9c7avboxsync * Currently defined for SPARC.
45e9809aff7304721fddb95654901b32195c9c7avboxsync#define IMAGE_BYTE_ORDER LSBFirst /* Values for the VAX only */
45e9809aff7304721fddb95654901b32195c9c7avboxsync#endif /* vax */
45e9809aff7304721fddb95654901b32195c9c7avboxsync# if defined(XF86MONOVGA) || defined(XF86VGA16) || defined(XF86MONO)
45e9809aff7304721fddb95654901b32195c9c7avboxsync#endif /* __arm32__ */
45e9809aff7304721fddb95654901b32195c9c7avboxsync#define GETLEFTBITS_ALIGNMENT 1 /* PA forces longs to 4 */
45e9809aff7304721fddb95654901b32195c9c7avboxsync /* byte boundries */
45e9809aff7304721fddb95654901b32195c9c7avboxsync#endif /* hpux || __hppa__ */
45e9809aff7304721fddb95654901b32195c9c7avboxsync/* XXX Should this be for Lynx only? */
45e9809aff7304721fddb95654901b32195c9c7avboxsync#endif /* PowerPC */
45e9809aff7304721fddb95654901b32195c9c7avboxsync#endif /* SuperH */
45e9809aff7304721fddb95654901b32195c9c7avboxsync#if (defined(sun) && (defined(__sparc) || defined(sparc))) || \
45e9809aff7304721fddb95654901b32195c9c7avboxsync (defined(__uxp__) && (defined(sparc) || defined(mc68000))) || \
45e9809aff7304721fddb95654901b32195c9c7avboxsync# if !defined(sparc)
45e9809aff7304721fddb95654901b32195c9c7avboxsync# define IMAGE_BYTE_ORDER LSBFirst /* Values for the SUN only */
45e9809aff7304721fddb95654901b32195c9c7avboxsync# define IMAGE_BYTE_ORDER MSBFirst /* Values for the SUN only */
45e9809aff7304721fddb95654901b32195c9c7avboxsync#endif /* sun && !(i386 && SVR4) */
45e9809aff7304721fddb95654901b32195c9c7avboxsync#define IMAGE_BYTE_ORDER MSBFirst /* Values for the RISC/6000 */
45e9809aff7304721fddb95654901b32195c9c7avboxsync#endif /* AIXV3 */
45e9809aff7304721fddb95654901b32195c9c7avboxsync# define IMAGE_BYTE_ORDER LSBFirst /* Value for PS/2 only */
45e9809aff7304721fddb95654901b32195c9c7avboxsync# define IMAGE_BYTE_ORDER MSBFirst /* Values for the RT only*/
45e9809aff7304721fddb95654901b32195c9c7avboxsync/* ibm pcc doesn't understand pragmas. */
45e9809aff7304721fddb95654901b32195c9c7avboxsync#endif /* ibm */
45e9809aff7304721fddb95654901b32195c9c7avboxsync#if defined (M4310) || defined(M4315) || defined(M4317) || defined(M4319) || defined(M4330)
45e9809aff7304721fddb95654901b32195c9c7avboxsync#define IMAGE_BYTE_ORDER MSBFirst /* Values for Pegasus only */
45e9809aff7304721fddb95654901b32195c9c7avboxsync#endif /* tektronix */
45e9809aff7304721fddb95654901b32195c9c7avboxsync#define IMAGE_BYTE_ORDER MSBFirst /* Values for the MacII only */
45e9809aff7304721fddb95654901b32195c9c7avboxsync/* might want FAST_UNALIGNED_READS for frame buffers with < 1us latency */
45e9809aff7304721fddb95654901b32195c9c7avboxsync#endif /* macII */
45e9809aff7304721fddb95654901b32195c9c7avboxsync#if (defined(mips) || defined(__mips)) && !defined(sgi)
45e9809aff7304721fddb95654901b32195c9c7avboxsync# define IMAGE_BYTE_ORDER LSBFirst /* Values for the PMAX only */
45e9809aff7304721fddb95654901b32195c9c7avboxsync# define IMAGE_BYTE_ORDER MSBFirst /* Values for the MIPS only */
45e9809aff7304721fddb95654901b32195c9c7avboxsync#endif /* mips */
45e9809aff7304721fddb95654901b32195c9c7avboxsync#if defined(__alpha) || defined(__alpha__) || defined(__alphaCross)
45e9809aff7304721fddb95654901b32195c9c7avboxsync# define IMAGE_BYTE_ORDER LSBFirst /* Values for the Alpha only */
45e9809aff7304721fddb95654901b32195c9c7avboxsync# if defined(XF86MONOVGA) || defined(XF86VGA16) || defined(XF86MONO)
45e9809aff7304721fddb95654901b32195c9c7avboxsync#endif /* alpha */
45e9809aff7304721fddb95654901b32195c9c7avboxsync# if defined(XF86MONOVGA) || defined(XF86VGA16) || defined(XF86MONO)
45e9809aff7304721fddb95654901b32195c9c7avboxsync#endif /* ia64 */
45e9809aff7304721fddb95654901b32195c9c7avboxsync#if defined(__amd64__) || defined(amd64) || defined(__amd64)
45e9809aff7304721fddb95654901b32195c9c7avboxsync# if defined(XF86MONOVGA) || defined(XF86VGA16) || defined(XF86MONO)
45e9809aff7304721fddb95654901b32195c9c7avboxsync#endif /* AMD64 */
45e9809aff7304721fddb95654901b32195c9c7avboxsync#define IMAGE_BYTE_ORDER MSBFirst /* Values for the stellar only*/
45e9809aff7304721fddb95654901b32195c9c7avboxsync * Use SysV random number generator.
45e9809aff7304721fddb95654901b32195c9c7avboxsync#endif /* stellar */
45e9809aff7304721fddb95654901b32195c9c7avboxsync#define IMAGE_BYTE_ORDER MSBFirst /* Values for the OMRON only*/
45e9809aff7304721fddb95654901b32195c9c7avboxsync#endif /* luna */
45e9809aff7304721fddb95654901b32195c9c7avboxsync defined(__QNX__) || \
45e9809aff7304721fddb95654901b32195c9c7avboxsync# if defined(XF86MONOVGA) || defined(XF86VGA16) || defined(XF86MONO)
45e9809aff7304721fddb95654901b32195c9c7avboxsync#endif /* SVR4 / BSD / i386 */
45e9809aff7304721fddb95654901b32195c9c7avboxsync/* linux on the Compaq Itsy */
45e9809aff7304721fddb95654901b32195c9c7avboxsync/* linux on IBM S/390 */
45e9809aff7304721fddb95654901b32195c9c7avboxsync/* size of buffer to use with GetImage, measured in bytes. There's obviously
45e9809aff7304721fddb95654901b32195c9c7avboxsync * a trade-off between the amount of stack (or whatever ALLOCATE_LOCAL gives
45e9809aff7304721fddb95654901b32195c9c7avboxsync * you) used and the number of times the ddx routine has to be called.
45e9809aff7304721fddb95654901b32195c9c7avboxsync/* pad scanline to a longword */
45e9809aff7304721fddb95654901b32195c9c7avboxsync * This returns the number of padding units, for depth d and width w.
45e9809aff7304721fddb95654901b32195c9c7avboxsync * For bitmaps this can be calculated with the macros above.
45e9809aff7304721fddb95654901b32195c9c7avboxsync * Other depths require either grovelling over the formats field of the
45e9809aff7304721fddb95654901b32195c9c7avboxsync * screenInfo or hardwired constants.
45e9809aff7304721fddb95654901b32195c9c7avboxsync int padPixelsLog2; /* log 2 (pixels per pad unit) */
45e9809aff7304721fddb95654901b32195c9c7avboxsync int bytesPerPixel; /* only set when notPower2 is TRUE */
45e9809aff7304721fddb95654901b32195c9c7avboxsync/* The only portable way to get the bpp from the depth is to look it up */
45e9809aff7304721fddb95654901b32195c9c7avboxsync#define BitsPerPixel(d) (PixmapWidthPaddingInfo[d].bitsPerPixel)
45e9809aff7304721fddb95654901b32195c9c7avboxsync (((int)(w) * PixmapWidthPaddingInfo[d].bytesPerPixel + \
45e9809aff7304721fddb95654901b32195c9c7avboxsync ((int)((w) + PixmapWidthPaddingInfo[d].padRoundUp) >> \
45e9809aff7304721fddb95654901b32195c9c7avboxsync * Return the number of bytes to which a scanline of the given
45e9809aff7304721fddb95654901b32195c9c7avboxsync * depth and width will be padded.
45e9809aff7304721fddb95654901b32195c9c7avboxsync (PixmapWidthInPadUnits(w, d) << PixmapWidthPaddingInfo[d].padBytesLog2)
45e9809aff7304721fddb95654901b32195c9c7avboxsync (((int)((w) + BITMAP_SCANLINE_PAD - 1) >> LOG2_BITMAP_PAD) << LOG2_BYTES_PER_SCANLINE_PAD)
45e9809aff7304721fddb95654901b32195c9c7avboxsync#define PixmapWidthInPadUnitsProto(w, d) PixmapWidthInPadUnits(w, d)
45e9809aff7304721fddb95654901b32195c9c7avboxsync#define PixmapBytePadProto(w, d) PixmapBytePad(w, d)
45e9809aff7304721fddb95654901b32195c9c7avboxsync#endif /* SERVERMD_H */